2 Private Header file for Usb Host Controller PEIM
4 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef _EFI_PEI_XHCI_SCHED_H_
18 #define _EFI_PEI_XHCI_SCHED_H_
21 // Transfer types, used in URB to identify the transfer type
23 #define XHC_CTRL_TRANSFER 0x01
24 #define XHC_BULK_TRANSFER 0x02
29 #define TRB_TYPE_NORMAL 1
30 #define TRB_TYPE_SETUP_STAGE 2
31 #define TRB_TYPE_DATA_STAGE 3
32 #define TRB_TYPE_STATUS_STAGE 4
33 #define TRB_TYPE_ISOCH 5
34 #define TRB_TYPE_LINK 6
35 #define TRB_TYPE_EVENT_DATA 7
36 #define TRB_TYPE_NO_OP 8
37 #define TRB_TYPE_EN_SLOT 9
38 #define TRB_TYPE_DIS_SLOT 10
39 #define TRB_TYPE_ADDRESS_DEV 11
40 #define TRB_TYPE_CON_ENDPOINT 12
41 #define TRB_TYPE_EVALU_CONTXT 13
42 #define TRB_TYPE_RESET_ENDPOINT 14
43 #define TRB_TYPE_STOP_ENDPOINT 15
44 #define TRB_TYPE_SET_TR_DEQUE 16
45 #define TRB_TYPE_RESET_DEV 17
46 #define TRB_TYPE_GET_PORT_BANW 21
47 #define TRB_TYPE_FORCE_HEADER 22
48 #define TRB_TYPE_NO_OP_COMMAND 23
49 #define TRB_TYPE_TRANS_EVENT 32
50 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
51 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
52 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
53 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
54 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
57 // Endpoint Type (EP Type).
59 #define ED_NOT_VALID 0
60 #define ED_ISOCH_OUT 1
62 #define ED_INTERRUPT_OUT 3
63 #define ED_CONTROL_BIDIR 4
66 #define ED_INTERRUPT_IN 7
69 // 6.4.5 TRB Completion Codes
71 #define TRB_COMPLETION_INVALID 0
72 #define TRB_COMPLETION_SUCCESS 1
73 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
74 #define TRB_COMPLETION_BABBLE_ERROR 3
75 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
76 #define TRB_COMPLETION_TRB_ERROR 5
77 #define TRB_COMPLETION_STALL_ERROR 6
78 #define TRB_COMPLETION_SHORT_PACKET 13
81 // The topology string used to present usb device location
83 typedef struct _USB_DEV_TOPOLOGY
{
85 // The tier concatenation of down stream port.
87 UINT32 RouteString
:20;
89 // The root port number of the chain.
93 // The Tier the device reside.
99 // USB Device's RouteChart
101 typedef union _USB_DEV_ROUTE
{
103 USB_DEV_TOPOLOGY Route
;
107 // Endpoint address and its capabilities
109 typedef struct _USB_ENDPOINT
{
111 // Store logical device address assigned by UsbBus
112 // It's because some XHCI host controllers may assign the same physcial device
113 // address for those devices inserted at different root port.
118 EFI_USB_DATA_DIRECTION Direction
;
127 typedef struct _TRB_TEMPLATE
{
140 typedef struct _TRANSFER_RING
{
143 TRB_TEMPLATE
*RingEnqueue
;
144 TRB_TEMPLATE
*RingDequeue
;
148 typedef struct _EVENT_RING
{
152 TRB_TEMPLATE
*EventRingEnqueue
;
153 TRB_TEMPLATE
*EventRingDequeue
;
157 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
160 // URB (Usb Request Block) contains information for all kinds of
163 typedef struct _URB
{
166 // Usb Device URB related information
169 EFI_USB_DEVICE_REQUEST
*Request
;
173 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
180 // completed data length
184 // Command/Tranfer Ring info
187 TRB_TEMPLATE
*TrbStart
;
188 TRB_TEMPLATE
*TrbEnd
;
194 TRB_TEMPLATE
*EvtTrb
;
198 // 6.5 Event Ring Segment Table
199 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
200 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
201 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
202 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
204 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
207 UINT32 RingTrbSize
:16;
210 } EVENT_RING_SEG_TABLE_ENTRY
;
213 // 6.4.1.1 Normal TRB
214 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
215 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
216 // Rings, and to define the Data stage information for Control Transfer Rings.
218 typedef struct _TRANSFER_TRB_NORMAL
{
238 } TRANSFER_TRB_NORMAL
;
241 // 6.4.1.2.1 Setup Stage TRB
242 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
244 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
245 UINT32 bmRequestType
:8;
264 } TRANSFER_TRB_CONTROL_SETUP
;
267 // 6.4.1.2.2 Data Stage TRB
268 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
270 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
290 } TRANSFER_TRB_CONTROL_DATA
;
293 // 6.4.1.2.2 Data Stage TRB
294 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
296 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
312 } TRANSFER_TRB_CONTROL_STATUS
;
315 // 6.4.2.1 Transfer Event TRB
316 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
317 // for more information on the use and operation of Transfer Events.
319 typedef struct _EVT_TRB_TRANSFER
{
325 UINT32 Completecode
:8;
338 // 6.4.2.2 Command Completion Event TRB
339 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
340 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
342 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
348 UINT32 Completecode
:8;
355 } EVT_TRB_COMMAND_COMPLETION
;
358 TRB_TEMPLATE TrbTemplate
;
359 TRANSFER_TRB_NORMAL TrbNormal
;
360 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
361 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
362 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
366 // 6.4.3.1 No Op Command TRB
367 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
368 // mechanisms offered by the xHCI.
370 typedef struct _CMD_TRB_NO_OP
{
382 // 6.4.3.2 Enable Slot Command TRB
383 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
384 // selected slot to the host in a Command Completion Event.
386 typedef struct _CMD_TRB_ENABLE_SLOT
{
395 } CMD_TRB_ENABLE_SLOT
;
398 // 6.4.3.3 Disable Slot Command TRB
399 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
400 // internal xHC resources assigned to the slot.
402 typedef struct _CMD_TRB_DISABLE_SLOT
{
412 } CMD_TRB_DISABLE_SLOT
;
415 // 6.4.3.4 Address Device Command TRB
416 // The Address Device Command TRB transitions the selected Device Context from the Default to the
417 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
418 // issue a SET_ADDRESS request to the USB device.
420 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
433 } CMD_TRB_ADDRESS_DEVICE
;
436 // 6.4.3.5 Configure Endpoint Command TRB
437 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
438 // endpoints selected by the command.
440 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
453 } CMD_TRB_CONFIG_ENDPOINT
;
456 // 6.4.3.6 Evaluate Context Command TRB
457 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
458 // Context data structures in the Device Context have been modified by system software and that the xHC
459 // shall evaluate any changes
461 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
473 } CMD_TRB_EVALUATE_CONTEXT
;
476 // 6.4.3.7 Reset Endpoint Command TRB
477 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
479 typedef struct _CMD_TRB_RESET_ENDPOINT
{
491 } CMD_TRB_RESET_ENDPOINT
;
494 // 6.4.3.8 Stop Endpoint Command TRB
495 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
496 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
498 typedef struct _CMD_TRB_STOP_ENDPOINT
{
510 } CMD_TRB_STOP_ENDPOINT
;
513 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
514 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
515 // Pointer and DCS fields of an Endpoint or Stream Context.
517 typedef struct _CMD_SET_TR_DEQ_POINTER
{
531 } CMD_SET_TR_DEQ_POINTER
;
535 // A Link TRB provides support for non-contiguous TRB Rings.
537 typedef struct _LINK_TRB
{
543 UINT32 InterTarget
:10;
556 // 6.2.2 Slot Context
558 typedef struct _SLOT_CONTEXT
{
559 UINT32 RouteString
:20;
564 UINT32 ContextEntries
:5;
566 UINT32 MaxExitLatency
:16;
567 UINT32 RootHubPortNum
:8;
570 UINT32 TTHubSlotId
:8;
574 UINT32 InterTarget
:10;
576 UINT32 DeviceAddress
:8;
586 typedef struct _SLOT_CONTEXT_64
{
587 UINT32 RouteString
:20;
592 UINT32 ContextEntries
:5;
594 UINT32 MaxExitLatency
:16;
595 UINT32 RootHubPortNum
:8;
598 UINT32 TTHubSlotId
:8;
602 UINT32 InterTarget
:10;
604 UINT32 DeviceAddress
:8;
627 // 6.2.3 Endpoint Context
629 typedef struct _ENDPOINT_CONTEXT
{
633 UINT32 MaxPStreams
:5;
643 UINT32 MaxBurstSize
:8;
644 UINT32 MaxPacketSize
:16;
650 UINT32 AverageTRBLength
:16;
651 UINT32 MaxESITPayload
:16;
658 typedef struct _ENDPOINT_CONTEXT_64
{
662 UINT32 MaxPStreams
:5;
672 UINT32 MaxBurstSize
:8;
673 UINT32 MaxPacketSize
:16;
679 UINT32 AverageTRBLength
:16;
680 UINT32 MaxESITPayload
:16;
696 } ENDPOINT_CONTEXT_64
;
700 // 6.2.5.1 Input Control Context
702 typedef struct _INPUT_CONTRL_CONTEXT
{
711 } INPUT_CONTRL_CONTEXT
;
713 typedef struct _INPUT_CONTRL_CONTEXT_64
{
730 } INPUT_CONTRL_CONTEXT_64
;
733 // 6.2.1 Device Context
735 typedef struct _DEVICE_CONTEXT
{
737 ENDPOINT_CONTEXT EP
[31];
740 typedef struct _DEVICE_CONTEXT_64
{
741 SLOT_CONTEXT_64 Slot
;
742 ENDPOINT_CONTEXT_64 EP
[31];
746 // 6.2.5 Input Context
748 typedef struct _INPUT_CONTEXT
{
749 INPUT_CONTRL_CONTEXT InputControlContext
;
751 ENDPOINT_CONTEXT EP
[31];
754 typedef struct _INPUT_CONTEXT_64
{
755 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
756 SLOT_CONTEXT_64 Slot
;
757 ENDPOINT_CONTEXT_64 EP
[31];
761 Execute the transfer by polling the URB. This is a synchronous operation.
763 @param Xhc The XHCI device.
764 @param CmdTransfer The executed URB is for cmd transfer or not.
765 @param Urb The URB to execute.
766 @param Timeout The time to wait before abort, in millisecond.
768 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
769 @return EFI_TIMEOUT The transfer failed due to time out.
770 @return EFI_SUCCESS The transfer finished OK.
776 IN BOOLEAN CmdTransfer
,
782 Find out the actual device address according to the requested device address from UsbBus.
784 @param Xhc The XHCI device.
785 @param BusDevAddr The requested device address by UsbBus upper driver.
787 @return The actual device address assigned to the device.
791 XhcPeiBusDevAddrToSlotId (
797 Find out the slot id according to the device's route string.
799 @param Xhc The XHCI device.
800 @param RouteString The route string described the device location.
802 @return The slot id used by the device.
806 XhcPeiRouteStringToSlotId (
808 IN USB_DEV_ROUTE RouteString
812 Calculate the device context index by endpoint address and direction.
814 @param EpAddr The target endpoint number.
815 @param Direction The direction of the target endpoint.
817 @return The device context index of endpoint.
821 XhcPeiEndpointToDci (
823 IN EFI_USB_DATA_DIRECTION Direction
827 Ring the door bell to notify XHCI there is a transaction to be executed.
829 @param Xhc The XHCI device.
830 @param SlotId The slot id of the target device.
831 @param Dci The device context index of the target slot or endpoint.
842 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
844 @param Xhc The XHCI device.
845 @param ParentRouteChart The route string pointed to the parent device if it exists.
846 @param Port The port to be polled.
847 @param PortState The port state.
849 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
850 @retval Others Should not appear.
854 XhcPeiPollPortStatusChange (
856 IN USB_DEV_ROUTE ParentRouteChart
,
858 IN EFI_USB_PORT_STATUS
*PortState
862 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
864 @param Xhc The XHCI device.
865 @param SlotId The slot id to be configured.
866 @param PortNum The total number of downstream port supported by the hub.
867 @param TTT The TT think time of the hub device.
868 @param MTT The multi-TT of the hub device.
870 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
874 XhcPeiConfigHubContext (
883 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
885 @param Xhc The XHCI device.
886 @param SlotId The slot id to be configured.
887 @param PortNum The total number of downstream port supported by the hub.
888 @param TTT The TT think time of the hub device.
889 @param MTT The multi-TT of the hub device.
891 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
895 XhcPeiConfigHubContext64 (
904 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
906 @param Xhc The XHCI device.
907 @param SlotId The slot id to be configured.
908 @param DeviceSpeed The device's speed.
909 @param ConfigDesc The pointer to the usb device configuration descriptor.
911 @retval EFI_SUCCESS Successfully configure all the device endpoints.
918 IN UINT8 DeviceSpeed
,
919 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
923 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
925 @param Xhc The XHCI device.
926 @param SlotId The slot id to be configured.
927 @param DeviceSpeed The device's speed.
928 @param ConfigDesc The pointer to the usb device configuration descriptor.
930 @retval EFI_SUCCESS Successfully configure all the device endpoints.
934 XhcPeiSetConfigCmd64 (
937 IN UINT8 DeviceSpeed
,
938 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
942 Stop endpoint through XHCI's Stop_Endpoint cmd.
944 @param Xhc The XHCI device.
945 @param SlotId The slot id of the target device.
946 @param Dci The device context index of the target slot or endpoint.
948 @retval EFI_SUCCESS Stop endpoint successfully.
949 @retval Others Failed to stop endpoint.
961 Reset endpoint through XHCI's Reset_Endpoint cmd.
963 @param Xhc The XHCI device.
964 @param SlotId The slot id of the target device.
965 @param Dci The device context index of the target slot or endpoint.
967 @retval EFI_SUCCESS Reset endpoint successfully.
968 @retval Others Failed to reset endpoint.
973 XhcPeiResetEndpoint (
980 Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
982 @param Xhc The XHCI device.
983 @param SlotId The slot id of the target device.
984 @param Dci The device context index of the target slot or endpoint.
985 @param Urb The dequeue pointer of the transfer ring specified
986 by the urb to be updated.
988 @retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
989 @retval Others Failed to set transfer ring dequeue pointer.
994 XhcPeiSetTrDequeuePointer (
1002 Assign and initialize the device slot for a new device.
1004 @param Xhc The XHCI device.
1005 @param ParentRouteChart The route string pointed to the parent device.
1006 @param ParentPort The port at which the device is located.
1007 @param RouteChart The route string pointed to the device.
1008 @param DeviceSpeed The device speed.
1010 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1011 @retval Others Fail to initialize device slot.
1015 XhcPeiInitializeDeviceSlot (
1016 IN PEI_XHC_DEV
*Xhc
,
1017 IN USB_DEV_ROUTE ParentRouteChart
,
1018 IN UINT16 ParentPort
,
1019 IN USB_DEV_ROUTE RouteChart
,
1020 IN UINT8 DeviceSpeed
1024 Assign and initialize the device slot for a new device.
1026 @param Xhc The XHCI device.
1027 @param ParentRouteChart The route string pointed to the parent device.
1028 @param ParentPort The port at which the device is located.
1029 @param RouteChart The route string pointed to the device.
1030 @param DeviceSpeed The device speed.
1032 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1033 @retval Others Fail to initialize device slot.
1037 XhcPeiInitializeDeviceSlot64 (
1038 IN PEI_XHC_DEV
*Xhc
,
1039 IN USB_DEV_ROUTE ParentRouteChart
,
1040 IN UINT16 ParentPort
,
1041 IN USB_DEV_ROUTE RouteChart
,
1042 IN UINT8 DeviceSpeed
1046 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1048 @param Xhc The XHCI device.
1049 @param SlotId The slot id to be evaluated.
1050 @param MaxPacketSize The max packet size supported by the device control transfer.
1052 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1056 XhcPeiEvaluateContext (
1057 IN PEI_XHC_DEV
*Xhc
,
1059 IN UINT32 MaxPacketSize
1063 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1065 @param Xhc The XHCI device.
1066 @param SlotId The slot id to be evaluated.
1067 @param MaxPacketSize The max packet size supported by the device control transfer.
1069 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1073 XhcPeiEvaluateContext64 (
1074 IN PEI_XHC_DEV
*Xhc
,
1076 IN UINT32 MaxPacketSize
1080 Disable the specified device slot.
1082 @param Xhc The XHCI device.
1083 @param SlotId The slot id to be disabled.
1085 @retval EFI_SUCCESS Successfully disable the device slot.
1089 XhcPeiDisableSlotCmd (
1090 IN PEI_XHC_DEV
*Xhc
,
1095 Disable the specified device slot.
1097 @param Xhc The XHCI device.
1098 @param SlotId The slot id to be disabled.
1100 @retval EFI_SUCCESS Successfully disable the device slot.
1104 XhcPeiDisableSlotCmd64 (
1105 IN PEI_XHC_DEV
*Xhc
,
1110 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1111 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1112 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1113 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1114 Stopped to the Running state.
1116 @param Xhc The XHCI device.
1117 @param Urb The urb which makes the endpoint halted.
1119 @retval EFI_SUCCESS The recovery is successful.
1120 @retval Others Failed to recovery halted endpoint.
1124 XhcPeiRecoverHaltedEndpoint (
1125 IN PEI_XHC_DEV
*Xhc
,
1130 System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
1131 Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
1132 the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
1135 @param Xhc The XHCI device.
1136 @param Urb The urb which doesn't get completed in a specified timeout range.
1138 @retval EFI_SUCCESS The dequeuing of the TDs is successful.
1139 @retval Others Failed to stop the endpoint and dequeue the TDs.
1143 XhcPeiDequeueTrbFromEndpoint (
1144 IN PEI_XHC_DEV
*Xhc
,
1149 Create a new URB for a new transaction.
1151 @param Xhc The XHCI device
1152 @param DevAddr The device address
1153 @param EpAddr Endpoint addrress
1154 @param DevSpeed The device speed
1155 @param MaxPacket The max packet length of the endpoint
1156 @param Type The transaction type
1157 @param Request The standard USB request for control transfer
1158 @param Data The user data to transfer
1159 @param DataLen The length of data buffer
1160 @param Callback The function to call when data is transferred
1161 @param Context The context to the callback
1163 @return Created URB or NULL
1168 IN PEI_XHC_DEV
*Xhc
,
1174 IN EFI_USB_DEVICE_REQUEST
*Request
,
1177 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1182 Free an allocated URB.
1184 @param Xhc The XHCI device.
1185 @param Urb The URB to free.
1190 IN PEI_XHC_DEV
*Xhc
,
1195 Create a transfer TRB.
1197 @param Xhc The XHCI device
1198 @param Urb The urb used to construct the transfer TRB.
1200 @return Created TRB or NULL
1204 XhcPeiCreateTransferTrb (
1205 IN PEI_XHC_DEV
*Xhc
,
1210 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1212 @param Xhc The XHCI device.
1213 @param TrsRing The transfer ring to sync.
1215 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1220 IN PEI_XHC_DEV
*Xhc
,
1221 IN TRANSFER_RING
*TrsRing
1225 Create XHCI transfer ring.
1227 @param Xhc The XHCI Device.
1228 @param TrbNum The number of TRB in the ring.
1229 @param TransferRing The created transfer ring.
1233 XhcPeiCreateTransferRing (
1234 IN PEI_XHC_DEV
*Xhc
,
1236 OUT TRANSFER_RING
*TransferRing
1240 Check if there is a new generated event.
1242 @param Xhc The XHCI device.
1243 @param EvtRing The event ring to check.
1244 @param NewEvtTrb The new event TRB found.
1246 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1247 @retval EFI_NOT_READY The event ring has no new event.
1251 XhcPeiCheckNewEvent (
1252 IN PEI_XHC_DEV
*Xhc
,
1253 IN EVENT_RING
*EvtRing
,
1254 OUT TRB_TEMPLATE
**NewEvtTrb
1258 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1260 @param Xhc The XHCI device.
1261 @param EvtRing The event ring to sync.
1263 @retval EFI_SUCCESS The event ring is synchronized successfully.
1267 XhcPeiSyncEventRing (
1268 IN PEI_XHC_DEV
*Xhc
,
1269 IN EVENT_RING
*EvtRing
1273 Create XHCI event ring.
1275 @param Xhc The XHCI device.
1276 @param EventRing The created event ring.
1280 XhcPeiCreateEventRing (
1281 IN PEI_XHC_DEV
*Xhc
,
1282 OUT EVENT_RING
*EventRing
1286 Initialize the XHCI host controller for schedule.
1288 @param Xhc The XHCI device to be initialized.
1297 Free the resouce allocated at initializing schedule.
1299 @param Xhc The XHCI device.