3 Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php.
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #include "SdBlockIoPei.h"
17 Read/Write specified SD host controller mmio register.
19 @param[in] Address The address of the mmio register to be read/written.
20 @param[in] Read A boolean to indicate it's read or write operation.
21 @param[in] Count The width of the mmio register in bytes.
22 Must be 1, 2 , 4 or 8 bytes.
23 @param[in, out] Data For read operations, the destination buffer to store
24 the results. For write operations, the source buffer
25 to write data from. The caller is responsible for
26 having ownership of the data buffer and ensuring its
27 size not less than Count bytes.
29 @retval EFI_INVALID_PARAMETER The Address or the Data or the Count is not valid.
30 @retval EFI_SUCCESS The read/write operation succeeds.
31 @retval Others The read/write operation fails.
43 if ((Address
== 0) || (Data
== NULL
)) {
44 return EFI_INVALID_PARAMETER
;
47 if ((Count
!= 1) && (Count
!= 2) && (Count
!= 4) && (Count
!= 8)) {
48 return EFI_INVALID_PARAMETER
;
54 *(UINT8
*)Data
= MmioRead8 (Address
);
56 MmioWrite8 (Address
, *(UINT8
*)Data
);
61 *(UINT16
*)Data
= MmioRead16 (Address
);
63 MmioWrite16 (Address
, *(UINT16
*)Data
);
68 *(UINT32
*)Data
= MmioRead32 (Address
);
70 MmioWrite32 (Address
, *(UINT32
*)Data
);
75 *(UINT64
*)Data
= MmioRead64 (Address
);
77 MmioWrite64 (Address
, *(UINT64
*)Data
);
82 return EFI_INVALID_PARAMETER
;
89 Do OR operation with the value of the specified SD host controller mmio register.
91 @param[in] Address The address of the mmio register to be read/written.
92 @param[in] Count The width of the mmio register in bytes.
93 Must be 1, 2 , 4 or 8 bytes.
94 @param[in] OrData The pointer to the data used to do OR operation.
95 The caller is responsible for having ownership of
96 the data buffer and ensuring its size not less than
99 @retval EFI_INVALID_PARAMETER The Address or the OrData or the Count is not valid.
100 @retval EFI_SUCCESS The OR operation succeeds.
101 @retval Others The OR operation fails.
116 Status
= SdPeimHcRwMmio (Address
, TRUE
, Count
, &Data
);
117 if (EFI_ERROR (Status
)) {
122 Or
= *(UINT8
*) OrData
;
123 } else if (Count
== 2) {
124 Or
= *(UINT16
*) OrData
;
125 } else if (Count
== 4) {
126 Or
= *(UINT32
*) OrData
;
127 } else if (Count
== 8) {
128 Or
= *(UINT64
*) OrData
;
130 return EFI_INVALID_PARAMETER
;
134 Status
= SdPeimHcRwMmio (Address
, FALSE
, Count
, &Data
);
140 Do AND operation with the value of the specified SD host controller mmio register.
142 @param[in] Address The address of the mmio register to be read/written.
143 @param[in] Count The width of the mmio register in bytes.
144 Must be 1, 2 , 4 or 8 bytes.
145 @param[in] AndData The pointer to the data used to do AND operation.
146 The caller is responsible for having ownership of
147 the data buffer and ensuring its size not less than
150 @retval EFI_INVALID_PARAMETER The Address or the AndData or the Count is not valid.
151 @retval EFI_SUCCESS The AND operation succeeds.
152 @retval Others The AND operation fails.
167 Status
= SdPeimHcRwMmio (Address
, TRUE
, Count
, &Data
);
168 if (EFI_ERROR (Status
)) {
173 And
= *(UINT8
*) AndData
;
174 } else if (Count
== 2) {
175 And
= *(UINT16
*) AndData
;
176 } else if (Count
== 4) {
177 And
= *(UINT32
*) AndData
;
178 } else if (Count
== 8) {
179 And
= *(UINT64
*) AndData
;
181 return EFI_INVALID_PARAMETER
;
185 Status
= SdPeimHcRwMmio (Address
, FALSE
, Count
, &Data
);
191 Wait for the value of the specified MMIO register set to the test value.
193 @param[in] Address The address of the mmio register to be checked.
194 @param[in] Count The width of the mmio register in bytes.
195 Must be 1, 2, 4 or 8 bytes.
196 @param[in] MaskValue The mask value of memory.
197 @param[in] TestValue The test value of memory.
199 @retval EFI_NOT_READY The MMIO register hasn't set to the expected value.
200 @retval EFI_SUCCESS The MMIO register has expected value.
201 @retval Others The MMIO operation fails.
206 SdPeimHcCheckMmioSet (
217 // Access PCI MMIO space to see if the value is the tested one.
220 Status
= SdPeimHcRwMmio (Address
, TRUE
, Count
, &Value
);
221 if (EFI_ERROR (Status
)) {
227 if (Value
== TestValue
) {
231 return EFI_NOT_READY
;
235 Wait for the value of the specified MMIO register set to the test value.
237 @param[in] Address The address of the mmio register to wait.
238 @param[in] Count The width of the mmio register in bytes.
239 Must be 1, 2, 4 or 8 bytes.
240 @param[in] MaskValue The mask value of memory.
241 @param[in] TestValue The test value of memory.
242 @param[in] Timeout The time out value for wait memory set, uses 1
243 microsecond as a unit.
245 @retval EFI_TIMEOUT The MMIO register hasn't expected value in timeout
247 @retval EFI_SUCCESS The MMIO register has expected value.
248 @retval Others The MMIO operation fails.
253 SdPeimHcWaitMmioSet (
262 BOOLEAN InfiniteWait
;
267 InfiniteWait
= FALSE
;
270 while (InfiniteWait
|| (Timeout
> 0)) {
271 Status
= SdPeimHcCheckMmioSet (
277 if (Status
!= EFI_NOT_READY
) {
282 // Stall for 1 microsecond.
284 MicroSecondDelay (1);
293 Software reset the specified SD host controller and enable all interrupts.
295 @param[in] Bar The mmio base address of the slot to be accessed.
297 @retval EFI_SUCCESS The software reset executes successfully.
298 @retval Others The software reset fails.
310 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_SW_RST
, FALSE
, sizeof (SwReset
), &SwReset
);
312 if (EFI_ERROR (Status
)) {
313 DEBUG ((EFI_D_ERROR
, "SdPeimHcReset: write full 1 fails: %r\n", Status
));
317 Status
= SdPeimHcWaitMmioSet (
324 if (EFI_ERROR (Status
)) {
325 DEBUG ((EFI_D_INFO
, "SdPeimHcReset: reset done with %r\n", Status
));
329 // Enable all interrupt after reset all.
331 Status
= SdPeimHcEnableInterrupt (Bar
);
337 Set all interrupt status bits in Normal and Error Interrupt Status Enable
340 @param[in] Bar The mmio base address of the slot to be accessed.
342 @retval EFI_SUCCESS The operation executes successfully.
343 @retval Others The operation fails.
347 SdPeimHcEnableInterrupt (
355 // Enable all bits in Error Interrupt Status Enable Register
358 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_ERR_INT_STS_EN
, FALSE
, sizeof (IntStatus
), &IntStatus
);
359 if (EFI_ERROR (Status
)) {
363 // Enable all bits in Normal Interrupt Status Enable Register
366 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_NOR_INT_STS_EN
, FALSE
, sizeof (IntStatus
), &IntStatus
);
372 Get the capability data from the specified slot.
374 @param[in] Bar The mmio base address of the slot to be accessed.
375 @param[out] Capability The buffer to store the capability data.
377 @retval EFI_SUCCESS The operation executes successfully.
378 @retval Others The operation fails.
382 SdPeimHcGetCapability (
384 OUT SD_HC_SLOT_CAP
*Capability
390 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_CAP
, TRUE
, sizeof (Cap
), &Cap
);
391 if (EFI_ERROR (Status
)) {
395 CopyMem (Capability
, &Cap
, sizeof (Cap
));
401 Detect whether there is a SD card attached at the specified SD host controller
404 Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.
406 @param[in] Bar The mmio base address of the slot to be accessed.
408 @retval EFI_SUCCESS There is a SD card attached.
409 @retval EFI_NO_MEDIA There is not a SD card attached.
410 @retval Others The detection fails.
423 // Check Normal Interrupt Status Register
425 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_NOR_INT_STS
, TRUE
, sizeof (Data
), &Data
);
426 if (EFI_ERROR (Status
)) {
430 if ((Data
& (BIT6
| BIT7
)) != 0) {
432 // Clear BIT6 and BIT7 by writing 1 to these two bits if set.
435 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_NOR_INT_STS
, FALSE
, sizeof (Data
), &Data
);
436 if (EFI_ERROR (Status
)) {
442 // Check Present State Register to see if there is a card presented.
444 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_PRESENT_STATE
, TRUE
, sizeof (PresentState
), &PresentState
);
445 if (EFI_ERROR (Status
)) {
449 if ((PresentState
& BIT16
) != 0) {
459 Refer to SD Host Controller Simplified spec 3.0 Section 3.2.2 for details.
461 @param[in] Bar The mmio base address of the slot to be accessed.
463 @retval EFI_SUCCESS Succeed to stop SD clock.
464 @retval Others Fail to stop SD clock.
477 // Ensure no SD transactions are occurring on the SD Bus by
478 // waiting for Command Inhibit (DAT) and Command Inhibit (CMD)
479 // in the Present State register to be 0.
481 Status
= SdPeimHcWaitMmioSet (
482 Bar
+ SD_HC_PRESENT_STATE
,
483 sizeof (PresentState
),
488 if (EFI_ERROR (Status
)) {
493 // Set SD Clock Enable in the Clock Control register to 0
495 ClockCtrl
= (UINT16
)~BIT2
;
496 Status
= SdPeimHcAndMmio (Bar
+ SD_HC_CLOCK_CTRL
, sizeof (ClockCtrl
), &ClockCtrl
);
502 SD card clock supply.
504 Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.
506 @param[in] Bar The mmio base address of the slot to be accessed.
507 @param[in] ClockFreq The max clock frequency to be set. The unit is KHz.
509 @retval EFI_SUCCESS The clock is supplied successfully.
510 @retval Others The clock isn't supplied successfully.
514 SdPeimHcClockSupply (
520 SD_HC_SLOT_CAP Capability
;
525 UINT16 ControllerVer
;
529 // Calculate a divisor for SD clock frequency
531 Status
= SdPeimHcGetCapability (Bar
, &Capability
);
532 if (EFI_ERROR (Status
)) {
535 ASSERT (Capability
.BaseClkFreq
!= 0);
537 BaseClkFreq
= Capability
.BaseClkFreq
;
539 if (ClockFreq
== 0) {
540 return EFI_INVALID_PARAMETER
;
543 if (ClockFreq
> (BaseClkFreq
* 1000)) {
544 ClockFreq
= BaseClkFreq
* 1000;
548 // Calculate the divisor of base frequency.
551 SettingFreq
= BaseClkFreq
* 1000;
552 while (ClockFreq
< SettingFreq
) {
555 SettingFreq
= (BaseClkFreq
* 1000) / (2 * Divisor
);
556 Remainder
= (BaseClkFreq
* 1000) % (2 * Divisor
);
557 if ((ClockFreq
== SettingFreq
) && (Remainder
== 0)) {
560 if ((ClockFreq
== SettingFreq
) && (Remainder
!= 0)) {
565 DEBUG ((EFI_D_INFO
, "BaseClkFreq %dMHz Divisor %d ClockFreq %dKhz\n", BaseClkFreq
, Divisor
, ClockFreq
));
567 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_CTRL_VER
, TRUE
, sizeof (ControllerVer
), &ControllerVer
);
568 if (EFI_ERROR (Status
)) {
572 // Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
574 if ((ControllerVer
& 0xFF) == 2) {
575 ASSERT (Divisor
<= 0x3FF);
576 ClockCtrl
= ((Divisor
& 0xFF) << 8) | ((Divisor
& 0x300) >> 2);
577 } else if (((ControllerVer
& 0xFF) == 0) || ((ControllerVer
& 0xFF) == 1)) {
579 // Only the most significant bit can be used as divisor.
581 if (((Divisor
- 1) & Divisor
) != 0) {
582 Divisor
= 1 << (HighBitSet32 (Divisor
) + 1);
584 ASSERT (Divisor
<= 0x80);
585 ClockCtrl
= (Divisor
& 0xFF) << 8;
587 DEBUG ((EFI_D_ERROR
, "Unknown SD Host Controller Spec version [0x%x]!!!\n", ControllerVer
));
588 return EFI_UNSUPPORTED
;
592 // Stop bus clock at first
594 Status
= SdPeimHcStopClock (Bar
);
595 if (EFI_ERROR (Status
)) {
600 // Supply clock frequency with specified divisor
603 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_CLOCK_CTRL
, FALSE
, sizeof (ClockCtrl
), &ClockCtrl
);
604 if (EFI_ERROR (Status
)) {
605 DEBUG ((EFI_D_ERROR
, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
610 // Wait Internal Clock Stable in the Clock Control register to be 1
612 Status
= SdPeimHcWaitMmioSet (
613 Bar
+ SD_HC_CLOCK_CTRL
,
619 if (EFI_ERROR (Status
)) {
624 // Set SD Clock Enable in the Clock Control register to 1
627 Status
= SdPeimHcOrMmio (Bar
+ SD_HC_CLOCK_CTRL
, sizeof (ClockCtrl
), &ClockCtrl
);
633 SD bus power control.
635 Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
637 @param[in] Bar The mmio base address of the slot to be accessed.
638 @param[in] PowerCtrl The value setting to the power control register.
640 @retval TRUE There is a SD card attached.
641 @retval FALSE There is no a SD card attached.
645 SdPeimHcPowerControl (
655 PowerCtrl
&= (UINT8
)~BIT0
;
656 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_POWER_CTRL
, FALSE
, sizeof (PowerCtrl
), &PowerCtrl
);
657 if (EFI_ERROR (Status
)) {
662 // Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
665 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_POWER_CTRL
, FALSE
, sizeof (PowerCtrl
), &PowerCtrl
);
671 Set the SD bus width.
673 Refer to SD Host Controller Simplified spec 3.0 Section 3.4 for details.
675 @param[in] Bar The mmio base address of the slot to be accessed.
676 @param[in] BusWidth The bus width used by the SD device, it must be 1, 4 or 8.
678 @retval EFI_SUCCESS The bus width is set successfully.
679 @retval Others The bus width isn't set successfully.
683 SdPeimHcSetBusWidth (
692 HostCtrl1
= (UINT8
)~(BIT5
| BIT1
);
693 Status
= SdPeimHcAndMmio (Bar
+ SD_HC_HOST_CTRL1
, sizeof (HostCtrl1
), &HostCtrl1
);
694 } else if (BusWidth
== 4) {
695 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_HOST_CTRL1
, TRUE
, sizeof (HostCtrl1
), &HostCtrl1
);
696 if (EFI_ERROR (Status
)) {
700 HostCtrl1
&= (UINT8
)~BIT5
;
701 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_HOST_CTRL1
, FALSE
, sizeof (HostCtrl1
), &HostCtrl1
);
702 } else if (BusWidth
== 8) {
703 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_HOST_CTRL1
, TRUE
, sizeof (HostCtrl1
), &HostCtrl1
);
704 if (EFI_ERROR (Status
)) {
707 HostCtrl1
&= (UINT8
)~BIT1
;
709 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_HOST_CTRL1
, FALSE
, sizeof (HostCtrl1
), &HostCtrl1
);
712 return EFI_INVALID_PARAMETER
;
719 Supply SD card with lowest clock frequency at initialization.
721 @param[in] Bar The mmio base address of the slot to be accessed.
723 @retval EFI_SUCCESS The clock is supplied successfully.
724 @retval Others The clock isn't supplied successfully.
728 SdPeimHcInitClockFreq (
733 SD_HC_SLOT_CAP Capability
;
737 // Calculate a divisor for SD clock frequency
739 Status
= SdPeimHcGetCapability (Bar
, &Capability
);
740 if (EFI_ERROR (Status
)) {
744 if (Capability
.BaseClkFreq
== 0) {
746 // Don't support get Base Clock Frequency information via another method
748 return EFI_UNSUPPORTED
;
751 // Supply 400KHz clock frequency at initialization phase.
754 Status
= SdPeimHcClockSupply (Bar
, InitFreq
);
759 Supply SD card with maximum voltage at initialization.
761 Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.
763 @param[in] Bar The mmio base address of the slot to be accessed.
765 @retval EFI_SUCCESS The voltage is supplied successfully.
766 @retval Others The voltage isn't supplied successfully.
770 SdPeimHcInitPowerVoltage (
775 SD_HC_SLOT_CAP Capability
;
780 // Get the support voltage of the Host Controller
782 Status
= SdPeimHcGetCapability (Bar
, &Capability
);
783 if (EFI_ERROR (Status
)) {
787 // Calculate supported maximum voltage according to SD Bus Voltage Select
789 if (Capability
.Voltage33
!= 0) {
794 } else if (Capability
.Voltage30
!= 0) {
799 } else if (Capability
.Voltage18
!= 0) {
805 Status
= SdPeimHcOrMmio (Bar
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
806 if (EFI_ERROR (Status
)) {
809 MicroSecondDelay (5000);
812 return EFI_DEVICE_ERROR
;
816 // Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
818 Status
= SdPeimHcPowerControl (Bar
, MaxVoltage
);
824 Initialize the Timeout Control register with most conservative value at initialization.
826 Refer to SD Host Controller Simplified spec 3.0 Section 2.2.15 for details.
828 @param[in] Bar The mmio base address of the slot to be accessed.
830 @retval EFI_SUCCESS The timeout control register is configured successfully.
831 @retval Others The timeout control register isn't configured successfully.
835 SdPeimHcInitTimeoutCtrl (
843 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_TIMEOUT_CTRL
, FALSE
, sizeof (Timeout
), &Timeout
);
849 Initial SD host controller with lowest clock frequency, max power and max timeout value
852 @param[in] Bar The mmio base address of the slot to be accessed.
854 @retval EFI_SUCCESS The host controller is initialized successfully.
855 @retval Others The host controller isn't initialized successfully.
865 Status
= SdPeimHcInitClockFreq (Bar
);
866 if (EFI_ERROR (Status
)) {
870 Status
= SdPeimHcInitPowerVoltage (Bar
);
871 if (EFI_ERROR (Status
)) {
875 Status
= SdPeimHcInitTimeoutCtrl (Bar
);
882 @param[in] Bar The mmio base address of the slot to be accessed.
883 @param[in] On The boolean to turn on/off LED.
885 @retval EFI_SUCCESS The LED is turned on/off successfully.
886 @retval Others The LED isn't turned on/off successfully.
900 Status
= SdPeimHcOrMmio (Bar
+ SD_HC_HOST_CTRL1
, sizeof (HostCtrl1
), &HostCtrl1
);
902 HostCtrl1
= (UINT8
)~BIT0
;
903 Status
= SdPeimHcAndMmio (Bar
+ SD_HC_HOST_CTRL1
, sizeof (HostCtrl1
), &HostCtrl1
);
910 Build ADMA descriptor table for transfer.
912 Refer to SD Host Controller Simplified spec 3.0 Section 1.13 for details.
914 @param[in] Trb The pointer to the SD_TRB instance.
916 @retval EFI_SUCCESS The ADMA descriptor table is created successfully.
917 @retval Others The ADMA descriptor table isn't created successfully.
925 EFI_PHYSICAL_ADDRESS Data
;
932 Data
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)Trb
->Data
;
933 DataLen
= Trb
->DataLen
;
935 // Only support 32bit ADMA Descriptor Table
937 if ((Data
>= 0x100000000ul
) || ((Data
+ DataLen
) > 0x100000000ul
)) {
938 return EFI_INVALID_PARAMETER
;
941 // Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)
942 // for 32-bit address descriptor table.
944 if ((Data
& (BIT0
| BIT1
)) != 0) {
945 DEBUG ((EFI_D_INFO
, "The buffer [0x%x] to construct ADMA desc is not aligned to 4 bytes boundary!\n", Data
));
948 Entries
= DivU64x32 ((DataLen
+ ADMA_MAX_DATA_PER_LINE
- 1), ADMA_MAX_DATA_PER_LINE
);
950 Trb
->AdmaDescSize
= (UINTN
)MultU64x32 (Entries
, sizeof (SD_HC_ADMA_DESC_LINE
));
951 Trb
->AdmaDesc
= SdPeimAllocateMem (Trb
->Slot
->Private
->Pool
, Trb
->AdmaDescSize
);
952 if (Trb
->AdmaDesc
== NULL
) {
953 return EFI_OUT_OF_RESOURCES
;
957 Address
= (UINT32
)Data
;
958 for (Index
= 0; Index
< Entries
; Index
++) {
959 if (Remaining
<= ADMA_MAX_DATA_PER_LINE
) {
960 Trb
->AdmaDesc
[Index
].Valid
= 1;
961 Trb
->AdmaDesc
[Index
].Act
= 2;
962 Trb
->AdmaDesc
[Index
].Length
= (UINT16
)Remaining
;
963 Trb
->AdmaDesc
[Index
].Address
= Address
;
966 Trb
->AdmaDesc
[Index
].Valid
= 1;
967 Trb
->AdmaDesc
[Index
].Act
= 2;
968 Trb
->AdmaDesc
[Index
].Length
= 0;
969 Trb
->AdmaDesc
[Index
].Address
= Address
;
972 Remaining
-= ADMA_MAX_DATA_PER_LINE
;
973 Address
+= ADMA_MAX_DATA_PER_LINE
;
977 // Set the last descriptor line as end of descriptor table
979 Trb
->AdmaDesc
[Index
].End
= 1;
984 Create a new TRB for the SD cmd request.
986 @param[in] Slot The slot number of the SD card to send the command to.
987 @param[in] Packet A pointer to the SD command data structure.
989 @return Created Trb or NULL.
994 IN SD_PEIM_HC_SLOT
*Slot
,
995 IN SD_COMMAND_PACKET
*Packet
1000 SD_HC_SLOT_CAP Capability
;
1003 // Calculate a divisor for SD clock frequency
1005 Status
= SdPeimHcGetCapability (Slot
->SdHcBase
, &Capability
);
1006 if (EFI_ERROR (Status
)) {
1010 Trb
= SdPeimAllocateMem (Slot
->Private
->Pool
, sizeof (SD_TRB
));
1016 Trb
->BlockSize
= 0x200;
1017 Trb
->Packet
= Packet
;
1018 Trb
->Timeout
= Packet
->Timeout
;
1020 if ((Packet
->InTransferLength
!= 0) && (Packet
->InDataBuffer
!= NULL
)) {
1021 Trb
->Data
= Packet
->InDataBuffer
;
1022 Trb
->DataLen
= Packet
->InTransferLength
;
1024 } else if ((Packet
->OutTransferLength
!= 0) && (Packet
->OutDataBuffer
!= NULL
)) {
1025 Trb
->Data
= Packet
->OutDataBuffer
;
1026 Trb
->DataLen
= Packet
->OutTransferLength
;
1028 } else if ((Packet
->InTransferLength
== 0) && (Packet
->OutTransferLength
== 0)) {
1035 if ((Trb
->DataLen
!= 0) && (Trb
->DataLen
< Trb
->BlockSize
)) {
1036 Trb
->BlockSize
= (UINT16
)Trb
->DataLen
;
1039 if (Packet
->SdCmdBlk
->CommandIndex
== SD_SEND_TUNING_BLOCK
) {
1040 Trb
->Mode
= SdPioMode
;
1042 if (Trb
->DataLen
== 0) {
1043 Trb
->Mode
= SdNoData
;
1044 } else if (Capability
.Adma2
!= 0) {
1045 Trb
->Mode
= SdAdmaMode
;
1046 Status
= BuildAdmaDescTable (Trb
);
1047 if (EFI_ERROR (Status
)) {
1050 } else if (Capability
.Sdma
!= 0) {
1051 Trb
->Mode
= SdSdmaMode
;
1053 Trb
->Mode
= SdPioMode
;
1059 SdPeimFreeTrb (Trb
);
1064 Free the resource used by the TRB.
1066 @param[in] Trb The pointer to the SD_TRB instance.
1074 if ((Trb
!= NULL
) && (Trb
->AdmaDesc
!= NULL
)) {
1075 SdPeimFreeMem (Trb
->Slot
->Private
->Pool
, Trb
->AdmaDesc
, Trb
->AdmaDescSize
);
1079 SdPeimFreeMem (Trb
->Slot
->Private
->Pool
, Trb
, sizeof (SD_TRB
));
1085 Check if the env is ready for execute specified TRB.
1087 @param[in] Bar The mmio base address of the slot to be accessed.
1088 @param[in] Trb The pointer to the SD_TRB instance.
1090 @retval EFI_SUCCESS The env is ready for TRB execution.
1091 @retval EFI_NOT_READY The env is not ready for TRB execution.
1092 @retval Others Some erros happen.
1102 SD_COMMAND_PACKET
*Packet
;
1103 UINT32 PresentState
;
1105 Packet
= Trb
->Packet
;
1107 if ((Packet
->SdCmdBlk
->CommandType
== SdCommandTypeAdtc
) ||
1108 (Packet
->SdCmdBlk
->ResponseType
== SdResponseTypeR1b
) ||
1109 (Packet
->SdCmdBlk
->ResponseType
== SdResponseTypeR5b
)) {
1111 // Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
1112 // the Present State register to be 0
1114 PresentState
= BIT0
| BIT1
;
1117 // Wait Command Inhibit (CMD) in the Present State register
1120 PresentState
= BIT0
;
1123 Status
= SdPeimHcCheckMmioSet (
1124 Bar
+ SD_HC_PRESENT_STATE
,
1125 sizeof (PresentState
),
1134 Wait for the env to be ready for execute specified TRB.
1136 @param[in] Bar The mmio base address of the slot to be accessed.
1137 @param[in] Trb The pointer to the SD_TRB instance.
1139 @retval EFI_SUCCESS The env is ready for TRB execution.
1140 @retval EFI_TIMEOUT The env is not ready for TRB execution in time.
1141 @retval Others Some erros happen.
1151 SD_COMMAND_PACKET
*Packet
;
1153 BOOLEAN InfiniteWait
;
1156 // Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
1158 Packet
= Trb
->Packet
;
1159 Timeout
= Packet
->Timeout
;
1161 InfiniteWait
= TRUE
;
1163 InfiniteWait
= FALSE
;
1166 while (InfiniteWait
|| (Timeout
> 0)) {
1168 // Check Trb execution result by reading Normal Interrupt Status register.
1170 Status
= SdPeimCheckTrbEnv (Bar
, Trb
);
1171 if (Status
!= EFI_NOT_READY
) {
1175 // Stall for 1 microsecond.
1177 MicroSecondDelay (1);
1186 Execute the specified TRB.
1188 @param[in] Bar The mmio base address of the slot to be accessed.
1189 @param[in] Trb The pointer to the SD_TRB instance.
1191 @retval EFI_SUCCESS The TRB is sent to host controller successfully.
1192 @retval Others Some erros happen when sending this request to the host controller.
1202 SD_COMMAND_PACKET
*Packet
;
1213 Packet
= Trb
->Packet
;
1215 // Clear all bits in Error Interrupt Status Register
1218 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_ERR_INT_STS
, FALSE
, sizeof (IntStatus
), &IntStatus
);
1219 if (EFI_ERROR (Status
)) {
1223 // Clear all bits in Normal Interrupt Status Register
1226 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_NOR_INT_STS
, FALSE
, sizeof (IntStatus
), &IntStatus
);
1227 if (EFI_ERROR (Status
)) {
1231 // Set Host Control 1 register DMA Select field
1233 if (Trb
->Mode
== SdAdmaMode
) {
1235 Status
= SdPeimHcOrMmio (Bar
+ SD_HC_HOST_CTRL1
, sizeof (HostCtrl1
), &HostCtrl1
);
1236 if (EFI_ERROR (Status
)) {
1241 SdPeimHcLedOnOff (Bar
, TRUE
);
1243 if (Trb
->Mode
== SdSdmaMode
) {
1244 if ((UINT64
)(UINTN
)Trb
->Data
>= 0x100000000ul
) {
1245 return EFI_INVALID_PARAMETER
;
1248 SdmaAddr
= (UINT32
)(UINTN
)Trb
->Data
;
1249 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_SDMA_ADDR
, FALSE
, sizeof (SdmaAddr
), &SdmaAddr
);
1250 if (EFI_ERROR (Status
)) {
1253 } else if (Trb
->Mode
== SdAdmaMode
) {
1254 AdmaAddr
= (UINT64
)(UINTN
)Trb
->AdmaDesc
;
1255 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_ADMA_SYS_ADDR
, FALSE
, sizeof (AdmaAddr
), &AdmaAddr
);
1256 if (EFI_ERROR (Status
)) {
1261 BlkSize
= Trb
->BlockSize
;
1262 if (Trb
->Mode
== SdSdmaMode
) {
1264 // Set SDMA boundary to be 512K bytes.
1269 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_BLK_SIZE
, FALSE
, sizeof (BlkSize
), &BlkSize
);
1270 if (EFI_ERROR (Status
)) {
1275 if (Trb
->Mode
!= SdNoData
) {
1277 // Calcuate Block Count.
1279 BlkCount
= (UINT16
)(Trb
->DataLen
/ Trb
->BlockSize
);
1281 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_BLK_COUNT
, FALSE
, sizeof (BlkCount
), &BlkCount
);
1282 if (EFI_ERROR (Status
)) {
1286 Argument
= Packet
->SdCmdBlk
->CommandArgument
;
1287 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_ARG1
, FALSE
, sizeof (Argument
), &Argument
);
1288 if (EFI_ERROR (Status
)) {
1293 if (Trb
->Mode
!= SdNoData
) {
1294 if (Trb
->Mode
!= SdPioMode
) {
1301 TransMode
|= BIT5
| BIT1
;
1304 // SD memory card needs to use AUTO CMD12 feature.
1311 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_TRANS_MOD
, FALSE
, sizeof (TransMode
), &TransMode
);
1312 if (EFI_ERROR (Status
)) {
1316 Cmd
= (UINT16
)LShiftU64(Packet
->SdCmdBlk
->CommandIndex
, 8);
1317 if (Packet
->SdCmdBlk
->CommandType
== SdCommandTypeAdtc
) {
1321 // Convert ResponseType to value
1323 if (Packet
->SdCmdBlk
->CommandType
!= SdCommandTypeBc
) {
1324 switch (Packet
->SdCmdBlk
->ResponseType
) {
1325 case SdResponseTypeR1
:
1326 case SdResponseTypeR5
:
1327 case SdResponseTypeR6
:
1328 case SdResponseTypeR7
:
1329 Cmd
|= (BIT1
| BIT3
| BIT4
);
1331 case SdResponseTypeR2
:
1332 Cmd
|= (BIT0
| BIT3
);
1334 case SdResponseTypeR3
:
1335 case SdResponseTypeR4
:
1338 case SdResponseTypeR1b
:
1339 case SdResponseTypeR5b
:
1340 Cmd
|= (BIT0
| BIT1
| BIT3
| BIT4
);
1350 Status
= SdPeimHcRwMmio (Bar
+ SD_HC_COMMAND
, FALSE
, sizeof (Cmd
), &Cmd
);
1355 Check the TRB execution result.
1357 @param[in] Bar The mmio base address of the slot to be accessed.
1358 @param[in] Trb The pointer to the SD_TRB instance.
1360 @retval EFI_SUCCESS The TRB is executed successfully.
1361 @retval EFI_NOT_READY The TRB is not completed for execution.
1362 @retval Others Some erros happen when executing this request.
1366 SdPeimCheckTrbResult (
1372 SD_COMMAND_PACKET
*Packet
;
1381 Packet
= Trb
->Packet
;
1383 // Check Trb execution result by reading Normal Interrupt Status register.
1385 Status
= SdPeimHcRwMmio (
1386 Bar
+ SD_HC_NOR_INT_STS
,
1391 if (EFI_ERROR (Status
)) {
1395 // Check Transfer Complete bit is set or not.
1397 if ((IntStatus
& BIT1
) == BIT1
) {
1398 if ((IntStatus
& BIT15
) == BIT15
) {
1400 // Read Error Interrupt Status register to check if the error is
1401 // Data Timeout Error.
1402 // If yes, treat it as success as Transfer Complete has higher
1403 // priority than Data Timeout Error.
1405 Status
= SdPeimHcRwMmio (
1406 Bar
+ SD_HC_ERR_INT_STS
,
1411 if (!EFI_ERROR (Status
)) {
1412 if ((IntStatus
& BIT4
) == BIT4
) {
1413 Status
= EFI_SUCCESS
;
1415 Status
= EFI_DEVICE_ERROR
;
1423 // Check if there is a error happened during cmd execution.
1424 // If yes, then do error recovery procedure to follow SD Host Controller
1425 // Simplified Spec 3.0 section 3.10.1.
1427 if ((IntStatus
& BIT15
) == BIT15
) {
1428 Status
= SdPeimHcRwMmio (
1429 Bar
+ SD_HC_ERR_INT_STS
,
1434 if (EFI_ERROR (Status
)) {
1438 if ((IntStatus
& 0x0F) != 0) {
1441 if ((IntStatus
& 0xF0) != 0) {
1445 Status
= SdPeimHcRwMmio (
1451 if (EFI_ERROR (Status
)) {
1454 Status
= SdPeimHcWaitMmioSet (
1461 if (EFI_ERROR (Status
)) {
1465 Status
= EFI_DEVICE_ERROR
;
1469 // Check if DMA interrupt is signalled for the SDMA transfer.
1471 if ((Trb
->Mode
== SdSdmaMode
) && ((IntStatus
& BIT3
) == BIT3
)) {
1473 // Clear DMA interrupt bit.
1476 Status
= SdPeimHcRwMmio (
1477 Bar
+ SD_HC_NOR_INT_STS
,
1482 if (EFI_ERROR (Status
)) {
1486 // Update SDMA Address register.
1488 SdmaAddr
= SD_SDMA_ROUND_UP ((UINT32
)(UINTN
)Trb
->Data
, SD_SDMA_BOUNDARY
);
1489 Status
= SdPeimHcRwMmio (
1490 Bar
+ SD_HC_SDMA_ADDR
,
1495 if (EFI_ERROR (Status
)) {
1498 Trb
->Data
= (VOID
*)(UINTN
)SdmaAddr
;
1501 if ((Packet
->SdCmdBlk
->CommandType
!= SdCommandTypeAdtc
) &&
1502 (Packet
->SdCmdBlk
->ResponseType
!= SdResponseTypeR1b
) &&
1503 (Packet
->SdCmdBlk
->ResponseType
!= SdResponseTypeR5b
)) {
1504 if ((IntStatus
& BIT0
) == BIT0
) {
1505 Status
= EFI_SUCCESS
;
1510 if (Packet
->SdCmdBlk
->CommandIndex
== SD_SEND_TUNING_BLOCK
) {
1512 // When performing tuning procedure (Execute Tuning is set to 1) through PIO mode,
1513 // wait Buffer Read Ready bit of Normal Interrupt Status Register to be 1.
1514 // Refer to SD Host Controller Simplified Specification 3.0 figure 2-29 for details.
1516 if ((IntStatus
& BIT5
) == BIT5
) {
1518 // Clear Buffer Read Ready interrupt at first.
1521 SdPeimHcRwMmio (Bar
+ SD_HC_NOR_INT_STS
, FALSE
, sizeof (IntStatus
), &IntStatus
);
1523 // Read data out from Buffer Port register
1525 for (PioLength
= 0; PioLength
< Trb
->DataLen
; PioLength
+= 4) {
1526 SdPeimHcRwMmio (Bar
+ SD_HC_BUF_DAT_PORT
, TRUE
, 4, (UINT8
*)Trb
->Data
+ PioLength
);
1528 Status
= EFI_SUCCESS
;
1533 Status
= EFI_NOT_READY
;
1536 // Get response data when the cmd is executed successfully.
1538 if (!EFI_ERROR (Status
)) {
1539 if (Packet
->SdCmdBlk
->CommandType
!= SdCommandTypeBc
) {
1540 for (Index
= 0; Index
< 4; Index
++) {
1541 Status
= SdPeimHcRwMmio (
1542 Bar
+ SD_HC_RESPONSE
+ Index
* 4,
1547 if (EFI_ERROR (Status
)) {
1548 SdPeimHcLedOnOff (Bar
, FALSE
);
1552 CopyMem (Packet
->SdStatusBlk
, Response
, sizeof (Response
));
1556 if (Status
!= EFI_NOT_READY
) {
1557 SdPeimHcLedOnOff (Bar
, FALSE
);
1564 Wait for the TRB execution result.
1566 @param[in] Bar The mmio base address of the slot to be accessed.
1567 @param[in] Trb The pointer to the SD_TRB instance.
1569 @retval EFI_SUCCESS The TRB is executed successfully.
1570 @retval Others Some erros happen when executing this request.
1574 SdPeimWaitTrbResult (
1580 SD_COMMAND_PACKET
*Packet
;
1582 BOOLEAN InfiniteWait
;
1584 Packet
= Trb
->Packet
;
1586 // Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
1588 Timeout
= Packet
->Timeout
;
1590 InfiniteWait
= TRUE
;
1592 InfiniteWait
= FALSE
;
1595 while (InfiniteWait
|| (Timeout
> 0)) {
1597 // Check Trb execution result by reading Normal Interrupt Status register.
1599 Status
= SdPeimCheckTrbResult (Bar
, Trb
);
1600 if (Status
!= EFI_NOT_READY
) {
1604 // Stall for 1 microsecond.
1606 MicroSecondDelay (1);
1615 Sends SD command to an SD card that is attached to the SD controller.
1617 If Packet is successfully sent to the SD card, then EFI_SUCCESS is returned.
1619 If a device error occurs while sending the Packet, then EFI_DEVICE_ERROR is returned.
1621 If Slot is not in a valid range for the SD controller, then EFI_INVALID_PARAMETER
1624 If Packet defines a data command but both InDataBuffer and OutDataBuffer are NULL,
1625 EFI_INVALID_PARAMETER is returned.
1627 @param[in] Slot The slot number of the Sd card to send the command to.
1628 @param[in,out] Packet A pointer to the SD command data structure.
1630 @retval EFI_SUCCESS The SD Command Packet was sent by the host.
1631 @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SD
1633 @retval EFI_INVALID_PARAMETER Packet, Slot, or the contents of the Packet is invalid.
1634 @retval EFI_INVALID_PARAMETER Packet defines a data command but both InDataBuffer and
1635 OutDataBuffer are NULL.
1636 @retval EFI_NO_MEDIA SD Device not present in the Slot.
1637 @retval EFI_UNSUPPORTED The command described by the SD Command Packet is not
1638 supported by the host controller.
1639 @retval EFI_BAD_BUFFER_SIZE The InTransferLength or OutTransferLength exceeds the
1640 limit supported by SD card ( i.e. if the number of bytes
1641 exceed the Last LBA).
1647 IN SD_PEIM_HC_SLOT
*Slot
,
1648 IN OUT SD_COMMAND_PACKET
*Packet
1654 if (Packet
== NULL
) {
1655 return EFI_INVALID_PARAMETER
;
1658 if ((Packet
->SdCmdBlk
== NULL
) || (Packet
->SdStatusBlk
== NULL
)) {
1659 return EFI_INVALID_PARAMETER
;
1662 if ((Packet
->OutDataBuffer
== NULL
) && (Packet
->OutTransferLength
!= 0)) {
1663 return EFI_INVALID_PARAMETER
;
1666 if ((Packet
->InDataBuffer
== NULL
) && (Packet
->InTransferLength
!= 0)) {
1667 return EFI_INVALID_PARAMETER
;
1670 Trb
= SdPeimCreateTrb (Slot
, Packet
);
1672 return EFI_OUT_OF_RESOURCES
;
1675 Status
= SdPeimWaitTrbEnv (Slot
->SdHcBase
, Trb
);
1676 if (EFI_ERROR (Status
)) {
1680 Status
= SdPeimExecTrb (Slot
->SdHcBase
, Trb
);
1681 if (EFI_ERROR (Status
)) {
1685 Status
= SdPeimWaitTrbResult (Slot
->SdHcBase
, Trb
);
1686 if (EFI_ERROR (Status
)) {
1691 SdPeimFreeTrb (Trb
);
1697 Send command GO_IDLE_STATE to the device to make it go to Idle State.
1699 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1701 @param[in] Slot The slot number of the SD card to send the command to.
1703 @retval EFI_SUCCESS The SD device is reset correctly.
1704 @retval Others The device reset fails.
1709 IN SD_PEIM_HC_SLOT
*Slot
1712 SD_COMMAND_BLOCK SdCmdBlk
;
1713 SD_STATUS_BLOCK SdStatusBlk
;
1714 SD_COMMAND_PACKET Packet
;
1717 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1718 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1719 ZeroMem (&Packet
, sizeof (Packet
));
1721 Packet
.SdCmdBlk
= &SdCmdBlk
;
1722 Packet
.SdStatusBlk
= &SdStatusBlk
;
1723 Packet
.Timeout
= SD_TIMEOUT
;
1725 SdCmdBlk
.CommandIndex
= SD_GO_IDLE_STATE
;
1726 SdCmdBlk
.CommandType
= SdCommandTypeBc
;
1727 SdCmdBlk
.ResponseType
= 0;
1728 SdCmdBlk
.CommandArgument
= 0;
1730 Status
= SdPeimExecCmd (Slot
, &Packet
);
1736 Send command SEND_IF_COND to the device to inquiry the SD Memory Card interface
1739 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1741 @param[in] Slot The slot number of the SD card to send the command to.
1742 @param[in] SupplyVoltage The supplied voltage by the host.
1743 @param[in] CheckPattern The check pattern to be sent to the device.
1745 @retval EFI_SUCCESS The operation is done correctly.
1746 @retval Others The operation fails.
1750 SdPeimVoltageCheck (
1751 IN SD_PEIM_HC_SLOT
*Slot
,
1752 IN UINT8 SupplyVoltage
,
1753 IN UINT8 CheckPattern
1756 SD_COMMAND_BLOCK SdCmdBlk
;
1757 SD_STATUS_BLOCK SdStatusBlk
;
1758 SD_COMMAND_PACKET Packet
;
1761 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1762 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1763 ZeroMem (&Packet
, sizeof (Packet
));
1765 Packet
.SdCmdBlk
= &SdCmdBlk
;
1766 Packet
.SdStatusBlk
= &SdStatusBlk
;
1767 Packet
.Timeout
= SD_TIMEOUT
;
1769 SdCmdBlk
.CommandIndex
= SD_SEND_IF_COND
;
1770 SdCmdBlk
.CommandType
= SdCommandTypeBcr
;
1771 SdCmdBlk
.ResponseType
= SdResponseTypeR7
;
1772 SdCmdBlk
.CommandArgument
= (SupplyVoltage
<< 8) | CheckPattern
;
1774 Status
= SdPeimExecCmd (Slot
, &Packet
);
1775 if (!EFI_ERROR (Status
)) {
1776 if (SdStatusBlk
.Resp0
!= SdCmdBlk
.CommandArgument
) {
1777 return EFI_DEVICE_ERROR
;
1785 Send command SDIO_SEND_OP_COND to the device to see whether it is SDIO device.
1787 Refer to SDIO Simplified Spec 3 Section 3.2 for details.
1789 @param[in] Slot The slot number of the SD card to send the command to.
1790 @param[in] VoltageWindow The supply voltage window.
1791 @param[in] S18r The boolean to show if it should switch to 1.8v.
1793 @retval EFI_SUCCESS The operation is done correctly.
1794 @retval Others The operation fails.
1799 IN SD_PEIM_HC_SLOT
*Slot
,
1800 IN UINT32 VoltageWindow
,
1804 SD_COMMAND_BLOCK SdCmdBlk
;
1805 SD_STATUS_BLOCK SdStatusBlk
;
1806 SD_COMMAND_PACKET Packet
;
1810 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1811 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1812 ZeroMem (&Packet
, sizeof (Packet
));
1814 Packet
.SdCmdBlk
= &SdCmdBlk
;
1815 Packet
.SdStatusBlk
= &SdStatusBlk
;
1816 Packet
.Timeout
= SD_TIMEOUT
;
1818 SdCmdBlk
.CommandIndex
= SDIO_SEND_OP_COND
;
1819 SdCmdBlk
.CommandType
= SdCommandTypeBcr
;
1820 SdCmdBlk
.ResponseType
= SdResponseTypeR4
;
1822 Switch
= S18r
? BIT24
: 0;
1824 SdCmdBlk
.CommandArgument
= (VoltageWindow
& 0xFFFFFF) | Switch
;
1826 Status
= SdPeimExecCmd (Slot
, &Packet
);
1832 Send command SD_SEND_OP_COND to the device to see whether it is SDIO device.
1834 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1836 @param[in] Slot The slot number of the SD card to send the command to.
1837 @param[in] Rca The relative device address of addressed device.
1838 @param[in] VoltageWindow The supply voltage window.
1839 @param[in] S18r The boolean to show if it should switch to 1.8v.
1840 @param[in] Xpc The boolean to show if it should provide 0.36w power control.
1841 @param[in] Hcs The boolean to show if it support host capacity info.
1842 @param[out] Ocr The buffer to store returned OCR register value.
1845 @retval EFI_SUCCESS The operation is done correctly.
1846 @retval Others The operation fails.
1851 IN SD_PEIM_HC_SLOT
*Slot
,
1853 IN UINT32 VoltageWindow
,
1860 SD_COMMAND_BLOCK SdCmdBlk
;
1861 SD_STATUS_BLOCK SdStatusBlk
;
1862 SD_COMMAND_PACKET Packet
;
1866 UINT32 HostCapacity
;
1868 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1869 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1870 ZeroMem (&Packet
, sizeof (Packet
));
1872 Packet
.SdCmdBlk
= &SdCmdBlk
;
1873 Packet
.SdStatusBlk
= &SdStatusBlk
;
1874 Packet
.Timeout
= SD_TIMEOUT
;
1876 SdCmdBlk
.CommandIndex
= SD_APP_CMD
;
1877 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
1878 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
1879 SdCmdBlk
.CommandArgument
= (UINT32
)Rca
<< 16;
1881 Status
= SdPeimExecCmd (Slot
, &Packet
);
1882 if (EFI_ERROR (Status
)) {
1886 SdCmdBlk
.CommandIndex
= SD_SEND_OP_COND
;
1887 SdCmdBlk
.CommandType
= SdCommandTypeBcr
;
1888 SdCmdBlk
.ResponseType
= SdResponseTypeR3
;
1890 Switch
= S18r
? BIT24
: 0;
1891 MaxPower
= Xpc
? BIT28
: 0;
1892 HostCapacity
= Hcs
? BIT30
: 0;
1893 SdCmdBlk
.CommandArgument
= (VoltageWindow
& 0xFFFFFF) | Switch
| MaxPower
| HostCapacity
;
1895 Status
= SdPeimExecCmd (Slot
, &Packet
);
1896 if (!EFI_ERROR (Status
)) {
1898 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
1900 *Ocr
= SdStatusBlk
.Resp0
;
1907 Broadcast command ALL_SEND_CID to the bus to ask all the SD devices to send the
1908 data of their CID registers.
1910 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1912 @param[in] Slot The slot number of the SD card to send the command to.
1914 @retval EFI_SUCCESS The operation is done correctly.
1915 @retval Others The operation fails.
1920 IN SD_PEIM_HC_SLOT
*Slot
1923 SD_COMMAND_BLOCK SdCmdBlk
;
1924 SD_STATUS_BLOCK SdStatusBlk
;
1925 SD_COMMAND_PACKET Packet
;
1928 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1929 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1930 ZeroMem (&Packet
, sizeof (Packet
));
1932 Packet
.SdCmdBlk
= &SdCmdBlk
;
1933 Packet
.SdStatusBlk
= &SdStatusBlk
;
1934 Packet
.Timeout
= SD_TIMEOUT
;
1936 SdCmdBlk
.CommandIndex
= SD_ALL_SEND_CID
;
1937 SdCmdBlk
.CommandType
= SdCommandTypeBcr
;
1938 SdCmdBlk
.ResponseType
= SdResponseTypeR2
;
1939 SdCmdBlk
.CommandArgument
= 0;
1941 Status
= SdPeimExecCmd (Slot
, &Packet
);
1947 Send command SET_RELATIVE_ADDR to the SD device to assign a Relative device
1950 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1952 @param[in] Slot The slot number of the SD card to send the command to.
1953 @param[out] Rca The relative device address to be assigned.
1955 @retval EFI_SUCCESS The operation is done correctly.
1956 @retval Others The operation fails.
1961 IN SD_PEIM_HC_SLOT
*Slot
,
1965 SD_COMMAND_BLOCK SdCmdBlk
;
1966 SD_STATUS_BLOCK SdStatusBlk
;
1967 SD_COMMAND_PACKET Packet
;
1970 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
1971 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
1972 ZeroMem (&Packet
, sizeof (Packet
));
1974 Packet
.SdCmdBlk
= &SdCmdBlk
;
1975 Packet
.SdStatusBlk
= &SdStatusBlk
;
1976 Packet
.Timeout
= SD_TIMEOUT
;
1978 SdCmdBlk
.CommandIndex
= SD_SET_RELATIVE_ADDR
;
1979 SdCmdBlk
.CommandType
= SdCommandTypeBcr
;
1980 SdCmdBlk
.ResponseType
= SdResponseTypeR6
;
1982 Status
= SdPeimExecCmd (Slot
, &Packet
);
1983 if (!EFI_ERROR (Status
)) {
1984 *Rca
= (UINT16
)(SdStatusBlk
.Resp0
>> 16);
1991 Send command SEND_CSD to the SD device to get the data of the CSD register.
1993 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
1995 @param[in] Slot The slot number of the SD card to send the command to.
1996 @param[in] Rca The relative device address of selected device.
1997 @param[out] Csd The buffer to store the content of the CSD register.
1998 Note the caller should ignore the lowest byte of this
1999 buffer as the content of this byte is meaningless even
2000 if the operation succeeds.
2002 @retval EFI_SUCCESS The operation is done correctly.
2003 @retval Others The operation fails.
2008 IN SD_PEIM_HC_SLOT
*Slot
,
2013 SD_COMMAND_BLOCK SdCmdBlk
;
2014 SD_STATUS_BLOCK SdStatusBlk
;
2015 SD_COMMAND_PACKET Packet
;
2018 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2019 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2020 ZeroMem (&Packet
, sizeof (Packet
));
2022 Packet
.SdCmdBlk
= &SdCmdBlk
;
2023 Packet
.SdStatusBlk
= &SdStatusBlk
;
2024 Packet
.Timeout
= SD_TIMEOUT
;
2026 SdCmdBlk
.CommandIndex
= SD_SEND_CSD
;
2027 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2028 SdCmdBlk
.ResponseType
= SdResponseTypeR2
;
2029 SdCmdBlk
.CommandArgument
= (UINT32
)Rca
<< 16;
2031 Status
= SdPeimExecCmd (Slot
, &Packet
);
2032 if (!EFI_ERROR (Status
)) {
2034 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
2036 CopyMem (((UINT8
*)Csd
) + 1, &SdStatusBlk
.Resp0
, sizeof (SD_CSD
) - 1);
2043 Send command SELECT_DESELECT_CARD to the SD device to select/deselect it.
2045 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2047 @param[in] Slot The slot number of the SD card to send the command to.
2048 @param[in] Rca The relative device address of selected device.
2050 @retval EFI_SUCCESS The operation is done correctly.
2051 @retval Others The operation fails.
2056 IN SD_PEIM_HC_SLOT
*Slot
,
2060 SD_COMMAND_BLOCK SdCmdBlk
;
2061 SD_STATUS_BLOCK SdStatusBlk
;
2062 SD_COMMAND_PACKET Packet
;
2065 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2066 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2067 ZeroMem (&Packet
, sizeof (Packet
));
2069 Packet
.SdCmdBlk
= &SdCmdBlk
;
2070 Packet
.SdStatusBlk
= &SdStatusBlk
;
2071 Packet
.Timeout
= SD_TIMEOUT
;
2073 SdCmdBlk
.CommandIndex
= SD_SELECT_DESELECT_CARD
;
2074 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2075 SdCmdBlk
.ResponseType
= SdResponseTypeR1b
;
2076 SdCmdBlk
.CommandArgument
= (UINT32
)Rca
<< 16;
2078 Status
= SdPeimExecCmd (Slot
, &Packet
);
2084 Send command VOLTAGE_SWITCH to the SD device to switch the voltage of the device.
2086 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2088 @param[in] Slot The slot number of the SD card to send the command to.
2090 @retval EFI_SUCCESS The operation is done correctly.
2091 @retval Others The operation fails.
2095 SdPeimVoltageSwitch (
2096 IN SD_PEIM_HC_SLOT
*Slot
2099 SD_COMMAND_BLOCK SdCmdBlk
;
2100 SD_STATUS_BLOCK SdStatusBlk
;
2101 SD_COMMAND_PACKET Packet
;
2104 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2105 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2106 ZeroMem (&Packet
, sizeof (Packet
));
2108 Packet
.SdCmdBlk
= &SdCmdBlk
;
2109 Packet
.SdStatusBlk
= &SdStatusBlk
;
2110 Packet
.Timeout
= SD_TIMEOUT
;
2112 SdCmdBlk
.CommandIndex
= SD_VOLTAGE_SWITCH
;
2113 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2114 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2115 SdCmdBlk
.CommandArgument
= 0;
2117 Status
= SdPeimExecCmd (Slot
, &Packet
);
2123 Send command SET_BUS_WIDTH to the SD device to set the bus width.
2125 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2127 @param[in] Slot The slot number of the SD card to send the command to.
2128 @param[in] Rca The relative device address of addressed device.
2129 @param[in] BusWidth The bus width to be set, it could be 1 or 4.
2131 @retval EFI_SUCCESS The operation is done correctly.
2132 @retval Others The operation fails.
2137 IN SD_PEIM_HC_SLOT
*Slot
,
2142 SD_COMMAND_BLOCK SdCmdBlk
;
2143 SD_STATUS_BLOCK SdStatusBlk
;
2144 SD_COMMAND_PACKET Packet
;
2148 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2149 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2150 ZeroMem (&Packet
, sizeof (Packet
));
2152 Packet
.SdCmdBlk
= &SdCmdBlk
;
2153 Packet
.SdStatusBlk
= &SdStatusBlk
;
2154 Packet
.Timeout
= SD_TIMEOUT
;
2156 SdCmdBlk
.CommandIndex
= SD_APP_CMD
;
2157 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2158 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2159 SdCmdBlk
.CommandArgument
= (UINT32
)Rca
<< 16;
2161 Status
= SdPeimExecCmd (Slot
, &Packet
);
2162 if (EFI_ERROR (Status
)) {
2166 SdCmdBlk
.CommandIndex
= SD_SET_BUS_WIDTH
;
2167 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2168 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2170 if (BusWidth
== 1) {
2172 } else if (BusWidth
== 4) {
2175 return EFI_INVALID_PARAMETER
;
2177 SdCmdBlk
.CommandArgument
= Value
& 0x3;
2179 Status
= SdPeimExecCmd (Slot
, &Packet
);
2185 Send command SWITCH_FUNC to the SD device to check switchable function or switch card function.
2187 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2189 @param[in] Slot The slot number of the SD card to send the command to.
2190 @param[in] AccessMode The value for access mode group.
2191 @param[in] CommandSystem The value for command set group.
2192 @param[in] DriveStrength The value for drive length group.
2193 @param[in] PowerLimit The value for power limit group.
2194 @param[in] Mode Switch or check function.
2195 @param[out] SwitchResp The return switch function status.
2197 @retval EFI_SUCCESS The operation is done correctly.
2198 @retval Others The operation fails.
2203 IN SD_PEIM_HC_SLOT
*Slot
,
2204 IN UINT8 AccessMode
,
2205 IN UINT8 CommandSystem
,
2206 IN UINT8 DriveStrength
,
2207 IN UINT8 PowerLimit
,
2209 OUT UINT8
*SwitchResp
2212 SD_COMMAND_BLOCK SdCmdBlk
;
2213 SD_STATUS_BLOCK SdStatusBlk
;
2214 SD_COMMAND_PACKET Packet
;
2218 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2219 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2220 ZeroMem (&Packet
, sizeof (Packet
));
2222 Packet
.SdCmdBlk
= &SdCmdBlk
;
2223 Packet
.SdStatusBlk
= &SdStatusBlk
;
2224 Packet
.Timeout
= SD_TIMEOUT
;
2226 SdCmdBlk
.CommandIndex
= SD_SWITCH_FUNC
;
2227 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2228 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2230 ModeValue
= Mode
? BIT31
: 0;
2231 SdCmdBlk
.CommandArgument
= (AccessMode
& 0xF) | ((PowerLimit
& 0xF) << 4) | \
2232 ((DriveStrength
& 0xF) << 8) | ((DriveStrength
& 0xF) << 12) | \
2234 Packet
.InDataBuffer
= SwitchResp
;
2235 Packet
.InTransferLength
= 64;
2237 Status
= SdPeimExecCmd (Slot
, &Packet
);
2243 Send command SEND_STATUS to the addressed SD device to get its status register.
2245 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2247 @param[in] Slot The slot number of the SD card to send the command to.
2248 @param[in] Rca The relative device address of addressed device.
2249 @param[out] DevStatus The returned device status.
2251 @retval EFI_SUCCESS The operation is done correctly.
2252 @retval Others The operation fails.
2257 IN SD_PEIM_HC_SLOT
*Slot
,
2259 OUT UINT32
*DevStatus
2262 SD_COMMAND_BLOCK SdCmdBlk
;
2263 SD_STATUS_BLOCK SdStatusBlk
;
2264 SD_COMMAND_PACKET Packet
;
2267 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2268 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2269 ZeroMem (&Packet
, sizeof (Packet
));
2271 Packet
.SdCmdBlk
= &SdCmdBlk
;
2272 Packet
.SdStatusBlk
= &SdStatusBlk
;
2273 Packet
.Timeout
= SD_TIMEOUT
;
2275 SdCmdBlk
.CommandIndex
= SD_SEND_STATUS
;
2276 SdCmdBlk
.CommandType
= SdCommandTypeAc
;
2277 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2278 SdCmdBlk
.CommandArgument
= (UINT32
)Rca
<< 16;
2280 Status
= SdPeimExecCmd (Slot
, &Packet
);
2281 if (!EFI_ERROR (Status
)) {
2282 *DevStatus
= SdStatusBlk
.Resp0
;
2289 Send command READ_SINGLE_BLOCK/WRITE_SINGLE_BLOCK to the addressed SD device
2290 to read/write the specified number of blocks.
2292 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2294 @param[in] Slot The slot number of the SD card to send the command to.
2295 @param[in] Lba The logical block address of starting access.
2296 @param[in] BlockSize The block size of specified SD device partition.
2297 @param[in] Buffer The pointer to the transfer buffer.
2298 @param[in] BufferSize The size of transfer buffer.
2299 @param[in] IsRead Boolean to show the operation direction.
2301 @retval EFI_SUCCESS The operation is done correctly.
2302 @retval Others The operation fails.
2306 SdPeimRwSingleBlock (
2307 IN SD_PEIM_HC_SLOT
*Slot
,
2309 IN UINT32 BlockSize
,
2311 IN UINTN BufferSize
,
2315 SD_COMMAND_BLOCK SdCmdBlk
;
2316 SD_STATUS_BLOCK SdStatusBlk
;
2317 SD_COMMAND_PACKET Packet
;
2320 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2321 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2322 ZeroMem (&Packet
, sizeof (Packet
));
2324 Packet
.SdCmdBlk
= &SdCmdBlk
;
2325 Packet
.SdStatusBlk
= &SdStatusBlk
;
2327 // Calculate timeout value through the below formula.
2328 // Timeout = (transfer size) / (2MB/s).
2329 // Taking 2MB/s as divisor is because it's the lowest
2330 // transfer speed of class 2.
2332 Packet
.Timeout
= (BufferSize
/ (2 * 1024 * 1024) + 1) * 1000 * 1000;;
2335 Packet
.InDataBuffer
= Buffer
;
2336 Packet
.InTransferLength
= (UINT32
)BufferSize
;
2338 SdCmdBlk
.CommandIndex
= SD_READ_SINGLE_BLOCK
;
2339 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2340 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2342 Packet
.OutDataBuffer
= Buffer
;
2343 Packet
.OutTransferLength
= (UINT32
)BufferSize
;
2345 SdCmdBlk
.CommandIndex
= SD_WRITE_SINGLE_BLOCK
;
2346 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2347 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2350 if (Slot
->SectorAddressing
) {
2351 SdCmdBlk
.CommandArgument
= (UINT32
)Lba
;
2353 SdCmdBlk
.CommandArgument
= (UINT32
)MultU64x32 (Lba
, BlockSize
);
2356 Status
= SdPeimExecCmd (Slot
, &Packet
);
2362 Send command READ_MULTIPLE_BLOCK/WRITE_MULTIPLE_BLOCK to the addressed SD device
2363 to read/write the specified number of blocks.
2365 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2367 @param[in] Slot The slot number of the SD card to send the command to.
2368 @param[in] Lba The logical block address of starting access.
2369 @param[in] BlockSize The block size of specified SD device partition.
2370 @param[in] Buffer The pointer to the transfer buffer.
2371 @param[in] BufferSize The size of transfer buffer.
2372 @param[in] IsRead Boolean to show the operation direction.
2374 @retval EFI_SUCCESS The operation is done correctly.
2375 @retval Others The operation fails.
2379 SdPeimRwMultiBlocks (
2380 IN SD_PEIM_HC_SLOT
*Slot
,
2382 IN UINT32 BlockSize
,
2384 IN UINTN BufferSize
,
2388 SD_COMMAND_BLOCK SdCmdBlk
;
2389 SD_STATUS_BLOCK SdStatusBlk
;
2390 SD_COMMAND_PACKET Packet
;
2393 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2394 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2395 ZeroMem (&Packet
, sizeof (Packet
));
2397 Packet
.SdCmdBlk
= &SdCmdBlk
;
2398 Packet
.SdStatusBlk
= &SdStatusBlk
;
2400 // Calculate timeout value through the below formula.
2401 // Timeout = (transfer size) / (2MB/s).
2402 // Taking 2MB/s as divisor is because it's the lowest
2403 // transfer speed of class 2.
2405 Packet
.Timeout
= (BufferSize
/ (2 * 1024 * 1024) + 1) * 1000 * 1000;;
2408 Packet
.InDataBuffer
= Buffer
;
2409 Packet
.InTransferLength
= (UINT32
)BufferSize
;
2411 SdCmdBlk
.CommandIndex
= SD_READ_MULTIPLE_BLOCK
;
2412 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2413 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2415 Packet
.OutDataBuffer
= Buffer
;
2416 Packet
.OutTransferLength
= (UINT32
)BufferSize
;
2418 SdCmdBlk
.CommandIndex
= SD_WRITE_MULTIPLE_BLOCK
;
2419 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2420 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2423 if (Slot
->SectorAddressing
) {
2424 SdCmdBlk
.CommandArgument
= (UINT32
)Lba
;
2426 SdCmdBlk
.CommandArgument
= (UINT32
)MultU64x32 (Lba
, BlockSize
);
2429 Status
= SdPeimExecCmd (Slot
, &Packet
);
2435 Send command SEND_TUNING_BLOCK to the SD device for SDR104/SDR50 optimal sampling point
2438 It may be sent up to 40 times until the host finishes the tuning procedure.
2440 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
2442 @param[in] Slot The slot number of the SD card to send the command to.
2444 @retval EFI_SUCCESS The operation is done correctly.
2445 @retval Others The operation fails.
2449 SdPeimSendTuningBlk (
2450 IN SD_PEIM_HC_SLOT
*Slot
2453 SD_COMMAND_BLOCK SdCmdBlk
;
2454 SD_STATUS_BLOCK SdStatusBlk
;
2455 SD_COMMAND_PACKET Packet
;
2457 UINT8 TuningBlock
[64];
2459 ZeroMem (&SdCmdBlk
, sizeof (SdCmdBlk
));
2460 ZeroMem (&SdStatusBlk
, sizeof (SdStatusBlk
));
2461 ZeroMem (&Packet
, sizeof (Packet
));
2463 Packet
.SdCmdBlk
= &SdCmdBlk
;
2464 Packet
.SdStatusBlk
= &SdStatusBlk
;
2465 Packet
.Timeout
= SD_TIMEOUT
;
2467 SdCmdBlk
.CommandIndex
= SD_SEND_TUNING_BLOCK
;
2468 SdCmdBlk
.CommandType
= SdCommandTypeAdtc
;
2469 SdCmdBlk
.ResponseType
= SdResponseTypeR1
;
2470 SdCmdBlk
.CommandArgument
= 0;
2472 Packet
.InDataBuffer
= TuningBlock
;
2473 Packet
.InTransferLength
= sizeof (TuningBlock
);
2475 Status
= SdPeimExecCmd (Slot
, &Packet
);
2481 Tunning the sampling point of SDR104 or SDR50 bus speed mode.
2483 Command SD_SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the
2486 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and SD Host Controller
2487 Simplified Spec 3.0 Figure 2-29 for details.
2489 @param[in] Slot The slot number of the SD card to send the command to.
2491 @retval EFI_SUCCESS The operation is done correctly.
2492 @retval Others The operation fails.
2497 IN SD_PEIM_HC_SLOT
*Slot
2505 // Notify the host that the sampling clock tuning procedure starts.
2508 Status
= SdPeimHcOrMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
2509 if (EFI_ERROR (Status
)) {
2513 // Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
2517 Status
= SdPeimSendTuningBlk (Slot
);
2518 if (EFI_ERROR (Status
)) {
2522 Status
= SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, TRUE
, sizeof (HostCtrl2
), &HostCtrl2
);
2523 if (EFI_ERROR (Status
)) {
2527 if ((HostCtrl2
& (BIT6
| BIT7
)) == 0) {
2531 if ((HostCtrl2
& (BIT6
| BIT7
)) == BIT7
) {
2534 } while (++Retry
< 40);
2536 DEBUG ((EFI_D_ERROR
, "SdPeimTuningClock: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry
, HostCtrl2
));
2538 // Abort the tuning procedure and reset the tuning circuit.
2540 HostCtrl2
= (UINT8
)~(BIT6
| BIT7
);
2541 Status
= SdPeimHcAndMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
2542 if (EFI_ERROR (Status
)) {
2545 return EFI_DEVICE_ERROR
;
2549 Switch the bus width to specified width.
2551 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and
2552 SD Host Controller Simplified Spec 3.0 section Figure 3-7 for details.
2554 @param[in] Slot The slot number of the SD card to send the command to.
2555 @param[in] Rca The relative device address to be assigned.
2556 @param[in] BusWidth The bus width to be set, it could be 4 or 8.
2558 @retval EFI_SUCCESS The operation is done correctly.
2559 @retval Others The operation fails.
2563 SdPeimSwitchBusWidth (
2564 IN SD_PEIM_HC_SLOT
*Slot
,
2572 Status
= SdPeimSetBusWidth (Slot
, Rca
, BusWidth
);
2573 if (EFI_ERROR (Status
)) {
2577 Status
= SdPeimSendStatus (Slot
, Rca
, &DevStatus
);
2578 if (EFI_ERROR (Status
)) {
2582 // Check the switch operation is really successful or not.
2584 if ((DevStatus
>> 16) != 0) {
2585 return EFI_DEVICE_ERROR
;
2588 Status
= SdPeimHcSetBusWidth (Slot
->SdHcBase
, BusWidth
);
2594 Switch the high speed timing according to request.
2596 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 and
2597 SD Host Controller Simplified Spec 3.0 section Figure 2-29 for details.
2599 @param[in] Slot The slot number of the SD card to send the command to.
2600 @param[in] Rca The relative device address to be assigned.
2601 @param[in] S18a The boolean to show if it's a UHS-I SD card.
2603 @retval EFI_SUCCESS The operation is done correctly.
2604 @retval Others The operation fails.
2609 IN SD_PEIM_HC_SLOT
*Slot
,
2615 SD_HC_SLOT_CAP Capability
;
2621 UINT8 SwitchResp
[64];
2623 Status
= SdPeimGetCsd (Slot
, Rca
, &Slot
->Csd
);
2624 if (EFI_ERROR (Status
)) {
2625 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimGetCsd fails with %r\n", Status
));
2629 Status
= SdPeimHcGetCapability (Slot
->SdHcBase
, &Capability
);
2630 if (EFI_ERROR (Status
)) {
2634 Status
= SdPeimSelect (Slot
, Rca
);
2635 if (EFI_ERROR (Status
)) {
2636 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimSelect fails with %r\n", Status
));
2641 Status
= SdPeimSwitchBusWidth (Slot
, Rca
, BusWidth
);
2642 if (EFI_ERROR (Status
)) {
2643 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimSwitchBusWidth fails with %r\n", Status
));
2648 // Get the supported bus speed from SWITCH cmd return data group #1.
2650 ZeroMem (SwitchResp
, sizeof (SwitchResp
));
2651 Status
= SdPeimSwitch (Slot
, 0xF, 0xF, 0xF, 0xF, FALSE
, SwitchResp
);
2652 if (EFI_ERROR (Status
)) {
2656 // Calculate supported bus speed/bus width/clock frequency by host and device capability.
2659 if (S18a
&& (Capability
.Sdr104
!= 0) && ((SwitchResp
[13] & BIT3
) != 0)) {
2662 } else if (S18a
&& (Capability
.Sdr50
!= 0) && ((SwitchResp
[13] & BIT2
) != 0)) {
2665 } else if (S18a
&& (Capability
.Ddr50
!= 0) && ((SwitchResp
[13] & BIT4
) != 0)) {
2668 } else if ((SwitchResp
[13] & BIT1
) != 0) {
2676 DEBUG ((EFI_D_INFO
, "SdPeimSetBusMode: AccessMode %d ClockFreq %d BusWidth %d\n", AccessMode
, ClockFreq
, BusWidth
));
2678 Status
= SdPeimSwitch (Slot
, AccessMode
, 0xF, 0xF, 0xF, TRUE
, SwitchResp
);
2679 if (EFI_ERROR (Status
)) {
2680 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimSwitch fails with %r\n", Status
));
2684 if ((SwitchResp
[16] & 0xF) != AccessMode
) {
2685 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimSwitch to AccessMode %d ClockFreq %d BusWidth %d fails! The Switch response is 0x%1x\n", AccessMode
, ClockFreq
, BusWidth
, SwitchResp
[16] & 0xF));
2686 return EFI_DEVICE_ERROR
;
2689 // Set to Hight Speed timing
2691 if (AccessMode
== 1) {
2693 Status
= SdPeimHcOrMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL1
, sizeof (HostCtrl1
), &HostCtrl1
);
2694 if (EFI_ERROR (Status
)) {
2699 HostCtrl2
= (UINT8
)~0x7;
2700 Status
= SdPeimHcAndMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
2701 if (EFI_ERROR (Status
)) {
2704 HostCtrl2
= AccessMode
;
2705 Status
= SdPeimHcOrMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
2706 if (EFI_ERROR (Status
)) {
2710 Status
= SdPeimHcClockSupply (Slot
->SdHcBase
, ClockFreq
* 1000);
2711 if (EFI_ERROR (Status
)) {
2712 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimHcClockSupply %r\n", Status
));
2716 if ((AccessMode
== 3) || ((AccessMode
== 2) && (Capability
.TuningSDR50
!= 0))) {
2717 Status
= SdPeimTuningClock (Slot
);
2718 if (EFI_ERROR (Status
)) {
2719 DEBUG ((EFI_D_ERROR
, "SdPeimSetBusMode: SdPeimTuningClock fails with %r\n", Status
));
2724 DEBUG ((EFI_D_INFO
, "SdPeimSetBusMode: SdPeimSetBusMode %r\n", Status
));
2730 Execute SD device identification procedure.
2732 Refer to SD Physical Layer Simplified Spec 4.1 Section 3.6 for details.
2734 @param[in] Slot The slot number of the SD card to send the command to.
2736 @retval EFI_SUCCESS There is a SD card.
2737 @retval Others There is not a SD card.
2741 SdPeimIdentification (
2742 IN SD_PEIM_HC_SLOT
*Slot
2752 UINT16 ControllerVer
;
2754 UINT32 PresentState
;
2756 SD_HC_SLOT_CAP Capability
;
2759 // 1. Send Cmd0 to the device
2761 Status
= SdPeimReset (Slot
);
2762 if (EFI_ERROR (Status
)) {
2763 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing Cmd0 fails with %r\n", Status
));
2767 // 2. Send Cmd8 to the device
2769 Status
= SdPeimVoltageCheck (Slot
, 0x1, 0xFF);
2770 if (EFI_ERROR (Status
)) {
2771 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing Cmd8 fails with %r\n", Status
));
2775 // 3. Send SDIO Cmd5 to the device to the SDIO device OCR register.
2777 Status
= SdioSendOpCond (Slot
, 0, FALSE
);
2778 if (!EFI_ERROR (Status
)) {
2779 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Found SDIO device, ignore it as we don't support\n"));
2780 return EFI_DEVICE_ERROR
;
2783 // 4. Send Acmd41 with voltage window 0 to the device
2785 Status
= SdPeimSendOpCond (Slot
, 0, 0, FALSE
, FALSE
, FALSE
, &Ocr
);
2786 if (EFI_ERROR (Status
)) {
2787 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing SdPeimSendOpCond fails with %r\n", Status
));
2788 return EFI_DEVICE_ERROR
;
2791 Status
= SdPeimHcGetCapability (Slot
->SdHcBase
, &Capability
);
2792 if (EFI_ERROR (Status
)) {
2796 Status
= SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_MAX_CURRENT_CAP
, TRUE
, sizeof (Current
), &Current
);
2797 if (EFI_ERROR (Status
)) {
2801 if (Capability
.Voltage33
!= 0) {
2805 MaxCurrent
= ((UINT32
)Current
& 0xFF) * 4;
2806 } else if (Capability
.Voltage30
!= 0) {
2810 MaxCurrent
= (((UINT32
)Current
>> 8) & 0xFF) * 4;
2811 } else if (Capability
.Voltage18
!= 0) {
2815 MaxCurrent
= (((UINT32
)Current
>> 16) & 0xFF) * 4;
2818 return EFI_DEVICE_ERROR
;
2821 if (MaxCurrent
>= 150) {
2827 Status
= SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_CTRL_VER
, TRUE
, sizeof (ControllerVer
), &ControllerVer
);
2828 if (EFI_ERROR (Status
)) {
2832 if ((ControllerVer
& 0xFF) == 2) {
2834 } else if (((ControllerVer
& 0xFF) == 0) || ((ControllerVer
& 0xFF) == 1)) {
2838 return EFI_UNSUPPORTED
;
2841 // 5. Repeatly send Acmd41 with supply voltage window to the device.
2842 // Note here we only support the cards complied with SD physical
2843 // layer simplified spec version 2.0 and version 3.0 and above.
2848 Status
= SdPeimSendOpCond (Slot
, 0, Ocr
, S18r
, Xpc
, TRUE
, &Ocr
);
2849 if (EFI_ERROR (Status
)) {
2850 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: SdPeimSendOpCond fails with %r Ocr %x, S18r %x, Xpc %x\n", Status
, Ocr
, S18r
, Xpc
));
2851 return EFI_DEVICE_ERROR
;
2854 if (Retry
++ == 100) {
2855 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: SdPeimSendOpCond fails too many times\n"));
2856 return EFI_DEVICE_ERROR
;
2858 MicroSecondDelay (10 * 1000);
2859 } while ((Ocr
& BIT31
) == 0);
2862 // 6. If the S18a bit is set and the Host Controller supports 1.8V signaling
2863 // (One of support bits is set to 1: SDR50, SDR104 or DDR50 in the
2864 // Capabilities register), switch its voltage to 1.8V.
2866 if ((Capability
.Sdr50
!= 0 ||
2867 Capability
.Sdr104
!= 0 ||
2868 Capability
.Ddr50
!= 0) &&
2869 ((Ocr
& BIT24
) != 0)) {
2870 Status
= SdPeimVoltageSwitch (Slot
);
2871 if (EFI_ERROR (Status
)) {
2872 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing SdPeimVoltageSwitch fails with %r\n", Status
));
2873 Status
= EFI_DEVICE_ERROR
;
2876 Status
= SdPeimHcStopClock (Slot
->SdHcBase
);
2877 if (EFI_ERROR (Status
)) {
2878 Status
= EFI_DEVICE_ERROR
;
2882 SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_PRESENT_STATE
, TRUE
, sizeof (PresentState
), &PresentState
);
2883 if (((PresentState
>> 20) & 0xF) != 0) {
2884 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x\n", PresentState
));
2885 Status
= EFI_DEVICE_ERROR
;
2889 SdPeimHcOrMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, sizeof (HostCtrl2
), &HostCtrl2
);
2891 MicroSecondDelay (5000);
2893 SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_HOST_CTRL2
, TRUE
, sizeof (HostCtrl2
), &HostCtrl2
);
2894 if ((HostCtrl2
& BIT3
) == 0) {
2895 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: SwitchVoltage fails with HostCtrl2 = 0x%x\n", HostCtrl2
));
2896 Status
= EFI_DEVICE_ERROR
;
2900 SdPeimHcInitClockFreq (Slot
->SdHcBase
);
2902 MicroSecondDelay (1000);
2904 SdPeimHcRwMmio (Slot
->SdHcBase
+ SD_HC_PRESENT_STATE
, TRUE
, sizeof (PresentState
), &PresentState
);
2905 if (((PresentState
>> 20) & 0xF) != 0xF) {
2906 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x, It should be 0xF\n", PresentState
));
2907 Status
= EFI_DEVICE_ERROR
;
2911 DEBUG ((EFI_D_INFO
, "SdPeimIdentification: Switch to 1.8v signal voltage success\n"));
2914 Status
= SdPeimAllSendCid (Slot
);
2915 if (EFI_ERROR (Status
)) {
2916 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing SdPeimAllSendCid fails with %r\n", Status
));
2920 Status
= SdPeimSetRca (Slot
, &Rca
);
2921 if (EFI_ERROR (Status
)) {
2922 DEBUG ((EFI_D_ERROR
, "SdPeimIdentification: Executing SdPeimSetRca fails with %r\n", Status
));
2926 // Enter Data Tranfer Mode.
2928 DEBUG ((EFI_D_INFO
, "Found a SD device at slot [%d]\n", Slot
));
2930 Status
= SdPeimSetBusMode (Slot
, Rca
, ((Ocr
& BIT24
) != 0));
2936 // Set SD Bus Power = 0
2938 PowerCtrl
= (UINT8
)~BIT0
;
2939 Status
= SdPeimHcAndMmio (Slot
->SdHcBase
+ SD_HC_POWER_CTRL
, sizeof (PowerCtrl
), &PowerCtrl
);
2940 return EFI_DEVICE_ERROR
;