MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h

   1 /** @file
   2
   3   Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
   4   This program and the accompanying materials
   5   are licensed and made available under the terms and conditions of the BSD License
   6   which accompanies this distribution.  The full text of the license may be found at
   7   http://opensource.org/licenses/bsd-license.php.
   8
   9   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14 #ifndef _SD_HCI_H_
  15 #define _SD_HCI_H_
  16
  17 //
  18 // SD Host Controller MMIO Register Offset
  19 //
  20 #define SD_HC_SDMA_ADDR           0x00
  21 #define SD_HC_ARG2                0x00
  22 #define SD_HC_BLK_SIZE            0x04
  23 #define SD_HC_BLK_COUNT           0x06
  24 #define SD_HC_ARG1                0x08
  25 #define SD_HC_TRANS_MOD           0x0C
  26 #define SD_HC_COMMAND             0x0E
  27 #define SD_HC_RESPONSE            0x10
  28 #define SD_HC_BUF_DAT_PORT        0x20
  29 #define SD_HC_PRESENT_STATE       0x24
  30 #define SD_HC_HOST_CTRL1          0x28
  31 #define SD_HC_POWER_CTRL          0x29
  32 #define SD_HC_BLK_GAP_CTRL        0x2A
  33 #define SD_HC_WAKEUP_CTRL         0x2B
  34 #define SD_HC_CLOCK_CTRL          0x2C
  35 #define SD_HC_TIMEOUT_CTRL        0x2E
  36 #define SD_HC_SW_RST              0x2F
  37 #define SD_HC_NOR_INT_STS         0x30
  38 #define SD_HC_ERR_INT_STS         0x32
  39 #define SD_HC_NOR_INT_STS_EN      0x34
  40 #define SD_HC_ERR_INT_STS_EN      0x36
  41 #define SD_HC_NOR_INT_SIG_EN      0x38
  42 #define SD_HC_ERR_INT_SIG_EN      0x3A
  43 #define SD_HC_AUTO_CMD_ERR_STS    0x3C
  44 #define SD_HC_HOST_CTRL2          0x3E
  45 #define SD_HC_CAP                 0x40
  46 #define SD_HC_MAX_CURRENT_CAP     0x48
  47 #define SD_HC_FORCE_EVT_AUTO_CMD  0x50
  48 #define SD_HC_FORCE_EVT_ERR_INT   0x52
  49 #define SD_HC_ADMA_ERR_STS        0x54
  50 #define SD_HC_ADMA_SYS_ADDR       0x58
  51 #define SD_HC_PRESET_VAL          0x60
  52 #define SD_HC_SHARED_BUS_CTRL     0xE0
  53 #define SD_HC_SLOT_INT_STS        0xFC
  54 #define SD_HC_CTRL_VER            0xFE
  55
  56 //
  57 // The transfer modes supported by SD Host Controller
  58 // Simplified Spec 3.0 Table 1-2
  59 //
  60 typedef enum {
  61   SdNoData,
  62   SdPioMode,
  63   SdSdmaMode,
  64   SdAdmaMode
  65 } SD_HC_TRANSFER_MODE;
  66
  67 //
  68 // The maximum data length of each descriptor line
  69 //
  70 #define ADMA_MAX_DATA_PER_LINE      0x10000
  71 #define SD_SDMA_BOUNDARY            512 * 1024
  72 #define SD_SDMA_ROUND_UP(x, n)      (((x) + n) & ~(n - 1))
  73
  74 typedef enum {
  75   SdCommandTypeBc,  // Broadcast commands, no response
  76   SdCommandTypeBcr, // Broadcast commands with response
  77   SdCommandTypeAc,  // Addressed(point-to-point) commands
  78   SdCommandTypeAdtc // Addressed(point-to-point) data transfer commands
  79 } SD_COMMAND_TYPE;
  80
  81 typedef enum {
  82   SdResponseTypeR1,
  83   SdResponseTypeR1b,
  84   SdResponseTypeR2,
  85   SdResponseTypeR3,
  86   SdResponseTypeR4,
  87   SdResponseTypeR5,
  88   SdResponseTypeR5b,
  89   SdResponseTypeR6,
  90   SdResponseTypeR7
  91 } SD_RESPONSE_TYPE;
  92
  93 typedef struct _SD_COMMAND_BLOCK {
  94   UINT16                            CommandIndex;
  95   UINT32                            CommandArgument;
  96   UINT32                            CommandType;      // One of the SD_COMMAND_TYPE values
  97   UINT32                            ResponseType;     // One of the SD_RESPONSE_TYPE values
  98 } SD_COMMAND_BLOCK;
  99
 100 typedef struct _SD_STATUS_BLOCK {
 101   UINT32                            Resp0;
 102   UINT32                            Resp1;
 103   UINT32                            Resp2;
 104   UINT32                            Resp3;
 105 } SD_STATUS_BLOCK;
 106
 107 typedef struct _SD_COMMAND_PACKET {
 108   UINT64                            Timeout;
 109   SD_COMMAND_BLOCK                  *SdCmdBlk;
 110   SD_STATUS_BLOCK                   *SdStatusBlk;
 111   VOID                              *InDataBuffer;
 112   VOID                              *OutDataBuffer;
 113   UINT32                            InTransferLength;
 114   UINT32                            OutTransferLength;
 115 } SD_COMMAND_PACKET;
 116
 117 #pragma pack(1)
 118
 119 typedef struct {
 120   UINT32 Valid:1;
 121   UINT32 End:1;
 122   UINT32 Int:1;
 123   UINT32 Reserved:1;
 124   UINT32 Act:2;
 125   UINT32 Reserved1:10;
 126   UINT32 Length:16;
 127   UINT32 Address;
 128 } SD_HC_ADMA_DESC_LINE;
 129
 130 typedef struct {
 131   UINT32   TimeoutFreq:6;     // bit 0:5
 132   UINT32   Reserved:1;        // bit 6
 133   UINT32   TimeoutUnit:1;     // bit 7
 134   UINT32   BaseClkFreq:8;     // bit 8:15
 135   UINT32   MaxBlkLen:2;       // bit 16:17
 136   UINT32   BusWidth8:1;       // bit 18
 137   UINT32   Adma2:1;           // bit 19
 138   UINT32   Reserved2:1;       // bit 20
 139   UINT32   HighSpeed:1;       // bit 21
 140   UINT32   Sdma:1;            // bit 22
 141   UINT32   SuspRes:1;         // bit 23
 142   UINT32   Voltage33:1;       // bit 24
 143   UINT32   Voltage30:1;       // bit 25
 144   UINT32   Voltage18:1;       // bit 26
 145   UINT32   Reserved3:1;       // bit 27
 146   UINT32   SysBus64:1;        // bit 28
 147   UINT32   AsyncInt:1;        // bit 29
 148   UINT32   SlotType:2;        // bit 30:31
 149   UINT32   Sdr50:1;           // bit 32
 150   UINT32   Sdr104:1;          // bit 33
 151   UINT32   Ddr50:1;           // bit 34
 152   UINT32   Reserved4:1;       // bit 35
 153   UINT32   DriverTypeA:1;     // bit 36
 154   UINT32   DriverTypeC:1;     // bit 37
 155   UINT32   DriverTypeD:1;     // bit 38
 156   UINT32   DriverType4:1;     // bit 39
 157   UINT32   TimerCount:4;      // bit 40:43
 158   UINT32   Reserved5:1;       // bit 44
 159   UINT32   TuningSDR50:1;     // bit 45
 160   UINT32   RetuningMod:2;     // bit 46:47
 161   UINT32   ClkMultiplier:8;   // bit 48:55
 162   UINT32   Reserved6:7;       // bit 56:62
 163   UINT32   Hs400:1;           // bit 63
 164 } SD_HC_SLOT_CAP;
 165
 166 #pragma pack()
 167
 168 /**
 169   Software reset the specified SD host controller and enable all interrupts.
 170
 171   @param[in] Bar            The mmio base address of the slot to be accessed.
 172
 173   @retval EFI_SUCCESS       The software reset executes successfully.
 174   @retval Others            The software reset fails.
 175
 176 **/
 177 EFI_STATUS
 178 SdPeimHcReset (
 179   IN UINTN                  Bar
 180   );
 181
 182 /**
 183   Set all interrupt status bits in Normal and Error Interrupt Status Enable
 184   register.
 185
 186   @param[in] Bar            The mmio base address of the slot to be accessed.
 187
 188   @retval EFI_SUCCESS       The operation executes successfully.
 189   @retval Others            The operation fails.
 190
 191 **/
 192 EFI_STATUS
 193 SdPeimHcEnableInterrupt (
 194   IN UINTN                  Bar
 195   );
 196
 197 /**
 198   Get the capability data from the specified slot.
 199
 200   @param[in]  Bar             The mmio base address of the slot to be accessed.
 201   @param[out] Capability      The buffer to store the capability data.
 202
 203   @retval EFI_SUCCESS         The operation executes successfully.
 204   @retval Others              The operation fails.
 205
 206 **/
 207 EFI_STATUS
 208 SdPeimHcGetCapability (
 209   IN     UINTN              Bar,
 210      OUT SD_HC_SLOT_CAP     *Capability
 211   );
 212
 213 /**
 214   Detect whether there is a SD card attached at the specified SD host controller
 215   slot.
 216
 217   Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.
 218
 219   @param[in]  Bar           The mmio base address of the slot to be accessed.
 220
 221   @retval EFI_SUCCESS       There is a SD card attached.
 222   @retval EFI_NO_MEDIA      There is not a SD card attached.
 223   @retval Others            The detection fails.
 224
 225 **/
 226 EFI_STATUS
 227 SdPeimHcCardDetect (
 228   IN UINTN                  Bar
 229   );
 230
 231 /**
 232   Initial SD host controller with lowest clock frequency, max power and max timeout value
 233   at initialization.
 234
 235   @param[in] Bar            The mmio base address of the slot to be accessed.
 236
 237   @retval EFI_SUCCESS       The host controller is initialized successfully.
 238   @retval Others            The host controller isn't initialized successfully.
 239
 240 **/
 241 EFI_STATUS
 242 SdPeimHcInitHost (
 243   IN UINTN                  Bar
 244   );
 245
 246 /**
 247   Send command SWITCH_FUNC to the SD device to check switchable function or switch card function.
 248
 249   Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
 250
 251   @param[in]  Slot          The slot number of the SD card to send the command to.
 252   @param[in]  AccessMode    The value for access mode group.
 253   @param[in]  CommandSystem The value for command set group.
 254   @param[in]  DriveStrength The value for drive length group.
 255   @param[in]  PowerLimit    The value for power limit group.
 256   @param[in]  Mode          Switch or check function.
 257
 258   @retval EFI_SUCCESS       The operation is done correctly.
 259   @retval Others            The operation fails.
 260
 261 **/
 262 EFI_STATUS
 263 SdPeimSwitch (
 264   IN SD_PEIM_HC_SLOT        *Slot,
 265   IN UINT8                  AccessMode,
 266   IN UINT8                  CommandSystem,
 267   IN UINT8                  DriveStrength,
 268   IN UINT8                  PowerLimit,
 269   IN BOOLEAN                Mode
 270   );
 271
 272 /**
 273   Send command READ_SINGLE_BLOCK/WRITE_SINGLE_BLOCK to the addressed SD device
 274   to read/write the specified number of blocks.
 275
 276   Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
 277
 278   @param[in] Slot           The slot number of the SD card to send the command to.
 279   @param[in] Lba            The logical block address of starting access.
 280   @param[in] BlockSize      The block size of specified SD device partition.
 281   @param[in] Buffer         The pointer to the transfer buffer.
 282   @param[in] BufferSize     The size of transfer buffer.
 283   @param[in] IsRead         Boolean to show the operation direction.
 284
 285   @retval EFI_SUCCESS       The operation is done correctly.
 286   @retval Others            The operation fails.
 287
 288 **/
 289 EFI_STATUS
 290 SdPeimRwSingleBlock (
 291   IN SD_PEIM_HC_SLOT                *Slot,
 292   IN EFI_LBA                        Lba,
 293   IN UINT32                         BlockSize,
 294   IN VOID                           *Buffer,
 295   IN UINTN                          BufferSize,
 296   IN BOOLEAN                        IsRead
 297   );
 298
 299 /**
 300   Send command READ_MULTIPLE_BLOCK/WRITE_MULTIPLE_BLOCK to the addressed SD device
 301   to read/write the specified number of blocks.
 302
 303   Refer to SD Electrical Standard Spec 5.1 Section 6.10.4 for details.
 304
 305   @param[in] Slot           The slot number of the Sd card to send the command to.
 306   @param[in] Lba            The logical block address of starting access.
 307   @param[in] BlockSize      The block size of specified SD device partition.
 308   @param[in] Buffer         The pointer to the transfer buffer.
 309   @param[in] BufferSize     The size of transfer buffer.
 310   @param[in] IsRead         Boolean to show the operation direction.
 311
 312   @retval EFI_SUCCESS       The operation is done correctly.
 313   @retval Others            The operation fails.
 314
 315 **/
 316 EFI_STATUS
 317 SdPeimRwMultiBlocks (
 318   IN SD_PEIM_HC_SLOT                *Slot,
 319   IN EFI_LBA                        Lba,
 320   IN UINT32                         BlockSize,
 321   IN VOID                           *Buffer,
 322   IN UINTN                          BufferSize,
 323   IN BOOLEAN                        IsRead
 324   );
 325
 326 /**
 327   Execute SD device identification procedure.
 328
 329   Refer to SD Electrical Standard Spec 5.1 Section 6.4 for details.
 330
 331   @param[in] Slot           The slot number of the Sd card to send the command to.
 332
 333   @retval EFI_SUCCESS       There is a SD card.
 334   @retval Others            There is not a SD card.
 335
 336 **/
 337 EFI_STATUS
 338 SdPeimIdentification (
 339   IN SD_PEIM_HC_SLOT           *Slot
 340   );
 341
 342 /**
 343   Free the resource used by the TRB.
 344
 345   @param[in] Trb        The pointer to the SD_TRB instance.
 346
 347 **/
 348 VOID
 349 SdPeimFreeTrb (
 350   IN SD_TRB           *Trb
 351   );
 352
 353 #endif
 354