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git.proxmox.com Git - mirror_edk2.git/blob - MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.h
3 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
4 SPDX-License-Identifier: BSD-2-Clause-Patent
12 // SD Host Controller MMIO Register Offset
14 #define SD_HC_SDMA_ADDR 0x00
15 #define SD_HC_ARG2 0x00
16 #define SD_HC_BLK_SIZE 0x04
17 #define SD_HC_BLK_COUNT 0x06
18 #define SD_HC_ARG1 0x08
19 #define SD_HC_TRANS_MOD 0x0C
20 #define SD_HC_COMMAND 0x0E
21 #define SD_HC_RESPONSE 0x10
22 #define SD_HC_BUF_DAT_PORT 0x20
23 #define SD_HC_PRESENT_STATE 0x24
24 #define SD_HC_HOST_CTRL1 0x28
25 #define SD_HC_POWER_CTRL 0x29
26 #define SD_HC_BLK_GAP_CTRL 0x2A
27 #define SD_HC_WAKEUP_CTRL 0x2B
28 #define SD_HC_CLOCK_CTRL 0x2C
29 #define SD_HC_TIMEOUT_CTRL 0x2E
30 #define SD_HC_SW_RST 0x2F
31 #define SD_HC_NOR_INT_STS 0x30
32 #define SD_HC_ERR_INT_STS 0x32
33 #define SD_HC_NOR_INT_STS_EN 0x34
34 #define SD_HC_ERR_INT_STS_EN 0x36
35 #define SD_HC_NOR_INT_SIG_EN 0x38
36 #define SD_HC_ERR_INT_SIG_EN 0x3A
37 #define SD_HC_AUTO_CMD_ERR_STS 0x3C
38 #define SD_HC_HOST_CTRL2 0x3E
39 #define SD_HC_CAP 0x40
40 #define SD_HC_MAX_CURRENT_CAP 0x48
41 #define SD_HC_FORCE_EVT_AUTO_CMD 0x50
42 #define SD_HC_FORCE_EVT_ERR_INT 0x52
43 #define SD_HC_ADMA_ERR_STS 0x54
44 #define SD_HC_ADMA_SYS_ADDR 0x58
45 #define SD_HC_PRESET_VAL 0x60
46 #define SD_HC_SHARED_BUS_CTRL 0xE0
47 #define SD_HC_SLOT_INT_STS 0xFC
48 #define SD_HC_CTRL_VER 0xFE
51 // The transfer modes supported by SD Host Controller
52 // Simplified Spec 3.0 Table 1-2
59 } SD_HC_TRANSFER_MODE
;
62 // The maximum data length of each descriptor line
64 #define ADMA_MAX_DATA_PER_LINE 0x10000
65 #define SD_SDMA_BOUNDARY 512 * 1024
66 #define SD_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
69 SdCommandTypeBc
, // Broadcast commands, no response
70 SdCommandTypeBcr
, // Broadcast commands with response
71 SdCommandTypeAc
, // Addressed(point-to-point) commands
72 SdCommandTypeAdtc
// Addressed(point-to-point) data transfer commands
87 typedef struct _SD_COMMAND_BLOCK
{
89 UINT32 CommandArgument
;
90 UINT32 CommandType
; // One of the SD_COMMAND_TYPE values
91 UINT32 ResponseType
; // One of the SD_RESPONSE_TYPE values
94 typedef struct _SD_STATUS_BLOCK
{
101 typedef struct _SD_COMMAND_PACKET
{
103 SD_COMMAND_BLOCK
*SdCmdBlk
;
104 SD_STATUS_BLOCK
*SdStatusBlk
;
107 UINT32 InTransferLength
;
108 UINT32 OutTransferLength
;
122 } SD_HC_ADMA_DESC_LINE
;
125 UINT32 TimeoutFreq
:6; // bit 0:5
126 UINT32 Reserved
:1; // bit 6
127 UINT32 TimeoutUnit
:1; // bit 7
128 UINT32 BaseClkFreq
:8; // bit 8:15
129 UINT32 MaxBlkLen
:2; // bit 16:17
130 UINT32 BusWidth8
:1; // bit 18
131 UINT32 Adma2
:1; // bit 19
132 UINT32 Reserved2
:1; // bit 20
133 UINT32 HighSpeed
:1; // bit 21
134 UINT32 Sdma
:1; // bit 22
135 UINT32 SuspRes
:1; // bit 23
136 UINT32 Voltage33
:1; // bit 24
137 UINT32 Voltage30
:1; // bit 25
138 UINT32 Voltage18
:1; // bit 26
139 UINT32 Reserved3
:1; // bit 27
140 UINT32 SysBus64
:1; // bit 28
141 UINT32 AsyncInt
:1; // bit 29
142 UINT32 SlotType
:2; // bit 30:31
143 UINT32 Sdr50
:1; // bit 32
144 UINT32 Sdr104
:1; // bit 33
145 UINT32 Ddr50
:1; // bit 34
146 UINT32 Reserved4
:1; // bit 35
147 UINT32 DriverTypeA
:1; // bit 36
148 UINT32 DriverTypeC
:1; // bit 37
149 UINT32 DriverTypeD
:1; // bit 38
150 UINT32 DriverType4
:1; // bit 39
151 UINT32 TimerCount
:4; // bit 40:43
152 UINT32 Reserved5
:1; // bit 44
153 UINT32 TuningSDR50
:1; // bit 45
154 UINT32 RetuningMod
:2; // bit 46:47
155 UINT32 ClkMultiplier
:8; // bit 48:55
156 UINT32 Reserved6
:7; // bit 56:62
157 UINT32 Hs400
:1; // bit 63
163 Software reset the specified SD host controller and enable all interrupts.
165 @param[in] Bar The mmio base address of the slot to be accessed.
167 @retval EFI_SUCCESS The software reset executes successfully.
168 @retval Others The software reset fails.
177 Set all interrupt status bits in Normal and Error Interrupt Status Enable
180 @param[in] Bar The mmio base address of the slot to be accessed.
182 @retval EFI_SUCCESS The operation executes successfully.
183 @retval Others The operation fails.
187 SdPeimHcEnableInterrupt (
192 Get the capability data from the specified slot.
194 @param[in] Bar The mmio base address of the slot to be accessed.
195 @param[out] Capability The buffer to store the capability data.
197 @retval EFI_SUCCESS The operation executes successfully.
198 @retval Others The operation fails.
202 SdPeimHcGetCapability (
204 OUT SD_HC_SLOT_CAP
*Capability
208 Detect whether there is a SD card attached at the specified SD host controller
211 Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.
213 @param[in] Bar The mmio base address of the slot to be accessed.
215 @retval EFI_SUCCESS There is a SD card attached.
216 @retval EFI_NO_MEDIA There is not a SD card attached.
217 @retval Others The detection fails.
226 Initial SD host controller with lowest clock frequency, max power and max timeout value
229 @param[in] Bar The mmio base address of the slot to be accessed.
231 @retval EFI_SUCCESS The host controller is initialized successfully.
232 @retval Others The host controller isn't initialized successfully.
241 Send command SWITCH_FUNC to the SD device to check switchable function or switch card function.
243 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
245 @param[in] Slot The slot number of the SD card to send the command to.
246 @param[in] AccessMode The value for access mode group.
247 @param[in] CommandSystem The value for command set group.
248 @param[in] DriveStrength The value for drive length group.
249 @param[in] PowerLimit The value for power limit group.
250 @param[in] Mode Switch or check function.
251 @param[out] SwitchResp The return switch function status.
253 @retval EFI_SUCCESS The operation is done correctly.
254 @retval Others The operation fails.
259 IN SD_PEIM_HC_SLOT
*Slot
,
261 IN UINT8 CommandSystem
,
262 IN UINT8 DriveStrength
,
265 OUT UINT8
*SwitchResp
269 Send command READ_SINGLE_BLOCK/WRITE_SINGLE_BLOCK to the addressed SD device
270 to read/write the specified number of blocks.
272 Refer to SD Physical Layer Simplified Spec 4.1 Section 4.7 for details.
274 @param[in] Slot The slot number of the SD card to send the command to.
275 @param[in] Lba The logical block address of starting access.
276 @param[in] BlockSize The block size of specified SD device partition.
277 @param[in] Buffer The pointer to the transfer buffer.
278 @param[in] BufferSize The size of transfer buffer.
279 @param[in] IsRead Boolean to show the operation direction.
281 @retval EFI_SUCCESS The operation is done correctly.
282 @retval Others The operation fails.
286 SdPeimRwSingleBlock (
287 IN SD_PEIM_HC_SLOT
*Slot
,
296 Send command READ_MULTIPLE_BLOCK/WRITE_MULTIPLE_BLOCK to the addressed SD device
297 to read/write the specified number of blocks.
299 Refer to SD Electrical Standard Spec 5.1 Section 6.10.4 for details.
301 @param[in] Slot The slot number of the Sd card to send the command to.
302 @param[in] Lba The logical block address of starting access.
303 @param[in] BlockSize The block size of specified SD device partition.
304 @param[in] Buffer The pointer to the transfer buffer.
305 @param[in] BufferSize The size of transfer buffer.
306 @param[in] IsRead Boolean to show the operation direction.
308 @retval EFI_SUCCESS The operation is done correctly.
309 @retval Others The operation fails.
313 SdPeimRwMultiBlocks (
314 IN SD_PEIM_HC_SLOT
*Slot
,
323 Execute SD device identification procedure.
325 Refer to SD Electrical Standard Spec 5.1 Section 6.4 for details.
327 @param[in] Slot The slot number of the Sd card to send the command to.
329 @retval EFI_SUCCESS There is a SD card.
330 @retval Others There is not a SD card.
334 SdPeimIdentification (
335 IN SD_PEIM_HC_SLOT
*Slot
339 Free the resource used by the TRB.
341 @param[in] Trb The pointer to the SD_TRB instance.