MdeModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.c

   1 /** @file
   2   x64 Virtual Memory Management Services in the form of an IA-32 driver.
   3   Used to establish a 1:1 Virtual to Physical Mapping that is required to
   4   enter Long Mode (x64 64-bit mode).
   5
   6   While we make a 1:1 mapping (identity mapping) for all physical pages
   7   we still need to use the MTRR's to ensure that the cachability attirbutes
   8   for all memory regions is correct.
   9
  10   The basic idea is to use 2MB page table entries where ever possible. If
  11   more granularity of cachability is required then 4K page tables are used.
  12
  13   References:
  14     1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
  15     2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
  16     3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
  17
  18 Copyright (c) 2006 - 2008, Intel Corporation. <BR>
  19 All rights reserved. This program and the accompanying materials
  20 are licensed and made available under the terms and conditions of the BSD License
  21 which accompanies this distribution.  The full text of the license may be found at
  22 http://opensource.org/licenses/bsd-license.php
  23
  24 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  25 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  26
  27 **/
  28
  29 #include "DxeIpl.h"
  30 #include "VirtualMemory.h"
  31
  32
  33
  34
  35
  36
  37 /**
  38   Allocates and fills in the Page Directory and Page Table Entries to
  39   establish a 1:1 Virtual to Physical mapping.
  40
  41   @param  NumberOfProcessorPhysicalAddressBits  Number of processor address bits
  42                                                 to use. Limits the number of page
  43                                                 table entries  to the physical
  44                                                 address space.
  45
  46   @return EFI_SUCCESS           The 1:1 Virtual to Physical identity mapping was created
  47
  48 **/
  49 UINTN
  50 CreateIdentityMappingPageTables (
  51   VOID
  52   )
  53 {
  54   UINT8                                         PhysicalAddressBits;
  55   EFI_PHYSICAL_ADDRESS                          PageAddress;
  56   UINTN                                         IndexOfPml4Entries;
  57   UINTN                                         IndexOfPdpEntries;
  58   UINTN                                         IndexOfPageDirectoryEntries;
  59   UINTN                                         NumberOfPml4EntriesNeeded;
  60   UINTN                                         NumberOfPdpEntriesNeeded;
  61   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMapLevel4Entry;
  62   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMap;
  63   PAGE_MAP_AND_DIRECTORY_POINTER                *PageDirectoryPointerEntry;
  64   PAGE_TABLE_ENTRY                              *PageDirectoryEntry;
  65   UINTN                                         TotalPagesNum;
  66   UINTN                                         BigPageAddress;
  67   VOID                                          *Hob;
  68
  69   //
  70   // Get physical address bits supported from CPU HOB.
  71   //
  72   PhysicalAddressBits = 36;
  73
  74   Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
  75   if (Hob != NULL) {
  76     PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
  77   }
  78
  79   //
  80   // Calculate the table entries needed.
  81   //
  82   if (PhysicalAddressBits <= 39 ) {
  83     NumberOfPml4EntriesNeeded = 1;
  84     NumberOfPdpEntriesNeeded =  1 << (PhysicalAddressBits - 30);
  85   } else {
  86     NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
  87     NumberOfPdpEntriesNeeded = 512;
  88   }
  89
  90   //
  91   // Pre-allocate big pages to avoid later allocations.
  92   //
  93   TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
  94   BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
  95   ASSERT (BigPageAddress != 0);
  96
  97   //
  98   // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
  99   //
 100   PageMap         = (VOID *) BigPageAddress;
 101   BigPageAddress += EFI_PAGE_SIZE;
 102
 103   PageMapLevel4Entry = PageMap;
 104   PageAddress        = 0;
 105   for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 106     //
 107     // Each PML4 entry points to a page of Page Directory Pointer entires.
 108     // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
 109     //
 110     PageDirectoryPointerEntry = (VOID *) BigPageAddress;
 111     BigPageAddress += EFI_PAGE_SIZE;
 112
 113     //
 114     // Make a PML4 Entry
 115     //
 116     PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
 117     PageMapLevel4Entry->Bits.ReadWrite = 1;
 118     PageMapLevel4Entry->Bits.Present = 1;
 119
 120     for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
 121       //
 122       // Each Directory Pointer entries points to a page of Page Directory entires.
 123       // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
 124       //
 125       PageDirectoryEntry = (VOID *) BigPageAddress;
 126       BigPageAddress += EFI_PAGE_SIZE;
 127
 128       //
 129       // Fill in a Page Directory Pointer Entries
 130       //
 131       PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
 132       PageDirectoryPointerEntry->Bits.ReadWrite = 1;
 133       PageDirectoryPointerEntry->Bits.Present = 1;
 134
 135       for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
 136         //
 137         // Fill in the Page Directory entries
 138         //
 139         PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
 140         PageDirectoryEntry->Bits.ReadWrite = 1;
 141         PageDirectoryEntry->Bits.Present = 1;
 142         PageDirectoryEntry->Bits.MustBe1 = 1;
 143
 144       }
 145     }
 146   }
 147
 148   //
 149   // For the PML4 entries we are not using fill in a null entry.
 150   // For now we just copy the first entry.
 151   //
 152   for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 153      CopyMem (
 154        PageMapLevel4Entry,
 155        PageMap,
 156        sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
 157        );
 158   }
 159
 160   return (UINTN)PageMap;
 161 }
 162