MdeModulePkg/Core/DxeIplPeim/Ia32/VirtualMemory.c

   1 /** @file
   2   x64 Virtual Memory Management Services in the form of an IA-32 driver.
   3   Used to establish a 1:1 Virtual to Physical Mapping that is required to
   4   enter Long Mode (x64 64-bit mode).
   5
   6   While we make a 1:1 mapping (identity mapping) for all physical pages
   7   we still need to use the MTRR's to ensure that the cachability attirbutes
   8   for all memory regions is correct.
   9
  10   The basic idea is to use 2MB page table entries where ever possible. If
  11   more granularity of cachability is required then 4K page tables are used.
  12
  13   References:
  14     1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
  15     2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
  16     3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
  17
  18 Copyright (c) 2006 - 2008, Intel Corporation. <BR>
  19 All rights reserved. This program and the accompanying materials
  20 are licensed and made available under the terms and conditions of the BSD License
  21 which accompanies this distribution.  The full text of the license may be found at
  22 http://opensource.org/licenses/bsd-license.php
  23
  24 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  25 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  26
  27 **/
  28
  29 #include "DxeIpl.h"
  30 #include "VirtualMemory.h"
  31
  32
  33 UINTN
  34 CreateIdentityMappingPageTables (
  35   VOID
  36   )
  37 /*++
  38
  39 Routine Description:
  40
  41   Allocates and fills in the Page Directory and Page Table Entries to
  42   establish a 1:1 Virtual to Physical mapping.
  43
  44 Arguments:
  45
  46   NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.
  47                                          Limits the number of page table entries
  48                                          to the physical address space.
  49
  50 Returns:
  51
  52   EFI_SUCCESS           The 1:1 Virtual to Physical identity mapping was created
  53
  54 --*/
  55 {
  56   UINT8                                         PhysicalAddressBits;
  57   EFI_PHYSICAL_ADDRESS                          PageAddress;
  58   UINTN                                         IndexOfPml4Entries;
  59   UINTN                                         IndexOfPdpEntries;
  60   UINTN                                         IndexOfPageDirectoryEntries;
  61   UINTN                                         NumberOfPml4EntriesNeeded;
  62   UINTN                                         NumberOfPdpEntriesNeeded;
  63   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMapLevel4Entry;
  64   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMap;
  65   PAGE_MAP_AND_DIRECTORY_POINTER                *PageDirectoryPointerEntry;
  66   PAGE_TABLE_ENTRY                              *PageDirectoryEntry;
  67   UINTN                                         TotalPagesNum;
  68   UINTN                                         BigPageAddress;
  69   VOID                                          *Hob;
  70
  71   //
  72   // Get physical address bits supported from CPU HOB.
  73   //
  74   PhysicalAddressBits = 36;
  75
  76   Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
  77   if (Hob != NULL) {
  78     PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
  79   }
  80
  81   //
  82   // Calculate the table entries needed.
  83   //
  84   if (PhysicalAddressBits <= 39 ) {
  85     NumberOfPml4EntriesNeeded = 1;
  86     NumberOfPdpEntriesNeeded =  1 << (PhysicalAddressBits - 30);
  87   } else {
  88     NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
  89     NumberOfPdpEntriesNeeded = 512;
  90   }
  91
  92   //
  93   // Pre-allocate big pages to avoid later allocations.
  94   //
  95   TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
  96   BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
  97   ASSERT (BigPageAddress != 0);
  98
  99   //
 100   // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
 101   //
 102   PageMap         = (VOID *) BigPageAddress;
 103   BigPageAddress += EFI_PAGE_SIZE;
 104
 105   PageMapLevel4Entry = PageMap;
 106   PageAddress        = 0;
 107   for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 108     //
 109     // Each PML4 entry points to a page of Page Directory Pointer entires.
 110     // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
 111     //
 112     PageDirectoryPointerEntry = (VOID *) BigPageAddress;
 113     BigPageAddress += EFI_PAGE_SIZE;
 114
 115     //
 116     // Make a PML4 Entry
 117     //
 118     PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
 119     PageMapLevel4Entry->Bits.ReadWrite = 1;
 120     PageMapLevel4Entry->Bits.Present = 1;
 121
 122     for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
 123       //
 124       // Each Directory Pointer entries points to a page of Page Directory entires.
 125       // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
 126       //
 127       PageDirectoryEntry = (VOID *) BigPageAddress;
 128       BigPageAddress += EFI_PAGE_SIZE;
 129
 130       //
 131       // Fill in a Page Directory Pointer Entries
 132       //
 133       PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
 134       PageDirectoryPointerEntry->Bits.ReadWrite = 1;
 135       PageDirectoryPointerEntry->Bits.Present = 1;
 136
 137       for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
 138         //
 139         // Fill in the Page Directory entries
 140         //
 141         PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
 142         PageDirectoryEntry->Bits.ReadWrite = 1;
 143         PageDirectoryEntry->Bits.Present = 1;
 144         PageDirectoryEntry->Bits.MustBe1 = 1;
 145
 146       }
 147     }
 148   }
 149
 150   //
 151   // For the PML4 entries we are not using fill in a null entry.
 152   // For now we just copy the first entry.
 153   //
 154   for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 155      CopyMem (
 156        PageMapLevel4Entry,
 157        PageMap,
 158        sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
 159        );
 160   }
 161
 162   return (UINTN)PageMap; // FIXME
 163 }
 164