MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c

   1 /** @file
   2   x64 Virtual Memory Management Services in the form of an IA-32 driver.
   3   Used to establish a 1:1 Virtual to Physical Mapping that is required to
   4   enter Long Mode (x64 64-bit mode).
   5
   6   While we make a 1:1 mapping (identity mapping) for all physical pages
   7   we still need to use the MTRR's to ensure that the cachability attributes
   8   for all memory regions is correct.
   9
  10   The basic idea is to use 2MB page table entries where ever possible. If
  11   more granularity of cachability is required then 4K page tables are used.
  12
  13   References:
  14     1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1:Basic Architecture, Intel
  15     2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
  16     3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
  17
  18 Copyright (c) 2006 - 2010, Intel Corporation. <BR>
  19 All rights reserved. This program and the accompanying materials
  20 are licensed and made available under the terms and conditions of the BSD License
  21 which accompanies this distribution.  The full text of the license may be found at
  22 http://opensource.org/licenses/bsd-license.php
  23
  24 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  25 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  26
  27 **/
  28
  29 #include "DxeIpl.h"
  30 #include "VirtualMemory.h"
  31
  32 /**
  33   Allocates and fills in the Page Directory and Page Table Entries to
  34   establish a 1:1 Virtual to Physical mapping.
  35
  36   @param  NumberOfProcessorPhysicalAddressBits  Number of processor address bits
  37                                                 to use. Limits the number of page
  38                                                 table entries  to the physical
  39                                                 address space.
  40
  41   @return The address of 4 level page map.
  42
  43 **/
  44 UINTN
  45 CreateIdentityMappingPageTables (
  46   VOID
  47   )
  48 {
  49   UINT8                                         PhysicalAddressBits;
  50   EFI_PHYSICAL_ADDRESS                          PageAddress;
  51   UINTN                                         IndexOfPml4Entries;
  52   UINTN                                         IndexOfPdpEntries;
  53   UINTN                                         IndexOfPageDirectoryEntries;
  54   UINT32                                        NumberOfPml4EntriesNeeded;
  55   UINT32                                        NumberOfPdpEntriesNeeded;
  56   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMapLevel4Entry;
  57   PAGE_MAP_AND_DIRECTORY_POINTER                *PageMap;
  58   PAGE_MAP_AND_DIRECTORY_POINTER                *PageDirectoryPointerEntry;
  59   PAGE_TABLE_ENTRY                              *PageDirectoryEntry;
  60   UINTN                                         TotalPagesNum;
  61   UINTN                                         BigPageAddress;
  62   VOID                                          *Hob;
  63
  64   //
  65   // Get physical address bits supported from CPU HOB.
  66   //
  67   PhysicalAddressBits = 36;
  68
  69   Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
  70   if (Hob != NULL) {
  71     PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
  72   }
  73
  74   //
  75   // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
  76   //
  77   ASSERT (PhysicalAddressBits <= 52);
  78   if (PhysicalAddressBits > 48) {
  79     PhysicalAddressBits = 48;
  80   }
  81
  82   //
  83   // Calculate the table entries needed.
  84   //
  85   if (PhysicalAddressBits <= 39 ) {
  86     NumberOfPml4EntriesNeeded = 1;
  87     NumberOfPdpEntriesNeeded =  1 << (PhysicalAddressBits - 30);
  88   } else {
  89     NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
  90     NumberOfPdpEntriesNeeded = 512;
  91   }
  92
  93   //
  94   // Pre-allocate big pages to avoid later allocations.
  95   //
  96   TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
  97   BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
  98   ASSERT (BigPageAddress != 0);
  99
 100   //
 101   // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
 102   //
 103   PageMap         = (VOID *) BigPageAddress;
 104   BigPageAddress += EFI_PAGE_SIZE;
 105
 106   PageMapLevel4Entry = PageMap;
 107   PageAddress        = 0;
 108   for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 109     //
 110     // Each PML4 entry points to a page of Page Directory Pointer entires.
 111     // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
 112     //
 113     PageDirectoryPointerEntry = (VOID *) BigPageAddress;
 114     BigPageAddress += EFI_PAGE_SIZE;
 115
 116     //
 117     // Make a PML4 Entry
 118     //
 119     PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
 120     PageMapLevel4Entry->Bits.ReadWrite = 1;
 121     PageMapLevel4Entry->Bits.Present = 1;
 122
 123     for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
 124       //
 125       // Each Directory Pointer entries points to a page of Page Directory entires.
 126       // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
 127       //
 128       PageDirectoryEntry = (VOID *) BigPageAddress;
 129       BigPageAddress += EFI_PAGE_SIZE;
 130
 131       //
 132       // Fill in a Page Directory Pointer Entries
 133       //
 134       PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
 135       PageDirectoryPointerEntry->Bits.ReadWrite = 1;
 136       PageDirectoryPointerEntry->Bits.Present = 1;
 137
 138       for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
 139         //
 140         // Fill in the Page Directory entries
 141         //
 142         PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
 143         PageDirectoryEntry->Bits.ReadWrite = 1;
 144         PageDirectoryEntry->Bits.Present = 1;
 145         PageDirectoryEntry->Bits.MustBe1 = 1;
 146
 147       }
 148     }
 149   }
 150
 151   //
 152   // For the PML4 entries we are not using fill in a null entry.
 153   // For now we just copy the first entry.
 154   //
 155   for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
 156      CopyMem (
 157        PageMapLevel4Entry,
 158        PageMap,
 159        sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
 160        );
 161   }
 162
 163   return (UINTN)PageMap;
 164 }
 165