2 The default version of EFI_PEI_PCI_CFG2_PPI support published by PeiServices in
3 PeiCore initialization phase.
5 EFI_PEI_PCI_CFG2_PPI is installed by the PEIM which supports a PCI root bridge.
6 When PeiCore is started, the default version of EFI_PEI_PCI_CFG2_PPI will be assigned
9 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
17 /// This default instance of EFI_PEI_PCI_CFG2_PPI install assigned to EFI_PEI_SERVICE.PciCfg
18 /// when PeiCore's initialization.
20 EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi
= {
21 PeiDefaultPciCfg2Read
,
22 PeiDefaultPciCfg2Write
,
23 PeiDefaultPciCfg2Modify
27 Reads from a given location in the PCI configuration space.
29 If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
30 return EFI_NOT_YET_AVAILABLE.
32 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
33 @param This Pointer to local data for the interface.
34 @param Width The width of the access. Enumerated in bytes.
35 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
36 @param Address The physical address of the access. The format of
37 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
38 @param Buffer A pointer to the buffer of data.
40 @retval EFI_SUCCESS The function completed successfully.
41 @retval EFI_INVALID_PARAMETER The invalid access width.
42 @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
47 PeiDefaultPciCfg2Read (
48 IN CONST EFI_PEI_SERVICES
**PeiServices
,
49 IN CONST EFI_PEI_PCI_CFG2_PPI
*This
,
50 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
,
55 return EFI_NOT_AVAILABLE_YET
;
59 Write to a given location in the PCI configuration space.
61 If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
62 return EFI_NOT_YET_AVAILABLE.
64 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
65 @param This Pointer to local data for the interface.
66 @param Width The width of the access. Enumerated in bytes.
67 See EFI_PEI_PCI_CFG_PPI_WIDTH above.
68 @param Address The physical address of the access. The format of
69 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
70 @param Buffer A pointer to the buffer of data.
72 @retval EFI_SUCCESS The function completed successfully.
73 @retval EFI_INVALID_PARAMETER The invalid access width.
74 @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
78 PeiDefaultPciCfg2Write (
79 IN CONST EFI_PEI_SERVICES
**PeiServices
,
80 IN CONST EFI_PEI_PCI_CFG2_PPI
*This
,
81 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
,
86 return EFI_NOT_AVAILABLE_YET
;
90 This function performs a read-modify-write operation on the contents from a given
91 location in the PCI configuration space.
92 If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
93 return EFI_NOT_YET_AVAILABLE.
95 @param PeiServices An indirect pointer to the PEI Services Table
96 published by the PEI Foundation.
97 @param This Pointer to local data for the interface.
98 @param Width The width of the access. Enumerated in bytes. Type
99 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
100 @param Address The physical address of the access.
101 @param SetBits Points to value to bitwise-OR with the read configuration value.
102 The size of the value is determined by Width.
103 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.
104 The size of the value is determined by Width.
106 @retval EFI_SUCCESS The function completed successfully.
107 @retval EFI_INVALID_PARAMETER The invalid access width.
108 @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
112 PeiDefaultPciCfg2Modify (
113 IN CONST EFI_PEI_SERVICES
**PeiServices
,
114 IN CONST EFI_PEI_PCI_CFG2_PPI
*This
,
115 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width
,
121 return EFI_NOT_AVAILABLE_YET
;