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1 /** @file
2 EFI IOMMU Protocol.
3
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #ifndef __IOMMU_H__
10 #define __IOMMU_H__
11
12 //
13 // IOMMU Protocol GUID value
14 //
15 #define EDKII_IOMMU_PROTOCOL_GUID \
16 { \
17 0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \
18 }
19
20 //
21 // Forward reference for pure ANSI compatability
22 //
23 typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;
24
25 //
26 // Revision The revision to which the IOMMU interface adheres.
27 // All future revisions must be backwards compatible.
28 // If a future version is not back wards compatible it is not the same GUID.
29 //
30 #define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000
31
32 //
33 // IOMMU Access for SetAttribute
34 //
35 // These types can be "ORed" together as needed.
36 // Any undefined bits are reserved and must be zero.
37 //
38 #define EDKII_IOMMU_ACCESS_READ 0x1
39 #define EDKII_IOMMU_ACCESS_WRITE 0x2
40
41 //
42 // IOMMU Operation for Map
43 //
44 typedef enum {
45 ///
46 /// A read operation from system memory by a bus master that is not capable of producing
47 /// PCI dual address cycles.
48 ///
49 EdkiiIoMmuOperationBusMasterRead,
50 ///
51 /// A write operation from system memory by a bus master that is not capable of producing
52 /// PCI dual address cycles.
53 ///
54 EdkiiIoMmuOperationBusMasterWrite,
55 ///
56 /// Provides both read and write access to system memory by both the processor and a bus
57 /// master that is not capable of producing PCI dual address cycles.
58 ///
59 EdkiiIoMmuOperationBusMasterCommonBuffer,
60 ///
61 /// A read operation from system memory by a bus master that is capable of producing PCI
62 /// dual address cycles.
63 ///
64 EdkiiIoMmuOperationBusMasterRead64,
65 ///
66 /// A write operation to system memory by a bus master that is capable of producing PCI
67 /// dual address cycles.
68 ///
69 EdkiiIoMmuOperationBusMasterWrite64,
70 ///
71 /// Provides both read and write access to system memory by both the processor and a bus
72 /// master that is capable of producing PCI dual address cycles.
73 ///
74 EdkiiIoMmuOperationBusMasterCommonBuffer64,
75 EdkiiIoMmuOperationMaximum
76 } EDKII_IOMMU_OPERATION;
77
78 //
79 // IOMMU attribute for AllocateBuffer
80 // Any undefined bits are reserved and must be zero.
81 //
82 #define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
83 #define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800
84 #define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
85
86 #define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
87
88 #define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
89
90 /**
91 Set IOMMU attribute for a system memory.
92
93 If the IOMMU protocol exists, the system memory cannot be used
94 for DMA by default.
95
96 When a device requests a DMA access for a system memory,
97 the device driver need use SetAttribute() to update the IOMMU
98 attribute to request DMA access (read and/or write).
99
100 The DeviceHandle is used to identify which device submits the request.
101 The IOMMU implementation need translate the device path to an IOMMU device ID,
102 and set IOMMU hardware register accordingly.
103 1) DeviceHandle can be a standard PCI device.
104 The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.
105 The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.
106 The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.
107 After the memory is used, the memory need set 0 to keep it being protected.
108 2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).
109 The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.
110
111 @param[in] This The protocol instance pointer.
112 @param[in] DeviceHandle The device who initiates the DMA access request.
113 @param[in] Mapping The mapping value returned from Map().
114 @param[in] IoMmuAccess The IOMMU access.
115
116 @retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.
117 @retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.
118 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
119 @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.
120 @retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.
121 @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.
122 @retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.
123 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.
124 @retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.
125
126 **/
127 typedef
128 EFI_STATUS
129 (EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(
130 IN EDKII_IOMMU_PROTOCOL *This,
131 IN EFI_HANDLE DeviceHandle,
132 IN VOID *Mapping,
133 IN UINT64 IoMmuAccess
134 );
135
136 /**
137 Provides the controller-specific addresses required to access system memory from a
138 DMA bus master.
139
140 @param This The protocol instance pointer.
141 @param Operation Indicates if the bus master is going to read or write to system memory.
142 @param HostAddress The system memory address to map to the PCI controller.
143 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
144 that were mapped.
145 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
146 access the hosts HostAddress.
147 @param Mapping A resulting value to pass to Unmap().
148
149 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
150 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
151 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
152 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
153 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
154
155 **/
156 typedef
157 EFI_STATUS
158 (EFIAPI *EDKII_IOMMU_MAP)(
159 IN EDKII_IOMMU_PROTOCOL *This,
160 IN EDKII_IOMMU_OPERATION Operation,
161 IN VOID *HostAddress,
162 IN OUT UINTN *NumberOfBytes,
163 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
164 OUT VOID **Mapping
165 );
166
167 /**
168 Completes the Map() operation and releases any corresponding resources.
169
170 @param This The protocol instance pointer.
171 @param Mapping The mapping value returned from Map().
172
173 @retval EFI_SUCCESS The range was unmapped.
174 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
175 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
176 **/
177 typedef
178 EFI_STATUS
179 (EFIAPI *EDKII_IOMMU_UNMAP)(
180 IN EDKII_IOMMU_PROTOCOL *This,
181 IN VOID *Mapping
182 );
183
184 /**
185 Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
186 OperationBusMasterCommonBuffer64 mapping.
187
188 @param This The protocol instance pointer.
189 @param Type This parameter is not used and must be ignored.
190 @param MemoryType The type of memory to allocate, EfiBootServicesData or
191 EfiRuntimeServicesData.
192 @param Pages The number of pages to allocate.
193 @param HostAddress A pointer to store the base system memory address of the
194 allocated range.
195 @param Attributes The requested bit mask of attributes for the allocated range.
196
197 @retval EFI_SUCCESS The requested memory pages were allocated.
198 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
199 MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
200 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
201 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
202
203 **/
204 typedef
205 EFI_STATUS
206 (EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(
207 IN EDKII_IOMMU_PROTOCOL *This,
208 IN EFI_ALLOCATE_TYPE Type,
209 IN EFI_MEMORY_TYPE MemoryType,
210 IN UINTN Pages,
211 IN OUT VOID **HostAddress,
212 IN UINT64 Attributes
213 );
214
215 /**
216 Frees memory that was allocated with AllocateBuffer().
217
218 @param This The protocol instance pointer.
219 @param Pages The number of pages to free.
220 @param HostAddress The base system memory address of the allocated range.
221
222 @retval EFI_SUCCESS The requested memory pages were freed.
223 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
224 was not allocated with AllocateBuffer().
225
226 **/
227 typedef
228 EFI_STATUS
229 (EFIAPI *EDKII_IOMMU_FREE_BUFFER)(
230 IN EDKII_IOMMU_PROTOCOL *This,
231 IN UINTN Pages,
232 IN VOID *HostAddress
233 );
234
235 ///
236 /// IOMMU Protocol structure.
237 ///
238 struct _EDKII_IOMMU_PROTOCOL {
239 UINT64 Revision;
240 EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;
241 EDKII_IOMMU_MAP Map;
242 EDKII_IOMMU_UNMAP Unmap;
243 EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;
244 EDKII_IOMMU_FREE_BUFFER FreeBuffer;
245 };
246
247 ///
248 /// IOMMU Protocol GUID variable.
249 ///
250 extern EFI_GUID gEdkiiIoMmuProtocolGuid;
251
252 #endif