MdeModulePkg/Include/Protocol/SdMmcOverride.h

   1 /** @file
   2   Protocol to describe overrides required to support non-standard SDHCI
   3   implementations
   4
   5   Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>
   6
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8
   9 **/
  10
  11 #ifndef __SD_MMC_OVERRIDE_H__
  12 #define __SD_MMC_OVERRIDE_H__
  13
  14 #include <Protocol/SdMmcPassThru.h>
  15
  16 #define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \
  17   { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }
  18
  19 #define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION    0x3
  20
  21 typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;
  22
  23 #define EDKII_SD_MMC_BUS_WIDTH_IGNORE MAX_UINT8
  24 #define EDKII_SD_MMC_CLOCK_FREQ_IGNORE MAX_UINT32
  25 #define EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE  MAX_UINT8
  26
  27 typedef enum {
  28   SdDriverStrengthTypeB        = 0,
  29   SdDriverStrengthTypeA,
  30   SdDriverStrengthTypeC,
  31   SdDriverStrengthTypeD,
  32   SdDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
  33 } SD_DRIVER_STRENGTH_TYPE;
  34
  35 typedef enum {
  36   EmmcDriverStrengthType0      = 0,
  37   EmmcDriverStrengthType1,
  38   EmmcDriverStrengthType2,
  39   EmmcDriverStrengthType3,
  40   EmmcDriverStrengthType4,
  41   EmmcDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
  42 } EMMC_DRIVER_STRENGTH_TYPE;
  43
  44 typedef union {
  45   SD_DRIVER_STRENGTH_TYPE      Sd;
  46   EMMC_DRIVER_STRENGTH_TYPE    Emmc;
  47 } EDKII_SD_MMC_DRIVER_STRENGTH;
  48
  49 typedef struct {
  50   //
  51   // The target width of the bus. If user tells driver to ignore it
  52   // or specifies unsupported width driver will choose highest supported
  53   // bus width for a given mode.
  54   //
  55   UINT8                         BusWidth;
  56   //
  57   // The target clock frequency of the bus in MHz. If user tells driver to ignore
  58   // it or specifies unsupported frequency driver will choose highest supported
  59   // clock frequency for a given mode.
  60   //
  61   UINT32                        ClockFreq;
  62   //
  63   // The target driver strength of the bus. If user tells driver to
  64   // ignore it or specifies unsupported driver strength, driver will
  65   // default to Type0 for eMMC cards and TypeB for SD cards. Driver strength
  66   // setting is only considered if chosen bus timing supports them.
  67   //
  68   EDKII_SD_MMC_DRIVER_STRENGTH  DriverStrength;
  69 } EDKII_SD_MMC_OPERATING_PARAMETERS;
  70
  71 typedef enum {
  72   SdMmcSdDs,
  73   SdMmcSdHs,
  74   SdMmcUhsSdr12,
  75   SdMmcUhsSdr25,
  76   SdMmcUhsSdr50,
  77   SdMmcUhsDdr50,
  78   SdMmcUhsSdr104,
  79   SdMmcMmcLegacy,
  80   SdMmcMmcHsSdr,
  81   SdMmcMmcHsDdr,
  82   SdMmcMmcHs200,
  83   SdMmcMmcHs400,
  84 } SD_MMC_BUS_MODE;
  85
  86 typedef enum {
  87   EdkiiSdMmcResetPre,
  88   EdkiiSdMmcResetPost,
  89   EdkiiSdMmcInitHostPre,
  90   EdkiiSdMmcInitHostPost,
  91   EdkiiSdMmcUhsSignaling,
  92   EdkiiSdMmcSwitchClockFreqPost,
  93   EdkiiSdMmcGetOperatingParam
  94 } EDKII_SD_MMC_PHASE_TYPE;
  95
  96 /**
  97   Override function for SDHCI capability bits
  98
  99   @param[in]      ControllerHandle      The EFI_HANDLE of the controller.
 100   @param[in]      Slot                  The 0 based slot index.
 101   @param[in,out]  SdMmcHcSlotCapability The SDHCI capability structure.
 102   @param[in,out]  BaseClkFreq           The base clock frequency value that
 103                                         optionally can be updated.
 104
 105   @retval EFI_SUCCESS           The override function completed successfully.
 106   @retval EFI_NOT_FOUND         The specified controller or slot does not exist.
 107   @retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL
 108
 109 **/
 110 typedef
 111 EFI_STATUS
 112 (EFIAPI * EDKII_SD_MMC_CAPABILITY) (
 113   IN      EFI_HANDLE                      ControllerHandle,
 114   IN      UINT8                           Slot,
 115   IN OUT  VOID                            *SdMmcHcSlotCapability,
 116   IN OUT  UINT32                          *BaseClkFreq
 117   );
 118
 119 /**
 120   Override function for SDHCI controller operations
 121
 122   @param[in]      ControllerHandle      The EFI_HANDLE of the controller.
 123   @param[in]      Slot                  The 0 based slot index.
 124   @param[in]      PhaseType             The type of operation and whether the
 125                                         hook is invoked right before (pre) or
 126                                         right after (post)
 127   @param[in,out]  PhaseData             The pointer to a phase-specific data.
 128
 129   @retval EFI_SUCCESS           The override function completed successfully.
 130   @retval EFI_NOT_FOUND         The specified controller or slot does not exist.
 131   @retval EFI_INVALID_PARAMETER PhaseType is invalid
 132
 133 **/
 134 typedef
 135 EFI_STATUS
 136 (EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE) (
 137   IN      EFI_HANDLE                      ControllerHandle,
 138   IN      UINT8                           Slot,
 139   IN      EDKII_SD_MMC_PHASE_TYPE         PhaseType,
 140   IN OUT  VOID                           *PhaseData
 141   );
 142
 143 struct _EDKII_SD_MMC_OVERRIDE {
 144   //
 145   // Protocol version of this implementation
 146   //
 147   UINTN                         Version;
 148   //
 149   // Callback to override SD/MMC host controller capability bits
 150   //
 151   EDKII_SD_MMC_CAPABILITY       Capability;
 152   //
 153   // Callback to invoke SD/MMC override hooks
 154   //
 155   EDKII_SD_MMC_NOTIFY_PHASE     NotifyPhase;
 156 };
 157
 158 extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;
 159
 160 #endif