MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c

   1 /** @file
   2   Set a IDT entry for debug purpose
   3
   4   Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
   5
   6 Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
   7 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
   8
   9
  10 SPDX-License-Identifier: BSD-2-Clause-Patent
  11
  12 **/
  13 #include "ScriptExecute.h"
  14
  15 //
  16 // 8 extra pages for PF handler.
  17 //
  18 #define EXTRA_PAGE_TABLE_PAGES  8
  19
  20 #define IA32_PG_P   BIT0
  21 #define IA32_PG_RW  BIT1
  22 #define IA32_PG_PS  BIT7
  23
  24 UINT64  mPhyMask;
  25 VOID    *mOriginalHandler;
  26 UINTN   mPageFaultBuffer;
  27 UINTN   mPageFaultIndex = 0;
  28 //
  29 // Store the uplink information for each page being used.
  30 //
  31 UINT64  *mPageFaultUplink[EXTRA_PAGE_TABLE_PAGES];
  32
  33 /**
  34   Page fault handler.
  35
  36 **/
  37 VOID
  38 EFIAPI
  39 PageFaultHandlerHook (
  40   VOID
  41   );
  42
  43 /**
  44   Hook IDT with our page fault handler so that the on-demand paging works on page fault.
  45
  46   @param  IdtEntry  a pointer to IDT entry
  47
  48 **/
  49 VOID
  50 HookPageFaultHandler (
  51   IN IA32_IDT_GATE_DESCRIPTOR  *IdtEntry
  52   )
  53 {
  54   UINT32  RegEax;
  55   UINT8   PhysicalAddressBits;
  56   UINTN   PageFaultHandlerHookAddress;
  57
  58   AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
  59   if (RegEax >= 0x80000008) {
  60     AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
  61     PhysicalAddressBits = (UINT8)RegEax;
  62   } else {
  63     PhysicalAddressBits = 36;
  64   }
  65
  66   mPhyMask  = LShiftU64 (1, PhysicalAddressBits) - 1;
  67   mPhyMask &= (1ull << 48) - SIZE_4KB;
  68
  69   //
  70   // Set Page Fault entry to catch >4G access
  71   //
  72   PageFaultHandlerHookAddress = (UINTN)PageFaultHandlerHook;
  73   mOriginalHandler            = (VOID *)(UINTN)(LShiftU64 (IdtEntry->Bits.OffsetUpper, 32) + IdtEntry->Bits.OffsetLow + (IdtEntry->Bits.OffsetHigh << 16));
  74   IdtEntry->Bits.OffsetLow    = (UINT16)PageFaultHandlerHookAddress;
  75   IdtEntry->Bits.Selector     = (UINT16)AsmReadCs ();
  76   IdtEntry->Bits.Reserved_0   = 0;
  77   IdtEntry->Bits.GateType     = IA32_IDT_GATE_TYPE_INTERRUPT_32;
  78   IdtEntry->Bits.OffsetHigh   = (UINT16)(PageFaultHandlerHookAddress >> 16);
  79   IdtEntry->Bits.OffsetUpper  = (UINT32)(PageFaultHandlerHookAddress >> 32);
  80   IdtEntry->Bits.Reserved_1   = 0;
  81
  82   if (mPage1GSupport) {
  83     mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE (2);
  84   } else {
  85     mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE (6);
  86   }
  87
  88   ZeroMem (mPageFaultUplink, sizeof (mPageFaultUplink));
  89 }
  90
  91 /**
  92   The function will check if current waking vector is long mode.
  93
  94   @param  AcpiS3Context                 a pointer to a structure of ACPI_S3_CONTEXT
  95
  96   @retval TRUE   Current context need long mode waking vector.
  97   @retval FALSE  Current context need not long mode waking vector.
  98 **/
  99 BOOLEAN
 100 IsLongModeWakingVector (
 101   IN ACPI_S3_CONTEXT  *AcpiS3Context
 102   )
 103 {
 104   EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE  *Facs;
 105
 106   Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)((UINTN)(AcpiS3Context->AcpiFacsTable));
 107   if ((Facs == NULL) ||
 108       (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
 109       ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)))
 110   {
 111     // Something wrong with FACS
 112     return FALSE;
 113   }
 114
 115   if (Facs->XFirmwareWakingVector != 0) {
 116     if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
 117         ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
 118         ((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0))
 119     {
 120       // Both BIOS and OS wants 64bit vector
 121       if (sizeof (UINTN) == sizeof (UINT64)) {
 122         return TRUE;
 123       }
 124     }
 125   }
 126
 127   return FALSE;
 128 }
 129
 130 /**
 131   Set a IDT entry for interrupt vector 3 for debug purpose.
 132
 133   @param  AcpiS3Context  a pointer to a structure of ACPI_S3_CONTEXT
 134
 135 **/
 136 VOID
 137 SetIdtEntry (
 138   IN ACPI_S3_CONTEXT  *AcpiS3Context
 139   )
 140 {
 141   IA32_IDT_GATE_DESCRIPTOR  *IdtEntry;
 142   IA32_DESCRIPTOR           *IdtDescriptor;
 143   UINTN                     S3DebugBuffer;
 144   EFI_STATUS                Status;
 145
 146   //
 147   // Restore IDT for debug
 148   //
 149   IdtDescriptor = (IA32_DESCRIPTOR *)(UINTN)(AcpiS3Context->IdtrProfile);
 150   AsmWriteIdtr (IdtDescriptor);
 151
 152   //
 153   // Setup the default CPU exception handlers
 154   //
 155   Status = InitializeCpuExceptionHandlers (NULL);
 156   ASSERT_EFI_ERROR (Status);
 157
 158   DEBUG_CODE_BEGIN ();
 159   //
 160   // Update IDT entry INT3 if the instruction is valid in it
 161   //
 162   S3DebugBuffer = (UINTN)(AcpiS3Context->S3DebugBufferAddress);
 163   if (*(UINTN *)S3DebugBuffer != (UINTN)-1) {
 164     IdtEntry                   = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (3 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
 165     IdtEntry->Bits.OffsetLow   = (UINT16)S3DebugBuffer;
 166     IdtEntry->Bits.Selector    = (UINT16)AsmReadCs ();
 167     IdtEntry->Bits.Reserved_0  = 0;
 168     IdtEntry->Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
 169     IdtEntry->Bits.OffsetHigh  = (UINT16)(S3DebugBuffer >> 16);
 170     IdtEntry->Bits.OffsetUpper = (UINT32)(S3DebugBuffer >> 32);
 171     IdtEntry->Bits.Reserved_1  = 0;
 172   }
 173
 174   DEBUG_CODE_END ();
 175
 176   //
 177   // If both BIOS and OS wants long mode waking vector,
 178   // S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table,
 179   // no need to hook page fault handler.
 180   //
 181   if (!IsLongModeWakingVector (AcpiS3Context)) {
 182     IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
 183     HookPageFaultHandler (IdtEntry);
 184   }
 185 }
 186
 187 /**
 188   Acquire page for page fault.
 189
 190   @param[in, out] Uplink        Pointer to up page table entry.
 191
 192 **/
 193 VOID
 194 AcquirePage (
 195   IN OUT UINT64  *Uplink
 196   )
 197 {
 198   UINTN  Address;
 199
 200   Address = mPageFaultBuffer + EFI_PAGES_TO_SIZE (mPageFaultIndex);
 201   ZeroMem ((VOID *)Address, EFI_PAGES_TO_SIZE (1));
 202
 203   //
 204   // Cut the previous uplink if it exists and wasn't overwritten.
 205   //
 206   if ((mPageFaultUplink[mPageFaultIndex] != NULL) &&
 207       ((*mPageFaultUplink[mPageFaultIndex] & ~mAddressEncMask & mPhyMask) == Address))
 208   {
 209     *mPageFaultUplink[mPageFaultIndex] = 0;
 210   }
 211
 212   //
 213   // Link & Record the current uplink.
 214   //
 215   *Uplink                           = Address | mAddressEncMask | IA32_PG_P | IA32_PG_RW;
 216   mPageFaultUplink[mPageFaultIndex] = Uplink;
 217
 218   mPageFaultIndex = (mPageFaultIndex + 1) % EXTRA_PAGE_TABLE_PAGES;
 219 }
 220
 221 /**
 222   The page fault handler that on-demand read >4G memory/MMIO.
 223
 224   @retval TRUE     The page fault is correctly handled.
 225   @retval FALSE    The page fault is not handled and is passed through to original handler.
 226
 227 **/
 228 BOOLEAN
 229 EFIAPI
 230 PageFaultHandler (
 231   VOID
 232   )
 233 {
 234   UINT64  *PageTable;
 235   UINT64  PFAddress;
 236   UINTN   PTIndex;
 237
 238   PFAddress = AsmReadCr2 ();
 239   DEBUG ((DEBUG_INFO, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));
 240
 241   if (PFAddress >= mPhyMask + SIZE_4KB) {
 242     return FALSE;
 243   }
 244
 245   PFAddress &= mPhyMask;
 246
 247   PageTable = (UINT64 *)(UINTN)(AsmReadCr3 () & mPhyMask);
 248
 249   PTIndex = BitFieldRead64 (PFAddress, 39, 47);
 250   // PML4E
 251   if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
 252     AcquirePage (&PageTable[PTIndex]);
 253   }
 254
 255   PageTable = (UINT64 *)(UINTN)(PageTable[PTIndex] & ~mAddressEncMask & mPhyMask);
 256   PTIndex   = BitFieldRead64 (PFAddress, 30, 38);
 257   // PDPTE
 258   if (mPage1GSupport) {
 259     PageTable[PTIndex] = ((PFAddress | mAddressEncMask) & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
 260   } else {
 261     if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
 262       AcquirePage (&PageTable[PTIndex]);
 263     }
 264
 265     PageTable = (UINT64 *)(UINTN)(PageTable[PTIndex] & ~mAddressEncMask & mPhyMask);
 266     PTIndex   = BitFieldRead64 (PFAddress, 21, 29);
 267     // PD
 268     PageTable[PTIndex] = ((PFAddress | mAddressEncMask) & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
 269   }
 270
 271   return TRUE;
 272 }