3 ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
5 Copyright (c) 2006 - 2007, Intel Corporation
6 All rights reserved. This program and the accompanying materials
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8 which accompanies this distribution. The full text of the license may be found at
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12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 // Common table header, this prefaces all ACPI tables, including FACS, but
20 // excluding the RSD PTR structure
25 } EFI_ACPI_COMMON_HEADER
;
28 // Common ACPI description table header. This structure prefaces most ACPI tables.
41 UINT32 CreatorRevision
;
42 } EFI_ACPI_DESCRIPTION_HEADER
;
46 // Define for Pci Host Bridge Resource Allocation
48 #define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
49 #define ACPI_END_TAG_DESCRIPTOR 0x79
51 #define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
52 #define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
53 #define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
56 // Power Management Timer frequency is fixed at 3.579545MHz
58 #define ACPI_TIMER_FREQUENCY 3579545
61 // Make sure structures match spec
71 UINT64 AddrSpaceGranularity
;
74 UINT64 AddrTranslationOffset
;
76 } EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
;
81 } EFI_ACPI_END_TAG_DESCRIPTOR
;
84 // General use definitions
86 #define EFI_ACPI_RESERVED_BYTE 0x00
87 #define EFI_ACPI_RESERVED_WORD 0x0000
88 #define EFI_ACPI_RESERVED_DWORD 0x00000000
89 #define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
92 // Resource Type Specific Flags
93 // Ref ACPI specification 6.4.3.5.5
95 // Bit [0] : Write Status, _RW
97 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE (1 << 0)
98 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY (0 << 0)
100 // Bit [2:1] : Memory Attributes, _MEM
102 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE (0 << 1)
103 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE (1 << 1)
104 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING (2 << 1)
105 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE (3 << 1)
107 // Bit [4:3] : Memory Attributes, _MTP
109 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY (0 << 3)
110 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED (1 << 3)
111 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI (2 << 3)
112 #define EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS (3 << 3)
114 // Bit [5] : Memory to I/O Translation, _TTP
116 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION (1 << 5)
117 #define EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC (0 << 5)
123 // Ensure proper structure formats
127 // ACPI 1.0b table structures
130 // Root System Description Pointer Structure
138 } EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER
;
141 // Root System Description Table
142 // No definition needed as it is a common description table header followed by a
143 // variable number of UINT32 table pointers.
146 // RSDT Revision (as defined in ACPI 1.0b spec.)
148 #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
151 // Fixed ACPI Description Table Structure (FADT)
154 EFI_ACPI_DESCRIPTION_HEADER Header
;
194 } EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE
;
197 // FADT Version (as defined in ACPI 1.0b spec.)
199 #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
202 // Fixed ACPI Description Table Fixed Feature Flags
203 // All other bits are reserved and must be set to 0.
205 #define EFI_ACPI_1_0_WBINVD (1 << 0)
206 #define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)
207 #define EFI_ACPI_1_0_PROC_C1 (1 << 2)
208 #define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)
209 #define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)
210 #define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)
211 #define EFI_ACPI_1_0_FIX_RTC (1 << 6)
212 #define EFI_ACPI_1_0_RTC_S4 (1 << 7)
213 #define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)
214 #define EFI_ACPI_1_0_DCK_CAP (1 << 9)
217 // Firmware ACPI Control Structure
222 UINT32 HardwareSignature
;
223 UINT32 FirmwareWakingVector
;
227 } EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE
;
230 // Firmware Control Structure Feature Flags
231 // All other bits are reserved and must be set to 0.
233 #define EFI_ACPI_1_0_S4BIOS_F (1 << 0)
236 // Multiple APIC Description Table header definition. The rest of the table
237 // must be defined in a platform specific manner.
240 EFI_ACPI_DESCRIPTION_HEADER Header
;
241 UINT32 LocalApicAddress
;
243 } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER
;
246 // MADT Revision (as defined in ACPI 1.0b spec.)
248 #define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
251 // Multiple APIC Flags
252 // All other bits are reserved and must be set to 0.
254 #define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)
257 // Multiple APIC Description Table APIC structure types
258 // All other values between 0x09 an 0xFF are reserved and
259 // will be ignored by OSPM.
261 #define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00
262 #define EFI_ACPI_1_0_IO_APIC 0x01
263 #define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02
264 #define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
265 #define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04
268 // APIC Structure Definitions
271 // Processor Local APIC Structure Definition
276 UINT8 AcpiProcessorId
;
279 } EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE
;
282 // Local APIC Flags. All other bits are reserved and must be 0.
284 #define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)
294 UINT32 IoApicAddress
;
295 UINT32 SystemVectorBase
;
296 } EFI_ACPI_1_0_IO_APIC_STRUCTURE
;
299 // Interrupt Source Override Structure
306 UINT32 GlobalSystemInterruptVector
;
308 } EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE
;
311 // Non-Maskable Interrupt Source Structure
317 UINT32 GlobalSystemInterruptVector
;
318 } EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE
;
321 // Local APIC NMI Structure
326 UINT8 AcpiProcessorId
;
329 } EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE
;
332 // Smart Battery Description Table (SBST)
335 EFI_ACPI_DESCRIPTION_HEADER Header
;
336 UINT32 WarningEnergyLevel
;
337 UINT32 LowEnergyLevel
;
338 UINT32 CriticalEnergyLevel
;
339 } EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE
;
342 // Known table signatures
345 // "RSD PTR " Root System Description Pointer
347 #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL
350 // "APIC" Multiple APIC Description Table
352 #define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041
355 // "DSDT" Differentiated System Description Table
357 #define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
360 // "FACS" Firmware ACPI Control Structure
362 #define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
365 // "FACP" Fixed ACPI Description Table
367 #define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
370 // "PSDT" Persistent System Description Table
372 #define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
375 // "RSDT" Root System Description Table
377 #define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
380 // "SBST" Smart Battery Specification Table
382 #define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
385 // "SSDT" Secondary System Description Table
387 #define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353