]> git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/IndustryStandard/Acpi2_0.h
8462caab3f99cb984c31d38bfbba4588c7f705de
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi2_0.h
1 /** @file
2 ACPI 2.0 definitions from the ACPI Specification, revision 2.0
3
4 Copyright (c) 2006 - 2007, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 **/
13
14 #ifndef _ACPI_2_0_H_
15 #define _ACPI_2_0_H_
16
17 #include <IndustryStandard/Acpi1_0.h>
18
19 //
20 // Ensure proper structure formats
21 //
22 #pragma pack(1)
23 //
24 // ACPI Specification Revision
25 //
26 #define EFI_ACPI_2_0_REVISION 0x02
27
28 ///
29 /// ACPI 2.0 Generic Address Space definition
30 ///
31 typedef struct {
32 UINT8 AddressSpaceId;
33 UINT8 RegisterBitWidth;
34 UINT8 RegisterBitOffset;
35 UINT8 Reserved;
36 UINT64 Address;
37 } EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
38
39 //
40 // Generic Address Space Address IDs
41 //
42 #define EFI_ACPI_2_0_SYSTEM_MEMORY 0
43 #define EFI_ACPI_2_0_SYSTEM_IO 1
44 #define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
45 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
46 #define EFI_ACPI_2_0_SMBUS 4
47 #define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
48
49 //
50 // ACPI 2.0 table structures
51 //
52
53 ///
54 /// Root System Description Pointer Structure
55 ///
56 typedef struct {
57 UINT64 Signature;
58 UINT8 Checksum;
59 UINT8 OemId[6];
60 UINT8 Revision;
61 UINT32 RsdtAddress;
62 UINT32 Length;
63 UINT64 XsdtAddress;
64 UINT8 ExtendedChecksum;
65 UINT8 Reserved[3];
66 } EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
67
68 ///
69 /// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
70 ///
71 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
72
73 ///
74 /// Common table header, this prefaces all ACPI tables, including FACS, but
75 /// excluding the RSD PTR structure
76 ///
77 typedef struct {
78 UINT32 Signature;
79 UINT32 Length;
80 } EFI_ACPI_2_0_COMMON_HEADER;
81
82 //
83 // Root System Description Table
84 // No definition needed as it is a common description table header followed by a
85 // variable number of UINT32 table pointers.
86 //
87
88 ///
89 /// RSDT Revision (as defined in ACPI 2.0 spec.)
90 ///
91 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
92
93 //
94 // Extended System Description Table
95 // No definition needed as it is a common description table header followed by a
96 // variable number of UINT64 table pointers.
97 //
98
99 ///
100 /// XSDT Revision (as defined in ACPI 2.0 spec.)
101 ///
102 #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
103
104 ///
105 /// Fixed ACPI Description Table Structure (FADT)
106 ///
107 typedef struct {
108 EFI_ACPI_DESCRIPTION_HEADER Header;
109 UINT32 FirmwareCtrl;
110 UINT32 Dsdt;
111 UINT8 Reserved0;
112 UINT8 PreferredPmProfile;
113 UINT16 SciInt;
114 UINT32 SmiCmd;
115 UINT8 AcpiEnable;
116 UINT8 AcpiDisable;
117 UINT8 S4BiosReq;
118 UINT8 PstateCnt;
119 UINT32 Pm1aEvtBlk;
120 UINT32 Pm1bEvtBlk;
121 UINT32 Pm1aCntBlk;
122 UINT32 Pm1bCntBlk;
123 UINT32 Pm2CntBlk;
124 UINT32 PmTmrBlk;
125 UINT32 Gpe0Blk;
126 UINT32 Gpe1Blk;
127 UINT8 Pm1EvtLen;
128 UINT8 Pm1CntLen;
129 UINT8 Pm2CntLen;
130 UINT8 PmTmrLen;
131 UINT8 Gpe0BlkLen;
132 UINT8 Gpe1BlkLen;
133 UINT8 Gpe1Base;
134 UINT8 CstCnt;
135 UINT16 PLvl2Lat;
136 UINT16 PLvl3Lat;
137 UINT16 FlushSize;
138 UINT16 FlushStride;
139 UINT8 DutyOffset;
140 UINT8 DutyWidth;
141 UINT8 DayAlrm;
142 UINT8 MonAlrm;
143 UINT8 Century;
144 UINT16 IaPcBootArch;
145 UINT8 Reserved1;
146 UINT32 Flags;
147 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
148 UINT8 ResetValue;
149 UINT8 Reserved2[3];
150 UINT64 XFirmwareCtrl;
151 UINT64 XDsdt;
152 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
153 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
154 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
155 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
156 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
157 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
158 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
159 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
160 } EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
161
162 ///
163 /// FADT Version (as defined in ACPI 2.0 spec.)
164 ///
165 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
166
167 ///
168 /// Fixed ACPI Description Table Boot Architecture Flags
169 /// All other bits are reserved and must be set to 0.
170 ///
171 #define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)
172 #define EFI_ACPI_2_0_8042 (1 << 1)
173
174 //
175 // Fixed ACPI Description Table Fixed Feature Flags
176 // All other bits are reserved and must be set to 0.
177 //
178 #define EFI_ACPI_2_0_WBINVD (1 << 0)
179 #define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)
180 #define EFI_ACPI_2_0_PROC_C1 (1 << 2)
181 #define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)
182 #define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)
183 #define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)
184 #define EFI_ACPI_2_0_FIX_RTC (1 << 6)
185 #define EFI_ACPI_2_0_RTC_S4 (1 << 7)
186 #define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)
187 #define EFI_ACPI_2_0_DCK_CAP (1 << 9)
188 #define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)
189 #define EFI_ACPI_2_0_SEALED_CASE (1 << 11)
190 #define EFI_ACPI_2_0_HEADLESS (1 << 12)
191 #define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)
192
193 ///
194 /// Firmware ACPI Control Structure
195 ///
196 typedef struct {
197 UINT32 Signature;
198 UINT32 Length;
199 UINT32 HardwareSignature;
200 UINT32 FirmwareWakingVector;
201 UINT32 GlobalLock;
202 UINT32 Flags;
203 UINT64 XFirmwareWakingVector;
204 UINT8 Version;
205 UINT8 Reserved[31];
206 } EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
207
208 ///
209 /// FACS Version (as defined in ACPI 2.0 spec.)
210 ///
211 #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
212
213 ///
214 /// Firmware Control Structure Feature Flags
215 /// All other bits are reserved and must be set to 0.
216 ///
217 #define EFI_ACPI_2_0_S4BIOS_F (1 << 0)
218
219 ///
220 /// Multiple APIC Description Table header definition. The rest of the table
221 /// must be defined in a platform specific manner.
222 ///
223 typedef struct {
224 EFI_ACPI_DESCRIPTION_HEADER Header;
225 UINT32 LocalApicAddress;
226 UINT32 Flags;
227 } EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
228
229 ///
230 /// MADT Revision (as defined in ACPI 2.0 spec.)
231 ///
232 #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
233
234 ///
235 /// Multiple APIC Flags
236 /// All other bits are reserved and must be set to 0.
237 ///
238 #define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)
239
240 //
241 // Multiple APIC Description Table APIC structure types
242 // All other values between 0x09 an 0xFF are reserved and
243 // will be ignored by OSPM.
244 //
245 #define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
246 #define EFI_ACPI_2_0_IO_APIC 0x01
247 #define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
248 #define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
249 #define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
250 #define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
251 #define EFI_ACPI_2_0_IO_SAPIC 0x06
252 #define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
253 #define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
254
255 //
256 // APIC Structure Definitions
257 //
258
259 ///
260 /// Processor Local APIC Structure Definition
261 ///
262 typedef struct {
263 UINT8 Type;
264 UINT8 Length;
265 UINT8 AcpiProcessorId;
266 UINT8 ApicId;
267 UINT32 Flags;
268 } EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
269
270 ///
271 /// Local APIC Flags. All other bits are reserved and must be 0.
272 ///
273 #define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)
274
275 ///
276 /// IO APIC Structure
277 ///
278 typedef struct {
279 UINT8 Type;
280 UINT8 Length;
281 UINT8 IoApicId;
282 UINT8 Reserved;
283 UINT32 IoApicAddress;
284 UINT32 GlobalSystemInterruptBase;
285 } EFI_ACPI_2_0_IO_APIC_STRUCTURE;
286
287 ///
288 /// Interrupt Source Override Structure
289 ///
290 typedef struct {
291 UINT8 Type;
292 UINT8 Length;
293 UINT8 Bus;
294 UINT8 Source;
295 UINT32 GlobalSystemInterrupt;
296 UINT16 Flags;
297 } EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
298
299 ///
300 /// Non-Maskable Interrupt Source Structure
301 ///
302 typedef struct {
303 UINT8 Type;
304 UINT8 Length;
305 UINT16 Flags;
306 UINT32 GlobalSystemInterrupt;
307 } EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
308
309 ///
310 /// Local APIC NMI Structure
311 ///
312 typedef struct {
313 UINT8 Type;
314 UINT8 Length;
315 UINT8 AcpiProcessorId;
316 UINT16 Flags;
317 UINT8 LocalApicLint;
318 } EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
319
320 ///
321 /// Local APIC Address Override Structure
322 ///
323 typedef struct {
324 UINT8 Type;
325 UINT8 Length;
326 UINT16 Reserved;
327 UINT64 LocalApicAddress;
328 } EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
329
330 ///
331 /// IO SAPIC Structure
332 ///
333 typedef struct {
334 UINT8 Type;
335 UINT8 Length;
336 UINT8 IoApicId;
337 UINT8 Reserved;
338 UINT32 GlobalSystemInterruptBase;
339 UINT64 IoSapicAddress;
340 } EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
341
342 ///
343 /// Local SAPIC Structure
344 ///
345 typedef struct {
346 UINT8 Type;
347 UINT8 Length;
348 UINT8 AcpiProcessorId;
349 UINT8 LocalSapicId;
350 UINT8 LocalSapicEid;
351 UINT8 Reserved[3];
352 UINT32 Flags;
353 } EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
354
355 ///
356 /// Platform Interrupt Sources Structure
357 ///
358 typedef struct {
359 UINT8 Type;
360 UINT8 Length;
361 UINT16 Flags;
362 UINT8 InterruptType;
363 UINT8 ProcessorId;
364 UINT8 ProcessorEid;
365 UINT8 IoSapicVector;
366 UINT32 GlobalSystemInterrupt;
367 UINT32 Reserved;
368 } EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
369
370 ///
371 /// Smart Battery Description Table (SBST)
372 ///
373 typedef struct {
374 EFI_ACPI_DESCRIPTION_HEADER Header;
375 UINT32 WarningEnergyLevel;
376 UINT32 LowEnergyLevel;
377 UINT32 CriticalEnergyLevel;
378 } EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
379
380 ///
381 /// SBST Version (as defined in ACPI 2.0 spec.)
382 ///
383 #define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
384
385 ///
386 /// Embedded Controller Boot Resources Table (ECDT)
387 /// The table is followed by a null terminated ASCII string that contains
388 /// a fully qualified reference to the name space object.
389 ///
390 typedef struct {
391 EFI_ACPI_DESCRIPTION_HEADER Header;
392 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
393 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
394 UINT32 Uid;
395 UINT8 GpeBit;
396 } EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
397
398 ///
399 /// ECDT Version (as defined in ACPI 2.0 spec.)
400 ///
401 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
402
403 //
404 // Known table signatures
405 //
406
407 ///
408 /// "RSD PTR " Root System Description Pointer
409 ///
410 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352
411
412 ///
413 /// "SPIC" Multiple SAPIC Description Table
414 ///
415 /// BUGBUG: Don't know where this came from except SR870BN4 uses it.
416 /// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
417 ///
418 #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
419
420 ///
421 /// "BOOT" MS Simple Boot Spec
422 ///
423 #define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
424
425 ///
426 /// "DBGP" MS Bebug Port Spec
427 ///
428 #define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
429
430 ///
431 /// "DSDT" Differentiated System Description Table
432 ///
433 #define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
434
435 ///
436 /// "ECDT" Embedded Controller Boot Resources Table
437 ///
438 #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
439
440 ///
441 /// "ETDT" Event Timer Description Table
442 ///
443 #define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445
444
445 ///
446 /// "FACS" Firmware ACPI Control Structure
447 ///
448 #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
449
450 ///
451 /// "FACP" Fixed ACPI Description Table
452 ///
453 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
454
455 ///
456 /// "APIC" Multiple APIC Description Table
457 ///
458 #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
459
460 ///
461 /// "PSDT" Persistent System Description Table
462 ///
463 #define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
464
465 ///
466 /// "RSDT" Root System Description Table
467 ///
468 #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
469
470 ///
471 /// "SBST" Smart Battery Specification Table
472 ///
473 #define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
474
475 ///
476 /// "SLIT" System Locality Information Table
477 ///
478 #define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
479
480 ///
481 /// "SPCR" Serial Port Concole Redirection Table
482 ///
483 #define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
484
485 ///
486 /// "SRAT" Static Resource Affinity Table
487 ///
488 #define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
489
490 ///
491 /// "SSDT" Secondary System Description Table
492 ///
493 #define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
494
495 ///
496 /// "SPMI" Server Platform Management Interface Table
497 ///
498 #define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053
499
500 ///
501 /// "XSDT" Extended System Description Table
502 ///
503 #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358
504
505 ///
506 /// "MCFG" Static Resource Affinity Table
507 ///
508 #define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D
509
510 #pragma pack()
511
512 #endif