MdePkg/Include/IndustryStandard/Acpi51.h

   1 /** @file
   2   ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.
   3
   4   Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 **/
  13
  14 #ifndef _ACPI_5_1_H_
  15 #define _ACPI_5_1_H_
  16
  17 #include <IndustryStandard/Acpi50.h>
  18
  19 //
  20 // Ensure proper structure formats
  21 //
  22 #pragma pack(1)
  23
  24 ///
  25 /// ACPI 5.1 Generic Address Space definition
  26 ///
  27 typedef struct {
  28   UINT8   AddressSpaceId;
  29   UINT8   RegisterBitWidth;
  30   UINT8   RegisterBitOffset;
  31   UINT8   AccessSize;
  32   UINT64  Address;
  33 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
  34
  35 //
  36 // Generic Address Space Address IDs
  37 //
  38 #define EFI_ACPI_5_1_SYSTEM_MEMORY              0
  39 #define EFI_ACPI_5_1_SYSTEM_IO                  1
  40 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE    2
  41 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER        3
  42 #define EFI_ACPI_5_1_SMBUS                      4
  43 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL  0x0A
  44 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE       0x7F
  45
  46 //
  47 // Generic Address Space Access Sizes
  48 //
  49 #define EFI_ACPI_5_1_UNDEFINED  0
  50 #define EFI_ACPI_5_1_BYTE       1
  51 #define EFI_ACPI_5_1_WORD       2
  52 #define EFI_ACPI_5_1_DWORD      3
  53 #define EFI_ACPI_5_1_QWORD      4
  54
  55 //
  56 // ACPI 5.1 table structures
  57 //
  58
  59 ///
  60 /// Root System Description Pointer Structure
  61 ///
  62 typedef struct {
  63   UINT64  Signature;
  64   UINT8   Checksum;
  65   UINT8   OemId[6];
  66   UINT8   Revision;
  67   UINT32  RsdtAddress;
  68   UINT32  Length;
  69   UINT64  XsdtAddress;
  70   UINT8   ExtendedChecksum;
  71   UINT8   Reserved[3];
  72 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
  73
  74 ///
  75 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
  76 ///
  77 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02  ///< ACPISpec (Revision 5.1) says current value is 2
  78
  79 ///
  80 /// Common table header, this prefaces all ACPI tables, including FACS, but
  81 /// excluding the RSD PTR structure
  82 ///
  83 typedef struct {
  84   UINT32  Signature;
  85   UINT32  Length;
  86 } EFI_ACPI_5_1_COMMON_HEADER;
  87
  88 //
  89 // Root System Description Table
  90 // No definition needed as it is a common description table header, the same with
  91 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
  92 //
  93
  94 ///
  95 /// RSDT Revision (as defined in ACPI 5.1 spec.)
  96 ///
  97 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
  98
  99 //
 100 // Extended System Description Table
 101 // No definition needed as it is a common description table header, the same with
 102 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
 103 //
 104
 105 ///
 106 /// XSDT Revision (as defined in ACPI 5.1 spec.)
 107 ///
 108 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
 109
 110 ///
 111 /// Fixed ACPI Description Table Structure (FADT)
 112 ///
 113 typedef struct {
 114   EFI_ACPI_DESCRIPTION_HEADER             Header;
 115   UINT32                                  FirmwareCtrl;
 116   UINT32                                  Dsdt;
 117   UINT8                                   Reserved0;
 118   UINT8                                   PreferredPmProfile;
 119   UINT16                                  SciInt;
 120   UINT32                                  SmiCmd;
 121   UINT8                                   AcpiEnable;
 122   UINT8                                   AcpiDisable;
 123   UINT8                                   S4BiosReq;
 124   UINT8                                   PstateCnt;
 125   UINT32                                  Pm1aEvtBlk;
 126   UINT32                                  Pm1bEvtBlk;
 127   UINT32                                  Pm1aCntBlk;
 128   UINT32                                  Pm1bCntBlk;
 129   UINT32                                  Pm2CntBlk;
 130   UINT32                                  PmTmrBlk;
 131   UINT32                                  Gpe0Blk;
 132   UINT32                                  Gpe1Blk;
 133   UINT8                                   Pm1EvtLen;
 134   UINT8                                   Pm1CntLen;
 135   UINT8                                   Pm2CntLen;
 136   UINT8                                   PmTmrLen;
 137   UINT8                                   Gpe0BlkLen;
 138   UINT8                                   Gpe1BlkLen;
 139   UINT8                                   Gpe1Base;
 140   UINT8                                   CstCnt;
 141   UINT16                                  PLvl2Lat;
 142   UINT16                                  PLvl3Lat;
 143   UINT16                                  FlushSize;
 144   UINT16                                  FlushStride;
 145   UINT8                                   DutyOffset;
 146   UINT8                                   DutyWidth;
 147   UINT8                                   DayAlrm;
 148   UINT8                                   MonAlrm;
 149   UINT8                                   Century;
 150   UINT16                                  IaPcBootArch;
 151   UINT8                                   Reserved1;
 152   UINT32                                  Flags;
 153   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  ResetReg;
 154   UINT8                                   ResetValue;
 155   UINT16                                  ArmBootArch;
 156   UINT8                                   MinorVersion;
 157   UINT64                                  XFirmwareCtrl;
 158   UINT64                                  XDsdt;
 159   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
 160   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
 161   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
 162   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
 163   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
 164   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
 165   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
 166   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
 167   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepControlReg;
 168   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepStatusReg;
 169 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
 170
 171 ///
 172 /// FADT Version (as defined in ACPI 5.1 spec.)
 173 ///
 174 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x05
 175 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION  0x01
 176
 177 //
 178 // Fixed ACPI Description Table Preferred Power Management Profile
 179 //
 180 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED         0
 181 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP             1
 182 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE              2
 183 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION         3
 184 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER   4
 185 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER         5
 186 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC        6
 187 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER  7
 188 #define EFI_ACPI_5_1_PM_PROFILE_TABLET              8
 189
 190 //
 191 // Fixed ACPI Description Table Boot Architecture Flags
 192 // All other bits are reserved and must be set to 0.
 193 //
 194 #define EFI_ACPI_5_1_LEGACY_DEVICES              BIT0
 195 #define EFI_ACPI_5_1_8042                        BIT1
 196 #define EFI_ACPI_5_1_VGA_NOT_PRESENT             BIT2
 197 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED           BIT3
 198 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS          BIT4
 199 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT        BIT5
 200
 201 //
 202 // Fixed ACPI Description Table Arm Boot Architecture Flags
 203 // All other bits are reserved and must be set to 0.
 204 //
 205 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT              BIT0
 206 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC                BIT1
 207
 208 //
 209 // Fixed ACPI Description Table Fixed Feature Flags
 210 // All other bits are reserved and must be set to 0.
 211 //
 212 #define EFI_ACPI_5_1_WBINVD                                 BIT0
 213 #define EFI_ACPI_5_1_WBINVD_FLUSH                           BIT1
 214 #define EFI_ACPI_5_1_PROC_C1                                BIT2
 215 #define EFI_ACPI_5_1_P_LVL2_UP                              BIT3
 216 #define EFI_ACPI_5_1_PWR_BUTTON                             BIT4
 217 #define EFI_ACPI_5_1_SLP_BUTTON                             BIT5
 218 #define EFI_ACPI_5_1_FIX_RTC                                BIT6
 219 #define EFI_ACPI_5_1_RTC_S4                                 BIT7
 220 #define EFI_ACPI_5_1_TMR_VAL_EXT                            BIT8
 221 #define EFI_ACPI_5_1_DCK_CAP                                BIT9
 222 #define EFI_ACPI_5_1_RESET_REG_SUP                          BIT10
 223 #define EFI_ACPI_5_1_SEALED_CASE                            BIT11
 224 #define EFI_ACPI_5_1_HEADLESS                               BIT12
 225 #define EFI_ACPI_5_1_CPU_SW_SLP                             BIT13
 226 #define EFI_ACPI_5_1_PCI_EXP_WAK                            BIT14
 227 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK                     BIT15
 228 #define EFI_ACPI_5_1_S4_RTC_STS_VALID                       BIT16
 229 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE                BIT17
 230 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL               BIT18
 231 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE   BIT19
 232 #define EFI_ACPI_5_1_HW_REDUCED_ACPI                        BIT20
 233 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE              BIT21
 234
 235 ///
 236 /// Firmware ACPI Control Structure
 237 ///
 238 typedef struct {
 239   UINT32  Signature;
 240   UINT32  Length;
 241   UINT32  HardwareSignature;
 242   UINT32  FirmwareWakingVector;
 243   UINT32  GlobalLock;
 244   UINT32  Flags;
 245   UINT64  XFirmwareWakingVector;
 246   UINT8   Version;
 247   UINT8   Reserved0[3];
 248   UINT32  OspmFlags;
 249   UINT8   Reserved1[24];
 250 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
 251
 252 ///
 253 /// FACS Version (as defined in ACPI 5.1 spec.)
 254 ///
 255 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x02
 256
 257 ///
 258 /// Firmware Control Structure Feature Flags
 259 /// All other bits are reserved and must be set to 0.
 260 ///
 261 #define EFI_ACPI_5_1_S4BIOS_F                     BIT0
 262 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F       BIT1
 263
 264 ///
 265 /// OSPM Enabled Firmware Control Structure Flags
 266 /// All other bits are reserved and must be set to 0.
 267 ///
 268 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F            BIT0
 269
 270 //
 271 // Differentiated System Description Table,
 272 // Secondary System Description Table
 273 // and Persistent System Description Table,
 274 // no definition needed as they are common description table header, the same with
 275 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
 276 //
 277 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION   0x02
 278 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION        0x02
 279
 280 ///
 281 /// Multiple APIC Description Table header definition.  The rest of the table
 282 /// must be defined in a platform specific manner.
 283 ///
 284 typedef struct {
 285   EFI_ACPI_DESCRIPTION_HEADER Header;
 286   UINT32                      LocalApicAddress;
 287   UINT32                      Flags;
 288 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
 289
 290 ///
 291 /// MADT Revision (as defined in ACPI 5.1 spec.)
 292 ///
 293 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
 294
 295 ///
 296 /// Multiple APIC Flags
 297 /// All other bits are reserved and must be set to 0.
 298 ///
 299 #define EFI_ACPI_5_1_PCAT_COMPAT         BIT0
 300
 301 //
 302 // Multiple APIC Description Table APIC structure types
 303 // All other values between 0x0D and 0x7F are reserved and
 304 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
 305 //
 306 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC           0x00
 307 #define EFI_ACPI_5_1_IO_APIC                        0x01
 308 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE      0x02
 309 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE  0x03
 310 #define EFI_ACPI_5_1_LOCAL_APIC_NMI                 0x04
 311 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
 312 #define EFI_ACPI_5_1_IO_SAPIC                       0x06
 313 #define EFI_ACPI_5_1_LOCAL_SAPIC                    0x07
 314 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES     0x08
 315 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC         0x09
 316 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI               0x0A
 317 #define EFI_ACPI_5_1_GIC                            0x0B
 318 #define EFI_ACPI_5_1_GICD                           0x0C
 319 #define EFI_ACPI_5_1_GIC_MSI_FRAME                  0x0D
 320 #define EFI_ACPI_5_1_GICR                           0x0E
 321
 322 //
 323 // APIC Structure Definitions
 324 //
 325
 326 ///
 327 /// Processor Local APIC Structure Definition
 328 ///
 329 typedef struct {
 330   UINT8   Type;
 331   UINT8   Length;
 332   UINT8   AcpiProcessorId;
 333   UINT8   ApicId;
 334   UINT32  Flags;
 335 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
 336
 337 ///
 338 /// Local APIC Flags.  All other bits are reserved and must be 0.
 339 ///
 340 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED        BIT0
 341
 342 ///
 343 /// IO APIC Structure
 344 ///
 345 typedef struct {
 346   UINT8   Type;
 347   UINT8   Length;
 348   UINT8   IoApicId;
 349   UINT8   Reserved;
 350   UINT32  IoApicAddress;
 351   UINT32  GlobalSystemInterruptBase;
 352 } EFI_ACPI_5_1_IO_APIC_STRUCTURE;
 353
 354 ///
 355 /// Interrupt Source Override Structure
 356 ///
 357 typedef struct {
 358   UINT8   Type;
 359   UINT8   Length;
 360   UINT8   Bus;
 361   UINT8   Source;
 362   UINT32  GlobalSystemInterrupt;
 363   UINT16  Flags;
 364 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
 365
 366 ///
 367 /// Platform Interrupt Sources Structure Definition
 368 ///
 369 typedef struct {
 370   UINT8   Type;
 371   UINT8   Length;
 372   UINT16  Flags;
 373   UINT8   InterruptType;
 374   UINT8   ProcessorId;
 375   UINT8   ProcessorEid;
 376   UINT8   IoSapicVector;
 377   UINT32  GlobalSystemInterrupt;
 378   UINT32  PlatformInterruptSourceFlags;
 379   UINT8   CpeiProcessorOverride;
 380   UINT8   Reserved[31];
 381 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
 382
 383 //
 384 // MPS INTI flags.
 385 // All other bits are reserved and must be set to 0.
 386 //
 387 #define EFI_ACPI_5_1_POLARITY      (3 << 0)
 388 #define EFI_ACPI_5_1_TRIGGER_MODE  (3 << 2)
 389
 390 ///
 391 /// Non-Maskable Interrupt Source Structure
 392 ///
 393 typedef struct {
 394   UINT8   Type;
 395   UINT8   Length;
 396   UINT16  Flags;
 397   UINT32  GlobalSystemInterrupt;
 398 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
 399
 400 ///
 401 /// Local APIC NMI Structure
 402 ///
 403 typedef struct {
 404   UINT8   Type;
 405   UINT8   Length;
 406   UINT8   AcpiProcessorId;
 407   UINT16  Flags;
 408   UINT8   LocalApicLint;
 409 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
 410
 411 ///
 412 /// Local APIC Address Override Structure
 413 ///
 414 typedef struct {
 415   UINT8   Type;
 416   UINT8   Length;
 417   UINT16  Reserved;
 418   UINT64  LocalApicAddress;
 419 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
 420
 421 ///
 422 /// IO SAPIC Structure
 423 ///
 424 typedef struct {
 425   UINT8   Type;
 426   UINT8   Length;
 427   UINT8   IoApicId;
 428   UINT8   Reserved;
 429   UINT32  GlobalSystemInterruptBase;
 430   UINT64  IoSapicAddress;
 431 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
 432
 433 ///
 434 /// Local SAPIC Structure
 435 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
 436 ///
 437 typedef struct {
 438   UINT8   Type;
 439   UINT8   Length;
 440   UINT8   AcpiProcessorId;
 441   UINT8   LocalSapicId;
 442   UINT8   LocalSapicEid;
 443   UINT8   Reserved[3];
 444   UINT32  Flags;
 445   UINT32  ACPIProcessorUIDValue;
 446 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
 447
 448 ///
 449 /// Platform Interrupt Sources Structure
 450 ///
 451 typedef struct {
 452   UINT8   Type;
 453   UINT8   Length;
 454   UINT16  Flags;
 455   UINT8   InterruptType;
 456   UINT8   ProcessorId;
 457   UINT8   ProcessorEid;
 458   UINT8   IoSapicVector;
 459   UINT32  GlobalSystemInterrupt;
 460   UINT32  PlatformInterruptSourceFlags;
 461 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
 462
 463 ///
 464 /// Platform Interrupt Source Flags.
 465 /// All other bits are reserved and must be set to 0.
 466 ///
 467 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE          BIT0
 468
 469 ///
 470 /// Processor Local x2APIC Structure Definition
 471 ///
 472 typedef struct {
 473   UINT8   Type;
 474   UINT8   Length;
 475   UINT8   Reserved[2];
 476   UINT32  X2ApicId;
 477   UINT32  Flags;
 478   UINT32  AcpiProcessorUid;
 479 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
 480
 481 ///
 482 /// Local x2APIC NMI Structure
 483 ///
 484 typedef struct {
 485   UINT8   Type;
 486   UINT8   Length;
 487   UINT16  Flags;
 488   UINT32  AcpiProcessorUid;
 489   UINT8   LocalX2ApicLint;
 490   UINT8   Reserved[3];
 491 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
 492
 493 ///
 494 /// GIC Structure
 495 ///
 496 typedef struct {
 497   UINT8   Type;
 498   UINT8   Length;
 499   UINT16  Reserved;
 500   UINT32  CPUInterfaceNumber;
 501   UINT32  AcpiProcessorUid;
 502   UINT32  Flags;
 503   UINT32  ParkingProtocolVersion;
 504   UINT32  PerformanceInterruptGsiv;
 505   UINT64  ParkedAddress;
 506   UINT64  PhysicalBaseAddress;
 507   UINT64  GICV;
 508   UINT64  GICH;
 509   UINT32  VGICMaintenanceInterrupt;
 510   UINT64  GICRBaseAddress;
 511   UINT64  MPIDR;
 512 } EFI_ACPI_5_1_GIC_STRUCTURE;
 513
 514 ///
 515 /// GIC Flags.  All other bits are reserved and must be 0.
 516 ///
 517 #define EFI_ACPI_5_1_GIC_ENABLED                              BIT0
 518 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL              BIT1
 519 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS    BIT2
 520
 521 ///
 522 /// GIC Distributor Structure
 523 ///
 524 typedef struct {
 525   UINT8   Type;
 526   UINT8   Length;
 527   UINT16  Reserved1;
 528   UINT32  GicId;
 529   UINT64  PhysicalBaseAddress;
 530   UINT32  SystemVectorBase;
 531   UINT32  Reserved2;
 532 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
 533
 534 ///
 535 /// GIC MSI Frame Structure
 536 ///
 537 typedef struct {
 538   UINT8   Type;
 539   UINT8   Length;
 540   UINT16  Reserved1;
 541   UINT32  GicMsiFrameId;
 542   UINT64  PhysicalBaseAddress;
 543   UINT32  Flags;
 544   UINT16  SPICount;
 545   UINT16  SPIBase;
 546 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
 547
 548 ///
 549 /// GIC MSI Frame Flags.  All other bits are reserved and must be 0.
 550 ///
 551 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT                    BIT0
 552
 553 ///
 554 /// GICR Structure
 555 ///
 556 typedef struct {
 557   UINT8   Type;
 558   UINT8   Length;
 559   UINT16  Reserved;
 560   UINT64  DiscoveryRangeBaseAddress;
 561   UINT32  DiscoveryRangeLength;
 562 } EFI_ACPI_5_1_GICR_STRUCTURE;
 563
 564 ///
 565 /// Smart Battery Description Table (SBST)
 566 ///
 567 typedef struct {
 568   EFI_ACPI_DESCRIPTION_HEADER Header;
 569   UINT32                      WarningEnergyLevel;
 570   UINT32                      LowEnergyLevel;
 571   UINT32                      CriticalEnergyLevel;
 572 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
 573
 574 ///
 575 /// SBST Version (as defined in ACPI 5.1 spec.)
 576 ///
 577 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
 578
 579 ///
 580 /// Embedded Controller Boot Resources Table (ECDT)
 581 /// The table is followed by a null terminated ASCII string that contains
 582 /// a fully qualified reference to the name space object.
 583 ///
 584 typedef struct {
 585   EFI_ACPI_DESCRIPTION_HEADER             Header;
 586   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcControl;
 587   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcData;
 588   UINT32                                  Uid;
 589   UINT8                                   GpeBit;
 590 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
 591
 592 ///
 593 /// ECDT Version (as defined in ACPI 5.1 spec.)
 594 ///
 595 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
 596
 597 ///
 598 /// System Resource Affinity Table (SRAT).  The rest of the table
 599 /// must be defined in a platform specific manner.
 600 ///
 601 typedef struct {
 602   EFI_ACPI_DESCRIPTION_HEADER Header;
 603   UINT32                      Reserved1;  ///< Must be set to 1
 604   UINT64                      Reserved2;
 605 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
 606
 607 ///
 608 /// SRAT Version (as defined in ACPI 5.1 spec.)
 609 ///
 610 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x03
 611
 612 //
 613 // SRAT structure types.
 614 // All other values between 0x03 an 0xFF are reserved and
 615 // will be ignored by OSPM.
 616 //
 617 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
 618 #define EFI_ACPI_5_1_MEMORY_AFFINITY                      0x01
 619 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY      0x02
 620
 621 ///
 622 /// Processor Local APIC/SAPIC Affinity Structure Definition
 623 ///
 624 typedef struct {
 625   UINT8   Type;
 626   UINT8   Length;
 627   UINT8   ProximityDomain7To0;
 628   UINT8   ApicId;
 629   UINT32  Flags;
 630   UINT8   LocalSapicEid;
 631   UINT8   ProximityDomain31To8[3];
 632   UINT32  ClockDomain;
 633 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
 634
 635 ///
 636 /// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
 637 ///
 638 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
 639
 640 ///
 641 /// Memory Affinity Structure Definition
 642 ///
 643 typedef struct {
 644   UINT8   Type;
 645   UINT8   Length;
 646   UINT32  ProximityDomain;
 647   UINT16  Reserved1;
 648   UINT32  AddressBaseLow;
 649   UINT32  AddressBaseHigh;
 650   UINT32  LengthLow;
 651   UINT32  LengthHigh;
 652   UINT32  Reserved2;
 653   UINT32  Flags;
 654   UINT64  Reserved3;
 655 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
 656
 657 //
 658 // Memory Flags.  All other bits are reserved and must be 0.
 659 //
 660 #define EFI_ACPI_5_1_MEMORY_ENABLED       (1 << 0)
 661 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
 662 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE   (1 << 2)
 663
 664 ///
 665 /// Processor Local x2APIC Affinity Structure Definition
 666 ///
 667 typedef struct {
 668   UINT8   Type;
 669   UINT8   Length;
 670   UINT8   Reserved1[2];
 671   UINT32  ProximityDomain;
 672   UINT32  X2ApicId;
 673   UINT32  Flags;
 674   UINT32  ClockDomain;
 675   UINT8   Reserved2[4];
 676 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
 677
 678 ///
 679 /// System Locality Distance Information Table (SLIT).
 680 /// The rest of the table is a matrix.
 681 ///
 682 typedef struct {
 683   EFI_ACPI_DESCRIPTION_HEADER Header;
 684   UINT64                      NumberOfSystemLocalities;
 685 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
 686
 687 ///
 688 /// SLIT Version (as defined in ACPI 5.1 spec.)
 689 ///
 690 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
 691
 692 ///
 693 /// Corrected Platform Error Polling Table (CPEP)
 694 ///
 695 typedef struct {
 696   EFI_ACPI_DESCRIPTION_HEADER Header;
 697   UINT8                       Reserved[8];
 698 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
 699
 700 ///
 701 /// CPEP Version (as defined in ACPI 5.1 spec.)
 702 ///
 703 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
 704
 705 //
 706 // CPEP processor structure types.
 707 //
 708 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC  0x00
 709
 710 ///
 711 /// Corrected Platform Error Polling Processor Structure Definition
 712 ///
 713 typedef struct {
 714   UINT8   Type;
 715   UINT8   Length;
 716   UINT8   ProcessorId;
 717   UINT8   ProcessorEid;
 718   UINT32  PollingInterval;
 719 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
 720
 721 ///
 722 /// Maximum System Characteristics Table (MSCT)
 723 ///
 724 typedef struct {
 725   EFI_ACPI_DESCRIPTION_HEADER Header;
 726   UINT32                      OffsetProxDomInfo;
 727   UINT32                      MaximumNumberOfProximityDomains;
 728   UINT32                      MaximumNumberOfClockDomains;
 729   UINT64                      MaximumPhysicalAddress;
 730 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
 731
 732 ///
 733 /// MSCT Version (as defined in ACPI 5.1 spec.)
 734 ///
 735 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
 736
 737 ///
 738 /// Maximum Proximity Domain Information Structure Definition
 739 ///
 740 typedef struct {
 741   UINT8   Revision;
 742   UINT8   Length;
 743   UINT32  ProximityDomainRangeLow;
 744   UINT32  ProximityDomainRangeHigh;
 745   UINT32  MaximumProcessorCapacity;
 746   UINT64  MaximumMemoryCapacity;
 747 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
 748
 749 ///
 750 /// ACPI RAS Feature Table definition.
 751 ///
 752 typedef struct {
 753   EFI_ACPI_DESCRIPTION_HEADER Header;
 754   UINT8                       PlatformCommunicationChannelIdentifier[12];
 755 } EFI_ACPI_5_1_RAS_FEATURE_TABLE;
 756
 757 ///
 758 /// RASF Version (as defined in ACPI 5.1 spec.)
 759 ///
 760 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
 761
 762 ///
 763 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
 764 ///
 765 typedef struct {
 766   UINT32                      Signature;
 767   UINT16                      Command;
 768   UINT16                      Status;
 769   UINT16                      Version;
 770   UINT8                       RASCapabilities[16];
 771   UINT8                       SetRASCapabilities[16];
 772   UINT16                      NumberOfRASFParameterBlocks;
 773   UINT32                      SetRASCapabilitiesStatus;
 774 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 775
 776 ///
 777 /// ACPI RASF PCC command code
 778 ///
 779 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND  0x01
 780
 781 ///
 782 /// ACPI RASF Platform RAS Capabilities
 783 ///
 784 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED                          0x01
 785 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE  0x02
 786
 787 ///
 788 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
 789 ///
 790 typedef struct {
 791   UINT16                      Type;
 792   UINT16                      Version;
 793   UINT16                      Length;
 794   UINT16                      PatrolScrubCommand;
 795   UINT64                      RequestedAddressRange[2];
 796   UINT64                      ActualAddressRange[2];
 797   UINT16                      Flags;
 798   UINT8                       RequestedSpeed;
 799 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
 800
 801 ///
 802 /// ACPI RASF Patrol Scrub command
 803 ///
 804 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS   0x01
 805 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER   0x02
 806 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER    0x03
 807
 808 ///
 809 /// Memory Power State Table definition.
 810 ///
 811 typedef struct {
 812   EFI_ACPI_DESCRIPTION_HEADER Header;
 813   UINT8                       PlatformCommunicationChannelIdentifier;
 814   UINT8                       Reserved[3];
 815 // Memory Power Node Structure
 816 // Memory Power State Characteristics
 817 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
 818
 819 ///
 820 /// MPST Version (as defined in ACPI 5.1 spec.)
 821 ///
 822 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
 823
 824 ///
 825 /// MPST Platform Communication Channel Shared Memory Region definition.
 826 ///
 827 typedef struct {
 828   UINT32                      Signature;
 829   UINT16                      Command;
 830   UINT16                      Status;
 831   UINT32                      MemoryPowerCommandRegister;
 832   UINT32                      MemoryPowerStatusRegister;
 833   UINT32                      PowerStateId;
 834   UINT32                      MemoryPowerNodeId;
 835   UINT64                      MemoryEnergyConsumed;
 836   UINT64                      ExpectedAveragePowerComsuned;
 837 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 838
 839 ///
 840 /// ACPI MPST PCC command code
 841 ///
 842 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND  0x03
 843
 844 ///
 845 /// ACPI MPST Memory Power command
 846 ///
 847 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE       0x01
 848 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE       0x02
 849 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED   0x03
 850 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED   0x04
 851
 852 ///
 853 /// MPST Memory Power Node Table
 854 ///
 855 typedef struct {
 856   UINT8                                             PowerStateValue;
 857   UINT8                                             PowerStateInformationIndex;
 858 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
 859
 860 typedef struct {
 861   UINT8                                             Flag;
 862   UINT8                                             Reserved;
 863   UINT16                                            MemoryPowerNodeId;
 864   UINT32                                            Length;
 865   UINT64                                            AddressBase;
 866   UINT64                                            AddressLength;
 867   UINT32                                            NumberOfPowerStates;
 868   UINT32                                            NumberOfPhysicalComponents;
 869 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE              MemoryPowerState[NumberOfPowerStates];
 870 //UINT16                                            PhysicalComponentIdentifier[NumberOfPhysicalComponents];
 871 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
 872
 873 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE          0x01
 874 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED   0x02
 875 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE   0x04
 876
 877 typedef struct {
 878   UINT16                      MemoryPowerNodeCount;
 879   UINT8                       Reserved[2];
 880 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
 881
 882 ///
 883 /// MPST Memory Power State Characteristics Table
 884 ///
 885 typedef struct {
 886   UINT8                                             PowerStateStructureID;
 887   UINT8                                             Flag;
 888   UINT16                                            Reserved;
 889   UINT32                                            AveragePowerConsumedInMPS0;
 890   UINT32                                            RelativePowerSavingToMPS0;
 891   UINT64                                            ExitLatencyToMPS0;
 892 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
 893
 894 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED              0x01
 895 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY   0x02
 896 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT    0x04
 897
 898 typedef struct {
 899   UINT16                      MemoryPowerStateCharacteristicsCount;
 900   UINT8                       Reserved[2];
 901 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
 902
 903 ///
 904 /// Memory Topology Table definition.
 905 ///
 906 typedef struct {
 907   EFI_ACPI_DESCRIPTION_HEADER Header;
 908   UINT32                      Reserved;
 909 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
 910
 911 ///
 912 /// PMTT Version (as defined in ACPI 5.1 spec.)
 913 ///
 914 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
 915
 916 ///
 917 /// Common Memory Aggregator Device Structure.
 918 ///
 919 typedef struct {
 920   UINT8                       Type;
 921   UINT8                       Reserved;
 922   UINT16                      Length;
 923   UINT16                      Flags;
 924   UINT16                      Reserved1;
 925 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 926
 927 ///
 928 /// Memory Aggregator Device Type
 929 ///
 930 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET            0x1
 931 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
 932 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM              0x3
 933
 934 ///
 935 /// Socket Memory Aggregator Device Structure.
 936 ///
 937 typedef struct {
 938   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 939   UINT16                                                       SocketIdentifier;
 940   UINT16                                                       Reserved;
 941 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  MemoryController[];
 942 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 943
 944 ///
 945 /// MemoryController Memory Aggregator Device Structure.
 946 ///
 947 typedef struct {
 948   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 949   UINT32                                                       ReadLatency;
 950   UINT32                                                       WriteLatency;
 951   UINT32                                                       ReadBandwidth;
 952   UINT32                                                       WriteBandwidth;
 953   UINT16                                                       OptimalAccessUnit;
 954   UINT16                                                       OptimalAccessAlignment;
 955   UINT16                                                       Reserved;
 956   UINT16                                                       NumberOfProximityDomains;
 957 //UINT32                                                       ProximityDomain[NumberOfProximityDomains];
 958 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE    PhysicalComponent[];
 959 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 960
 961 ///
 962 /// DIMM Memory Aggregator Device Structure.
 963 ///
 964 typedef struct {
 965   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 966   UINT16                                                       PhysicalComponentIdentifier;
 967   UINT16                                                       Reserved;
 968   UINT32                                                       SizeOfDimm;
 969   UINT32                                                       SmbiosHandle;
 970 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 971
 972 ///
 973 /// Boot Graphics Resource Table definition.
 974 ///
 975 typedef struct {
 976   EFI_ACPI_DESCRIPTION_HEADER Header;
 977   ///
 978   /// 2-bytes (16 bit) version ID. This value must be 1.
 979   ///
 980   UINT16                      Version;
 981   ///
 982   /// 1-byte status field indicating current status about the table.
 983   ///     Bits[7:1] = Reserved (must be zero)
 984   ///     Bit [0] = Valid. A one indicates the boot image graphic is valid.
 985   ///
 986   UINT8                       Status;
 987   ///
 988   /// 1-byte enumerated type field indicating format of the image.
 989   ///     0 = Bitmap
 990   ///     1 - 255  Reserved (for future use)
 991   ///
 992   UINT8                       ImageType;
 993   ///
 994   /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
 995   /// of the image bitmap.
 996   ///
 997   UINT64                      ImageAddress;
 998   ///
 999   /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1000   /// (X, Y) display offset of the top left corner of the boot image.
1001   /// The top left corner of the display is at offset (0, 0).
1002   ///
1003   UINT32                      ImageOffsetX;
1004   ///
1005   /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1006   /// (X, Y) display offset of the top left corner of the boot image.
1007   /// The top left corner of the display is at offset (0, 0).
1008   ///
1009   UINT32                      ImageOffsetY;
1010 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
1011
1012 ///
1013 /// BGRT Revision
1014 ///
1015 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1016
1017 ///
1018 /// BGRT Version
1019 ///
1020 #define EFI_ACPI_5_1_BGRT_VERSION         0x01
1021
1022 ///
1023 /// BGRT Status
1024 ///
1025 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
1026 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED     0x01
1027
1028 ///
1029 /// BGRT Image Type
1030 ///
1031 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP  0x00
1032
1033 ///
1034 /// FPDT Version (as defined in ACPI 5.1 spec.)
1035 ///
1036 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1037
1038 ///
1039 /// FPDT Performance Record Types
1040 ///
1041 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER      0x0000
1042 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER     0x0001
1043
1044 ///
1045 /// FPDT Performance Record Revision
1046 ///
1047 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER  0x01
1048 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1049
1050 ///
1051 /// FPDT Runtime Performance Record Types
1052 ///
1053 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME                0x0000
1054 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND               0x0001
1055 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT      0x0002
1056
1057 ///
1058 /// FPDT Runtime Performance Record Revision
1059 ///
1060 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME            0x01
1061 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND           0x01
1062 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT  0x02
1063
1064 ///
1065 /// FPDT Performance Record header
1066 ///
1067 typedef struct {
1068   UINT16           Type;
1069   UINT8            Length;
1070   UINT8            Revision;
1071 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
1072
1073 ///
1074 /// FPDT Performance Table header
1075 ///
1076 typedef struct {
1077   UINT32  Signature;
1078   UINT32  Length;
1079 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
1080
1081 ///
1082 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1083 ///
1084 typedef struct {
1085   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1086   UINT32                                          Reserved;
1087   ///
1088   /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1089   ///
1090   UINT64                                          BootPerformanceTablePointer;
1091 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1092
1093 ///
1094 /// FPDT S3 Performance Table Pointer Record Structure
1095 ///
1096 typedef struct {
1097   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1098   UINT32                                          Reserved;
1099   ///
1100   /// 64-bit processor-relative physical address of the S3 Performance Table.
1101   ///
1102   UINT64                                          S3PerformanceTablePointer;
1103 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1104
1105 ///
1106 /// FPDT Firmware Basic Boot Performance Record Structure
1107 ///
1108 typedef struct {
1109   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1110   UINT32                                          Reserved;
1111   ///
1112   /// Timer value logged at the beginning of firmware image execution.
1113   /// This may not always be zero or near zero.
1114   ///
1115   UINT64                                          ResetEnd;
1116   ///
1117   /// Timer value logged just prior to loading the OS boot loader into memory.
1118   /// For non-UEFI compatible boots, this field must be zero.
1119   ///
1120   UINT64                                          OsLoaderLoadImageStart;
1121   ///
1122   /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1123   /// For non-UEFI compatible boots, the timer value logged will be just prior
1124   /// to the INT 19h handler invocation.
1125   ///
1126   UINT64                                          OsLoaderStartImageStart;
1127   ///
1128   /// Timer value logged at the point when the OS loader calls the
1129   /// ExitBootServices function for UEFI compatible firmware.
1130   /// For non-UEFI compatible boots, this field must be zero.
1131   ///
1132   UINT64                                          ExitBootServicesEntry;
1133   ///
1134   /// Timer value logged at the point just prior towhen the OS loader gaining
1135   /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1136   /// For non-UEFI compatible boots, this field must be zero.
1137   ///
1138   UINT64                                          ExitBootServicesExit;
1139 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1140
1141 ///
1142 /// FPDT Firmware Basic Boot Performance Table signature
1143 ///
1144 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('F', 'B', 'P', 'T')
1145
1146 //
1147 // FPDT Firmware Basic Boot Performance Table
1148 //
1149 typedef struct {
1150   EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
1151   //
1152   // one or more Performance Records.
1153   //
1154 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1155
1156 ///
1157 /// FPDT "S3PT" S3 Performance Table
1158 ///
1159 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('S', '3', 'P', 'T')
1160
1161 //
1162 // FPDT Firmware S3 Boot Performance Table
1163 //
1164 typedef struct {
1165   EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
1166   //
1167   // one or more Performance Records.
1168   //
1169 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
1170
1171 ///
1172 /// FPDT Basic S3 Resume Performance Record
1173 ///
1174 typedef struct {
1175   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1176   ///
1177   /// A count of the number of S3 resume cycles since the last full boot sequence.
1178   ///
1179   UINT32                                          ResumeCount;
1180   ///
1181   /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1182   /// OS waking vector. Only the most recent resume cycle's time is retained.
1183   ///
1184   UINT64                                          FullResume;
1185   ///
1186   /// Average timer value of all resume cycles logged since the last full boot
1187   /// sequence, including the most recent resume.  Note that the entire log of
1188   /// timer values does not need to be retained in order to calculate this average.
1189   ///
1190   UINT64                                          AverageResume;
1191 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
1192
1193 ///
1194 /// FPDT Basic S3 Suspend Performance Record
1195 ///
1196 typedef struct {
1197   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1198   ///
1199   /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1200   /// Only the most recent suspend cycle's timer value is retained.
1201   ///
1202   UINT64                                          SuspendStart;
1203   ///
1204   /// Timer value recorded at the final firmware write to SLP_TYP (or other
1205   /// mechanism) used to trigger hardware entry to S3.
1206   /// Only the most recent suspend cycle's timer value is retained.
1207   ///
1208   UINT64                                          SuspendEnd;
1209 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
1210
1211 ///
1212 /// Firmware Performance Record Table definition.
1213 ///
1214 typedef struct {
1215   EFI_ACPI_DESCRIPTION_HEADER Header;
1216 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1217
1218 ///
1219 /// Generic Timer Description Table definition.
1220 ///
1221 typedef struct {
1222   EFI_ACPI_DESCRIPTION_HEADER Header;
1223   UINT64                      CntControlBasePhysicalAddress;
1224   UINT32                      Reserved;
1225   UINT32                      SecurePL1TimerGSIV;
1226   UINT32                      SecurePL1TimerFlags;
1227   UINT32                      NonSecurePL1TimerGSIV;
1228   UINT32                      NonSecurePL1TimerFlags;
1229   UINT32                      VirtualTimerGSIV;
1230   UINT32                      VirtualTimerFlags;
1231   UINT32                      NonSecurePL2TimerGSIV;
1232   UINT32                      NonSecurePL2TimerFlags;
1233   UINT64                      CntReadBasePhysicalAddress;
1234   UINT32                      PlatformTimerCount;
1235   UINT32                      PlatformTimerOffset;
1236 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
1237
1238 ///
1239 /// GTDT Version (as defined in ACPI 5.1 spec.)
1240 ///
1241 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1242
1243 ///
1244 /// Timer Flags.  All other bits are reserved and must be 0.
1245 ///
1246 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
1247 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1248 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY          BIT2
1249
1250 ///
1251 /// Platform Timer Type
1252 ///
1253 #define EFI_ACPI_5_1_GTDT_GT_BLOCK                       0
1254 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG          1
1255
1256 ///
1257 /// GT Block Structure
1258 ///
1259 typedef struct {
1260   UINT8   Type;
1261   UINT16  Length;
1262   UINT8   Reserved;
1263   UINT64  CntCtlBase;
1264   UINT32  GTBlockTimerCount;
1265   UINT32  GTBlockTimerOffset;
1266 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
1267
1268 ///
1269 /// GT Block Timer Structure
1270 ///
1271 typedef struct {
1272   UINT8   GTFrameNumber;
1273   UINT8   Reserved[3];
1274   UINT64  CntBaseX;
1275   UINT64  CntEL0BaseX;
1276   UINT32  GTxPhysicalTimerGSIV;
1277   UINT32  GTxPhysicalTimerFlags;
1278   UINT32  GTxVirtualTimerGSIV;
1279   UINT32  GTxVirtualTimerFlags;
1280   UINT32  GTxCommonFlags;
1281 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1282
1283 ///
1284 /// GT Block Physical Timers and Virtual Timers Flags.  All other bits are reserved and must be 0.
1285 ///
1286 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
1287 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1288
1289 ///
1290 /// Common Flags Flags.  All other bits are reserved and must be 0.
1291 ///
1292 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER              BIT0
1293 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY      BIT1
1294
1295 ///
1296 /// SBSA Generic Watchdog Structure
1297 ///
1298 typedef struct {
1299   UINT8   Type;
1300   UINT8   Length;
1301   UINT16  Reserved;
1302   UINT64  RefreshFramePhysicalAddress;
1303   UINT64  WatchdogControlFramePhysicalAddress;
1304   UINT32  WatchdogTimerGSIV;
1305   UINT32  WatchdogTimerFlags;
1306 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1307
1308 ///
1309 /// SBSA Generic Watchdog Timer Flags.  All other bits are reserved and must be 0.
1310 ///
1311 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE          BIT0
1312 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1313 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER                  BIT2
1314
1315 ///
1316 /// Boot Error Record Table (BERT)
1317 ///
1318 typedef struct {
1319   EFI_ACPI_DESCRIPTION_HEADER Header;
1320   UINT32                      BootErrorRegionLength;
1321   UINT64                      BootErrorRegion;
1322 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
1323
1324 ///
1325 /// BERT Version (as defined in ACPI 5.1 spec.)
1326 ///
1327 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1328
1329 ///
1330 /// Boot Error Region Block Status Definition
1331 ///
1332 typedef struct {
1333   UINT32       UncorrectableErrorValid:1;
1334   UINT32       CorrectableErrorValid:1;
1335   UINT32       MultipleUncorrectableErrors:1;
1336   UINT32       MultipleCorrectableErrors:1;
1337   UINT32       ErrorDataEntryCount:10;
1338   UINT32       Reserved:18;
1339 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
1340
1341 ///
1342 /// Boot Error Region Definition
1343 ///
1344 typedef struct {
1345   EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
1346   UINT32                                       RawDataOffset;
1347   UINT32                                       RawDataLength;
1348   UINT32                                       DataLength;
1349   UINT32                                       ErrorSeverity;
1350 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
1351
1352 //
1353 // Boot Error Severity types
1354 //
1355 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE  0x00
1356 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL        0x01
1357 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED    0x02
1358 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE         0x03
1359
1360 ///
1361 /// Generic Error Data Entry Definition
1362 ///
1363 typedef struct {
1364   UINT8    SectionType[16];
1365   UINT32   ErrorSeverity;
1366   UINT16   Revision;
1367   UINT8    ValidationBits;
1368   UINT8    Flags;
1369   UINT32   ErrorDataLength;
1370   UINT8    FruId[16];
1371   UINT8    FruText[20];
1372 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1373
1374 ///
1375 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
1376 ///
1377 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION  0x0201
1378
1379 ///
1380 /// HEST - Hardware Error Source Table
1381 ///
1382 typedef struct {
1383   EFI_ACPI_DESCRIPTION_HEADER Header;
1384   UINT32                      ErrorSourceCount;
1385 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1386
1387 ///
1388 /// HEST Version (as defined in ACPI 5.1 spec.)
1389 ///
1390 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1391
1392 //
1393 // Error Source structure types.
1394 //
1395 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION  0x00
1396 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK  0x01
1397 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR                0x02
1398 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER                  0x06
1399 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER                     0x07
1400 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER                     0x08
1401 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR                     0x09
1402
1403 //
1404 // Error Source structure flags.
1405 //
1406 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST       (1 << 0)
1407 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL               (1 << 1)
1408
1409 ///
1410 /// IA-32 Architecture Machine Check Exception Structure Definition
1411 ///
1412 typedef struct {
1413   UINT16  Type;
1414   UINT16  SourceId;
1415   UINT8   Reserved0[2];
1416   UINT8   Flags;
1417   UINT8   Enabled;
1418   UINT32  NumberOfRecordsToPreAllocate;
1419   UINT32  MaxSectionsPerRecord;
1420   UINT64  GlobalCapabilityInitData;
1421   UINT64  GlobalControlInitData;
1422   UINT8   NumberOfHardwareBanks;
1423   UINT8   Reserved1[7];
1424 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1425
1426 ///
1427 /// IA-32 Architecture Machine Check Bank Structure Definition
1428 ///
1429 typedef struct {
1430   UINT8   BankNumber;
1431   UINT8   ClearStatusOnInitialization;
1432   UINT8   StatusDataFormat;
1433   UINT8   Reserved0;
1434   UINT32  ControlRegisterMsrAddress;
1435   UINT64  ControlInitData;
1436   UINT32  StatusRegisterMsrAddress;
1437   UINT32  AddressRegisterMsrAddress;
1438   UINT32  MiscRegisterMsrAddress;
1439 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1440
1441 ///
1442 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1443 ///
1444 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32      0x00
1445 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64   0x01
1446 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64     0x02
1447
1448 //
1449 // Hardware Error Notification types. All other values are reserved
1450 //
1451 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED                0x00
1452 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT    0x01
1453 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT       0x02
1454 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI                   0x03
1455 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI                   0x04
1456
1457 ///
1458 /// Hardware Error Notification Configuration Write Enable Structure Definition
1459 ///
1460 typedef struct {
1461   UINT16    Type:1;
1462   UINT16    PollInterval:1;
1463   UINT16    SwitchToPollingThresholdValue:1;
1464   UINT16    SwitchToPollingThresholdWindow:1;
1465   UINT16    ErrorThresholdValue:1;
1466   UINT16    ErrorThresholdWindow:1;
1467   UINT16    Reserved:10;
1468 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1469
1470 ///
1471 /// Hardware Error Notification Structure Definition
1472 ///
1473 typedef struct {
1474   UINT8                                                                          Type;
1475   UINT8                                                                          Length;
1476   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE  ConfigurationWriteEnable;
1477   UINT32                                                                         PollInterval;
1478   UINT32                                                                         Vector;
1479   UINT32                                                                         SwitchToPollingThresholdValue;
1480   UINT32                                                                         SwitchToPollingThresholdWindow;
1481   UINT32                                                                         ErrorThresholdValue;
1482   UINT32                                                                         ErrorThresholdWindow;
1483 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1484
1485 ///
1486 /// IA-32 Architecture Corrected Machine Check Structure Definition
1487 ///
1488 typedef struct {
1489   UINT16                                                 Type;
1490   UINT16                                                 SourceId;
1491   UINT8                                                  Reserved0[2];
1492   UINT8                                                  Flags;
1493   UINT8                                                  Enabled;
1494   UINT32                                                 NumberOfRecordsToPreAllocate;
1495   UINT32                                                 MaxSectionsPerRecord;
1496   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
1497   UINT8                                                  NumberOfHardwareBanks;
1498   UINT8                                                  Reserved1[3];
1499 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1500
1501 ///
1502 /// IA-32 Architecture NMI Error Structure Definition
1503 ///
1504 typedef struct {
1505   UINT16  Type;
1506   UINT16  SourceId;
1507   UINT8   Reserved0[2];
1508   UINT32  NumberOfRecordsToPreAllocate;
1509   UINT32  MaxSectionsPerRecord;
1510   UINT32  MaxRawDataLength;
1511 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1512
1513 ///
1514 /// PCI Express Root Port AER Structure Definition
1515 ///
1516 typedef struct {
1517   UINT16  Type;
1518   UINT16  SourceId;
1519   UINT8   Reserved0[2];
1520   UINT8   Flags;
1521   UINT8   Enabled;
1522   UINT32  NumberOfRecordsToPreAllocate;
1523   UINT32  MaxSectionsPerRecord;
1524   UINT32  Bus;
1525   UINT16  Device;
1526   UINT16  Function;
1527   UINT16  DeviceControl;
1528   UINT8   Reserved1[2];
1529   UINT32  UncorrectableErrorMask;
1530   UINT32  UncorrectableErrorSeverity;
1531   UINT32  CorrectableErrorMask;
1532   UINT32  AdvancedErrorCapabilitiesAndControl;
1533   UINT32  RootErrorCommand;
1534 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1535
1536 ///
1537 /// PCI Express Device AER Structure Definition
1538 ///
1539 typedef struct {
1540   UINT16  Type;
1541   UINT16  SourceId;
1542   UINT8   Reserved0[2];
1543   UINT8   Flags;
1544   UINT8   Enabled;
1545   UINT32  NumberOfRecordsToPreAllocate;
1546   UINT32  MaxSectionsPerRecord;
1547   UINT32  Bus;
1548   UINT16  Device;
1549   UINT16  Function;
1550   UINT16  DeviceControl;
1551   UINT8   Reserved1[2];
1552   UINT32  UncorrectableErrorMask;
1553   UINT32  UncorrectableErrorSeverity;
1554   UINT32  CorrectableErrorMask;
1555   UINT32  AdvancedErrorCapabilitiesAndControl;
1556 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1557
1558 ///
1559 /// PCI Express Bridge AER Structure Definition
1560 ///
1561 typedef struct {
1562   UINT16  Type;
1563   UINT16  SourceId;
1564   UINT8   Reserved0[2];
1565   UINT8   Flags;
1566   UINT8   Enabled;
1567   UINT32  NumberOfRecordsToPreAllocate;
1568   UINT32  MaxSectionsPerRecord;
1569   UINT32  Bus;
1570   UINT16  Device;
1571   UINT16  Function;
1572   UINT16  DeviceControl;
1573   UINT8   Reserved1[2];
1574   UINT32  UncorrectableErrorMask;
1575   UINT32  UncorrectableErrorSeverity;
1576   UINT32  CorrectableErrorMask;
1577   UINT32  AdvancedErrorCapabilitiesAndControl;
1578   UINT32  SecondaryUncorrectableErrorMask;
1579   UINT32  SecondaryUncorrectableErrorSeverity;
1580   UINT32  SecondaryAdvancedErrorCapabilitiesAndControl;
1581 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1582
1583 ///
1584 /// Generic Hardware Error Source Structure Definition
1585 ///
1586 typedef struct {
1587   UINT16                                                 Type;
1588   UINT16                                                 SourceId;
1589   UINT16                                                 RelatedSourceId;
1590   UINT8                                                  Flags;
1591   UINT8                                                  Enabled;
1592   UINT32                                                 NumberOfRecordsToPreAllocate;
1593   UINT32                                                 MaxSectionsPerRecord;
1594   UINT32                                                 MaxRawDataLength;
1595   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE                 ErrorStatusAddress;
1596   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
1597   UINT32                                                 ErrorStatusBlockLength;
1598 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1599
1600 ///
1601 /// Generic Error Status Definition
1602 ///
1603 typedef struct {
1604   EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
1605   UINT32                                       RawDataOffset;
1606   UINT32                                       RawDataLength;
1607   UINT32                                       DataLength;
1608   UINT32                                       ErrorSeverity;
1609 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
1610
1611 ///
1612 /// ERST - Error Record Serialization Table
1613 ///
1614 typedef struct {
1615   EFI_ACPI_DESCRIPTION_HEADER Header;
1616   UINT32                      SerializationHeaderSize;
1617   UINT8                       Reserved0[4];
1618   UINT32                      InstructionEntryCount;
1619 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1620
1621 ///
1622 /// ERST Version (as defined in ACPI 5.1 spec.)
1623 ///
1624 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1625
1626 ///
1627 /// ERST Serialization Actions
1628 ///
1629 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION                    0x00
1630 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION                     0x01
1631 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION                    0x02
1632 #define EFI_ACPI_5_1_ERST_END_OPERATION                            0x03
1633 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET                        0x04
1634 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION                        0x05
1635 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS                        0x06
1636 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS                       0x07
1637 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER                    0x08
1638 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER                    0x09
1639 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT                         0x0A
1640 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION              0x0B
1641 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE              0x0D
1642 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH       0x0E
1643 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES   0x0F
1644
1645 ///
1646 /// ERST Action Command Status
1647 ///
1648 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS                           0x00
1649 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE                  0x01
1650 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE            0x02
1651 #define EFI_ACPI_5_1_ERST_STATUS_FAILED                            0x03
1652 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY                0x04
1653 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND                  0x05
1654
1655 ///
1656 /// ERST Serialization Instructions
1657 ///
1658 #define EFI_ACPI_5_1_ERST_READ_REGISTER                            0x00
1659 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE                      0x01
1660 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER                           0x02
1661 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE                     0x03
1662 #define EFI_ACPI_5_1_ERST_NOOP                                     0x04
1663 #define EFI_ACPI_5_1_ERST_LOAD_VAR1                                0x05
1664 #define EFI_ACPI_5_1_ERST_LOAD_VAR2                                0x06
1665 #define EFI_ACPI_5_1_ERST_STORE_VAR1                               0x07
1666 #define EFI_ACPI_5_1_ERST_ADD                                      0x08
1667 #define EFI_ACPI_5_1_ERST_SUBTRACT                                 0x09
1668 #define EFI_ACPI_5_1_ERST_ADD_VALUE                                0x0A
1669 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE                           0x0B
1670 #define EFI_ACPI_5_1_ERST_STALL                                    0x0C
1671 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE                         0x0D
1672 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE            0x0E
1673 #define EFI_ACPI_5_1_ERST_GOTO                                     0x0F
1674 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE                     0x10
1675 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE                     0x11
1676 #define EFI_ACPI_5_1_ERST_MOVE_DATA                                0x12
1677
1678 ///
1679 /// ERST Instruction Flags
1680 ///
1681 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER                        0x01
1682
1683 ///
1684 /// ERST Serialization Instruction Entry
1685 ///
1686 typedef struct {
1687   UINT8                                    SerializationAction;
1688   UINT8                                    Instruction;
1689   UINT8                                    Flags;
1690   UINT8                                    Reserved0;
1691   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
1692   UINT64                                   Value;
1693   UINT64                                   Mask;
1694 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1695
1696 ///
1697 /// EINJ - Error Injection Table
1698 ///
1699 typedef struct {
1700   EFI_ACPI_DESCRIPTION_HEADER Header;
1701   UINT32                      InjectionHeaderSize;
1702   UINT8                       InjectionFlags;
1703   UINT8                       Reserved0[3];
1704   UINT32                      InjectionEntryCount;
1705 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
1706
1707 ///
1708 /// EINJ Version (as defined in ACPI 5.1 spec.)
1709 ///
1710 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
1711
1712 ///
1713 /// EINJ Error Injection Actions
1714 ///
1715 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION                0x00
1716 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE           0x01
1717 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE                           0x02
1718 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE                           0x03
1719 #define EFI_ACPI_5_1_EINJ_END_OPERATION                            0x04
1720 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION                        0x05
1721 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS                        0x06
1722 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS                       0x07
1723 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR                            0xFF
1724
1725 ///
1726 /// EINJ Action Command Status
1727 ///
1728 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS                           0x00
1729 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE                   0x01
1730 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS                    0x02
1731
1732 ///
1733 /// EINJ Error Type Definition
1734 ///
1735 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE                 (1 << 0)
1736 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL      (1 << 1)
1737 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL         (1 << 2)
1738 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE                    (1 << 3)
1739 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL         (1 << 4)
1740 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL            (1 << 5)
1741 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE               (1 << 6)
1742 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL    (1 << 7)
1743 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL       (1 << 8)
1744 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE                  (1 << 9)
1745 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL       (1 << 10)
1746 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL          (1 << 11)
1747
1748 ///
1749 /// EINJ Injection Instructions
1750 ///
1751 #define EFI_ACPI_5_1_EINJ_READ_REGISTER                            0x00
1752 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE                      0x01
1753 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER                           0x02
1754 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE                     0x03
1755 #define EFI_ACPI_5_1_EINJ_NOOP                                     0x04
1756
1757 ///
1758 /// EINJ Instruction Flags
1759 ///
1760 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER                        0x01
1761
1762 ///
1763 /// EINJ Injection Instruction Entry
1764 ///
1765 typedef struct {
1766   UINT8                                    InjectionAction;
1767   UINT8                                    Instruction;
1768   UINT8                                    Flags;
1769   UINT8                                    Reserved0;
1770   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
1771   UINT64                                   Value;
1772   UINT64                                   Mask;
1773 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
1774
1775 ///
1776 /// EINJ Trigger Action Table
1777 ///
1778 typedef struct {
1779   UINT32  HeaderSize;
1780   UINT32  Revision;
1781   UINT32  TableSize;
1782   UINT32  EntryCount;
1783 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
1784
1785 ///
1786 /// Platform Communications Channel Table (PCCT)
1787 ///
1788 typedef struct {
1789   EFI_ACPI_DESCRIPTION_HEADER Header;
1790   UINT32                      Flags;
1791   UINT64                      Reserved;
1792 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1793
1794 ///
1795 /// PCCT Version (as defined in ACPI 5.1 spec.)
1796 ///
1797 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1798
1799 ///
1800 /// PCCT Global Flags
1801 ///
1802 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL                      BIT0
1803
1804 //
1805 // PCCT Subspace type
1806 //
1807 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC  0x00
1808
1809 ///
1810 /// PCC Subspace Structure Header
1811 ///
1812 typedef struct {
1813   UINT8        Type;
1814   UINT8        Length;
1815 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
1816
1817 ///
1818 /// Generic Communications Subspace Structure
1819 ///
1820 typedef struct {
1821   UINT8                                    Type;
1822   UINT8                                    Length;
1823   UINT8                                    Reserved[6];
1824   UINT64                                   BaseAddress;
1825   UINT64                                   AddressLength;
1826   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   DoorbellRegister;
1827   UINT64                                   DoorbellPreserve;
1828   UINT64                                   DoorbellWrite;
1829   UINT32                                   NominalLatency;
1830   UINT32                                   MaximumPeriodicAccessRate;
1831   UINT16                                   MinimumRequestTurnaroundTime;
1832 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
1833
1834 ///
1835 /// Generic Communications Channel Shared Memory Region
1836 ///
1837
1838 typedef struct {
1839   UINT8                                    Command;
1840   UINT8                                    Reserved:7;
1841   UINT8                                    GenerateSci:1;
1842 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1843
1844 typedef struct {
1845   UINT8                                    CommandComplete:1;
1846   UINT8                                    SciDoorbell:1;
1847   UINT8                                    Error:1;
1848   UINT8                                    Reserved:5;
1849   UINT8                                    Reserved1;
1850 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1851
1852 typedef struct {
1853   UINT32                                                    Signature;
1854   EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND    Command;
1855   EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS     Status;
1856 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1857
1858 //
1859 // Known table signatures
1860 //
1861
1862 ///
1863 /// "RSD PTR " Root System Description Pointer
1864 ///
1865 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1866
1867 ///
1868 /// "APIC" Multiple APIC Description Table
1869 ///
1870 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')
1871
1872 ///
1873 /// "BERT" Boot Error Record Table
1874 ///
1875 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE  SIGNATURE_32('B', 'E', 'R', 'T')
1876
1877 ///
1878 /// "BGRT" Boot Graphics Resource Table
1879 ///
1880 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('B', 'G', 'R', 'T')
1881
1882 ///
1883 /// "CPEP" Corrected Platform Error Polling Table
1884 ///
1885 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE  SIGNATURE_32('C', 'P', 'E', 'P')
1886
1887 ///
1888 /// "DSDT" Differentiated System Description Table
1889 ///
1890 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')
1891
1892 ///
1893 /// "ECDT" Embedded Controller Boot Resources Table
1894 ///
1895 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')
1896
1897 ///
1898 /// "EINJ" Error Injection Table
1899 ///
1900 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'I', 'N', 'J')
1901
1902 ///
1903 /// "ERST" Error Record Serialization Table
1904 ///
1905 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE  SIGNATURE_32('E', 'R', 'S', 'T')
1906
1907 ///
1908 /// "FACP" Fixed ACPI Description Table
1909 ///
1910 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')
1911
1912 ///
1913 /// "FACS" Firmware ACPI Control Structure
1914 ///
1915 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')
1916
1917 ///
1918 /// "FPDT" Firmware Performance Data Table
1919 ///
1920 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE  SIGNATURE_32('F', 'P', 'D', 'T')
1921
1922 ///
1923 /// "GTDT" Generic Timer Description Table
1924 ///
1925 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('G', 'T', 'D', 'T')
1926
1927 ///
1928 /// "HEST" Hardware Error Source Table
1929 ///
1930 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE  SIGNATURE_32('H', 'E', 'S', 'T')
1931
1932 ///
1933 /// "MPST" Memory Power State Table
1934 ///
1935 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE  SIGNATURE_32('M', 'P', 'S', 'T')
1936
1937 ///
1938 /// "MSCT" Maximum System Characteristics Table
1939 ///
1940 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'C', 'T')
1941
1942 ///
1943 /// "PMTT" Platform Memory Topology Table
1944 ///
1945 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE  SIGNATURE_32('P', 'M', 'T', 'T')
1946
1947 ///
1948 /// "PSDT" Persistent System Description Table
1949 ///
1950 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')
1951
1952 ///
1953 /// "RASF" ACPI RAS Feature Table
1954 ///
1955 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE  SIGNATURE_32('R', 'A', 'S', 'F')
1956
1957 ///
1958 /// "RSDT" Root System Description Table
1959 ///
1960 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')
1961
1962 ///
1963 /// "SBST" Smart Battery Specification Table
1964 ///
1965 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')
1966
1967 ///
1968 /// "SLIT" System Locality Information Table
1969 ///
1970 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')
1971
1972 ///
1973 /// "SRAT" System Resource Affinity Table
1974 ///
1975 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')
1976
1977 ///
1978 /// "SSDT" Secondary System Description Table
1979 ///
1980 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')
1981
1982 ///
1983 /// "XSDT" Extended System Description Table
1984 ///
1985 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')
1986
1987 ///
1988 /// "BOOT" MS Simple Boot Spec
1989 ///
1990 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')
1991
1992 ///
1993 /// "CSRT" MS Core System Resource Table
1994 ///
1995 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('C', 'S', 'R', 'T')
1996
1997 ///
1998 /// "DBG2" MS Debug Port 2 Spec
1999 ///
2000 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', '2')
2001
2002 ///
2003 /// "DBGP" MS Debug Port Spec
2004 ///
2005 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')
2006
2007 ///
2008 /// "DMAR" DMA Remapping Table
2009 ///
2010 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE  SIGNATURE_32('D', 'M', 'A', 'R')
2011
2012 ///
2013 /// "DRTM" Dynamic Root of Trust for Measurement Table
2014 ///
2015 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE  SIGNATURE_32('D', 'R', 'T', 'M')
2016
2017 ///
2018 /// "ETDT" Event Timer Description Table
2019 ///
2020 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')
2021
2022 ///
2023 /// "HPET" IA-PC High Precision Event Timer Table
2024 ///
2025 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE  SIGNATURE_32('H', 'P', 'E', 'T')
2026
2027 ///
2028 /// "iBFT" iSCSI Boot Firmware Table
2029 ///
2030 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE  SIGNATURE_32('i', 'B', 'F', 'T')
2031
2032 ///
2033 /// "IVRS" I/O Virtualization Reporting Structure
2034 ///
2035 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE  SIGNATURE_32('I', 'V', 'R', 'S')
2036
2037 ///
2038 /// "LPIT" Low Power Idle Table
2039 ///
2040 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('L', 'P', 'I', 'T')
2041
2042 ///
2043 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2044 ///
2045 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')
2046
2047 ///
2048 /// "MCHI" Management Controller Host Interface Table
2049 ///
2050 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'H', 'I')
2051
2052 ///
2053 /// "MSDM" MS Data Management Table
2054 ///
2055 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'D', 'M')
2056
2057 ///
2058 /// "SLIC" MS Software Licensing Table Specification
2059 ///
2060 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'C')
2061
2062 ///
2063 /// "SPCR" Serial Port Concole Redirection Table
2064 ///
2065 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')
2066
2067 ///
2068 /// "SPMI" Server Platform Management Interface Table
2069 ///
2070 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')
2071
2072 ///
2073 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2074 ///
2075 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE  SIGNATURE_32('T', 'C', 'P', 'A')
2076
2077 ///
2078 /// "TPM2" Trusted Computing Platform 1 Table
2079 ///
2080 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE  SIGNATURE_32('T', 'P', 'M', '2')
2081
2082 ///
2083 /// "UEFI" UEFI ACPI Data Table
2084 ///
2085 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE  SIGNATURE_32('U', 'E', 'F', 'I')
2086
2087 ///
2088 /// "WAET" Windows ACPI Emulated Devices Table
2089 ///
2090 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE  SIGNATURE_32('W', 'A', 'E', 'T')
2091
2092 ///
2093 /// "WDAT" Watchdog Action Table
2094 ///
2095 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'A', 'T')
2096
2097 ///
2098 /// "WDRT" Watchdog Resource Table
2099 ///
2100 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'R', 'T')
2101
2102 ///
2103 /// "WPBT" MS Platform Binary Table
2104 ///
2105 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE  SIGNATURE_32('W', 'P', 'B', 'T')
2106
2107 #pragma pack()
2108
2109 #endif