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1 /** @file
2 ACPI 6.4 definitions from the ACPI Specification Revision 6.4 Jan, 2021.
3
4 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8 **/
9
10 #ifndef ACPI_6_4_H_
11 #define ACPI_6_4_H_
12
13 #include <IndustryStandard/Acpi63.h>
14
15 //
16 // Ensure proper structure formats
17 //
18 #pragma pack(1)
19
20 ///
21 /// ACPI 6.4 Generic Address Space definition
22 ///
23 typedef struct {
24 UINT8 AddressSpaceId;
25 UINT8 RegisterBitWidth;
26 UINT8 RegisterBitOffset;
27 UINT8 AccessSize;
28 UINT64 Address;
29 } EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE;
30
31 //
32 // Generic Address Space Address IDs
33 //
34 #define EFI_ACPI_6_4_SYSTEM_MEMORY 0x00
35 #define EFI_ACPI_6_4_SYSTEM_IO 0x01
36 #define EFI_ACPI_6_4_PCI_CONFIGURATION_SPACE 0x02
37 #define EFI_ACPI_6_4_EMBEDDED_CONTROLLER 0x03
38 #define EFI_ACPI_6_4_SMBUS 0x04
39 #define EFI_ACPI_6_4_SYSTEM_CMOS 0x05
40 #define EFI_ACPI_6_4_PCI_BAR_TARGET 0x06
41 #define EFI_ACPI_6_4_IPMI 0x07
42 #define EFI_ACPI_6_4_GENERAL_PURPOSE_IO 0x08
43 #define EFI_ACPI_6_4_GENERIC_SERIAL_BUS 0x09
44 #define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL 0x0A
45 #define EFI_ACPI_6_4_FUNCTIONAL_FIXED_HARDWARE 0x7F
46
47 //
48 // Generic Address Space Access Sizes
49 //
50 #define EFI_ACPI_6_4_UNDEFINED 0
51 #define EFI_ACPI_6_4_BYTE 1
52 #define EFI_ACPI_6_4_WORD 2
53 #define EFI_ACPI_6_4_DWORD 3
54 #define EFI_ACPI_6_4_QWORD 4
55
56 //
57 // ACPI 6.4 table structures
58 //
59
60 ///
61 /// Root System Description Pointer Structure
62 ///
63 typedef struct {
64 UINT64 Signature;
65 UINT8 Checksum;
66 UINT8 OemId[6];
67 UINT8 Revision;
68 UINT32 RsdtAddress;
69 UINT32 Length;
70 UINT64 XsdtAddress;
71 UINT8 ExtendedChecksum;
72 UINT8 Reserved[3];
73 } EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER;
74
75 ///
76 /// RSD_PTR Revision (as defined in ACPI 6.4 spec.)
77 ///
78 #define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.4) says current value is 2
79
80 ///
81 /// Common table header, this prefaces all ACPI tables, including FACS, but
82 /// excluding the RSD PTR structure
83 ///
84 typedef struct {
85 UINT32 Signature;
86 UINT32 Length;
87 } EFI_ACPI_6_4_COMMON_HEADER;
88
89 //
90 // Root System Description Table
91 // No definition needed as it is a common description table header, the same with
92 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
93 //
94
95 ///
96 /// RSDT Revision (as defined in ACPI 6.4 spec.)
97 ///
98 #define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
99
100 //
101 // Extended System Description Table
102 // No definition needed as it is a common description table header, the same with
103 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
104 //
105
106 ///
107 /// XSDT Revision (as defined in ACPI 6.4 spec.)
108 ///
109 #define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
110
111 ///
112 /// Fixed ACPI Description Table Structure (FADT)
113 ///
114 typedef struct {
115 EFI_ACPI_DESCRIPTION_HEADER Header;
116 UINT32 FirmwareCtrl;
117 UINT32 Dsdt;
118 UINT8 Reserved0;
119 UINT8 PreferredPmProfile;
120 UINT16 SciInt;
121 UINT32 SmiCmd;
122 UINT8 AcpiEnable;
123 UINT8 AcpiDisable;
124 UINT8 S4BiosReq;
125 UINT8 PstateCnt;
126 UINT32 Pm1aEvtBlk;
127 UINT32 Pm1bEvtBlk;
128 UINT32 Pm1aCntBlk;
129 UINT32 Pm1bCntBlk;
130 UINT32 Pm2CntBlk;
131 UINT32 PmTmrBlk;
132 UINT32 Gpe0Blk;
133 UINT32 Gpe1Blk;
134 UINT8 Pm1EvtLen;
135 UINT8 Pm1CntLen;
136 UINT8 Pm2CntLen;
137 UINT8 PmTmrLen;
138 UINT8 Gpe0BlkLen;
139 UINT8 Gpe1BlkLen;
140 UINT8 Gpe1Base;
141 UINT8 CstCnt;
142 UINT16 PLvl2Lat;
143 UINT16 PLvl3Lat;
144 UINT16 FlushSize;
145 UINT16 FlushStride;
146 UINT8 DutyOffset;
147 UINT8 DutyWidth;
148 UINT8 DayAlrm;
149 UINT8 MonAlrm;
150 UINT8 Century;
151 UINT16 IaPcBootArch;
152 UINT8 Reserved1;
153 UINT32 Flags;
154 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ResetReg;
155 UINT8 ResetValue;
156 UINT16 ArmBootArch;
157 UINT8 MinorVersion;
158 UINT64 XFirmwareCtrl;
159 UINT64 XDsdt;
160 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
161 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
162 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
163 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
164 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
165 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
166 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
167 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
168 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
169 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
170 UINT64 HypervisorVendorIdentity;
171 } EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE;
172
173 ///
174 /// FADT Version (as defined in ACPI 6.4 spec.)
175 ///
176 #define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
177 #define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x04
178
179 //
180 // Fixed ACPI Description Table Preferred Power Management Profile
181 //
182 #define EFI_ACPI_6_4_PM_PROFILE_UNSPECIFIED 0
183 #define EFI_ACPI_6_4_PM_PROFILE_DESKTOP 1
184 #define EFI_ACPI_6_4_PM_PROFILE_MOBILE 2
185 #define EFI_ACPI_6_4_PM_PROFILE_WORKSTATION 3
186 #define EFI_ACPI_6_4_PM_PROFILE_ENTERPRISE_SERVER 4
187 #define EFI_ACPI_6_4_PM_PROFILE_SOHO_SERVER 5
188 #define EFI_ACPI_6_4_PM_PROFILE_APPLIANCE_PC 6
189 #define EFI_ACPI_6_4_PM_PROFILE_PERFORMANCE_SERVER 7
190 #define EFI_ACPI_6_4_PM_PROFILE_TABLET 8
191
192 //
193 // Fixed ACPI Description Table Boot Architecture Flags
194 // All other bits are reserved and must be set to 0.
195 //
196 #define EFI_ACPI_6_4_LEGACY_DEVICES BIT0
197 #define EFI_ACPI_6_4_8042 BIT1
198 #define EFI_ACPI_6_4_VGA_NOT_PRESENT BIT2
199 #define EFI_ACPI_6_4_MSI_NOT_SUPPORTED BIT3
200 #define EFI_ACPI_6_4_PCIE_ASPM_CONTROLS BIT4
201 #define EFI_ACPI_6_4_CMOS_RTC_NOT_PRESENT BIT5
202
203 //
204 // Fixed ACPI Description Table Arm Boot Architecture Flags
205 // All other bits are reserved and must be set to 0.
206 //
207 #define EFI_ACPI_6_4_ARM_PSCI_COMPLIANT BIT0
208 #define EFI_ACPI_6_4_ARM_PSCI_USE_HVC BIT1
209
210 //
211 // Fixed ACPI Description Table Fixed Feature Flags
212 // All other bits are reserved and must be set to 0.
213 //
214 #define EFI_ACPI_6_4_WBINVD BIT0
215 #define EFI_ACPI_6_4_WBINVD_FLUSH BIT1
216 #define EFI_ACPI_6_4_PROC_C1 BIT2
217 #define EFI_ACPI_6_4_P_LVL2_UP BIT3
218 #define EFI_ACPI_6_4_PWR_BUTTON BIT4
219 #define EFI_ACPI_6_4_SLP_BUTTON BIT5
220 #define EFI_ACPI_6_4_FIX_RTC BIT6
221 #define EFI_ACPI_6_4_RTC_S4 BIT7
222 #define EFI_ACPI_6_4_TMR_VAL_EXT BIT8
223 #define EFI_ACPI_6_4_DCK_CAP BIT9
224 #define EFI_ACPI_6_4_RESET_REG_SUP BIT10
225 #define EFI_ACPI_6_4_SEALED_CASE BIT11
226 #define EFI_ACPI_6_4_HEADLESS BIT12
227 #define EFI_ACPI_6_4_CPU_SW_SLP BIT13
228 #define EFI_ACPI_6_4_PCI_EXP_WAK BIT14
229 #define EFI_ACPI_6_4_USE_PLATFORM_CLOCK BIT15
230 #define EFI_ACPI_6_4_S4_RTC_STS_VALID BIT16
231 #define EFI_ACPI_6_4_REMOTE_POWER_ON_CAPABLE BIT17
232 #define EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL BIT18
233 #define EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
234 #define EFI_ACPI_6_4_HW_REDUCED_ACPI BIT20
235 #define EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE BIT21
236
237 ///
238 /// Firmware ACPI Control Structure
239 ///
240 typedef struct {
241 UINT32 Signature;
242 UINT32 Length;
243 UINT32 HardwareSignature;
244 UINT32 FirmwareWakingVector;
245 UINT32 GlobalLock;
246 UINT32 Flags;
247 UINT64 XFirmwareWakingVector;
248 UINT8 Version;
249 UINT8 Reserved0[3];
250 UINT32 OspmFlags;
251 UINT8 Reserved1[24];
252 } EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE;
253
254 ///
255 /// FACS Version (as defined in ACPI 6.4 spec.)
256 ///
257 #define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
258
259 ///
260 /// Firmware Control Structure Feature Flags
261 /// All other bits are reserved and must be set to 0.
262 ///
263 #define EFI_ACPI_6_4_S4BIOS_F BIT0
264 #define EFI_ACPI_6_4_64BIT_WAKE_SUPPORTED_F BIT1
265
266 ///
267 /// OSPM Enabled Firmware Control Structure Flags
268 /// All other bits are reserved and must be set to 0.
269 ///
270 #define EFI_ACPI_6_4_OSPM_64BIT_WAKE_F BIT0
271
272 //
273 // Differentiated System Description Table,
274 // Secondary System Description Table
275 // and Persistent System Description Table,
276 // no definition needed as they are common description table header, the same with
277 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
278 //
279 #define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
280 #define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
281
282 ///
283 /// Multiple APIC Description Table header definition. The rest of the table
284 /// must be defined in a platform specific manner.
285 ///
286 typedef struct {
287 EFI_ACPI_DESCRIPTION_HEADER Header;
288 UINT32 LocalApicAddress;
289 UINT32 Flags;
290 } EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
291
292 ///
293 /// MADT Revision (as defined in ACPI 6.4 spec.)
294 ///
295 #define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05
296
297 ///
298 /// Multiple APIC Flags
299 /// All other bits are reserved and must be set to 0.
300 ///
301 #define EFI_ACPI_6_4_PCAT_COMPAT BIT0
302
303 //
304 // Multiple APIC Description Table APIC structure types
305 // All other values between 0x10 and 0x7F are reserved and
306 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
307 //
308 #define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC 0x00
309 #define EFI_ACPI_6_4_IO_APIC 0x01
310 #define EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE 0x02
311 #define EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE 0x03
312 #define EFI_ACPI_6_4_LOCAL_APIC_NMI 0x04
313 #define EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
314 #define EFI_ACPI_6_4_IO_SAPIC 0x06
315 #define EFI_ACPI_6_4_LOCAL_SAPIC 0x07
316 #define EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES 0x08
317 #define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC 0x09
318 #define EFI_ACPI_6_4_LOCAL_X2APIC_NMI 0x0A
319 #define EFI_ACPI_6_4_GIC 0x0B
320 #define EFI_ACPI_6_4_GICD 0x0C
321 #define EFI_ACPI_6_4_GIC_MSI_FRAME 0x0D
322 #define EFI_ACPI_6_4_GICR 0x0E
323 #define EFI_ACPI_6_4_GIC_ITS 0x0F
324 #define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP 0x10
325
326 //
327 // APIC Structure Definitions
328 //
329
330 ///
331 /// Processor Local APIC Structure Definition
332 ///
333 typedef struct {
334 UINT8 Type;
335 UINT8 Length;
336 UINT8 AcpiProcessorUid;
337 UINT8 ApicId;
338 UINT32 Flags;
339 } EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_STRUCTURE;
340
341 ///
342 /// Local APIC Flags. All other bits are reserved and must be 0.
343 ///
344 #define EFI_ACPI_6_4_LOCAL_APIC_ENABLED BIT0
345 #define EFI_ACPI_6_4_LOCAL_APIC_ONLINE_CAPABLE BIT1
346
347 ///
348 /// IO APIC Structure
349 ///
350 typedef struct {
351 UINT8 Type;
352 UINT8 Length;
353 UINT8 IoApicId;
354 UINT8 Reserved;
355 UINT32 IoApicAddress;
356 UINT32 GlobalSystemInterruptBase;
357 } EFI_ACPI_6_4_IO_APIC_STRUCTURE;
358
359 ///
360 /// Interrupt Source Override Structure
361 ///
362 typedef struct {
363 UINT8 Type;
364 UINT8 Length;
365 UINT8 Bus;
366 UINT8 Source;
367 UINT32 GlobalSystemInterrupt;
368 UINT16 Flags;
369 } EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
370
371 ///
372 /// Platform Interrupt Sources Structure Definition
373 ///
374 typedef struct {
375 UINT8 Type;
376 UINT8 Length;
377 UINT16 Flags;
378 UINT8 InterruptType;
379 UINT8 ProcessorId;
380 UINT8 ProcessorEid;
381 UINT8 IoSapicVector;
382 UINT32 GlobalSystemInterrupt;
383 UINT32 PlatformInterruptSourceFlags;
384 UINT8 CpeiProcessorOverride;
385 UINT8 Reserved[31];
386 } EFI_ACPI_6_4_PLATFORM_INTERRUPT_APIC_STRUCTURE;
387
388 //
389 // MPS INTI flags.
390 // All other bits are reserved and must be set to 0.
391 //
392 #define EFI_ACPI_6_4_POLARITY (3 << 0)
393 #define EFI_ACPI_6_4_TRIGGER_MODE (3 << 2)
394
395 ///
396 /// Non-Maskable Interrupt Source Structure
397 ///
398 typedef struct {
399 UINT8 Type;
400 UINT8 Length;
401 UINT16 Flags;
402 UINT32 GlobalSystemInterrupt;
403 } EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
404
405 ///
406 /// Local APIC NMI Structure
407 ///
408 typedef struct {
409 UINT8 Type;
410 UINT8 Length;
411 UINT8 AcpiProcessorUid;
412 UINT16 Flags;
413 UINT8 LocalApicLint;
414 } EFI_ACPI_6_4_LOCAL_APIC_NMI_STRUCTURE;
415
416 ///
417 /// Local APIC Address Override Structure
418 ///
419 typedef struct {
420 UINT8 Type;
421 UINT8 Length;
422 UINT16 Reserved;
423 UINT64 LocalApicAddress;
424 } EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
425
426 ///
427 /// IO SAPIC Structure
428 ///
429 typedef struct {
430 UINT8 Type;
431 UINT8 Length;
432 UINT8 IoApicId;
433 UINT8 Reserved;
434 UINT32 GlobalSystemInterruptBase;
435 UINT64 IoSapicAddress;
436 } EFI_ACPI_6_4_IO_SAPIC_STRUCTURE;
437
438 ///
439 /// Local SAPIC Structure
440 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
441 ///
442 typedef struct {
443 UINT8 Type;
444 UINT8 Length;
445 UINT8 AcpiProcessorId;
446 UINT8 LocalSapicId;
447 UINT8 LocalSapicEid;
448 UINT8 Reserved[3];
449 UINT32 Flags;
450 UINT32 ACPIProcessorUIDValue;
451 } EFI_ACPI_6_4_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
452
453 ///
454 /// Platform Interrupt Sources Structure
455 ///
456 typedef struct {
457 UINT8 Type;
458 UINT8 Length;
459 UINT16 Flags;
460 UINT8 InterruptType;
461 UINT8 ProcessorId;
462 UINT8 ProcessorEid;
463 UINT8 IoSapicVector;
464 UINT32 GlobalSystemInterrupt;
465 UINT32 PlatformInterruptSourceFlags;
466 } EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
467
468 ///
469 /// Platform Interrupt Source Flags.
470 /// All other bits are reserved and must be set to 0.
471 ///
472 #define EFI_ACPI_6_4_CPEI_PROCESSOR_OVERRIDE BIT0
473
474 ///
475 /// Processor Local x2APIC Structure Definition
476 ///
477 typedef struct {
478 UINT8 Type;
479 UINT8 Length;
480 UINT8 Reserved[2];
481 UINT32 X2ApicId;
482 UINT32 Flags;
483 UINT32 AcpiProcessorUid;
484 } EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
485
486 ///
487 /// Local x2APIC NMI Structure
488 ///
489 typedef struct {
490 UINT8 Type;
491 UINT8 Length;
492 UINT16 Flags;
493 UINT32 AcpiProcessorUid;
494 UINT8 LocalX2ApicLint;
495 UINT8 Reserved[3];
496 } EFI_ACPI_6_4_LOCAL_X2APIC_NMI_STRUCTURE;
497
498 ///
499 /// GIC Structure
500 ///
501 typedef struct {
502 UINT8 Type;
503 UINT8 Length;
504 UINT16 Reserved;
505 UINT32 CPUInterfaceNumber;
506 UINT32 AcpiProcessorUid;
507 UINT32 Flags;
508 UINT32 ParkingProtocolVersion;
509 UINT32 PerformanceInterruptGsiv;
510 UINT64 ParkedAddress;
511 UINT64 PhysicalBaseAddress;
512 UINT64 GICV;
513 UINT64 GICH;
514 UINT32 VGICMaintenanceInterrupt;
515 UINT64 GICRBaseAddress;
516 UINT64 MPIDR;
517 UINT8 ProcessorPowerEfficiencyClass;
518 UINT8 Reserved2;
519 UINT16 SpeOverflowInterrupt;
520 } EFI_ACPI_6_4_GIC_STRUCTURE;
521
522 ///
523 /// GIC Flags. All other bits are reserved and must be 0.
524 ///
525 #define EFI_ACPI_6_4_GIC_ENABLED BIT0
526 #define EFI_ACPI_6_4_PERFORMANCE_INTERRUPT_MODEL BIT1
527 #define EFI_ACPI_6_4_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
528
529 ///
530 /// GIC Distributor Structure
531 ///
532 typedef struct {
533 UINT8 Type;
534 UINT8 Length;
535 UINT16 Reserved1;
536 UINT32 GicId;
537 UINT64 PhysicalBaseAddress;
538 UINT32 SystemVectorBase;
539 UINT8 GicVersion;
540 UINT8 Reserved2[3];
541 } EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE;
542
543 ///
544 /// GIC Version
545 ///
546 #define EFI_ACPI_6_4_GIC_V1 0x01
547 #define EFI_ACPI_6_4_GIC_V2 0x02
548 #define EFI_ACPI_6_4_GIC_V3 0x03
549 #define EFI_ACPI_6_4_GIC_V4 0x04
550
551 ///
552 /// GIC MSI Frame Structure
553 ///
554 typedef struct {
555 UINT8 Type;
556 UINT8 Length;
557 UINT16 Reserved1;
558 UINT32 GicMsiFrameId;
559 UINT64 PhysicalBaseAddress;
560 UINT32 Flags;
561 UINT16 SPICount;
562 UINT16 SPIBase;
563 } EFI_ACPI_6_4_GIC_MSI_FRAME_STRUCTURE;
564
565 ///
566 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
567 ///
568 #define EFI_ACPI_6_4_SPI_COUNT_BASE_SELECT BIT0
569
570 ///
571 /// GICR Structure
572 ///
573 typedef struct {
574 UINT8 Type;
575 UINT8 Length;
576 UINT16 Reserved;
577 UINT64 DiscoveryRangeBaseAddress;
578 UINT32 DiscoveryRangeLength;
579 } EFI_ACPI_6_4_GICR_STRUCTURE;
580
581 ///
582 /// GIC Interrupt Translation Service Structure
583 ///
584 typedef struct {
585 UINT8 Type;
586 UINT8 Length;
587 UINT16 Reserved;
588 UINT32 GicItsId;
589 UINT64 PhysicalBaseAddress;
590 UINT32 Reserved2;
591 } EFI_ACPI_6_4_GIC_ITS_STRUCTURE;
592
593 ///
594 /// Multiprocessor Wakeup Structure
595 ///
596 typedef struct {
597 UINT8 Type;
598 UINT8 Length;
599 UINT16 MailBoxVersion;
600 UINT32 Reserved;
601 UINT64 MailBoxAddress;
602 } EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_STRUCTURE;
603
604 ///
605 /// Multiprocessor Wakeup Mailbox Structure
606 ///
607 typedef struct {
608 UINT16 Command;
609 UINT16 Reserved;
610 UINT32 AcpiId;
611 UINT64 WakeupVector;
612 UINT8 ReservedForOs[2032];
613 UINT8 ReservedForFirmware[2048];
614 } EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;
615
616 #define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000
617 #define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001
618
619 ///
620 /// Smart Battery Description Table (SBST)
621 ///
622 typedef struct {
623 EFI_ACPI_DESCRIPTION_HEADER Header;
624 UINT32 WarningEnergyLevel;
625 UINT32 LowEnergyLevel;
626 UINT32 CriticalEnergyLevel;
627 } EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE;
628
629 ///
630 /// SBST Version (as defined in ACPI 6.4 spec.)
631 ///
632 #define EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
633
634 ///
635 /// Embedded Controller Boot Resources Table (ECDT)
636 /// The table is followed by a null terminated ASCII string that contains
637 /// a fully qualified reference to the name space object.
638 ///
639 typedef struct {
640 EFI_ACPI_DESCRIPTION_HEADER Header;
641 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcControl;
642 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcData;
643 UINT32 Uid;
644 UINT8 GpeBit;
645 } EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
646
647 ///
648 /// ECDT Version (as defined in ACPI 6.4 spec.)
649 ///
650 #define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
651
652 ///
653 /// System Resource Affinity Table (SRAT). The rest of the table
654 /// must be defined in a platform specific manner.
655 ///
656 typedef struct {
657 EFI_ACPI_DESCRIPTION_HEADER Header;
658 UINT32 Reserved1; ///< Must be set to 1
659 UINT64 Reserved2;
660 } EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
661
662 ///
663 /// SRAT Version (as defined in ACPI 6.4 spec.)
664 ///
665 #define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
666
667 //
668 // SRAT structure types.
669 // All other values between 0x06 an 0xFF are reserved and
670 // will be ignored by OSPM.
671 //
672 #define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
673 #define EFI_ACPI_6_4_MEMORY_AFFINITY 0x01
674 #define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
675 #define EFI_ACPI_6_4_GICC_AFFINITY 0x03
676 #define EFI_ACPI_6_4_GIC_ITS_AFFINITY 0x04
677 #define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY 0x05
678
679 ///
680 /// Processor Local APIC/SAPIC Affinity Structure Definition
681 ///
682 typedef struct {
683 UINT8 Type;
684 UINT8 Length;
685 UINT8 ProximityDomain7To0;
686 UINT8 ApicId;
687 UINT32 Flags;
688 UINT8 LocalSapicEid;
689 UINT8 ProximityDomain31To8[3];
690 UINT32 ClockDomain;
691 } EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
692
693 ///
694 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
695 ///
696 #define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
697
698 ///
699 /// Memory Affinity Structure Definition
700 ///
701 typedef struct {
702 UINT8 Type;
703 UINT8 Length;
704 UINT32 ProximityDomain;
705 UINT16 Reserved1;
706 UINT32 AddressBaseLow;
707 UINT32 AddressBaseHigh;
708 UINT32 LengthLow;
709 UINT32 LengthHigh;
710 UINT32 Reserved2;
711 UINT32 Flags;
712 UINT64 Reserved3;
713 } EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE;
714
715 //
716 // Memory Flags. All other bits are reserved and must be 0.
717 //
718 #define EFI_ACPI_6_4_MEMORY_ENABLED (1 << 0)
719 #define EFI_ACPI_6_4_MEMORY_HOT_PLUGGABLE (1 << 1)
720 #define EFI_ACPI_6_4_MEMORY_NONVOLATILE (1 << 2)
721
722 ///
723 /// Processor Local x2APIC Affinity Structure Definition
724 ///
725 typedef struct {
726 UINT8 Type;
727 UINT8 Length;
728 UINT8 Reserved1[2];
729 UINT32 ProximityDomain;
730 UINT32 X2ApicId;
731 UINT32 Flags;
732 UINT32 ClockDomain;
733 UINT8 Reserved2[4];
734 } EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
735
736 ///
737 /// GICC Affinity Structure Definition
738 ///
739 typedef struct {
740 UINT8 Type;
741 UINT8 Length;
742 UINT32 ProximityDomain;
743 UINT32 AcpiProcessorUid;
744 UINT32 Flags;
745 UINT32 ClockDomain;
746 } EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE;
747
748 ///
749 /// GICC Flags. All other bits are reserved and must be 0.
750 ///
751 #define EFI_ACPI_6_4_GICC_ENABLED (1 << 0)
752
753 ///
754 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
755 ///
756 typedef struct {
757 UINT8 Type;
758 UINT8 Length;
759 UINT32 ProximityDomain;
760 UINT8 Reserved[2];
761 UINT32 ItsId;
762 } EFI_ACPI_6_4_GIC_ITS_AFFINITY_STRUCTURE;
763
764 //
765 // Generic Initiator Affinity Structure Device Handle Types
766 // All other values between 0x02 an 0xFF are reserved and
767 // will be ignored by OSPM.
768 //
769 #define EFI_ACPI_6_4_ACPI_DEVICE_HANDLE 0x00
770 #define EFI_ACPI_6_4_PCI_DEVICE_HANDLE 0x01
771
772 ///
773 /// Device Handle - ACPI
774 ///
775 typedef struct {
776 UINT64 AcpiHid;
777 UINT32 AcpiUid;
778 UINT8 Reserved[4];
779 } EFI_ACPI_6_4_DEVICE_HANDLE_ACPI;
780
781 ///
782 /// Device Handle - PCI
783 ///
784 typedef struct {
785 UINT16 PciSegment;
786 UINT16 PciBdfNumber;
787 UINT8 Reserved[12];
788 } EFI_ACPI_6_4_DEVICE_HANDLE_PCI;
789
790 ///
791 /// Device Handle
792 ///
793 typedef union {
794 EFI_ACPI_6_4_DEVICE_HANDLE_ACPI Acpi;
795 EFI_ACPI_6_4_DEVICE_HANDLE_PCI Pci;
796 } EFI_ACPI_6_4_DEVICE_HANDLE;
797
798 ///
799 /// Generic Initiator Affinity Structure
800 ///
801 typedef struct {
802 UINT8 Type;
803 UINT8 Length;
804 UINT8 Reserved1;
805 UINT8 DeviceHandleType;
806 UINT32 ProximityDomain;
807 EFI_ACPI_6_4_DEVICE_HANDLE DeviceHandle;
808 UINT32 Flags;
809 UINT8 Reserved2[4];
810 } EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE;
811
812 ///
813 /// Generic Initiator Affinity Structure Flags. All other bits are reserved
814 /// and must be 0.
815 ///
816 #define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0
817 #define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1
818
819 ///
820 /// System Locality Distance Information Table (SLIT).
821 /// The rest of the table is a matrix.
822 ///
823 typedef struct {
824 EFI_ACPI_DESCRIPTION_HEADER Header;
825 UINT64 NumberOfSystemLocalities;
826 } EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
827
828 ///
829 /// SLIT Version (as defined in ACPI 6.4 spec.)
830 ///
831 #define EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
832
833 ///
834 /// Corrected Platform Error Polling Table (CPEP)
835 ///
836 typedef struct {
837 EFI_ACPI_DESCRIPTION_HEADER Header;
838 UINT8 Reserved[8];
839 } EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
840
841 ///
842 /// CPEP Version (as defined in ACPI 6.4 spec.)
843 ///
844 #define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
845
846 //
847 // CPEP processor structure types.
848 //
849 #define EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC 0x00
850
851 ///
852 /// Corrected Platform Error Polling Processor Structure Definition
853 ///
854 typedef struct {
855 UINT8 Type;
856 UINT8 Length;
857 UINT8 ProcessorId;
858 UINT8 ProcessorEid;
859 UINT32 PollingInterval;
860 } EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
861
862 ///
863 /// Maximum System Characteristics Table (MSCT)
864 ///
865 typedef struct {
866 EFI_ACPI_DESCRIPTION_HEADER Header;
867 UINT32 OffsetProxDomInfo;
868 UINT32 MaximumNumberOfProximityDomains;
869 UINT32 MaximumNumberOfClockDomains;
870 UINT64 MaximumPhysicalAddress;
871 } EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
872
873 ///
874 /// MSCT Version (as defined in ACPI 6.4 spec.)
875 ///
876 #define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
877
878 ///
879 /// Maximum Proximity Domain Information Structure Definition
880 ///
881 typedef struct {
882 UINT8 Revision;
883 UINT8 Length;
884 UINT32 ProximityDomainRangeLow;
885 UINT32 ProximityDomainRangeHigh;
886 UINT32 MaximumProcessorCapacity;
887 UINT64 MaximumMemoryCapacity;
888 } EFI_ACPI_6_4_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
889
890 ///
891 /// ACPI RAS Feature Table definition.
892 ///
893 typedef struct {
894 EFI_ACPI_DESCRIPTION_HEADER Header;
895 UINT8 PlatformCommunicationChannelIdentifier[12];
896 } EFI_ACPI_6_4_RAS_FEATURE_TABLE;
897
898 ///
899 /// RASF Version (as defined in ACPI 6.4 spec.)
900 ///
901 #define EFI_ACPI_6_4_RAS_FEATURE_TABLE_REVISION 0x01
902
903 ///
904 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
905 ///
906 typedef struct {
907 UINT32 Signature;
908 UINT16 Command;
909 UINT16 Status;
910 UINT16 Version;
911 UINT8 RASCapabilities[16];
912 UINT8 SetRASCapabilities[16];
913 UINT16 NumberOfRASFParameterBlocks;
914 UINT32 SetRASCapabilitiesStatus;
915 } EFI_ACPI_6_4_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
916
917 ///
918 /// ACPI RASF PCC command code
919 ///
920 #define EFI_ACPI_6_4_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
921
922 ///
923 /// ACPI RASF Platform RAS Capabilities
924 ///
925 #define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0
926 #define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1
927 #define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2
928 #define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3
929 #define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4
930
931 ///
932 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
933 ///
934 typedef struct {
935 UINT16 Type;
936 UINT16 Version;
937 UINT16 Length;
938 UINT16 PatrolScrubCommand;
939 UINT64 RequestedAddressRange[2];
940 UINT64 ActualAddressRange[2];
941 UINT16 Flags;
942 UINT8 RequestedSpeed;
943 } EFI_ACPI_6_4_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
944
945 ///
946 /// ACPI RASF Patrol Scrub command
947 ///
948 #define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
949 #define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
950 #define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
951
952 ///
953 /// Memory Power State Table definition.
954 ///
955 typedef struct {
956 EFI_ACPI_DESCRIPTION_HEADER Header;
957 UINT8 PlatformCommunicationChannelIdentifier;
958 UINT8 Reserved[3];
959 // Memory Power Node Structure
960 // Memory Power State Characteristics
961 } EFI_ACPI_6_4_MEMORY_POWER_STATUS_TABLE;
962
963 ///
964 /// MPST Version (as defined in ACPI 6.4 spec.)
965 ///
966 #define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_REVISION 0x01
967
968 ///
969 /// MPST Platform Communication Channel Shared Memory Region definition.
970 ///
971 typedef struct {
972 UINT32 Signature;
973 UINT16 Command;
974 UINT16 Status;
975 UINT32 MemoryPowerCommandRegister;
976 UINT32 MemoryPowerStatusRegister;
977 UINT32 PowerStateId;
978 UINT32 MemoryPowerNodeId;
979 UINT64 MemoryEnergyConsumed;
980 UINT64 ExpectedAveragePowerComsuned;
981 } EFI_ACPI_6_4_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
982
983 ///
984 /// ACPI MPST PCC command code
985 ///
986 #define EFI_ACPI_6_4_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
987
988 ///
989 /// ACPI MPST Memory Power command
990 ///
991 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
992 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
993 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
994 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
995
996 ///
997 /// MPST Memory Power Node Table
998 ///
999 typedef struct {
1000 UINT8 PowerStateValue;
1001 UINT8 PowerStateInformationIndex;
1002 } EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE;
1003
1004 typedef struct {
1005 UINT8 Flag;
1006 UINT8 Reserved;
1007 UINT16 MemoryPowerNodeId;
1008 UINT32 Length;
1009 UINT64 AddressBase;
1010 UINT64 AddressLength;
1011 UINT32 NumberOfPowerStates;
1012 UINT32 NumberOfPhysicalComponents;
1013 // EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
1014 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
1015 } EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE;
1016
1017 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
1018 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
1019 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
1020
1021 typedef struct {
1022 UINT16 MemoryPowerNodeCount;
1023 UINT8 Reserved[2];
1024 } EFI_ACPI_6_4_MPST_MEMORY_POWER_NODE_TABLE;
1025
1026 ///
1027 /// MPST Memory Power State Characteristics Table
1028 ///
1029 typedef struct {
1030 UINT8 PowerStateStructureID;
1031 UINT8 Flag;
1032 UINT16 Reserved;
1033 UINT32 AveragePowerConsumedInMPS0;
1034 UINT32 RelativePowerSavingToMPS0;
1035 UINT64 ExitLatencyToMPS0;
1036 } EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
1037
1038 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
1039 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
1040 #define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
1041
1042 typedef struct {
1043 UINT16 MemoryPowerStateCharacteristicsCount;
1044 UINT8 Reserved[2];
1045 } EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1046
1047 ///
1048 /// Platform Memory Topology Table definition.
1049 ///
1050 typedef struct {
1051 EFI_ACPI_DESCRIPTION_HEADER Header;
1052 UINT32 NumberOfMemoryDevices;
1053 // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];
1054 } EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE;
1055
1056 ///
1057 /// PMTT Version (as defined in ACPI 6.4 spec.)
1058 ///
1059 #define EFI_ACPI_6_4_MEMORY_TOPOLOGY_TABLE_REVISION 0x02
1060
1061 ///
1062 /// Common Memory Device.
1063 ///
1064 typedef struct {
1065 UINT8 Type;
1066 UINT8 Reserved;
1067 UINT16 Length;
1068 UINT16 Flags;
1069 UINT16 Reserved1;
1070 UINT32 NumberOfMemoryDevices;
1071 // UINT8 TypeSpecificData[];
1072 // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];
1073 } EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE;
1074
1075 ///
1076 /// Memory Device Type.
1077 ///
1078 #define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x0
1079 #define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
1080 #define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x2
1081 #define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF
1082
1083 ///
1084 /// Socket Type Data.
1085 ///
1086 typedef struct {
1087 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1088 UINT16 SocketIdentifier;
1089 UINT16 Reserved;
1090 // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1091 } EFI_ACPI_6_4_PMTT_SOCKET_TYPE_DATA;
1092
1093 ///
1094 /// Memory Controller Type Data.
1095 ///
1096 typedef struct {
1097 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1098 UINT16 MemoryControllerIdentifier;
1099 UINT16 Reserved;
1100 // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1101 } EFI_ACPI_6_4_PMTT_MEMORY_CONTROLLER_TYPE_DATA;
1102
1103 ///
1104 /// DIMM Type Specific Data.
1105 ///
1106 typedef struct {
1107 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1108 UINT32 SmbiosHandle;
1109 } EFI_ACPI_6_4_PMTT_DIMM_TYPE_SPECIFIC_DATA;
1110
1111 ///
1112 /// Vendor Specific Type Data.
1113 ///
1114 typedef struct {
1115 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1116 UINT8 TypeUuid[16];
1117 // EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];
1118 // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1119 } EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA;
1120
1121 ///
1122 /// Boot Graphics Resource Table definition.
1123 ///
1124 typedef struct {
1125 EFI_ACPI_DESCRIPTION_HEADER Header;
1126 ///
1127 /// 2-bytes (16 bit) version ID. This value must be 1.
1128 ///
1129 UINT16 Version;
1130 ///
1131 /// 1-byte status field indicating current status about the table.
1132 /// Bits[7:3] = Reserved (must be zero)
1133 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise
1134 /// degree offset from the image's default orientation.
1135 /// [00] = 0, no offset
1136 /// [01] = 90
1137 /// [10] = 180
1138 /// [11] = 270
1139 /// Bit [0] = Displayed. A one indicates the boot image graphic is
1140 /// displayed.
1141 ///
1142 UINT8 Status;
1143 ///
1144 /// 1-byte enumerated type field indicating format of the image.
1145 /// 0 = Bitmap
1146 /// 1 - 255 Reserved (for future use)
1147 ///
1148 UINT8 ImageType;
1149 ///
1150 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1151 /// of the image bitmap.
1152 ///
1153 UINT64 ImageAddress;
1154 ///
1155 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1156 /// (X, Y) display offset of the top left corner of the boot image.
1157 /// The top left corner of the display is at offset (0, 0).
1158 ///
1159 UINT32 ImageOffsetX;
1160 ///
1161 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1162 /// (X, Y) display offset of the top left corner of the boot image.
1163 /// The top left corner of the display is at offset (0, 0).
1164 ///
1165 UINT32 ImageOffsetY;
1166 } EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE;
1167
1168 ///
1169 /// BGRT Revision
1170 ///
1171 #define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1172
1173 ///
1174 /// BGRT Version
1175 ///
1176 #define EFI_ACPI_6_4_BGRT_VERSION 0x01
1177
1178 ///
1179 /// BGRT Status
1180 ///
1181 #define EFI_ACPI_6_4_BGRT_STATUS_NOT_DISPLAYED 0x00
1182 #define EFI_ACPI_6_4_BGRT_STATUS_DISPLAYED 0x01
1183
1184 ///
1185 /// BGRT Image Type
1186 ///
1187 #define EFI_ACPI_6_4_BGRT_IMAGE_TYPE_BMP 0x00
1188
1189 ///
1190 /// FPDT Version (as defined in ACPI 6.4 spec.)
1191 ///
1192 #define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1193
1194 ///
1195 /// FPDT Performance Record Types
1196 ///
1197 #define EFI_ACPI_6_4_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1198 #define EFI_ACPI_6_4_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1199
1200 ///
1201 /// FPDT Performance Record Revision
1202 ///
1203 #define EFI_ACPI_6_4_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1204 #define EFI_ACPI_6_4_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1205
1206 ///
1207 /// FPDT Runtime Performance Record Types
1208 ///
1209 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1210 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1211 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1212
1213 ///
1214 /// FPDT Runtime Performance Record Revision
1215 ///
1216 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1217 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1218 #define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1219
1220 ///
1221 /// FPDT Performance Record header
1222 ///
1223 typedef struct {
1224 UINT16 Type;
1225 UINT8 Length;
1226 UINT8 Revision;
1227 } EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER;
1228
1229 ///
1230 /// FPDT Performance Table header
1231 ///
1232 typedef struct {
1233 UINT32 Signature;
1234 UINT32 Length;
1235 } EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER;
1236
1237 ///
1238 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1239 ///
1240 typedef struct {
1241 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;
1242 UINT32 Reserved;
1243 ///
1244 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1245 ///
1246 UINT64 BootPerformanceTablePointer;
1247 } EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1248
1249 ///
1250 /// FPDT S3 Performance Table Pointer Record Structure
1251 ///
1252 typedef struct {
1253 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;
1254 UINT32 Reserved;
1255 ///
1256 /// 64-bit processor-relative physical address of the S3 Performance Table.
1257 ///
1258 UINT64 S3PerformanceTablePointer;
1259 } EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1260
1261 ///
1262 /// FPDT Firmware Basic Boot Performance Record Structure
1263 ///
1264 typedef struct {
1265 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;
1266 UINT32 Reserved;
1267 ///
1268 /// Timer value logged at the beginning of firmware image execution.
1269 /// This may not always be zero or near zero.
1270 ///
1271 UINT64 ResetEnd;
1272 ///
1273 /// Timer value logged just prior to loading the OS boot loader into memory.
1274 /// For non-UEFI compatible boots, this field must be zero.
1275 ///
1276 UINT64 OsLoaderLoadImageStart;
1277 ///
1278 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1279 /// For non-UEFI compatible boots, the timer value logged will be just prior
1280 /// to the INT 19h handler invocation.
1281 ///
1282 UINT64 OsLoaderStartImageStart;
1283 ///
1284 /// Timer value logged at the point when the OS loader calls the
1285 /// ExitBootServices function for UEFI compatible firmware.
1286 /// For non-UEFI compatible boots, this field must be zero.
1287 ///
1288 UINT64 ExitBootServicesEntry;
1289 ///
1290 /// Timer value logged at the point just prior towhen the OS loader gaining
1291 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1292 /// For non-UEFI compatible boots, this field must be zero.
1293 ///
1294 UINT64 ExitBootServicesExit;
1295 } EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1296
1297 ///
1298 /// FPDT Firmware Basic Boot Performance Table signature
1299 ///
1300 #define EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1301
1302 //
1303 // FPDT Firmware Basic Boot Performance Table
1304 //
1305 typedef struct {
1306 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;
1307 //
1308 // one or more Performance Records.
1309 //
1310 } EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1311
1312 ///
1313 /// FPDT "S3PT" S3 Performance Table
1314 ///
1315 #define EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1316
1317 //
1318 // FPDT Firmware S3 Boot Performance Table
1319 //
1320 typedef struct {
1321 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;
1322 //
1323 // one or more Performance Records.
1324 //
1325 } EFI_ACPI_6_4_FPDT_FIRMWARE_S3_BOOT_TABLE;
1326
1327 ///
1328 /// FPDT Basic S3 Resume Performance Record
1329 ///
1330 typedef struct {
1331 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;
1332 ///
1333 /// A count of the number of S3 resume cycles since the last full boot sequence.
1334 ///
1335 UINT32 ResumeCount;
1336 ///
1337 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1338 /// OS waking vector. Only the most recent resume cycle's time is retained.
1339 ///
1340 UINT64 FullResume;
1341 ///
1342 /// Average timer value of all resume cycles logged since the last full boot
1343 /// sequence, including the most recent resume. Note that the entire log of
1344 /// timer values does not need to be retained in order to calculate this average.
1345 ///
1346 UINT64 AverageResume;
1347 } EFI_ACPI_6_4_FPDT_S3_RESUME_RECORD;
1348
1349 ///
1350 /// FPDT Basic S3 Suspend Performance Record
1351 ///
1352 typedef struct {
1353 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;
1354 ///
1355 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1356 /// Only the most recent suspend cycle's timer value is retained.
1357 ///
1358 UINT64 SuspendStart;
1359 ///
1360 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1361 /// mechanism) used to trigger hardware entry to S3.
1362 /// Only the most recent suspend cycle's timer value is retained.
1363 ///
1364 UINT64 SuspendEnd;
1365 } EFI_ACPI_6_4_FPDT_S3_SUSPEND_RECORD;
1366
1367 ///
1368 /// Firmware Performance Record Table definition.
1369 ///
1370 typedef struct {
1371 EFI_ACPI_DESCRIPTION_HEADER Header;
1372 } EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1373
1374 ///
1375 /// Generic Timer Description Table definition.
1376 ///
1377 typedef struct {
1378 EFI_ACPI_DESCRIPTION_HEADER Header;
1379 UINT64 CntControlBasePhysicalAddress;
1380 UINT32 Reserved;
1381 UINT32 SecurePL1TimerGSIV;
1382 UINT32 SecurePL1TimerFlags;
1383 UINT32 NonSecurePL1TimerGSIV;
1384 UINT32 NonSecurePL1TimerFlags;
1385 UINT32 VirtualTimerGSIV;
1386 UINT32 VirtualTimerFlags;
1387 UINT32 NonSecurePL2TimerGSIV;
1388 UINT32 NonSecurePL2TimerFlags;
1389 UINT64 CntReadBasePhysicalAddress;
1390 UINT32 PlatformTimerCount;
1391 UINT32 PlatformTimerOffset;
1392 UINT32 VirtualPL2TimerGSIV;
1393 UINT32 VirtualPL2TimerFlags;
1394 } EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE;
1395
1396 ///
1397 /// GTDT Version (as defined in ACPI 6.4 spec.)
1398 ///
1399 #define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03
1400
1401 ///
1402 /// Timer Flags. All other bits are reserved and must be 0.
1403 ///
1404 #define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1405 #define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1406 #define EFI_ACPI_6_4_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1407
1408 ///
1409 /// Platform Timer Type
1410 ///
1411 #define EFI_ACPI_6_4_GTDT_GT_BLOCK 0
1412 #define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG 1
1413
1414 ///
1415 /// GT Block Structure
1416 ///
1417 typedef struct {
1418 UINT8 Type;
1419 UINT16 Length;
1420 UINT8 Reserved;
1421 UINT64 CntCtlBase;
1422 UINT32 GTBlockTimerCount;
1423 UINT32 GTBlockTimerOffset;
1424 } EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE;
1425
1426 ///
1427 /// GT Block Timer Structure
1428 ///
1429 typedef struct {
1430 UINT8 GTFrameNumber;
1431 UINT8 Reserved[3];
1432 UINT64 CntBaseX;
1433 UINT64 CntEL0BaseX;
1434 UINT32 GTxPhysicalTimerGSIV;
1435 UINT32 GTxPhysicalTimerFlags;
1436 UINT32 GTxVirtualTimerGSIV;
1437 UINT32 GTxVirtualTimerFlags;
1438 UINT32 GTxCommonFlags;
1439 } EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1440
1441 ///
1442 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1443 ///
1444 #define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1445 #define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1446
1447 ///
1448 /// Common Flags Flags. All other bits are reserved and must be 0.
1449 ///
1450 #define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1451 #define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1452
1453 ///
1454 /// Arm Generic Watchdog Structure
1455 ///
1456 typedef struct {
1457 UINT8 Type;
1458 UINT16 Length;
1459 UINT8 Reserved;
1460 UINT64 RefreshFramePhysicalAddress;
1461 UINT64 WatchdogControlFramePhysicalAddress;
1462 UINT32 WatchdogTimerGSIV;
1463 UINT32 WatchdogTimerFlags;
1464 } EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;
1465
1466 ///
1467 /// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1468 ///
1469 #define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1470 #define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1471 #define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1472
1473 //
1474 // NVDIMM Firmware Interface Table definition.
1475 //
1476 typedef struct {
1477 EFI_ACPI_DESCRIPTION_HEADER Header;
1478 UINT32 Reserved;
1479 } EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1480
1481 //
1482 // NFIT Version (as defined in ACPI 6.4 spec.)
1483 //
1484 #define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
1485
1486 //
1487 // Definition for NFIT Table Structure Types
1488 //
1489 #define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0
1490 #define EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1
1491 #define EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE_TYPE 2
1492 #define EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3
1493 #define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4
1494 #define EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5
1495 #define EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6
1496 #define EFI_ACPI_6_4_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7
1497
1498 //
1499 // Definition for NFIT Structure Header
1500 //
1501 typedef struct {
1502 UINT16 Type;
1503 UINT16 Length;
1504 } EFI_ACPI_6_4_NFIT_STRUCTURE_HEADER;
1505
1506 //
1507 // Definition for System Physical Address Range Structure
1508 //
1509 #define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
1510 #define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
1511 #define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2
1512
1513 #define EFI_ACPI_6_4_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1514 #define EFI_ACPI_6_4_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1515 #define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1516 #define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1517 #define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1518 #define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1519 #define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1520 #define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
1521
1522 typedef struct {
1523 UINT16 Type;
1524 UINT16 Length;
1525 UINT16 SPARangeStructureIndex;
1526 UINT16 Flags;
1527 UINT32 Reserved_8;
1528 UINT32 ProximityDomain;
1529 GUID AddressRangeTypeGUID;
1530 UINT64 SystemPhysicalAddressRangeBase;
1531 UINT64 SystemPhysicalAddressRangeLength;
1532 UINT64 AddressRangeMemoryMappingAttribute;
1533 UINT64 SPALocationCookie;
1534 } EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1535
1536 //
1537 // Definition for Memory Device to System Physical Address Range Mapping Structure
1538 //
1539 typedef struct {
1540 UINT32 DIMMNumber : 4;
1541 UINT32 MemoryChannelNumber : 4;
1542 UINT32 MemoryControllerID : 4;
1543 UINT32 SocketID : 4;
1544 UINT32 NodeControllerID : 12;
1545 UINT32 Reserved_28 : 4;
1546 } EFI_ACPI_6_4_NFIT_DEVICE_HANDLE;
1547
1548 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
1549 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1
1550 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2
1551 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3
1552 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
1553 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
1554 #define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6
1555
1556 typedef struct {
1557 UINT16 Type;
1558 UINT16 Length;
1559 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1560 UINT16 NVDIMMPhysicalID;
1561 UINT16 NVDIMMRegionID;
1562 UINT16 SPARangeStructureIndex;
1563 UINT16 NVDIMMControlRegionStructureIndex;
1564 UINT64 NVDIMMRegionSize;
1565 UINT64 RegionOffset;
1566 UINT64 NVDIMMPhysicalAddressRegionBase;
1567 UINT16 InterleaveStructureIndex;
1568 UINT16 InterleaveWays;
1569 UINT16 NVDIMMStateFlags;
1570 UINT16 Reserved_46;
1571 } EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1572
1573 //
1574 // Definition for Interleave Structure
1575 //
1576 typedef struct {
1577 UINT16 Type;
1578 UINT16 Length;
1579 UINT16 InterleaveStructureIndex;
1580 UINT16 Reserved_6;
1581 UINT32 NumberOfLines;
1582 UINT32 LineSize;
1583 // UINT32 LineOffset[NumberOfLines];
1584 } EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE;
1585
1586 //
1587 // Definition for SMBIOS Management Information Structure
1588 //
1589 typedef struct {
1590 UINT16 Type;
1591 UINT16 Length;
1592 UINT32 Reserved_4;
1593 // UINT8 Data[];
1594 } EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1595
1596 //
1597 // Definition for NVDIMM Control Region Structure
1598 //
1599 #define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0
1600
1601 #define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
1602
1603 typedef struct {
1604 UINT16 Type;
1605 UINT16 Length;
1606 UINT16 NVDIMMControlRegionStructureIndex;
1607 UINT16 VendorID;
1608 UINT16 DeviceID;
1609 UINT16 RevisionID;
1610 UINT16 SubsystemVendorID;
1611 UINT16 SubsystemDeviceID;
1612 UINT16 SubsystemRevisionID;
1613 UINT8 ValidFields;
1614 UINT8 ManufacturingLocation;
1615 UINT16 ManufacturingDate;
1616 UINT8 Reserved_22[2];
1617 UINT32 SerialNumber;
1618 UINT16 RegionFormatInterfaceCode;
1619 UINT16 NumberOfBlockControlWindows;
1620 UINT64 SizeOfBlockControlWindow;
1621 UINT64 CommandRegisterOffsetInBlockControlWindow;
1622 UINT64 SizeOfCommandRegisterInBlockControlWindows;
1623 UINT64 StatusRegisterOffsetInBlockControlWindow;
1624 UINT64 SizeOfStatusRegisterInBlockControlWindows;
1625 UINT16 NVDIMMControlRegionFlag;
1626 UINT8 Reserved_74[6];
1627 } EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1628
1629 //
1630 // Definition for NVDIMM Block Data Window Region Structure
1631 //
1632 typedef struct {
1633 UINT16 Type;
1634 UINT16 Length;
1635 UINT16 NVDIMMControlRegionStructureIndex;
1636 UINT16 NumberOfBlockDataWindows;
1637 UINT64 BlockDataWindowStartOffset;
1638 UINT64 SizeOfBlockDataWindow;
1639 UINT64 BlockAccessibleMemoryCapacity;
1640 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1641 } EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1642
1643 //
1644 // Definition for Flush Hint Address Structure
1645 //
1646 typedef struct {
1647 UINT16 Type;
1648 UINT16 Length;
1649 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1650 UINT16 NumberOfFlushHintAddresses;
1651 UINT8 Reserved_10[6];
1652 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
1653 } EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1654
1655 //
1656 // Definition for Platform Capabilities Structure
1657 //
1658 typedef struct {
1659 UINT16 Type;
1660 UINT16 Length;
1661 UINT8 HighestValidCapability;
1662 UINT8 Reserved_5[3];
1663 UINT32 Capabilities;
1664 UINT8 Reserved_12[4];
1665 } EFI_ACPI_6_4_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;
1666
1667 ///
1668 /// Secure DEVices Table (SDEV)
1669 ///
1670 typedef struct {
1671 EFI_ACPI_DESCRIPTION_HEADER Header;
1672 } EFI_ACPI_6_4_SECURE_DEVICES_TABLE_HEADER;
1673
1674 ///
1675 /// SDEV Revision (as defined in ACPI 6.4 spec.)
1676 ///
1677 #define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_REVISION 0x01
1678
1679 ///
1680 /// Secure Device types
1681 ///
1682 #define EFI_ACPI_6_4_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00
1683 #define EFI_ACPI_6_4_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01
1684
1685 ///
1686 /// Secure Device flags
1687 ///
1688 #define EFI_ACPI_6_4_SDEV_FLAG_ALLOW_HANDOFF BIT0
1689 #define EFI_ACPI_6_4_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1
1690
1691 ///
1692 /// SDEV Structure Header
1693 ///
1694 typedef struct {
1695 UINT8 Type;
1696 UINT8 Flags;
1697 UINT16 Length;
1698 } EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER;
1699
1700 ///
1701 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1702 ///
1703 typedef struct {
1704 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;
1705 UINT16 DeviceIdentifierOffset;
1706 UINT16 DeviceIdentifierLength;
1707 UINT16 VendorSpecificDataOffset;
1708 UINT16 VendorSpecificDataLength;
1709 UINT16 SecureAccessComponentsOffset;
1710 UINT16 SecureAccessComponentsLength;
1711 } EFI_ACPI_6_4_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1712
1713 ///
1714 /// Secure Access Component Types
1715 ///
1716 #define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00
1717 #define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01
1718
1719 ///
1720 /// Identification Based Secure Access Component
1721 ///
1722 typedef struct {
1723 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;
1724 UINT16 HardwareIdentifierOffset;
1725 UINT16 HardwareIdentifierLength;
1726 UINT16 SubsystemIdentifierOffset;
1727 UINT16 SubsystemIdentifierLength;
1728 UINT16 HardwareRevision;
1729 UINT8 HardwareRevisionPresent;
1730 UINT8 ClassCodePresent;
1731 UINT8 PciCompatibleBaseClass;
1732 UINT8 PciCompatibleSubClass;
1733 UINT8 PciCompatibleProgrammingInterface;
1734 } EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;
1735
1736 ///
1737 /// Memory-based Secure Access Component
1738 ///
1739 typedef struct {
1740 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;
1741 UINT32 Reserved;
1742 UINT64 MemoryAddressBase;
1743 UINT64 MemoryLength;
1744 } EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;
1745
1746 ///
1747 /// PCIe Endpoint Device based Secure Device Structure
1748 ///
1749 typedef struct {
1750 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;
1751 UINT16 PciSegmentNumber;
1752 UINT16 StartBusNumber;
1753 UINT16 PciPathOffset;
1754 UINT16 PciPathLength;
1755 UINT16 VendorSpecificDataOffset;
1756 UINT16 VendorSpecificDataLength;
1757 } EFI_ACPI_6_4_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1758
1759 ///
1760 /// Boot Error Record Table (BERT)
1761 ///
1762 typedef struct {
1763 EFI_ACPI_DESCRIPTION_HEADER Header;
1764 UINT32 BootErrorRegionLength;
1765 UINT64 BootErrorRegion;
1766 } EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_HEADER;
1767
1768 ///
1769 /// BERT Version (as defined in ACPI 6.4 spec.)
1770 ///
1771 #define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1772
1773 ///
1774 /// Boot Error Region Block Status Definition
1775 ///
1776 typedef struct {
1777 UINT32 UncorrectableErrorValid : 1;
1778 UINT32 CorrectableErrorValid : 1;
1779 UINT32 MultipleUncorrectableErrors : 1;
1780 UINT32 MultipleCorrectableErrors : 1;
1781 UINT32 ErrorDataEntryCount : 10;
1782 UINT32 Reserved : 18;
1783 } EFI_ACPI_6_4_ERROR_BLOCK_STATUS;
1784
1785 ///
1786 /// Boot Error Region Definition
1787 ///
1788 typedef struct {
1789 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;
1790 UINT32 RawDataOffset;
1791 UINT32 RawDataLength;
1792 UINT32 DataLength;
1793 UINT32 ErrorSeverity;
1794 } EFI_ACPI_6_4_BOOT_ERROR_REGION_STRUCTURE;
1795
1796 //
1797 // Boot Error Severity types
1798 //
1799 #define EFI_ACPI_6_4_ERROR_SEVERITY_RECOVERABLE 0x00
1800 #define EFI_ACPI_6_4_ERROR_SEVERITY_FATAL 0x01
1801 #define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTED 0x02
1802 #define EFI_ACPI_6_4_ERROR_SEVERITY_NONE 0x03
1803 //
1804 // The term 'Correctable' is no longer being used as an error severity of the
1805 // reported error since ACPI Specification Version 5.1 Errata B.
1806 // The below macro is considered as deprecated and should no longer be used.
1807 //
1808 #define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTABLE 0x00
1809
1810 ///
1811 /// Generic Error Data Entry Definition
1812 ///
1813 typedef struct {
1814 UINT8 SectionType[16];
1815 UINT32 ErrorSeverity;
1816 UINT16 Revision;
1817 UINT8 ValidationBits;
1818 UINT8 Flags;
1819 UINT32 ErrorDataLength;
1820 UINT8 FruId[16];
1821 UINT8 FruText[20];
1822 UINT8 Timestamp[8];
1823 } EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1824
1825 ///
1826 /// Generic Error Data Entry Version (as defined in ACPI 6.4 spec.)
1827 ///
1828 #define EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300
1829
1830 ///
1831 /// HEST - Hardware Error Source Table
1832 ///
1833 typedef struct {
1834 EFI_ACPI_DESCRIPTION_HEADER Header;
1835 UINT32 ErrorSourceCount;
1836 } EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1837
1838 ///
1839 /// HEST Version (as defined in ACPI 6.4 spec.)
1840 ///
1841 #define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1842
1843 //
1844 // Error Source structure types.
1845 //
1846 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1847 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1848 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR 0x02
1849 #define EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER 0x06
1850 #define EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER 0x07
1851 #define EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER 0x08
1852 #define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR 0x09
1853 #define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A
1854 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B
1855
1856 //
1857 // Error Source structure flags.
1858 //
1859 #define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1860 #define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1861 #define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)
1862
1863 ///
1864 /// IA-32 Architecture Machine Check Exception Structure Definition
1865 ///
1866 typedef struct {
1867 UINT16 Type;
1868 UINT16 SourceId;
1869 UINT8 Reserved0[2];
1870 UINT8 Flags;
1871 UINT8 Enabled;
1872 UINT32 NumberOfRecordsToPreAllocate;
1873 UINT32 MaxSectionsPerRecord;
1874 UINT64 GlobalCapabilityInitData;
1875 UINT64 GlobalControlInitData;
1876 UINT8 NumberOfHardwareBanks;
1877 UINT8 Reserved1[7];
1878 } EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1879
1880 ///
1881 /// IA-32 Architecture Machine Check Bank Structure Definition
1882 ///
1883 typedef struct {
1884 UINT8 BankNumber;
1885 UINT8 ClearStatusOnInitialization;
1886 UINT8 StatusDataFormat;
1887 UINT8 Reserved0;
1888 UINT32 ControlRegisterMsrAddress;
1889 UINT64 ControlInitData;
1890 UINT32 StatusRegisterMsrAddress;
1891 UINT32 AddressRegisterMsrAddress;
1892 UINT32 MiscRegisterMsrAddress;
1893 } EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1894
1895 ///
1896 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1897 ///
1898 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1899 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1900 #define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1901
1902 //
1903 // Hardware Error Notification types. All other values are reserved
1904 //
1905 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1906 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1907 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1908 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1909 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1910 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
1911 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
1912 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
1913 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08
1914 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09
1915 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A
1916 #define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B
1917
1918 ///
1919 /// Hardware Error Notification Configuration Write Enable Structure Definition
1920 ///
1921 typedef struct {
1922 UINT16 Type : 1;
1923 UINT16 PollInterval : 1;
1924 UINT16 SwitchToPollingThresholdValue : 1;
1925 UINT16 SwitchToPollingThresholdWindow : 1;
1926 UINT16 ErrorThresholdValue : 1;
1927 UINT16 ErrorThresholdWindow : 1;
1928 UINT16 Reserved : 10;
1929 } EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1930
1931 ///
1932 /// Hardware Error Notification Structure Definition
1933 ///
1934 typedef struct {
1935 UINT8 Type;
1936 UINT8 Length;
1937 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1938 UINT32 PollInterval;
1939 UINT32 Vector;
1940 UINT32 SwitchToPollingThresholdValue;
1941 UINT32 SwitchToPollingThresholdWindow;
1942 UINT32 ErrorThresholdValue;
1943 UINT32 ErrorThresholdWindow;
1944 } EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1945
1946 ///
1947 /// IA-32 Architecture Corrected Machine Check Structure Definition
1948 ///
1949 typedef struct {
1950 UINT16 Type;
1951 UINT16 SourceId;
1952 UINT8 Reserved0[2];
1953 UINT8 Flags;
1954 UINT8 Enabled;
1955 UINT32 NumberOfRecordsToPreAllocate;
1956 UINT32 MaxSectionsPerRecord;
1957 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1958 UINT8 NumberOfHardwareBanks;
1959 UINT8 Reserved1[3];
1960 } EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1961
1962 ///
1963 /// IA-32 Architecture NMI Error Structure Definition
1964 ///
1965 typedef struct {
1966 UINT16 Type;
1967 UINT16 SourceId;
1968 UINT8 Reserved0[2];
1969 UINT32 NumberOfRecordsToPreAllocate;
1970 UINT32 MaxSectionsPerRecord;
1971 UINT32 MaxRawDataLength;
1972 } EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1973
1974 ///
1975 /// PCI Express Root Port AER Structure Definition
1976 ///
1977 typedef struct {
1978 UINT16 Type;
1979 UINT16 SourceId;
1980 UINT8 Reserved0[2];
1981 UINT8 Flags;
1982 UINT8 Enabled;
1983 UINT32 NumberOfRecordsToPreAllocate;
1984 UINT32 MaxSectionsPerRecord;
1985 UINT32 Bus;
1986 UINT16 Device;
1987 UINT16 Function;
1988 UINT16 DeviceControl;
1989 UINT8 Reserved1[2];
1990 UINT32 UncorrectableErrorMask;
1991 UINT32 UncorrectableErrorSeverity;
1992 UINT32 CorrectableErrorMask;
1993 UINT32 AdvancedErrorCapabilitiesAndControl;
1994 UINT32 RootErrorCommand;
1995 } EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1996
1997 ///
1998 /// PCI Express Device AER Structure Definition
1999 ///
2000 typedef struct {
2001 UINT16 Type;
2002 UINT16 SourceId;
2003 UINT8 Reserved0[2];
2004 UINT8 Flags;
2005 UINT8 Enabled;
2006 UINT32 NumberOfRecordsToPreAllocate;
2007 UINT32 MaxSectionsPerRecord;
2008 UINT32 Bus;
2009 UINT16 Device;
2010 UINT16 Function;
2011 UINT16 DeviceControl;
2012 UINT8 Reserved1[2];
2013 UINT32 UncorrectableErrorMask;
2014 UINT32 UncorrectableErrorSeverity;
2015 UINT32 CorrectableErrorMask;
2016 UINT32 AdvancedErrorCapabilitiesAndControl;
2017 } EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
2018
2019 ///
2020 /// PCI Express Bridge AER Structure Definition
2021 ///
2022 typedef struct {
2023 UINT16 Type;
2024 UINT16 SourceId;
2025 UINT8 Reserved0[2];
2026 UINT8 Flags;
2027 UINT8 Enabled;
2028 UINT32 NumberOfRecordsToPreAllocate;
2029 UINT32 MaxSectionsPerRecord;
2030 UINT32 Bus;
2031 UINT16 Device;
2032 UINT16 Function;
2033 UINT16 DeviceControl;
2034 UINT8 Reserved1[2];
2035 UINT32 UncorrectableErrorMask;
2036 UINT32 UncorrectableErrorSeverity;
2037 UINT32 CorrectableErrorMask;
2038 UINT32 AdvancedErrorCapabilitiesAndControl;
2039 UINT32 SecondaryUncorrectableErrorMask;
2040 UINT32 SecondaryUncorrectableErrorSeverity;
2041 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
2042 } EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
2043
2044 ///
2045 /// Generic Hardware Error Source Structure Definition
2046 ///
2047 typedef struct {
2048 UINT16 Type;
2049 UINT16 SourceId;
2050 UINT16 RelatedSourceId;
2051 UINT8 Flags;
2052 UINT8 Enabled;
2053 UINT32 NumberOfRecordsToPreAllocate;
2054 UINT32 MaxSectionsPerRecord;
2055 UINT32 MaxRawDataLength;
2056 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2057 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2058 UINT32 ErrorStatusBlockLength;
2059 } EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
2060
2061 ///
2062 /// Generic Hardware Error Source Version 2 Structure Definition
2063 ///
2064 typedef struct {
2065 UINT16 Type;
2066 UINT16 SourceId;
2067 UINT16 RelatedSourceId;
2068 UINT8 Flags;
2069 UINT8 Enabled;
2070 UINT32 NumberOfRecordsToPreAllocate;
2071 UINT32 MaxSectionsPerRecord;
2072 UINT32 MaxRawDataLength;
2073 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2074 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2075 UINT32 ErrorStatusBlockLength;
2076 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;
2077 UINT64 ReadAckPreserve;
2078 UINT64 ReadAckWrite;
2079 } EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
2080
2081 ///
2082 /// Generic Error Status Definition
2083 ///
2084 typedef struct {
2085 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;
2086 UINT32 RawDataOffset;
2087 UINT32 RawDataLength;
2088 UINT32 DataLength;
2089 UINT32 ErrorSeverity;
2090 } EFI_ACPI_6_4_GENERIC_ERROR_STATUS_STRUCTURE;
2091
2092 ///
2093 /// IA-32 Architecture Deferred Machine Check Structure Definition
2094 ///
2095 typedef struct {
2096 UINT16 Type;
2097 UINT16 SourceId;
2098 UINT8 Reserved0[2];
2099 UINT8 Flags;
2100 UINT8 Enabled;
2101 UINT32 NumberOfRecordsToPreAllocate;
2102 UINT32 MaxSectionsPerRecord;
2103 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2104 UINT8 NumberOfHardwareBanks;
2105 UINT8 Reserved1[3];
2106 } EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;
2107
2108 ///
2109 /// HMAT - Heterogeneous Memory Attribute Table
2110 ///
2111 typedef struct {
2112 EFI_ACPI_DESCRIPTION_HEADER Header;
2113 UINT8 Reserved[4];
2114 } EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2115
2116 ///
2117 /// HMAT Revision (as defined in ACPI 6.4 spec.)
2118 ///
2119 #define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02
2120
2121 ///
2122 /// HMAT types
2123 ///
2124 #define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00
2125 #define EFI_ACPI_6_4_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01
2126 #define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02
2127
2128 ///
2129 /// HMAT Structure Header
2130 ///
2131 typedef struct {
2132 UINT16 Type;
2133 UINT8 Reserved[2];
2134 UINT32 Length;
2135 } EFI_ACPI_6_4_HMAT_STRUCTURE_HEADER;
2136
2137 ///
2138 /// Memory Proximity Domain Attributes Structure flags
2139 ///
2140 typedef struct {
2141 UINT16 InitiatorProximityDomainValid : 1;
2142 UINT16 Reserved : 15;
2143 } EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;
2144
2145 ///
2146 /// Memory Proximity Domain Attributes Structure
2147 ///
2148 typedef struct {
2149 UINT16 Type;
2150 UINT8 Reserved[2];
2151 UINT32 Length;
2152 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;
2153 UINT8 Reserved1[2];
2154 UINT32 InitiatorProximityDomain;
2155 UINT32 MemoryProximityDomain;
2156 UINT8 Reserved2[20];
2157 } EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;
2158
2159 ///
2160 /// System Locality Latency and Bandwidth Information Structure flags
2161 ///
2162 typedef struct {
2163 UINT8 MemoryHierarchy : 4;
2164 UINT8 AccessAttributes : 2;
2165 UINT8 Reserved : 2;
2166 } EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2167
2168 ///
2169 /// System Locality Latency and Bandwidth Information Structure
2170 ///
2171 typedef struct {
2172 UINT16 Type;
2173 UINT8 Reserved[2];
2174 UINT32 Length;
2175 EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;
2176 UINT8 DataType;
2177 UINT8 MinTransferSize;
2178 UINT8 Reserved1;
2179 UINT32 NumberOfInitiatorProximityDomains;
2180 UINT32 NumberOfTargetProximityDomains;
2181 UINT8 Reserved2[4];
2182 UINT64 EntryBaseUnit;
2183 } EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2184
2185 ///
2186 /// Memory Side Cache Information Structure cache attributes
2187 ///
2188 typedef struct {
2189 UINT32 TotalCacheLevels : 4;
2190 UINT32 CacheLevel : 4;
2191 UINT32 CacheAssociativity : 4;
2192 UINT32 WritePolicy : 4;
2193 UINT32 CacheLineSize : 16;
2194 } EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2195
2196 ///
2197 /// Memory Side Cache Information Structure
2198 ///
2199 typedef struct {
2200 UINT16 Type;
2201 UINT8 Reserved[2];
2202 UINT32 Length;
2203 UINT32 MemoryProximityDomain;
2204 UINT8 Reserved1[4];
2205 UINT64 MemorySideCacheSize;
2206 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;
2207 UINT8 Reserved2[2];
2208 UINT16 NumberOfSmbiosHandles;
2209 } EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2210
2211 ///
2212 /// ERST - Error Record Serialization Table
2213 ///
2214 typedef struct {
2215 EFI_ACPI_DESCRIPTION_HEADER Header;
2216 UINT32 SerializationHeaderSize;
2217 UINT8 Reserved0[4];
2218 UINT32 InstructionEntryCount;
2219 } EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2220
2221 ///
2222 /// ERST Version (as defined in ACPI 6.4 spec.)
2223 ///
2224 #define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
2225
2226 ///
2227 /// ERST Serialization Actions
2228 ///
2229 #define EFI_ACPI_6_4_ERST_BEGIN_WRITE_OPERATION 0x00
2230 #define EFI_ACPI_6_4_ERST_BEGIN_READ_OPERATION 0x01
2231 #define EFI_ACPI_6_4_ERST_BEGIN_CLEAR_OPERATION 0x02
2232 #define EFI_ACPI_6_4_ERST_END_OPERATION 0x03
2233 #define EFI_ACPI_6_4_ERST_SET_RECORD_OFFSET 0x04
2234 #define EFI_ACPI_6_4_ERST_EXECUTE_OPERATION 0x05
2235 #define EFI_ACPI_6_4_ERST_CHECK_BUSY_STATUS 0x06
2236 #define EFI_ACPI_6_4_ERST_GET_COMMAND_STATUS 0x07
2237 #define EFI_ACPI_6_4_ERST_GET_RECORD_IDENTIFIER 0x08
2238 #define EFI_ACPI_6_4_ERST_SET_RECORD_IDENTIFIER 0x09
2239 #define EFI_ACPI_6_4_ERST_GET_RECORD_COUNT 0x0A
2240 #define EFI_ACPI_6_4_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
2241 #define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
2242 #define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
2243 #define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
2244 #define EFI_ACPI_6_4_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10
2245
2246 ///
2247 /// ERST Action Command Status
2248 ///
2249 #define EFI_ACPI_6_4_ERST_STATUS_SUCCESS 0x00
2250 #define EFI_ACPI_6_4_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
2251 #define EFI_ACPI_6_4_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
2252 #define EFI_ACPI_6_4_ERST_STATUS_FAILED 0x03
2253 #define EFI_ACPI_6_4_ERST_STATUS_RECORD_STORE_EMPTY 0x04
2254 #define EFI_ACPI_6_4_ERST_STATUS_RECORD_NOT_FOUND 0x05
2255
2256 ///
2257 /// ERST Serialization Instructions
2258 ///
2259 #define EFI_ACPI_6_4_ERST_READ_REGISTER 0x00
2260 #define EFI_ACPI_6_4_ERST_READ_REGISTER_VALUE 0x01
2261 #define EFI_ACPI_6_4_ERST_WRITE_REGISTER 0x02
2262 #define EFI_ACPI_6_4_ERST_WRITE_REGISTER_VALUE 0x03
2263 #define EFI_ACPI_6_4_ERST_NOOP 0x04
2264 #define EFI_ACPI_6_4_ERST_LOAD_VAR1 0x05
2265 #define EFI_ACPI_6_4_ERST_LOAD_VAR2 0x06
2266 #define EFI_ACPI_6_4_ERST_STORE_VAR1 0x07
2267 #define EFI_ACPI_6_4_ERST_ADD 0x08
2268 #define EFI_ACPI_6_4_ERST_SUBTRACT 0x09
2269 #define EFI_ACPI_6_4_ERST_ADD_VALUE 0x0A
2270 #define EFI_ACPI_6_4_ERST_SUBTRACT_VALUE 0x0B
2271 #define EFI_ACPI_6_4_ERST_STALL 0x0C
2272 #define EFI_ACPI_6_4_ERST_STALL_WHILE_TRUE 0x0D
2273 #define EFI_ACPI_6_4_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
2274 #define EFI_ACPI_6_4_ERST_GOTO 0x0F
2275 #define EFI_ACPI_6_4_ERST_SET_SRC_ADDRESS_BASE 0x10
2276 #define EFI_ACPI_6_4_ERST_SET_DST_ADDRESS_BASE 0x11
2277 #define EFI_ACPI_6_4_ERST_MOVE_DATA 0x12
2278
2279 ///
2280 /// ERST Instruction Flags
2281 ///
2282 #define EFI_ACPI_6_4_ERST_PRESERVE_REGISTER 0x01
2283
2284 ///
2285 /// ERST Serialization Instruction Entry
2286 ///
2287 typedef struct {
2288 UINT8 SerializationAction;
2289 UINT8 Instruction;
2290 UINT8 Flags;
2291 UINT8 Reserved0;
2292 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2293 UINT64 Value;
2294 UINT64 Mask;
2295 } EFI_ACPI_6_4_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2296
2297 ///
2298 /// EINJ - Error Injection Table
2299 ///
2300 typedef struct {
2301 EFI_ACPI_DESCRIPTION_HEADER Header;
2302 UINT32 InjectionHeaderSize;
2303 UINT8 InjectionFlags;
2304 UINT8 Reserved0[3];
2305 UINT32 InjectionEntryCount;
2306 } EFI_ACPI_6_4_ERROR_INJECTION_TABLE_HEADER;
2307
2308 ///
2309 /// EINJ Version (as defined in ACPI 6.4 spec.)
2310 ///
2311 #define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_REVISION 0x01
2312
2313 ///
2314 /// EINJ Error Injection Actions
2315 ///
2316 #define EFI_ACPI_6_4_EINJ_BEGIN_INJECTION_OPERATION 0x00
2317 #define EFI_ACPI_6_4_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
2318 #define EFI_ACPI_6_4_EINJ_SET_ERROR_TYPE 0x02
2319 #define EFI_ACPI_6_4_EINJ_GET_ERROR_TYPE 0x03
2320 #define EFI_ACPI_6_4_EINJ_END_OPERATION 0x04
2321 #define EFI_ACPI_6_4_EINJ_EXECUTE_OPERATION 0x05
2322 #define EFI_ACPI_6_4_EINJ_CHECK_BUSY_STATUS 0x06
2323 #define EFI_ACPI_6_4_EINJ_GET_COMMAND_STATUS 0x07
2324 #define EFI_ACPI_6_4_EINJ_TRIGGER_ERROR 0xFF
2325
2326 ///
2327 /// EINJ Action Command Status
2328 ///
2329 #define EFI_ACPI_6_4_EINJ_STATUS_SUCCESS 0x00
2330 #define EFI_ACPI_6_4_EINJ_STATUS_UNKNOWN_FAILURE 0x01
2331 #define EFI_ACPI_6_4_EINJ_STATUS_INVALID_ACCESS 0x02
2332
2333 ///
2334 /// EINJ Error Type Definition
2335 ///
2336 #define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
2337 #define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
2338 #define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
2339 #define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
2340 #define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
2341 #define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
2342 #define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
2343 #define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
2344 #define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
2345 #define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
2346 #define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
2347 #define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
2348
2349 ///
2350 /// EINJ Injection Instructions
2351 ///
2352 #define EFI_ACPI_6_4_EINJ_READ_REGISTER 0x00
2353 #define EFI_ACPI_6_4_EINJ_READ_REGISTER_VALUE 0x01
2354 #define EFI_ACPI_6_4_EINJ_WRITE_REGISTER 0x02
2355 #define EFI_ACPI_6_4_EINJ_WRITE_REGISTER_VALUE 0x03
2356 #define EFI_ACPI_6_4_EINJ_NOOP 0x04
2357
2358 ///
2359 /// EINJ Instruction Flags
2360 ///
2361 #define EFI_ACPI_6_4_EINJ_PRESERVE_REGISTER 0x01
2362
2363 ///
2364 /// EINJ Injection Instruction Entry
2365 ///
2366 typedef struct {
2367 UINT8 InjectionAction;
2368 UINT8 Instruction;
2369 UINT8 Flags;
2370 UINT8 Reserved0;
2371 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2372 UINT64 Value;
2373 UINT64 Mask;
2374 } EFI_ACPI_6_4_EINJ_INJECTION_INSTRUCTION_ENTRY;
2375
2376 ///
2377 /// EINJ Trigger Action Table
2378 ///
2379 typedef struct {
2380 UINT32 HeaderSize;
2381 UINT32 Revision;
2382 UINT32 TableSize;
2383 UINT32 EntryCount;
2384 } EFI_ACPI_6_4_EINJ_TRIGGER_ACTION_TABLE;
2385
2386 ///
2387 /// Platform Communications Channel Table (PCCT)
2388 ///
2389 typedef struct {
2390 EFI_ACPI_DESCRIPTION_HEADER Header;
2391 UINT32 Flags;
2392 UINT64 Reserved;
2393 } EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2394
2395 ///
2396 /// PCCT Version (as defined in ACPI 6.4 spec.)
2397 ///
2398 #define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02
2399
2400 ///
2401 /// PCCT Global Flags
2402 ///
2403 #define EFI_ACPI_6_4_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0
2404
2405 //
2406 // PCCT Subspace type
2407 //
2408 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_GENERIC 0x00
2409 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
2410 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
2411 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03
2412 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04
2413 #define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05
2414
2415 ///
2416 /// PCC Subspace Structure Header
2417 ///
2418 typedef struct {
2419 UINT8 Type;
2420 UINT8 Length;
2421 } EFI_ACPI_6_4_PCCT_SUBSPACE_HEADER;
2422
2423 ///
2424 /// Generic Communications Subspace Structure
2425 ///
2426 typedef struct {
2427 UINT8 Type;
2428 UINT8 Length;
2429 UINT8 Reserved[6];
2430 UINT64 BaseAddress;
2431 UINT64 AddressLength;
2432 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2433 UINT64 DoorbellPreserve;
2434 UINT64 DoorbellWrite;
2435 UINT32 NominalLatency;
2436 UINT32 MaximumPeriodicAccessRate;
2437 UINT16 MinimumRequestTurnaroundTime;
2438 } EFI_ACPI_6_4_PCCT_SUBSPACE_GENERIC;
2439
2440 ///
2441 /// Generic Communications Channel Shared Memory Region
2442 ///
2443
2444 typedef struct {
2445 UINT8 Command;
2446 UINT8 Reserved : 7;
2447 UINT8 NotifyOnCompletion : 1;
2448 } EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2449
2450 typedef struct {
2451 UINT8 CommandComplete : 1;
2452 UINT8 PlatformInterrupt : 1;
2453 UINT8 Error : 1;
2454 UINT8 PlatformNotification : 1;
2455 UINT8 Reserved : 4;
2456 UINT8 Reserved1;
2457 } EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2458
2459 typedef struct {
2460 UINT32 Signature;
2461 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
2462 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
2463 } EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2464
2465 #define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0
2466 #define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1
2467
2468 ///
2469 /// Type 1 HW-Reduced Communications Subspace Structure
2470 ///
2471 typedef struct {
2472 UINT8 Type;
2473 UINT8 Length;
2474 UINT32 PlatformInterrupt;
2475 UINT8 PlatformInterruptFlags;
2476 UINT8 Reserved;
2477 UINT64 BaseAddress;
2478 UINT64 AddressLength;
2479 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2480 UINT64 DoorbellPreserve;
2481 UINT64 DoorbellWrite;
2482 UINT32 NominalLatency;
2483 UINT32 MaximumPeriodicAccessRate;
2484 UINT16 MinimumRequestTurnaroundTime;
2485 } EFI_ACPI_6_4_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2486
2487 ///
2488 /// Type 2 HW-Reduced Communications Subspace Structure
2489 ///
2490 typedef struct {
2491 UINT8 Type;
2492 UINT8 Length;
2493 UINT32 PlatformInterrupt;
2494 UINT8 PlatformInterruptFlags;
2495 UINT8 Reserved;
2496 UINT64 BaseAddress;
2497 UINT64 AddressLength;
2498 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2499 UINT64 DoorbellPreserve;
2500 UINT64 DoorbellWrite;
2501 UINT32 NominalLatency;
2502 UINT32 MaximumPeriodicAccessRate;
2503 UINT16 MinimumRequestTurnaroundTime;
2504 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2505 UINT64 PlatformInterruptAckPreserve;
2506 UINT64 PlatformInterruptAckWrite;
2507 } EFI_ACPI_6_4_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2508
2509 ///
2510 /// Type 3 Extended PCC Subspace Structure
2511 ///
2512 typedef struct {
2513 UINT8 Type;
2514 UINT8 Length;
2515 UINT32 PlatformInterrupt;
2516 UINT8 PlatformInterruptFlags;
2517 UINT8 Reserved;
2518 UINT64 BaseAddress;
2519 UINT32 AddressLength;
2520 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2521 UINT64 DoorbellPreserve;
2522 UINT64 DoorbellWrite;
2523 UINT32 NominalLatency;
2524 UINT32 MaximumPeriodicAccessRate;
2525 UINT32 MinimumRequestTurnaroundTime;
2526 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2527 UINT64 PlatformInterruptAckPreserve;
2528 UINT64 PlatformInterruptAckSet;
2529 UINT8 Reserved1[8];
2530 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2531 UINT64 CommandCompleteCheckMask;
2532 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;
2533 UINT64 CommandCompleteUpdatePreserve;
2534 UINT64 CommandCompleteUpdateSet;
2535 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2536 UINT64 ErrorStatusMask;
2537 } EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC;
2538
2539 ///
2540 /// Type 4 Extended PCC Subspace Structure
2541 ///
2542 typedef EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_4_PCCT_SUBSPACE_4_EXTENDED_PCC;
2543
2544 #define EFI_ACPI_6_4_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0
2545
2546 typedef struct {
2547 UINT32 Signature;
2548 UINT32 Flags;
2549 UINT32 Length;
2550 UINT32 Command;
2551 } EFI_ACPI_6_4_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2552
2553 ///
2554 /// Type 5 HW Registers based Communications Subspace Structure
2555 ///
2556 typedef struct {
2557 UINT8 Type;
2558 UINT8 Length;
2559 UINT16 Version;
2560 UINT64 BaseAddress;
2561 UINT64 SharedMemoryRangeLength;
2562 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2563 UINT64 DoorbellPreserve;
2564 UINT64 DoorbellWrite;
2565 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2566 UINT64 CommandCompleteCheckMask;
2567 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2568 UINT64 ErrorStatusMask;
2569 UINT32 NominalLatency;
2570 UINT32 MinimumRequestTurnaroundTime;
2571 } EFI_ACPI_6_4_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;
2572
2573 ///
2574 /// Reduced PCC Subspace Shared Memory Region
2575 ///
2576 typedef struct {
2577 UINT32 Signature;
2578 // UINT8 CommunicationSubspace[];
2579 } EFI_6_4_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;
2580
2581 ///
2582 /// Platform Debug Trigger Table (PDTT)
2583 ///
2584 typedef struct {
2585 EFI_ACPI_DESCRIPTION_HEADER Header;
2586 UINT8 TriggerCount;
2587 UINT8 Reserved[3];
2588 UINT32 TriggerIdentifierArrayOffset;
2589 } EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2590
2591 ///
2592 /// PDTT Revision (as defined in ACPI 6.4 spec.)
2593 ///
2594 #define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00
2595
2596 ///
2597 /// PDTT Platform Communication Channel Identifier Structure
2598 ///
2599 typedef struct {
2600 UINT16 SubChannelIdentifer : 8;
2601 UINT16 Runtime : 1;
2602 UINT16 WaitForCompletion : 1;
2603 UINT16 TriggerOrder : 1;
2604 UINT16 Reserved : 5;
2605 } EFI_ACPI_6_4_PDTT_PCC_IDENTIFIER;
2606
2607 ///
2608 /// PCC Commands Codes used by Platform Debug Trigger Table
2609 ///
2610 #define EFI_ACPI_6_4_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00
2611 #define EFI_ACPI_6_4_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01
2612
2613 ///
2614 /// PDTT Platform Communication Channel
2615 ///
2616 typedef EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_4_PDTT_PCC;
2617
2618 ///
2619 /// Processor Properties Topology Table (PPTT)
2620 ///
2621 typedef struct {
2622 EFI_ACPI_DESCRIPTION_HEADER Header;
2623 } EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2624
2625 ///
2626 /// PPTT Revision (as defined in ACPI 6.4 spec.)
2627 ///
2628 #define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x03
2629
2630 ///
2631 /// PPTT types
2632 ///
2633 #define EFI_ACPI_6_4_PPTT_TYPE_PROCESSOR 0x00
2634 #define EFI_ACPI_6_4_PPTT_TYPE_CACHE 0x01
2635
2636 ///
2637 /// PPTT Structure Header
2638 ///
2639 typedef struct {
2640 UINT8 Type;
2641 UINT8 Length;
2642 UINT8 Reserved[2];
2643 } EFI_ACPI_6_4_PPTT_STRUCTURE_HEADER;
2644
2645 ///
2646 /// For PPTT struct processor flags
2647 ///
2648 #define EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL 0x0
2649 #define EFI_ACPI_6_4_PPTT_PACKAGE_PHYSICAL 0x1
2650 #define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID 0x0
2651 #define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID 0x1
2652 #define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD 0x0
2653 #define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_THREAD 0x1
2654 #define EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF 0x0
2655 #define EFI_ACPI_6_4_PPTT_NODE_IS_LEAF 0x1
2656 #define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0
2657 #define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL 0x1
2658
2659 ///
2660 /// Processor hierarchy node structure flags
2661 ///
2662 typedef struct {
2663 UINT32 PhysicalPackage : 1;
2664 UINT32 AcpiProcessorIdValid : 1;
2665 UINT32 ProcessorIsAThread : 1;
2666 UINT32 NodeIsALeaf : 1;
2667 UINT32 IdenticalImplementation : 1;
2668 UINT32 Reserved : 27;
2669 } EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2670
2671 ///
2672 /// Processor hierarchy node structure
2673 ///
2674 typedef struct {
2675 UINT8 Type;
2676 UINT8 Length;
2677 UINT8 Reserved[2];
2678 EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;
2679 UINT32 Parent;
2680 UINT32 AcpiProcessorId;
2681 UINT32 NumberOfPrivateResources;
2682 } EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR;
2683
2684 ///
2685 /// For PPTT struct cache flags
2686 ///
2687 #define EFI_ACPI_6_4_PPTT_CACHE_SIZE_INVALID 0x0
2688 #define EFI_ACPI_6_4_PPTT_CACHE_SIZE_VALID 0x1
2689 #define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_INVALID 0x0
2690 #define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_VALID 0x1
2691 #define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_INVALID 0x0
2692 #define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_VALID 0x1
2693 #define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_INVALID 0x0
2694 #define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_VALID 0x1
2695 #define EFI_ACPI_6_4_PPTT_CACHE_TYPE_INVALID 0x0
2696 #define EFI_ACPI_6_4_PPTT_CACHE_TYPE_VALID 0x1
2697 #define EFI_ACPI_6_4_PPTT_WRITE_POLICY_INVALID 0x0
2698 #define EFI_ACPI_6_4_PPTT_WRITE_POLICY_VALID 0x1
2699 #define EFI_ACPI_6_4_PPTT_LINE_SIZE_INVALID 0x0
2700 #define EFI_ACPI_6_4_PPTT_LINE_SIZE_VALID 0x1
2701 #define EFI_ACPI_6_4_PPTT_CACHE_ID_INVALID 0x0
2702 #define EFI_ACPI_6_4_PPTT_CACHE_ID_VALID 0x1
2703
2704 ///
2705 /// Cache Type Structure flags
2706 ///
2707 typedef struct {
2708 UINT32 SizePropertyValid : 1;
2709 UINT32 NumberOfSetsValid : 1;
2710 UINT32 AssociativityValid : 1;
2711 UINT32 AllocationTypeValid : 1;
2712 UINT32 CacheTypeValid : 1;
2713 UINT32 WritePolicyValid : 1;
2714 UINT32 LineSizeValid : 1;
2715 UINT32 CacheIdValid : 1;
2716 UINT32 Reserved : 24;
2717 } EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS;
2718
2719 ///
2720 /// For cache attributes
2721 ///
2722 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0
2723 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1
2724 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2
2725 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0
2726 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1
2727 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2
2728 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0
2729 #define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1
2730
2731 ///
2732 /// Cache Type Structure cache attributes
2733 ///
2734 typedef struct {
2735 UINT8 AllocationType : 2;
2736 UINT8 CacheType : 2;
2737 UINT8 WritePolicy : 1;
2738 UINT8 Reserved : 3;
2739 } EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2740
2741 ///
2742 /// Cache Type Structure
2743 ///
2744 typedef struct {
2745 UINT8 Type;
2746 UINT8 Length;
2747 UINT8 Reserved[2];
2748 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS Flags;
2749 UINT32 NextLevelOfCache;
2750 UINT32 Size;
2751 UINT32 NumberOfSets;
2752 UINT8 Associativity;
2753 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;
2754 UINT16 LineSize;
2755 UINT32 CacheId;
2756 } EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE;
2757
2758 ///
2759 /// Platform Health Assessment Table (PHAT) Format
2760 ///
2761 typedef struct {
2762 EFI_ACPI_DESCRIPTION_HEADER Header;
2763 // UINT8 PlatformTelemetryRecords[];
2764 } EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE;
2765
2766 #define EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01
2767
2768 ///
2769 /// PHAT Record Format
2770 ///
2771 typedef struct {
2772 UINT16 PlatformHealthAssessmentRecordType;
2773 UINT16 RecordLength;
2774 UINT8 Revision;
2775 // UINT8 Data[];
2776 } EFI_ACPI_6_4_PHAT_RECORD;
2777
2778 ///
2779 /// PHAT Record Type Format
2780 ///
2781 #define EFI_ACPI_6_4_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000
2782 #define EFI_ACPI_6_4_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001
2783
2784 ///
2785 /// PHAT Version Element
2786 ///
2787 typedef struct {
2788 GUID ComponentId;
2789 UINT64 VersionValue;
2790 UINT32 ProducerId;
2791 } EFI_ACPI_6_4_PHAT_VERSION_ELEMENT;
2792
2793 ///
2794 /// PHAT Firmware Version Data Record
2795 ///
2796 typedef struct {
2797 UINT16 PlatformRecordType;
2798 UINT16 RecordLength;
2799 UINT8 Revision;
2800 UINT8 Reserved[3];
2801 UINT32 RecordCount;
2802 // UINT8 PhatVersionElement[];
2803 } EFI_ACPI_6_4_PHAT_FIRMWARE_VERISON_DATA_RECORD;
2804
2805 #define EFI_ACPI_6_4_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01
2806
2807 ///
2808 /// Firmware Health Data Record Structure
2809 ///
2810 typedef struct {
2811 UINT16 PlatformRecordType;
2812 UINT16 RecordLength;
2813 UINT8 Revision;
2814 UINT16 Reserved;
2815 UINT8 AmHealthy;
2816 GUID DeviceSignature;
2817 UINT32 DeviceSpecificDataOffset;
2818 // UINT8 DevicePath[];
2819 // UINT8 DeviceSpecificData[];
2820 } EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;
2821
2822 #define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01
2823
2824 ///
2825 /// Firmware Health Data Record device health state
2826 ///
2827 #define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00
2828 #define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01
2829 #define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02
2830 #define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03
2831
2832 //
2833 // Known table signatures
2834 //
2835
2836 ///
2837 /// "RSD PTR " Root System Description Pointer
2838 ///
2839 #define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2840
2841 ///
2842 /// "APIC" Multiple APIC Description Table
2843 ///
2844 #define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
2845
2846 ///
2847 /// "BERT" Boot Error Record Table
2848 ///
2849 #define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
2850
2851 ///
2852 /// "BGRT" Boot Graphics Resource Table
2853 ///
2854 #define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
2855
2856 ///
2857 /// "CDIT" Component Distance Information Table
2858 ///
2859 #define EFI_ACPI_6_4_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')
2860
2861 ///
2862 /// "CPEP" Corrected Platform Error Polling Table
2863 ///
2864 #define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
2865
2866 ///
2867 /// "CRAT" Component Resource Attribute Table
2868 ///
2869 #define EFI_ACPI_6_4_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')
2870
2871 ///
2872 /// "DSDT" Differentiated System Description Table
2873 ///
2874 #define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
2875
2876 ///
2877 /// "ECDT" Embedded Controller Boot Resources Table
2878 ///
2879 #define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
2880
2881 ///
2882 /// "EINJ" Error Injection Table
2883 ///
2884 #define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
2885
2886 ///
2887 /// "ERST" Error Record Serialization Table
2888 ///
2889 #define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
2890
2891 ///
2892 /// "FACP" Fixed ACPI Description Table
2893 ///
2894 #define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
2895
2896 ///
2897 /// "FACS" Firmware ACPI Control Structure
2898 ///
2899 #define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
2900
2901 ///
2902 /// "FPDT" Firmware Performance Data Table
2903 ///
2904 #define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
2905
2906 ///
2907 /// "GTDT" Generic Timer Description Table
2908 ///
2909 #define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
2910
2911 ///
2912 /// "HEST" Hardware Error Source Table
2913 ///
2914 #define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
2915
2916 ///
2917 /// "HMAT" Heterogeneous Memory Attribute Table
2918 ///
2919 #define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')
2920
2921 ///
2922 /// "MPST" Memory Power State Table
2923 ///
2924 #define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
2925
2926 ///
2927 /// "MSCT" Maximum System Characteristics Table
2928 ///
2929 #define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
2930
2931 ///
2932 /// "NFIT" NVDIMM Firmware Interface Table
2933 ///
2934 #define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')
2935
2936 ///
2937 /// "PDTT" Platform Debug Trigger Table
2938 ///
2939 #define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')
2940
2941 ///
2942 /// "PMTT" Platform Memory Topology Table
2943 ///
2944 #define EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
2945
2946 ///
2947 /// "PPTT" Processor Properties Topology Table
2948 ///
2949 #define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
2950
2951 ///
2952 /// "PSDT" Persistent System Description Table
2953 ///
2954 #define EFI_ACPI_6_4_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
2955
2956 ///
2957 /// "RASF" ACPI RAS Feature Table
2958 ///
2959 #define EFI_ACPI_6_4_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
2960
2961 ///
2962 /// "RSDT" Root System Description Table
2963 ///
2964 #define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
2965
2966 ///
2967 /// "SBST" Smart Battery Specification Table
2968 ///
2969 #define EFI_ACPI_6_4_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2970
2971 ///
2972 /// "SDEV" Secure DEVices Table
2973 ///
2974 #define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')
2975
2976 ///
2977 /// "SLIT" System Locality Information Table
2978 ///
2979 #define EFI_ACPI_6_4_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2980
2981 ///
2982 /// "SRAT" System Resource Affinity Table
2983 ///
2984 #define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2985
2986 ///
2987 /// "SSDT" Secondary System Description Table
2988 ///
2989 #define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
2990
2991 ///
2992 /// "XSDT" Extended System Description Table
2993 ///
2994 #define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
2995
2996 ///
2997 /// "BOOT" MS Simple Boot Spec
2998 ///
2999 #define EFI_ACPI_6_4_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
3000
3001 ///
3002 /// "CSRT" MS Core System Resource Table
3003 ///
3004 #define EFI_ACPI_6_4_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
3005
3006 ///
3007 /// "DBG2" MS Debug Port 2 Spec
3008 ///
3009 #define EFI_ACPI_6_4_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
3010
3011 ///
3012 /// "DBGP" MS Debug Port Spec
3013 ///
3014 #define EFI_ACPI_6_4_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
3015
3016 ///
3017 /// "DMAR" DMA Remapping Table
3018 ///
3019 #define EFI_ACPI_6_4_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
3020
3021 ///
3022 /// "DRTM" Dynamic Root of Trust for Measurement Table
3023 ///
3024 #define EFI_ACPI_6_4_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
3025
3026 ///
3027 /// "ETDT" Event Timer Description Table
3028 ///
3029 #define EFI_ACPI_6_4_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
3030
3031 ///
3032 /// "HPET" IA-PC High Precision Event Timer Table
3033 ///
3034 #define EFI_ACPI_6_4_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
3035
3036 ///
3037 /// "iBFT" iSCSI Boot Firmware Table
3038 ///
3039 #define EFI_ACPI_6_4_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
3040
3041 ///
3042 /// "IORT" I/O Remapping Table
3043 ///
3044 #define EFI_ACPI_6_4_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')
3045
3046 ///
3047 /// "IVRS" I/O Virtualization Reporting Structure
3048 ///
3049 #define EFI_ACPI_6_4_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
3050
3051 ///
3052 /// "LPIT" Low Power Idle Table
3053 ///
3054 #define EFI_ACPI_6_4_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
3055
3056 ///
3057 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
3058 ///
3059 #define EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
3060
3061 ///
3062 /// "MCHI" Management Controller Host Interface Table
3063 ///
3064 #define EFI_ACPI_6_4_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
3065
3066 ///
3067 /// "MSDM" MS Data Management Table
3068 ///
3069 #define EFI_ACPI_6_4_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
3070
3071 ///
3072 /// "PCCT" Platform Communications Channel Table
3073 ///
3074 #define EFI_ACPI_6_4_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
3075
3076 ///
3077 /// "PHAT" Platform Health Assessment Table
3078 ///
3079 #define EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')
3080
3081 ///
3082 /// "SDEI" Software Delegated Exceptions Interface Table
3083 ///
3084 #define EFI_ACPI_6_4_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
3085
3086 ///
3087 /// "SLIC" MS Software Licensing Table Specification
3088 ///
3089 #define EFI_ACPI_6_4_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
3090
3091 ///
3092 /// "SPCR" Serial Port Concole Redirection Table
3093 ///
3094 #define EFI_ACPI_6_4_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
3095
3096 ///
3097 /// "SPMI" Server Platform Management Interface Table
3098 ///
3099 #define EFI_ACPI_6_4_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
3100
3101 ///
3102 /// "STAO" _STA Override Table
3103 ///
3104 #define EFI_ACPI_6_4_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')
3105
3106 ///
3107 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
3108 ///
3109 #define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
3110
3111 ///
3112 /// "TPM2" Trusted Computing Platform 1 Table
3113 ///
3114 #define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
3115
3116 ///
3117 /// "UEFI" UEFI ACPI Data Table
3118 ///
3119 #define EFI_ACPI_6_4_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
3120
3121 ///
3122 /// "WAET" Windows ACPI Emulated Devices Table
3123 ///
3124 #define EFI_ACPI_6_4_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
3125
3126 ///
3127 /// "WDAT" Watchdog Action Table
3128 ///
3129 #define EFI_ACPI_6_4_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
3130
3131 ///
3132 /// "WDRT" Watchdog Resource Table
3133 ///
3134 #define EFI_ACPI_6_4_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
3135
3136 ///
3137 /// "WPBT" MS Platform Binary Table
3138 ///
3139 #define EFI_ACPI_6_4_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
3140
3141 ///
3142 /// "WSMT" Windows SMM Security Mitigation Table
3143 ///
3144 #define EFI_ACPI_6_4_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')
3145
3146 ///
3147 /// "XENV" Xen Project Table
3148 ///
3149 #define EFI_ACPI_6_4_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')
3150
3151 #pragma pack()
3152
3153 #endif