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1 /** @file
2 ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022.
3
4 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>
6 Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.<BR>
7
8 SPDX-License-Identifier: BSD-2-Clause-Patent
9 **/
10
11 #ifndef ACPI_6_5_H_
12 #define ACPI_6_5_H_
13
14 #include <IndustryStandard/Acpi64.h>
15
16 //
17 // Ensure proper structure formats
18 //
19 #pragma pack(1)
20
21 ///
22 /// ACPI 6.5 Generic Address Space definition
23 ///
24 typedef struct {
25 UINT8 AddressSpaceId;
26 UINT8 RegisterBitWidth;
27 UINT8 RegisterBitOffset;
28 UINT8 AccessSize;
29 UINT64 Address;
30 } EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE;
31
32 //
33 // Generic Address Space Address IDs
34 //
35 #define EFI_ACPI_6_5_SYSTEM_MEMORY 0x00
36 #define EFI_ACPI_6_5_SYSTEM_IO 0x01
37 #define EFI_ACPI_6_5_PCI_CONFIGURATION_SPACE 0x02
38 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER 0x03
39 #define EFI_ACPI_6_5_SMBUS 0x04
40 #define EFI_ACPI_6_5_SYSTEM_CMOS 0x05
41 #define EFI_ACPI_6_5_PCI_BAR_TARGET 0x06
42 #define EFI_ACPI_6_5_IPMI 0x07
43 #define EFI_ACPI_6_5_GENERAL_PURPOSE_IO 0x08
44 #define EFI_ACPI_6_5_GENERIC_SERIAL_BUS 0x09
45 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL 0x0A
46 #define EFI_ACPI_6_5_FUNCTIONAL_FIXED_HARDWARE 0x7F
47
48 //
49 // Generic Address Space Access Sizes
50 //
51 #define EFI_ACPI_6_5_UNDEFINED 0
52 #define EFI_ACPI_6_5_BYTE 1
53 #define EFI_ACPI_6_5_WORD 2
54 #define EFI_ACPI_6_5_DWORD 3
55 #define EFI_ACPI_6_5_QWORD 4
56
57 //
58 // ACPI 6.5 table structures
59 //
60
61 ///
62 /// Root System Description Pointer Structure
63 ///
64 typedef struct {
65 UINT64 Signature;
66 UINT8 Checksum;
67 UINT8 OemId[6];
68 UINT8 Revision;
69 UINT32 RsdtAddress;
70 UINT32 Length;
71 UINT64 XsdtAddress;
72 UINT8 ExtendedChecksum;
73 UINT8 Reserved[3];
74 } EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER;
75
76 ///
77 /// RSD_PTR Revision (as defined in ACPI 6.5 spec.)
78 ///
79 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.5) says current value is 2
80
81 ///
82 /// Common table header, this prefaces all ACPI tables, including FACS, but
83 /// excluding the RSD PTR structure
84 ///
85 typedef struct {
86 UINT32 Signature;
87 UINT32 Length;
88 } EFI_ACPI_6_5_COMMON_HEADER;
89
90 //
91 // Root System Description Table
92 // No definition needed as it is a common description table header, the same with
93 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
94 //
95
96 ///
97 /// RSDT Revision (as defined in ACPI 6.5 spec.)
98 ///
99 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
100
101 //
102 // Extended System Description Table
103 // No definition needed as it is a common description table header, the same with
104 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
105 //
106
107 ///
108 /// XSDT Revision (as defined in ACPI 6.5 spec.)
109 ///
110 #define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
111
112 ///
113 /// Fixed ACPI Description Table Structure (FADT)
114 ///
115 typedef struct {
116 EFI_ACPI_DESCRIPTION_HEADER Header;
117 UINT32 FirmwareCtrl;
118 UINT32 Dsdt;
119 UINT8 Reserved0;
120 UINT8 PreferredPmProfile;
121 UINT16 SciInt;
122 UINT32 SmiCmd;
123 UINT8 AcpiEnable;
124 UINT8 AcpiDisable;
125 UINT8 S4BiosReq;
126 UINT8 PstateCnt;
127 UINT32 Pm1aEvtBlk;
128 UINT32 Pm1bEvtBlk;
129 UINT32 Pm1aCntBlk;
130 UINT32 Pm1bCntBlk;
131 UINT32 Pm2CntBlk;
132 UINT32 PmTmrBlk;
133 UINT32 Gpe0Blk;
134 UINT32 Gpe1Blk;
135 UINT8 Pm1EvtLen;
136 UINT8 Pm1CntLen;
137 UINT8 Pm2CntLen;
138 UINT8 PmTmrLen;
139 UINT8 Gpe0BlkLen;
140 UINT8 Gpe1BlkLen;
141 UINT8 Gpe1Base;
142 UINT8 CstCnt;
143 UINT16 PLvl2Lat;
144 UINT16 PLvl3Lat;
145 UINT16 FlushSize;
146 UINT16 FlushStride;
147 UINT8 DutyOffset;
148 UINT8 DutyWidth;
149 UINT8 DayAlrm;
150 UINT8 MonAlrm;
151 UINT8 Century;
152 UINT16 IaPcBootArch;
153 UINT8 Reserved1;
154 UINT32 Flags;
155 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ResetReg;
156 UINT8 ResetValue;
157 UINT16 ArmBootArch;
158 UINT8 MinorVersion;
159 UINT64 XFirmwareCtrl;
160 UINT64 XDsdt;
161 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
162 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
163 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
164 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
165 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
166 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
167 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
168 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
169 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
170 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
171 UINT64 HypervisorVendorIdentity;
172 } EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE;
173
174 ///
175 /// FADT Version (as defined in ACPI 6.5 spec.)
176 ///
177 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06
178 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x05
179
180 //
181 // Fixed ACPI Description Table Preferred Power Management Profile
182 //
183 #define EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED 0
184 #define EFI_ACPI_6_5_PM_PROFILE_DESKTOP 1
185 #define EFI_ACPI_6_5_PM_PROFILE_MOBILE 2
186 #define EFI_ACPI_6_5_PM_PROFILE_WORKSTATION 3
187 #define EFI_ACPI_6_5_PM_PROFILE_ENTERPRISE_SERVER 4
188 #define EFI_ACPI_6_5_PM_PROFILE_SOHO_SERVER 5
189 #define EFI_ACPI_6_5_PM_PROFILE_APPLIANCE_PC 6
190 #define EFI_ACPI_6_5_PM_PROFILE_PERFORMANCE_SERVER 7
191 #define EFI_ACPI_6_5_PM_PROFILE_TABLET 8
192
193 //
194 // Fixed ACPI Description Table Boot Architecture Flags
195 // All other bits are reserved and must be set to 0.
196 //
197 #define EFI_ACPI_6_5_LEGACY_DEVICES BIT0
198 #define EFI_ACPI_6_5_8042 BIT1
199 #define EFI_ACPI_6_5_VGA_NOT_PRESENT BIT2
200 #define EFI_ACPI_6_5_MSI_NOT_SUPPORTED BIT3
201 #define EFI_ACPI_6_5_PCIE_ASPM_CONTROLS BIT4
202 #define EFI_ACPI_6_5_CMOS_RTC_NOT_PRESENT BIT5
203
204 //
205 // Fixed ACPI Description Table Arm Boot Architecture Flags
206 // All other bits are reserved and must be set to 0.
207 //
208 #define EFI_ACPI_6_5_ARM_PSCI_COMPLIANT BIT0
209 #define EFI_ACPI_6_5_ARM_PSCI_USE_HVC BIT1
210
211 //
212 // Fixed ACPI Description Table Fixed Feature Flags
213 // All other bits are reserved and must be set to 0.
214 //
215 #define EFI_ACPI_6_5_WBINVD BIT0
216 #define EFI_ACPI_6_5_WBINVD_FLUSH BIT1
217 #define EFI_ACPI_6_5_PROC_C1 BIT2
218 #define EFI_ACPI_6_5_P_LVL2_UP BIT3
219 #define EFI_ACPI_6_5_PWR_BUTTON BIT4
220 #define EFI_ACPI_6_5_SLP_BUTTON BIT5
221 #define EFI_ACPI_6_5_FIX_RTC BIT6
222 #define EFI_ACPI_6_5_RTC_S4 BIT7
223 #define EFI_ACPI_6_5_TMR_VAL_EXT BIT8
224 #define EFI_ACPI_6_5_DCK_CAP BIT9
225 #define EFI_ACPI_6_5_RESET_REG_SUP BIT10
226 #define EFI_ACPI_6_5_SEALED_CASE BIT11
227 #define EFI_ACPI_6_5_HEADLESS BIT12
228 #define EFI_ACPI_6_5_CPU_SW_SLP BIT13
229 #define EFI_ACPI_6_5_PCI_EXP_WAK BIT14
230 #define EFI_ACPI_6_5_USE_PLATFORM_CLOCK BIT15
231 #define EFI_ACPI_6_5_S4_RTC_STS_VALID BIT16
232 #define EFI_ACPI_6_5_REMOTE_POWER_ON_CAPABLE BIT17
233 #define EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL BIT18
234 #define EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
235 #define EFI_ACPI_6_5_HW_REDUCED_ACPI BIT20
236 #define EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE BIT21
237
238 ///
239 /// Firmware ACPI Control Structure
240 ///
241 typedef struct {
242 UINT32 Signature;
243 UINT32 Length;
244 UINT32 HardwareSignature;
245 UINT32 FirmwareWakingVector;
246 UINT32 GlobalLock;
247 UINT32 Flags;
248 UINT64 XFirmwareWakingVector;
249 UINT8 Version;
250 UINT8 Reserved0[3];
251 UINT32 OspmFlags;
252 UINT8 Reserved1[24];
253 } EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE;
254
255 ///
256 /// FACS Version (as defined in ACPI 6.5 spec.)
257 ///
258 #define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
259
260 ///
261 /// Firmware Control Structure Feature Flags
262 /// All other bits are reserved and must be set to 0.
263 ///
264 #define EFI_ACPI_6_5_S4BIOS_F BIT0
265 #define EFI_ACPI_6_5_64BIT_WAKE_SUPPORTED_F BIT1
266
267 ///
268 /// OSPM Enabled Firmware Control Structure Flags
269 /// All other bits are reserved and must be set to 0.
270 ///
271 #define EFI_ACPI_6_5_OSPM_64BIT_WAKE_F BIT0
272
273 //
274 // Differentiated System Description Table,
275 // Secondary System Description Table
276 // and Persistent System Description Table,
277 // no definition needed as they are common description table header, the same with
278 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
279 //
280 #define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
281 #define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
282
283 ///
284 /// Multiple APIC Description Table header definition. The rest of the table
285 /// must be defined in a platform specific manner.
286 ///
287 typedef struct {
288 EFI_ACPI_DESCRIPTION_HEADER Header;
289 UINT32 LocalApicAddress;
290 UINT32 Flags;
291 } EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
292
293 ///
294 /// MADT Revision (as defined in ACPI 6.5 spec.)
295 ///
296 #define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05
297
298 ///
299 /// Multiple APIC Flags
300 /// All other bits are reserved and must be set to 0.
301 ///
302 #define EFI_ACPI_6_5_PCAT_COMPAT BIT0
303
304 //
305 // Multiple APIC Description Table APIC structure types
306 // All other values between 0x10 and 0x7F are reserved and
307 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
308 //
309 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC 0x00
310 #define EFI_ACPI_6_5_IO_APIC 0x01
311 #define EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE 0x02
312 #define EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE 0x03
313 #define EFI_ACPI_6_5_LOCAL_APIC_NMI 0x04
314 #define EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
315 #define EFI_ACPI_6_5_IO_SAPIC 0x06
316 #define EFI_ACPI_6_5_LOCAL_SAPIC 0x07
317 #define EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES 0x08
318 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC 0x09
319 #define EFI_ACPI_6_5_LOCAL_X2APIC_NMI 0x0A
320 #define EFI_ACPI_6_5_GIC 0x0B
321 #define EFI_ACPI_6_5_GICD 0x0C
322 #define EFI_ACPI_6_5_GIC_MSI_FRAME 0x0D
323 #define EFI_ACPI_6_5_GICR 0x0E
324 #define EFI_ACPI_6_5_GIC_ITS 0x0F
325 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP 0x10
326
327 //
328 // APIC Structure Definitions
329 //
330
331 ///
332 /// Processor Local APIC Structure Definition
333 ///
334 typedef struct {
335 UINT8 Type;
336 UINT8 Length;
337 UINT8 AcpiProcessorUid;
338 UINT8 ApicId;
339 UINT32 Flags;
340 } EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_STRUCTURE;
341
342 ///
343 /// Local APIC Flags. All other bits are reserved and must be 0.
344 ///
345 #define EFI_ACPI_6_5_LOCAL_APIC_ENABLED BIT0
346 #define EFI_ACPI_6_5_LOCAL_APIC_ONLINE_CAPABLE BIT1
347
348 ///
349 /// IO APIC Structure
350 ///
351 typedef struct {
352 UINT8 Type;
353 UINT8 Length;
354 UINT8 IoApicId;
355 UINT8 Reserved;
356 UINT32 IoApicAddress;
357 UINT32 GlobalSystemInterruptBase;
358 } EFI_ACPI_6_5_IO_APIC_STRUCTURE;
359
360 ///
361 /// Interrupt Source Override Structure
362 ///
363 typedef struct {
364 UINT8 Type;
365 UINT8 Length;
366 UINT8 Bus;
367 UINT8 Source;
368 UINT32 GlobalSystemInterrupt;
369 UINT16 Flags;
370 } EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
371
372 ///
373 /// Platform Interrupt Sources Structure Definition
374 ///
375 typedef struct {
376 UINT8 Type;
377 UINT8 Length;
378 UINT16 Flags;
379 UINT8 InterruptType;
380 UINT8 ProcessorId;
381 UINT8 ProcessorEid;
382 UINT8 IoSapicVector;
383 UINT32 GlobalSystemInterrupt;
384 UINT32 PlatformInterruptSourceFlags;
385 UINT8 CpeiProcessorOverride;
386 UINT8 Reserved[31];
387 } EFI_ACPI_6_5_PLATFORM_INTERRUPT_APIC_STRUCTURE;
388
389 //
390 // MPS INTI flags.
391 // All other bits are reserved and must be set to 0.
392 //
393 #define EFI_ACPI_6_5_POLARITY (3 << 0)
394 #define EFI_ACPI_6_5_TRIGGER_MODE (3 << 2)
395
396 ///
397 /// Non-Maskable Interrupt Source Structure
398 ///
399 typedef struct {
400 UINT8 Type;
401 UINT8 Length;
402 UINT16 Flags;
403 UINT32 GlobalSystemInterrupt;
404 } EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
405
406 ///
407 /// Local APIC NMI Structure
408 ///
409 typedef struct {
410 UINT8 Type;
411 UINT8 Length;
412 UINT8 AcpiProcessorUid;
413 UINT16 Flags;
414 UINT8 LocalApicLint;
415 } EFI_ACPI_6_5_LOCAL_APIC_NMI_STRUCTURE;
416
417 ///
418 /// Local APIC Address Override Structure
419 ///
420 typedef struct {
421 UINT8 Type;
422 UINT8 Length;
423 UINT16 Reserved;
424 UINT64 LocalApicAddress;
425 } EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
426
427 ///
428 /// IO SAPIC Structure
429 ///
430 typedef struct {
431 UINT8 Type;
432 UINT8 Length;
433 UINT8 IoApicId;
434 UINT8 Reserved;
435 UINT32 GlobalSystemInterruptBase;
436 UINT64 IoSapicAddress;
437 } EFI_ACPI_6_5_IO_SAPIC_STRUCTURE;
438
439 ///
440 /// Local SAPIC Structure
441 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
442 ///
443 typedef struct {
444 UINT8 Type;
445 UINT8 Length;
446 UINT8 AcpiProcessorId;
447 UINT8 LocalSapicId;
448 UINT8 LocalSapicEid;
449 UINT8 Reserved[3];
450 UINT32 Flags;
451 UINT32 ACPIProcessorUIDValue;
452 } EFI_ACPI_6_5_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
453
454 ///
455 /// Platform Interrupt Sources Structure
456 ///
457 typedef struct {
458 UINT8 Type;
459 UINT8 Length;
460 UINT16 Flags;
461 UINT8 InterruptType;
462 UINT8 ProcessorId;
463 UINT8 ProcessorEid;
464 UINT8 IoSapicVector;
465 UINT32 GlobalSystemInterrupt;
466 UINT32 PlatformInterruptSourceFlags;
467 } EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
468
469 ///
470 /// Platform Interrupt Source Flags.
471 /// All other bits are reserved and must be set to 0.
472 ///
473 #define EFI_ACPI_6_5_CPEI_PROCESSOR_OVERRIDE BIT0
474
475 ///
476 /// Processor Local x2APIC Structure Definition
477 ///
478 typedef struct {
479 UINT8 Type;
480 UINT8 Length;
481 UINT8 Reserved[2];
482 UINT32 X2ApicId;
483 UINT32 Flags;
484 UINT32 AcpiProcessorUid;
485 } EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
486
487 ///
488 /// Local x2APIC NMI Structure
489 ///
490 typedef struct {
491 UINT8 Type;
492 UINT8 Length;
493 UINT16 Flags;
494 UINT32 AcpiProcessorUid;
495 UINT8 LocalX2ApicLint;
496 UINT8 Reserved[3];
497 } EFI_ACPI_6_5_LOCAL_X2APIC_NMI_STRUCTURE;
498
499 ///
500 /// GIC Structure
501 ///
502 typedef struct {
503 UINT8 Type;
504 UINT8 Length;
505 UINT16 Reserved;
506 UINT32 CPUInterfaceNumber;
507 UINT32 AcpiProcessorUid;
508 UINT32 Flags;
509 UINT32 ParkingProtocolVersion;
510 UINT32 PerformanceInterruptGsiv;
511 UINT64 ParkedAddress;
512 UINT64 PhysicalBaseAddress;
513 UINT64 GICV;
514 UINT64 GICH;
515 UINT32 VGICMaintenanceInterrupt;
516 UINT64 GICRBaseAddress;
517 UINT64 MPIDR;
518 UINT8 ProcessorPowerEfficiencyClass;
519 UINT8 Reserved2;
520 UINT16 SpeOverflowInterrupt;
521 } EFI_ACPI_6_5_GIC_STRUCTURE;
522
523 ///
524 /// GIC Flags. All other bits are reserved and must be 0.
525 ///
526 #define EFI_ACPI_6_5_GIC_ENABLED BIT0
527 #define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL BIT1
528 #define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
529
530 ///
531 /// GIC Distributor Structure
532 ///
533 typedef struct {
534 UINT8 Type;
535 UINT8 Length;
536 UINT16 Reserved1;
537 UINT32 GicId;
538 UINT64 PhysicalBaseAddress;
539 UINT32 SystemVectorBase;
540 UINT8 GicVersion;
541 UINT8 Reserved2[3];
542 } EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE;
543
544 ///
545 /// GIC Version
546 ///
547 #define EFI_ACPI_6_5_GIC_V1 0x01
548 #define EFI_ACPI_6_5_GIC_V2 0x02
549 #define EFI_ACPI_6_5_GIC_V3 0x03
550 #define EFI_ACPI_6_5_GIC_V4 0x04
551
552 ///
553 /// GIC MSI Frame Structure
554 ///
555 typedef struct {
556 UINT8 Type;
557 UINT8 Length;
558 UINT16 Reserved1;
559 UINT32 GicMsiFrameId;
560 UINT64 PhysicalBaseAddress;
561 UINT32 Flags;
562 UINT16 SPICount;
563 UINT16 SPIBase;
564 } EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE;
565
566 ///
567 /// GIC MSI Frame Flags. All other bits are reserved and must be 0.
568 ///
569 #define EFI_ACPI_6_5_SPI_COUNT_BASE_SELECT BIT0
570
571 ///
572 /// GICR Structure
573 ///
574 typedef struct {
575 UINT8 Type;
576 UINT8 Length;
577 UINT16 Reserved;
578 UINT64 DiscoveryRangeBaseAddress;
579 UINT32 DiscoveryRangeLength;
580 } EFI_ACPI_6_5_GICR_STRUCTURE;
581
582 ///
583 /// GIC Interrupt Translation Service Structure
584 ///
585 typedef struct {
586 UINT8 Type;
587 UINT8 Length;
588 UINT16 Reserved;
589 UINT32 GicItsId;
590 UINT64 PhysicalBaseAddress;
591 UINT32 Reserved2;
592 } EFI_ACPI_6_5_GIC_ITS_STRUCTURE;
593
594 ///
595 /// Multiprocessor Wakeup Structure
596 ///
597 typedef struct {
598 UINT8 Type;
599 UINT8 Length;
600 UINT16 MailBoxVersion;
601 UINT32 Reserved;
602 UINT64 MailBoxAddress;
603 } EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_STRUCTURE;
604
605 ///
606 /// Multiprocessor Wakeup Mailbox Structure
607 ///
608 typedef struct {
609 UINT16 Command;
610 UINT16 Reserved;
611 UINT32 AcpiId;
612 UINT64 WakeupVector;
613 UINT8 ReservedForOs[2032];
614 UINT8 ReservedForFirmware[2048];
615 } EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;
616
617 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000
618 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001
619
620 ///
621 /// Smart Battery Description Table (SBST)
622 ///
623 typedef struct {
624 EFI_ACPI_DESCRIPTION_HEADER Header;
625 UINT32 WarningEnergyLevel;
626 UINT32 LowEnergyLevel;
627 UINT32 CriticalEnergyLevel;
628 } EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE;
629
630 ///
631 /// SBST Version (as defined in ACPI 6.5 spec.)
632 ///
633 #define EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
634
635 ///
636 /// Embedded Controller Boot Resources Table (ECDT)
637 /// The table is followed by a null terminated ASCII string that contains
638 /// a fully qualified reference to the name space object.
639 ///
640 typedef struct {
641 EFI_ACPI_DESCRIPTION_HEADER Header;
642 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcControl;
643 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcData;
644 UINT32 Uid;
645 UINT8 GpeBit;
646 } EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
647
648 ///
649 /// ECDT Version (as defined in ACPI 6.5 spec.)
650 ///
651 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
652
653 ///
654 /// System Resource Affinity Table (SRAT). The rest of the table
655 /// must be defined in a platform specific manner.
656 ///
657 typedef struct {
658 EFI_ACPI_DESCRIPTION_HEADER Header;
659 UINT32 Reserved1; ///< Must be set to 1
660 UINT64 Reserved2;
661 } EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
662
663 ///
664 /// SRAT Version (as defined in ACPI 6.5 spec.)
665 ///
666 #define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
667
668 //
669 // SRAT structure types.
670 // All other values between 0x06 an 0xFF are reserved and
671 // will be ignored by OSPM.
672 //
673 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
674 #define EFI_ACPI_6_5_MEMORY_AFFINITY 0x01
675 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
676 #define EFI_ACPI_6_5_GICC_AFFINITY 0x03
677 #define EFI_ACPI_6_5_GIC_ITS_AFFINITY 0x04
678 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY 0x05
679
680 ///
681 /// Processor Local APIC/SAPIC Affinity Structure Definition
682 ///
683 typedef struct {
684 UINT8 Type;
685 UINT8 Length;
686 UINT8 ProximityDomain7To0;
687 UINT8 ApicId;
688 UINT32 Flags;
689 UINT8 LocalSapicEid;
690 UINT8 ProximityDomain31To8[3];
691 UINT32 ClockDomain;
692 } EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
693
694 ///
695 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
696 ///
697 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
698
699 ///
700 /// Memory Affinity Structure Definition
701 ///
702 typedef struct {
703 UINT8 Type;
704 UINT8 Length;
705 UINT32 ProximityDomain;
706 UINT16 Reserved1;
707 UINT32 AddressBaseLow;
708 UINT32 AddressBaseHigh;
709 UINT32 LengthLow;
710 UINT32 LengthHigh;
711 UINT32 Reserved2;
712 UINT32 Flags;
713 UINT64 Reserved3;
714 } EFI_ACPI_6_5_MEMORY_AFFINITY_STRUCTURE;
715
716 //
717 // Memory Flags. All other bits are reserved and must be 0.
718 //
719 #define EFI_ACPI_6_5_MEMORY_ENABLED (1 << 0)
720 #define EFI_ACPI_6_5_MEMORY_HOT_PLUGGABLE (1 << 1)
721 #define EFI_ACPI_6_5_MEMORY_NONVOLATILE (1 << 2)
722
723 ///
724 /// Processor Local x2APIC Affinity Structure Definition
725 ///
726 typedef struct {
727 UINT8 Type;
728 UINT8 Length;
729 UINT8 Reserved1[2];
730 UINT32 ProximityDomain;
731 UINT32 X2ApicId;
732 UINT32 Flags;
733 UINT32 ClockDomain;
734 UINT8 Reserved2[4];
735 } EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
736
737 ///
738 /// GICC Affinity Structure Definition
739 ///
740 typedef struct {
741 UINT8 Type;
742 UINT8 Length;
743 UINT32 ProximityDomain;
744 UINT32 AcpiProcessorUid;
745 UINT32 Flags;
746 UINT32 ClockDomain;
747 } EFI_ACPI_6_5_GICC_AFFINITY_STRUCTURE;
748
749 ///
750 /// GICC Flags. All other bits are reserved and must be 0.
751 ///
752 #define EFI_ACPI_6_5_GICC_ENABLED (1 << 0)
753
754 ///
755 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
756 ///
757 typedef struct {
758 UINT8 Type;
759 UINT8 Length;
760 UINT32 ProximityDomain;
761 UINT8 Reserved[2];
762 UINT32 ItsId;
763 } EFI_ACPI_6_5_GIC_ITS_AFFINITY_STRUCTURE;
764
765 //
766 // Generic Initiator Affinity Structure Device Handle Types
767 // All other values between 0x02 an 0xFF are reserved and
768 // will be ignored by OSPM.
769 //
770 #define EFI_ACPI_6_5_ACPI_DEVICE_HANDLE 0x00
771 #define EFI_ACPI_6_5_PCI_DEVICE_HANDLE 0x01
772
773 ///
774 /// Device Handle - ACPI
775 ///
776 typedef struct {
777 UINT64 AcpiHid;
778 UINT32 AcpiUid;
779 UINT8 Reserved[4];
780 } EFI_ACPI_6_5_DEVICE_HANDLE_ACPI;
781
782 ///
783 /// Device Handle - PCI
784 ///
785 typedef struct {
786 UINT16 PciSegment;
787 UINT16 PciBdfNumber;
788 UINT8 Reserved[12];
789 } EFI_ACPI_6_5_DEVICE_HANDLE_PCI;
790
791 ///
792 /// Device Handle
793 ///
794 typedef union {
795 EFI_ACPI_6_5_DEVICE_HANDLE_ACPI Acpi;
796 EFI_ACPI_6_5_DEVICE_HANDLE_PCI Pci;
797 } EFI_ACPI_6_5_DEVICE_HANDLE;
798
799 ///
800 /// Generic Initiator Affinity Structure
801 ///
802 typedef struct {
803 UINT8 Type;
804 UINT8 Length;
805 UINT8 Reserved1;
806 UINT8 DeviceHandleType;
807 UINT32 ProximityDomain;
808 EFI_ACPI_6_5_DEVICE_HANDLE DeviceHandle;
809 UINT32 Flags;
810 UINT8 Reserved2[4];
811 } EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE;
812
813 ///
814 /// Generic Initiator Affinity Structure Flags. All other bits are reserved
815 /// and must be 0.
816 ///
817 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0
818 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1
819
820 ///
821 /// System Locality Distance Information Table (SLIT).
822 /// The rest of the table is a matrix.
823 ///
824 typedef struct {
825 EFI_ACPI_DESCRIPTION_HEADER Header;
826 UINT64 NumberOfSystemLocalities;
827 } EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
828
829 ///
830 /// SLIT Version (as defined in ACPI 6.5 spec.)
831 ///
832 #define EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
833
834 ///
835 /// Corrected Platform Error Polling Table (CPEP)
836 ///
837 typedef struct {
838 EFI_ACPI_DESCRIPTION_HEADER Header;
839 UINT8 Reserved[8];
840 } EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
841
842 ///
843 /// CPEP Version (as defined in ACPI 6.5 spec.)
844 ///
845 #define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
846
847 //
848 // CPEP processor structure types.
849 //
850 #define EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC 0x00
851
852 ///
853 /// Corrected Platform Error Polling Processor Structure Definition
854 ///
855 typedef struct {
856 UINT8 Type;
857 UINT8 Length;
858 UINT8 ProcessorId;
859 UINT8 ProcessorEid;
860 UINT32 PollingInterval;
861 } EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
862
863 ///
864 /// Maximum System Characteristics Table (MSCT)
865 ///
866 typedef struct {
867 EFI_ACPI_DESCRIPTION_HEADER Header;
868 UINT32 OffsetProxDomInfo;
869 UINT32 MaximumNumberOfProximityDomains;
870 UINT32 MaximumNumberOfClockDomains;
871 UINT64 MaximumPhysicalAddress;
872 } EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
873
874 ///
875 /// MSCT Version (as defined in ACPI 6.5 spec.)
876 ///
877 #define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
878
879 ///
880 /// Maximum Proximity Domain Information Structure Definition
881 ///
882 typedef struct {
883 UINT8 Revision;
884 UINT8 Length;
885 UINT32 ProximityDomainRangeLow;
886 UINT32 ProximityDomainRangeHigh;
887 UINT32 MaximumProcessorCapacity;
888 UINT64 MaximumMemoryCapacity;
889 } EFI_ACPI_6_5_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
890
891 ///
892 /// ACPI RAS Feature Table definition.
893 ///
894 typedef struct {
895 EFI_ACPI_DESCRIPTION_HEADER Header;
896 UINT8 PlatformCommunicationChannelIdentifier[12];
897 } EFI_ACPI_6_5_RAS_FEATURE_TABLE;
898
899 ///
900 /// RASF Version (as defined in ACPI 6.5 spec.)
901 ///
902 #define EFI_ACPI_6_5_RAS_FEATURE_TABLE_REVISION 0x01
903
904 ///
905 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
906 ///
907 typedef struct {
908 UINT32 Signature;
909 UINT16 Command;
910 UINT16 Status;
911 UINT16 Version;
912 UINT8 RASCapabilities[16];
913 UINT8 SetRASCapabilities[16];
914 UINT16 NumberOfRASFParameterBlocks;
915 UINT32 SetRASCapabilitiesStatus;
916 } EFI_ACPI_6_5_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
917
918 ///
919 /// ACPI RASF PCC command code
920 ///
921 #define EFI_ACPI_6_5_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
922
923 ///
924 /// ACPI RASF Platform RAS Capabilities
925 ///
926 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0
927 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1
928 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2
929 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3
930 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4
931
932 ///
933 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
934 ///
935 typedef struct {
936 UINT16 Type;
937 UINT16 Version;
938 UINT16 Length;
939 UINT16 PatrolScrubCommand;
940 UINT64 RequestedAddressRange[2];
941 UINT64 ActualAddressRange[2];
942 UINT16 Flags;
943 UINT8 RequestedSpeed;
944 } EFI_ACPI_6_5_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
945
946 ///
947 /// ACPI RASF Patrol Scrub command
948 ///
949 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
950 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
951 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
952
953 ///
954 /// Memory Power State Table definition.
955 ///
956 typedef struct {
957 EFI_ACPI_DESCRIPTION_HEADER Header;
958 UINT8 PlatformCommunicationChannelIdentifier;
959 UINT8 Reserved[3];
960 // Memory Power Node Structure
961 // Memory Power State Characteristics
962 } EFI_ACPI_6_5_MEMORY_POWER_STATUS_TABLE;
963
964 ///
965 /// MPST Version (as defined in ACPI 6.5 spec.)
966 ///
967 #define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_REVISION 0x01
968
969 ///
970 /// MPST Platform Communication Channel Shared Memory Region definition.
971 ///
972 typedef struct {
973 UINT32 Signature;
974 UINT16 Command;
975 UINT16 Status;
976 UINT32 MemoryPowerCommandRegister;
977 UINT32 MemoryPowerStatusRegister;
978 UINT32 PowerStateId;
979 UINT32 MemoryPowerNodeId;
980 UINT64 MemoryEnergyConsumed;
981 UINT64 ExpectedAveragePowerComsuned;
982 } EFI_ACPI_6_5_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
983
984 ///
985 /// ACPI MPST PCC command code
986 ///
987 #define EFI_ACPI_6_5_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
988
989 ///
990 /// ACPI MPST Memory Power command
991 ///
992 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
993 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
994 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
995 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
996
997 ///
998 /// MPST Memory Power Node Table
999 ///
1000 typedef struct {
1001 UINT8 PowerStateValue;
1002 UINT8 PowerStateInformationIndex;
1003 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE;
1004
1005 typedef struct {
1006 UINT8 Flag;
1007 UINT8 Reserved;
1008 UINT16 MemoryPowerNodeId;
1009 UINT32 Length;
1010 UINT64 AddressBase;
1011 UINT64 AddressLength;
1012 UINT32 NumberOfPowerStates;
1013 UINT32 NumberOfPhysicalComponents;
1014 // EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
1015 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
1016 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE;
1017
1018 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
1019 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
1020 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
1021
1022 typedef struct {
1023 UINT16 MemoryPowerNodeCount;
1024 UINT8 Reserved[2];
1025 } EFI_ACPI_6_5_MPST_MEMORY_POWER_NODE_TABLE;
1026
1027 ///
1028 /// MPST Memory Power State Characteristics Table
1029 ///
1030 typedef struct {
1031 UINT8 PowerStateStructureID;
1032 UINT8 Flag;
1033 UINT16 Reserved;
1034 UINT32 AveragePowerConsumedInMPS0;
1035 UINT32 RelativePowerSavingToMPS0;
1036 UINT64 ExitLatencyToMPS0;
1037 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
1038
1039 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
1040 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
1041 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
1042
1043 typedef struct {
1044 UINT16 MemoryPowerStateCharacteristicsCount;
1045 UINT8 Reserved[2];
1046 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1047
1048 ///
1049 /// Platform Memory Topology Table definition.
1050 ///
1051 typedef struct {
1052 EFI_ACPI_DESCRIPTION_HEADER Header;
1053 UINT32 NumberOfMemoryDevices;
1054 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];
1055 } EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE;
1056
1057 ///
1058 /// PMTT Version (as defined in ACPI 6.5 spec.)
1059 ///
1060 #define EFI_ACPI_6_5_MEMORY_TOPOLOGY_TABLE_REVISION 0x02
1061
1062 ///
1063 /// Common Memory Device.
1064 ///
1065 typedef struct {
1066 UINT8 Type;
1067 UINT8 Reserved;
1068 UINT16 Length;
1069 UINT16 Flags;
1070 UINT16 Reserved1;
1071 UINT32 NumberOfMemoryDevices;
1072 // UINT8 TypeSpecificData[];
1073 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];
1074 } EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE;
1075
1076 ///
1077 /// Memory Device Type.
1078 ///
1079 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x0
1080 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x1
1081 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x2
1082 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF
1083
1084 ///
1085 /// Socket Type Data.
1086 ///
1087 typedef struct {
1088 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1089 UINT16 SocketIdentifier;
1090 UINT16 Reserved;
1091 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1092 } EFI_ACPI_6_5_PMTT_SOCKET_TYPE_DATA;
1093
1094 ///
1095 /// Memory Controller Type Data.
1096 ///
1097 typedef struct {
1098 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1099 UINT16 MemoryControllerIdentifier;
1100 UINT16 Reserved;
1101 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1102 } EFI_ACPI_6_5_PMTT_MEMORY_CONTROLLER_TYPE_DATA;
1103
1104 ///
1105 /// DIMM Type Specific Data.
1106 ///
1107 typedef struct {
1108 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1109 UINT32 SmbiosHandle;
1110 } EFI_ACPI_6_5_PMTT_DIMM_TYPE_SPECIFIC_DATA;
1111
1112 ///
1113 /// Vendor Specific Type Data.
1114 ///
1115 typedef struct {
1116 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
1117 UINT8 TypeUuid[16];
1118 // EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];
1119 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
1120 } EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA;
1121
1122 ///
1123 /// Boot Graphics Resource Table definition.
1124 ///
1125 typedef struct {
1126 EFI_ACPI_DESCRIPTION_HEADER Header;
1127 ///
1128 /// 2-bytes (16 bit) version ID. This value must be 1.
1129 ///
1130 UINT16 Version;
1131 ///
1132 /// 1-byte status field indicating current status about the table.
1133 /// Bits[7:3] = Reserved (must be zero)
1134 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise
1135 /// degree offset from the image's default orientation.
1136 /// [00] = 0, no offset
1137 /// [01] = 90
1138 /// [10] = 180
1139 /// [11] = 270
1140 /// Bit [0] = Displayed. A one indicates the boot image graphic is
1141 /// displayed.
1142 ///
1143 UINT8 Status;
1144 ///
1145 /// 1-byte enumerated type field indicating format of the image.
1146 /// 0 = Bitmap
1147 /// 1 - 255 Reserved (for future use)
1148 ///
1149 UINT8 ImageType;
1150 ///
1151 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1152 /// of the image bitmap.
1153 ///
1154 UINT64 ImageAddress;
1155 ///
1156 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1157 /// (X, Y) display offset of the top left corner of the boot image.
1158 /// The top left corner of the display is at offset (0, 0).
1159 ///
1160 UINT32 ImageOffsetX;
1161 ///
1162 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1163 /// (X, Y) display offset of the top left corner of the boot image.
1164 /// The top left corner of the display is at offset (0, 0).
1165 ///
1166 UINT32 ImageOffsetY;
1167 } EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE;
1168
1169 ///
1170 /// BGRT Revision
1171 ///
1172 #define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1173
1174 ///
1175 /// BGRT Version
1176 ///
1177 #define EFI_ACPI_6_5_BGRT_VERSION 0x01
1178
1179 ///
1180 /// BGRT Status
1181 ///
1182 #define EFI_ACPI_6_5_BGRT_STATUS_NOT_DISPLAYED 0x00
1183 #define EFI_ACPI_6_5_BGRT_STATUS_DISPLAYED 0x01
1184
1185 ///
1186 /// BGRT Image Type
1187 ///
1188 #define EFI_ACPI_6_5_BGRT_IMAGE_TYPE_BMP 0x00
1189
1190 ///
1191 /// FPDT Version (as defined in ACPI 6.5 spec.)
1192 ///
1193 #define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1194
1195 ///
1196 /// FPDT Performance Record Types
1197 ///
1198 #define EFI_ACPI_6_5_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1199 #define EFI_ACPI_6_5_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1200
1201 ///
1202 /// FPDT Performance Record Revision
1203 ///
1204 #define EFI_ACPI_6_5_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1205 #define EFI_ACPI_6_5_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1206
1207 ///
1208 /// FPDT Runtime Performance Record Types
1209 ///
1210 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1211 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1212 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1213
1214 ///
1215 /// FPDT Runtime Performance Record Revision
1216 ///
1217 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1218 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1219 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1220
1221 ///
1222 /// FPDT Performance Record header
1223 ///
1224 typedef struct {
1225 UINT16 Type;
1226 UINT8 Length;
1227 UINT8 Revision;
1228 } EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER;
1229
1230 ///
1231 /// FPDT Performance Table header
1232 ///
1233 typedef struct {
1234 UINT32 Signature;
1235 UINT32 Length;
1236 } EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER;
1237
1238 ///
1239 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1240 ///
1241 typedef struct {
1242 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;
1243 UINT32 Reserved;
1244 ///
1245 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1246 ///
1247 UINT64 BootPerformanceTablePointer;
1248 } EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1249
1250 ///
1251 /// FPDT S3 Performance Table Pointer Record Structure
1252 ///
1253 typedef struct {
1254 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;
1255 UINT32 Reserved;
1256 ///
1257 /// 64-bit processor-relative physical address of the S3 Performance Table.
1258 ///
1259 UINT64 S3PerformanceTablePointer;
1260 } EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1261
1262 ///
1263 /// FPDT Firmware Basic Boot Performance Record Structure
1264 ///
1265 typedef struct {
1266 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;
1267 UINT32 Reserved;
1268 ///
1269 /// Timer value logged at the beginning of firmware image execution.
1270 /// This may not always be zero or near zero.
1271 ///
1272 UINT64 ResetEnd;
1273 ///
1274 /// Timer value logged just prior to loading the OS boot loader into memory.
1275 /// For non-UEFI compatible boots, this field must be zero.
1276 ///
1277 UINT64 OsLoaderLoadImageStart;
1278 ///
1279 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1280 /// For non-UEFI compatible boots, the timer value logged will be just prior
1281 /// to the INT 19h handler invocation.
1282 ///
1283 UINT64 OsLoaderStartImageStart;
1284 ///
1285 /// Timer value logged at the point when the OS loader calls the
1286 /// ExitBootServices function for UEFI compatible firmware.
1287 /// For non-UEFI compatible boots, this field must be zero.
1288 ///
1289 UINT64 ExitBootServicesEntry;
1290 ///
1291 /// Timer value logged at the point just prior towhen the OS loader gaining
1292 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1293 /// For non-UEFI compatible boots, this field must be zero.
1294 ///
1295 UINT64 ExitBootServicesExit;
1296 } EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1297
1298 ///
1299 /// FPDT Firmware Basic Boot Performance Table signature
1300 ///
1301 #define EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1302
1303 //
1304 // FPDT Firmware Basic Boot Performance Table
1305 //
1306 typedef struct {
1307 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;
1308 //
1309 // one or more Performance Records.
1310 //
1311 } EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1312
1313 ///
1314 /// FPDT "S3PT" S3 Performance Table
1315 ///
1316 #define EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1317
1318 //
1319 // FPDT Firmware S3 Boot Performance Table
1320 //
1321 typedef struct {
1322 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;
1323 //
1324 // one or more Performance Records.
1325 //
1326 } EFI_ACPI_6_5_FPDT_FIRMWARE_S3_BOOT_TABLE;
1327
1328 ///
1329 /// FPDT Basic S3 Resume Performance Record
1330 ///
1331 typedef struct {
1332 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;
1333 ///
1334 /// A count of the number of S3 resume cycles since the last full boot sequence.
1335 ///
1336 UINT32 ResumeCount;
1337 ///
1338 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1339 /// OS waking vector. Only the most recent resume cycle's time is retained.
1340 ///
1341 UINT64 FullResume;
1342 ///
1343 /// Average timer value of all resume cycles logged since the last full boot
1344 /// sequence, including the most recent resume. Note that the entire log of
1345 /// timer values does not need to be retained in order to calculate this average.
1346 ///
1347 UINT64 AverageResume;
1348 } EFI_ACPI_6_5_FPDT_S3_RESUME_RECORD;
1349
1350 ///
1351 /// FPDT Basic S3 Suspend Performance Record
1352 ///
1353 typedef struct {
1354 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;
1355 ///
1356 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1357 /// Only the most recent suspend cycle's timer value is retained.
1358 ///
1359 UINT64 SuspendStart;
1360 ///
1361 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1362 /// mechanism) used to trigger hardware entry to S3.
1363 /// Only the most recent suspend cycle's timer value is retained.
1364 ///
1365 UINT64 SuspendEnd;
1366 } EFI_ACPI_6_5_FPDT_S3_SUSPEND_RECORD;
1367
1368 ///
1369 /// Firmware Performance Record Table definition.
1370 ///
1371 typedef struct {
1372 EFI_ACPI_DESCRIPTION_HEADER Header;
1373 } EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1374
1375 ///
1376 /// Generic Timer Description Table definition.
1377 ///
1378 typedef struct {
1379 EFI_ACPI_DESCRIPTION_HEADER Header;
1380 UINT64 CntControlBasePhysicalAddress;
1381 UINT32 Reserved;
1382 UINT32 SecurePL1TimerGSIV;
1383 UINT32 SecurePL1TimerFlags;
1384 UINT32 NonSecurePL1TimerGSIV;
1385 UINT32 NonSecurePL1TimerFlags;
1386 UINT32 VirtualTimerGSIV;
1387 UINT32 VirtualTimerFlags;
1388 UINT32 NonSecurePL2TimerGSIV;
1389 UINT32 NonSecurePL2TimerFlags;
1390 UINT64 CntReadBasePhysicalAddress;
1391 UINT32 PlatformTimerCount;
1392 UINT32 PlatformTimerOffset;
1393 UINT32 VirtualPL2TimerGSIV;
1394 UINT32 VirtualPL2TimerFlags;
1395 } EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE;
1396
1397 ///
1398 /// GTDT Version (as defined in ACPI 6.5 spec.)
1399 ///
1400 #define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03
1401
1402 ///
1403 /// Timer Flags. All other bits are reserved and must be 0.
1404 ///
1405 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1406 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1407 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2
1408
1409 ///
1410 /// Platform Timer Type
1411 ///
1412 #define EFI_ACPI_6_5_GTDT_GT_BLOCK 0
1413 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG 1
1414
1415 ///
1416 /// GT Block Structure
1417 ///
1418 typedef struct {
1419 UINT8 Type;
1420 UINT16 Length;
1421 UINT8 Reserved;
1422 UINT64 CntCtlBase;
1423 UINT32 GTBlockTimerCount;
1424 UINT32 GTBlockTimerOffset;
1425 } EFI_ACPI_6_5_GTDT_GT_BLOCK_STRUCTURE;
1426
1427 ///
1428 /// GT Block Timer Structure
1429 ///
1430 typedef struct {
1431 UINT8 GTFrameNumber;
1432 UINT8 Reserved[3];
1433 UINT64 CntBaseX;
1434 UINT64 CntEL0BaseX;
1435 UINT32 GTxPhysicalTimerGSIV;
1436 UINT32 GTxPhysicalTimerFlags;
1437 UINT32 GTxVirtualTimerGSIV;
1438 UINT32 GTxVirtualTimerFlags;
1439 UINT32 GTxCommonFlags;
1440 } EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1441
1442 ///
1443 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.
1444 ///
1445 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1446 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1447
1448 ///
1449 /// Common Flags Flags. All other bits are reserved and must be 0.
1450 ///
1451 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0
1452 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1
1453
1454 ///
1455 /// Arm Generic Watchdog Structure
1456 ///
1457 typedef struct {
1458 UINT8 Type;
1459 UINT16 Length;
1460 UINT8 Reserved;
1461 UINT64 RefreshFramePhysicalAddress;
1462 UINT64 WatchdogControlFramePhysicalAddress;
1463 UINT32 WatchdogTimerGSIV;
1464 UINT32 WatchdogTimerFlags;
1465 } EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;
1466
1467 ///
1468 /// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.
1469 ///
1470 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0
1471 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1472 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2
1473
1474 //
1475 // NVDIMM Firmware Interface Table definition.
1476 //
1477 typedef struct {
1478 EFI_ACPI_DESCRIPTION_HEADER Header;
1479 UINT32 Reserved;
1480 } EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1481
1482 //
1483 // NFIT Version (as defined in ACPI 6.5 spec.)
1484 //
1485 #define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1
1486
1487 //
1488 // Definition for NFIT Table Structure Types
1489 //
1490 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0
1491 #define EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1
1492 #define EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE_TYPE 2
1493 #define EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3
1494 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4
1495 #define EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5
1496 #define EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6
1497 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7
1498
1499 //
1500 // Definition for NFIT Structure Header
1501 //
1502 typedef struct {
1503 UINT16 Type;
1504 UINT16 Length;
1505 } EFI_ACPI_6_5_NFIT_STRUCTURE_HEADER;
1506
1507 //
1508 // Definition for System Physical Address Range Structure
1509 //
1510 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0
1511 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1
1512 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2
1513
1514 #define EFI_ACPI_6_5_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1515 #define EFI_ACPI_6_5_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1516 #define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1517 #define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1518 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x6.5B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1519 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1520 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1521 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
1522
1523 typedef struct {
1524 UINT16 Type;
1525 UINT16 Length;
1526 UINT16 SPARangeStructureIndex;
1527 UINT16 Flags;
1528 UINT32 Reserved_8;
1529 UINT32 ProximityDomain;
1530 GUID AddressRangeTypeGUID;
1531 UINT64 SystemPhysicalAddressRangeBase;
1532 UINT64 SystemPhysicalAddressRangeLength;
1533 UINT64 AddressRangeMemoryMappingAttribute;
1534 UINT64 SPALocationCookie;
1535 } EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1536
1537 //
1538 // Definition for Memory Device to System Physical Address Range Mapping Structure
1539 //
1540 typedef struct {
1541 UINT32 DIMMNumber : 4;
1542 UINT32 MemoryChannelNumber : 4;
1543 UINT32 MemoryControllerID : 4;
1544 UINT32 SocketID : 4;
1545 UINT32 NodeControllerID : 12;
1546 UINT32 Reserved_28 : 4;
1547 } EFI_ACPI_6_5_NFIT_DEVICE_HANDLE;
1548
1549 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0
1550 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1
1551 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2
1552 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3
1553 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4
1554 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5
1555 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6
1556
1557 typedef struct {
1558 UINT16 Type;
1559 UINT16 Length;
1560 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1561 UINT16 NVDIMMPhysicalID;
1562 UINT16 NVDIMMRegionID;
1563 UINT16 SPARangeStructureIndex;
1564 UINT16 NVDIMMControlRegionStructureIndex;
1565 UINT64 NVDIMMRegionSize;
1566 UINT64 RegionOffset;
1567 UINT64 NVDIMMPhysicalAddressRegionBase;
1568 UINT16 InterleaveStructureIndex;
1569 UINT16 InterleaveWays;
1570 UINT16 NVDIMMStateFlags;
1571 UINT16 Reserved_46;
1572 } EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1573
1574 //
1575 // Definition for Interleave Structure
1576 //
1577 typedef struct {
1578 UINT16 Type;
1579 UINT16 Length;
1580 UINT16 InterleaveStructureIndex;
1581 UINT16 Reserved_6;
1582 UINT32 NumberOfLines;
1583 UINT32 LineSize;
1584 // UINT32 LineOffset[NumberOfLines];
1585 } EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE;
1586
1587 //
1588 // Definition for SMBIOS Management Information Structure
1589 //
1590 typedef struct {
1591 UINT16 Type;
1592 UINT16 Length;
1593 UINT32 Reserved_4;
1594 // UINT8 Data[];
1595 } EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1596
1597 //
1598 // Definition for NVDIMM Control Region Structure
1599 //
1600 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0
1601
1602 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0
1603
1604 typedef struct {
1605 UINT16 Type;
1606 UINT16 Length;
1607 UINT16 NVDIMMControlRegionStructureIndex;
1608 UINT16 VendorID;
1609 UINT16 DeviceID;
1610 UINT16 RevisionID;
1611 UINT16 SubsystemVendorID;
1612 UINT16 SubsystemDeviceID;
1613 UINT16 SubsystemRevisionID;
1614 UINT8 ValidFields;
1615 UINT8 ManufacturingLocation;
1616 UINT16 ManufacturingDate;
1617 UINT8 Reserved_22[2];
1618 UINT32 SerialNumber;
1619 UINT16 RegionFormatInterfaceCode;
1620 UINT16 NumberOfBlockControlWindows;
1621 UINT64 SizeOfBlockControlWindow;
1622 UINT64 CommandRegisterOffsetInBlockControlWindow;
1623 UINT64 SizeOfCommandRegisterInBlockControlWindows;
1624 UINT64 StatusRegisterOffsetInBlockControlWindow;
1625 UINT64 SizeOfStatusRegisterInBlockControlWindows;
1626 UINT16 NVDIMMControlRegionFlag;
1627 UINT8 Reserved_74[6];
1628 } EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1629
1630 //
1631 // Definition for NVDIMM Block Data Window Region Structure
1632 //
1633 typedef struct {
1634 UINT16 Type;
1635 UINT16 Length;
1636 UINT16 NVDIMMControlRegionStructureIndex;
1637 UINT16 NumberOfBlockDataWindows;
1638 UINT64 BlockDataWindowStartOffset;
1639 UINT64 SizeOfBlockDataWindow;
1640 UINT64 BlockAccessibleMemoryCapacity;
1641 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1642 } EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1643
1644 //
1645 // Definition for Flush Hint Address Structure
1646 //
1647 typedef struct {
1648 UINT16 Type;
1649 UINT16 Length;
1650 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;
1651 UINT16 NumberOfFlushHintAddresses;
1652 UINT8 Reserved_10[6];
1653 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];
1654 } EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1655
1656 //
1657 // Definition for Platform Capabilities Structure
1658 //
1659 typedef struct {
1660 UINT16 Type;
1661 UINT16 Length;
1662 UINT8 HighestValidCapability;
1663 UINT8 Reserved_5[3];
1664 UINT32 Capabilities;
1665 UINT8 Reserved_12[4];
1666 } EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;
1667
1668 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT0
1669 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT1
1670 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT2
1671
1672 ///
1673 /// Secure DEVices Table (SDEV)
1674 ///
1675 typedef struct {
1676 EFI_ACPI_DESCRIPTION_HEADER Header;
1677 } EFI_ACPI_6_5_SECURE_DEVICES_TABLE_HEADER;
1678
1679 ///
1680 /// SDEV Revision (as defined in ACPI 6.5 spec.)
1681 ///
1682 #define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_REVISION 0x01
1683
1684 ///
1685 /// Secure Device types
1686 ///
1687 #define EFI_ACPI_6_5_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00
1688 #define EFI_ACPI_6_5_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01
1689
1690 ///
1691 /// Secure Device flags
1692 ///
1693 #define EFI_ACPI_6_5_SDEV_FLAG_ALLOW_HANDOFF BIT0
1694 #define EFI_ACPI_6_5_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1
1695
1696 ///
1697 /// SDEV Structure Header
1698 ///
1699 typedef struct {
1700 UINT8 Type;
1701 UINT8 Flags;
1702 UINT16 Length;
1703 } EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER;
1704
1705 ///
1706 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1707 ///
1708 typedef struct {
1709 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;
1710 UINT16 DeviceIdentifierOffset;
1711 UINT16 DeviceIdentifierLength;
1712 UINT16 VendorSpecificDataOffset;
1713 UINT16 VendorSpecificDataLength;
1714 UINT16 SecureAccessComponentsOffset;
1715 UINT16 SecureAccessComponentsLength;
1716 } EFI_ACPI_6_5_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1717
1718 ///
1719 /// Secure Access Component Types
1720 ///
1721 #define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00
1722 #define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01
1723
1724 ///
1725 /// Identification Based Secure Access Component
1726 ///
1727 typedef struct {
1728 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;
1729 UINT16 HardwareIdentifierOffset;
1730 UINT16 HardwareIdentifierLength;
1731 UINT16 SubsystemIdentifierOffset;
1732 UINT16 SubsystemIdentifierLength;
1733 UINT16 HardwareRevision;
1734 UINT8 HardwareRevisionPresent;
1735 UINT8 ClassCodePresent;
1736 UINT8 PciCompatibleBaseClass;
1737 UINT8 PciCompatibleSubClass;
1738 UINT8 PciCompatibleProgrammingInterface;
1739 } EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;
1740
1741 ///
1742 /// Memory-based Secure Access Component
1743 ///
1744 typedef struct {
1745 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;
1746 UINT32 Reserved;
1747 UINT64 MemoryAddressBase;
1748 UINT64 MemoryLength;
1749 } EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;
1750
1751 ///
1752 /// PCIe Endpoint Device based Secure Device Structure
1753 ///
1754 typedef struct {
1755 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;
1756 UINT16 PciSegmentNumber;
1757 UINT16 StartBusNumber;
1758 UINT16 PciPathOffset;
1759 UINT16 PciPathLength;
1760 UINT16 VendorSpecificDataOffset;
1761 UINT16 VendorSpecificDataLength;
1762 } EFI_ACPI_6_5_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1763
1764 ///
1765 /// Boot Error Record Table (BERT)
1766 ///
1767 typedef struct {
1768 EFI_ACPI_DESCRIPTION_HEADER Header;
1769 UINT32 BootErrorRegionLength;
1770 UINT64 BootErrorRegion;
1771 } EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_HEADER;
1772
1773 ///
1774 /// BERT Version (as defined in ACPI 6.5 spec.)
1775 ///
1776 #define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1777
1778 ///
1779 /// Boot Error Region Block Status Definition
1780 ///
1781 typedef struct {
1782 UINT32 UncorrectableErrorValid : 1;
1783 UINT32 CorrectableErrorValid : 1;
1784 UINT32 MultipleUncorrectableErrors : 1;
1785 UINT32 MultipleCorrectableErrors : 1;
1786 UINT32 ErrorDataEntryCount : 10;
1787 UINT32 Reserved : 18;
1788 } EFI_ACPI_6_5_ERROR_BLOCK_STATUS;
1789
1790 ///
1791 /// Boot Error Region Definition
1792 ///
1793 typedef struct {
1794 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;
1795 UINT32 RawDataOffset;
1796 UINT32 RawDataLength;
1797 UINT32 DataLength;
1798 UINT32 ErrorSeverity;
1799 } EFI_ACPI_6_5_BOOT_ERROR_REGION_STRUCTURE;
1800
1801 //
1802 // Boot Error Severity types
1803 //
1804 #define EFI_ACPI_6_5_ERROR_SEVERITY_RECOVERABLE 0x00
1805 #define EFI_ACPI_6_5_ERROR_SEVERITY_FATAL 0x01
1806 #define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTED 0x02
1807 #define EFI_ACPI_6_5_ERROR_SEVERITY_NONE 0x03
1808 //
1809 // The term 'Correctable' is no longer being used as an error severity of the
1810 // reported error since ACPI Specification Version 5.1 Errata B.
1811 // The below macro is considered as deprecated and should no longer be used.
1812 //
1813 #define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTABLE 0x00
1814
1815 ///
1816 /// Generic Error Data Entry Definition
1817 ///
1818 typedef struct {
1819 UINT8 SectionType[16];
1820 UINT32 ErrorSeverity;
1821 UINT16 Revision;
1822 UINT8 ValidationBits;
1823 UINT8 Flags;
1824 UINT32 ErrorDataLength;
1825 UINT8 FruId[16];
1826 UINT8 FruText[20];
1827 UINT8 Timestamp[8];
1828 } EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1829
1830 ///
1831 /// Generic Error Data Entry Version (as defined in ACPI 6.5 spec.)
1832 ///
1833 #define EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300
1834
1835 ///
1836 /// HEST - Hardware Error Source Table
1837 ///
1838 typedef struct {
1839 EFI_ACPI_DESCRIPTION_HEADER Header;
1840 UINT32 ErrorSourceCount;
1841 } EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1842
1843 ///
1844 /// HEST Version (as defined in ACPI 6.5 spec.)
1845 ///
1846 #define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1847
1848 //
1849 // Error Source structure types.
1850 //
1851 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1852 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1853 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR 0x02
1854 #define EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER 0x06
1855 #define EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER 0x07
1856 #define EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER 0x08
1857 #define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR 0x09
1858 #define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A
1859 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B
1860
1861 //
1862 // Error Source structure flags.
1863 //
1864 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1865 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1866 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)
1867
1868 ///
1869 /// IA-32 Architecture Machine Check Exception Structure Definition
1870 ///
1871 typedef struct {
1872 UINT16 Type;
1873 UINT16 SourceId;
1874 UINT8 Reserved0[2];
1875 UINT8 Flags;
1876 UINT8 Enabled;
1877 UINT32 NumberOfRecordsToPreAllocate;
1878 UINT32 MaxSectionsPerRecord;
1879 UINT64 GlobalCapabilityInitData;
1880 UINT64 GlobalControlInitData;
1881 UINT8 NumberOfHardwareBanks;
1882 UINT8 Reserved1[7];
1883 } EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1884
1885 ///
1886 /// IA-32 Architecture Machine Check Bank Structure Definition
1887 ///
1888 typedef struct {
1889 UINT8 BankNumber;
1890 UINT8 ClearStatusOnInitialization;
1891 UINT8 StatusDataFormat;
1892 UINT8 Reserved0;
1893 UINT32 ControlRegisterMsrAddress;
1894 UINT64 ControlInitData;
1895 UINT32 StatusRegisterMsrAddress;
1896 UINT32 AddressRegisterMsrAddress;
1897 UINT32 MiscRegisterMsrAddress;
1898 } EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1899
1900 ///
1901 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1902 ///
1903 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1904 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1905 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1906
1907 //
1908 // Hardware Error Notification types. All other values are reserved
1909 //
1910 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1911 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1912 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1913 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1914 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1915 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05
1916 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_MCE 0x06
1917 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07
1918 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08
1919 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09
1920 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A
1921 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B
1922
1923 ///
1924 /// Hardware Error Notification Configuration Write Enable Structure Definition
1925 ///
1926 typedef struct {
1927 UINT16 Type : 1;
1928 UINT16 PollInterval : 1;
1929 UINT16 SwitchToPollingThresholdValue : 1;
1930 UINT16 SwitchToPollingThresholdWindow : 1;
1931 UINT16 ErrorThresholdValue : 1;
1932 UINT16 ErrorThresholdWindow : 1;
1933 UINT16 Reserved : 10;
1934 } EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1935
1936 ///
1937 /// Hardware Error Notification Structure Definition
1938 ///
1939 typedef struct {
1940 UINT8 Type;
1941 UINT8 Length;
1942 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1943 UINT32 PollInterval;
1944 UINT32 Vector;
1945 UINT32 SwitchToPollingThresholdValue;
1946 UINT32 SwitchToPollingThresholdWindow;
1947 UINT32 ErrorThresholdValue;
1948 UINT32 ErrorThresholdWindow;
1949 } EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1950
1951 ///
1952 /// IA-32 Architecture Corrected Machine Check Structure Definition
1953 ///
1954 typedef struct {
1955 UINT16 Type;
1956 UINT16 SourceId;
1957 UINT8 Reserved0[2];
1958 UINT8 Flags;
1959 UINT8 Enabled;
1960 UINT32 NumberOfRecordsToPreAllocate;
1961 UINT32 MaxSectionsPerRecord;
1962 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1963 UINT8 NumberOfHardwareBanks;
1964 UINT8 Reserved1[3];
1965 } EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1966
1967 ///
1968 /// IA-32 Architecture NMI Error Structure Definition
1969 ///
1970 typedef struct {
1971 UINT16 Type;
1972 UINT16 SourceId;
1973 UINT8 Reserved0[2];
1974 UINT32 NumberOfRecordsToPreAllocate;
1975 UINT32 MaxSectionsPerRecord;
1976 UINT32 MaxRawDataLength;
1977 } EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1978
1979 ///
1980 /// PCI Express Root Port AER Structure Definition
1981 ///
1982 typedef struct {
1983 UINT16 Type;
1984 UINT16 SourceId;
1985 UINT8 Reserved0[2];
1986 UINT8 Flags;
1987 UINT8 Enabled;
1988 UINT32 NumberOfRecordsToPreAllocate;
1989 UINT32 MaxSectionsPerRecord;
1990 UINT32 Bus;
1991 UINT16 Device;
1992 UINT16 Function;
1993 UINT16 DeviceControl;
1994 UINT8 Reserved1[2];
1995 UINT32 UncorrectableErrorMask;
1996 UINT32 UncorrectableErrorSeverity;
1997 UINT32 CorrectableErrorMask;
1998 UINT32 AdvancedErrorCapabilitiesAndControl;
1999 UINT32 RootErrorCommand;
2000 } EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
2001
2002 ///
2003 /// PCI Express Device AER Structure Definition
2004 ///
2005 typedef struct {
2006 UINT16 Type;
2007 UINT16 SourceId;
2008 UINT8 Reserved0[2];
2009 UINT8 Flags;
2010 UINT8 Enabled;
2011 UINT32 NumberOfRecordsToPreAllocate;
2012 UINT32 MaxSectionsPerRecord;
2013 UINT32 Bus;
2014 UINT16 Device;
2015 UINT16 Function;
2016 UINT16 DeviceControl;
2017 UINT8 Reserved1[2];
2018 UINT32 UncorrectableErrorMask;
2019 UINT32 UncorrectableErrorSeverity;
2020 UINT32 CorrectableErrorMask;
2021 UINT32 AdvancedErrorCapabilitiesAndControl;
2022 } EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
2023
2024 ///
2025 /// PCI Express Bridge AER Structure Definition
2026 ///
2027 typedef struct {
2028 UINT16 Type;
2029 UINT16 SourceId;
2030 UINT8 Reserved0[2];
2031 UINT8 Flags;
2032 UINT8 Enabled;
2033 UINT32 NumberOfRecordsToPreAllocate;
2034 UINT32 MaxSectionsPerRecord;
2035 UINT32 Bus;
2036 UINT16 Device;
2037 UINT16 Function;
2038 UINT16 DeviceControl;
2039 UINT8 Reserved1[2];
2040 UINT32 UncorrectableErrorMask;
2041 UINT32 UncorrectableErrorSeverity;
2042 UINT32 CorrectableErrorMask;
2043 UINT32 AdvancedErrorCapabilitiesAndControl;
2044 UINT32 SecondaryUncorrectableErrorMask;
2045 UINT32 SecondaryUncorrectableErrorSeverity;
2046 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
2047 } EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
2048
2049 ///
2050 /// Generic Hardware Error Source Structure Definition
2051 ///
2052 typedef struct {
2053 UINT16 Type;
2054 UINT16 SourceId;
2055 UINT16 RelatedSourceId;
2056 UINT8 Flags;
2057 UINT8 Enabled;
2058 UINT32 NumberOfRecordsToPreAllocate;
2059 UINT32 MaxSectionsPerRecord;
2060 UINT32 MaxRawDataLength;
2061 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2062 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2063 UINT32 ErrorStatusBlockLength;
2064 } EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
2065
2066 ///
2067 /// Generic Hardware Error Source Version 2 Structure Definition
2068 ///
2069 typedef struct {
2070 UINT16 Type;
2071 UINT16 SourceId;
2072 UINT16 RelatedSourceId;
2073 UINT8 Flags;
2074 UINT8 Enabled;
2075 UINT32 NumberOfRecordsToPreAllocate;
2076 UINT32 MaxSectionsPerRecord;
2077 UINT32 MaxRawDataLength;
2078 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
2079 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2080 UINT32 ErrorStatusBlockLength;
2081 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;
2082 UINT64 ReadAckPreserve;
2083 UINT64 ReadAckWrite;
2084 } EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
2085
2086 ///
2087 /// Generic Error Status Definition
2088 ///
2089 typedef struct {
2090 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;
2091 UINT32 RawDataOffset;
2092 UINT32 RawDataLength;
2093 UINT32 DataLength;
2094 UINT32 ErrorSeverity;
2095 } EFI_ACPI_6_5_GENERIC_ERROR_STATUS_STRUCTURE;
2096
2097 ///
2098 /// IA-32 Architecture Deferred Machine Check Structure Definition
2099 ///
2100 typedef struct {
2101 UINT16 Type;
2102 UINT16 SourceId;
2103 UINT8 Reserved0[2];
2104 UINT8 Flags;
2105 UINT8 Enabled;
2106 UINT32 NumberOfRecordsToPreAllocate;
2107 UINT32 MaxSectionsPerRecord;
2108 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
2109 UINT8 NumberOfHardwareBanks;
2110 UINT8 Reserved1[3];
2111 } EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;
2112
2113 ///
2114 /// HMAT - Heterogeneous Memory Attribute Table
2115 ///
2116 typedef struct {
2117 EFI_ACPI_DESCRIPTION_HEADER Header;
2118 UINT8 Reserved[4];
2119 } EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2120
2121 ///
2122 /// HMAT Revision (as defined in ACPI 6.5 spec.)
2123 ///
2124 #define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02
2125
2126 ///
2127 /// HMAT types
2128 ///
2129 #define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00
2130 #define EFI_ACPI_6_5_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01
2131 #define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02
2132
2133 ///
2134 /// HMAT Structure Header
2135 ///
2136 typedef struct {
2137 UINT16 Type;
2138 UINT8 Reserved[2];
2139 UINT32 Length;
2140 } EFI_ACPI_6_5_HMAT_STRUCTURE_HEADER;
2141
2142 ///
2143 /// Memory Proximity Domain Attributes Structure flags
2144 ///
2145 typedef struct {
2146 UINT16 InitiatorProximityDomainValid : 1;
2147 UINT16 Reserved : 15;
2148 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;
2149
2150 ///
2151 /// Memory Proximity Domain Attributes Structure
2152 ///
2153 typedef struct {
2154 UINT16 Type;
2155 UINT8 Reserved[2];
2156 UINT32 Length;
2157 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;
2158 UINT8 Reserved1[2];
2159 UINT32 InitiatorProximityDomain;
2160 UINT32 MemoryProximityDomain;
2161 UINT8 Reserved2[20];
2162 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;
2163
2164 ///
2165 /// System Locality Latency and Bandwidth Information Structure flags
2166 ///
2167 typedef struct {
2168 UINT8 MemoryHierarchy : 4;
2169 UINT8 AccessAttributes : 2;
2170 UINT8 Reserved : 2;
2171 } EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2172
2173 ///
2174 /// System Locality Latency and Bandwidth Information Structure
2175 ///
2176 typedef struct {
2177 UINT16 Type;
2178 UINT8 Reserved[2];
2179 UINT32 Length;
2180 EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;
2181 UINT8 DataType;
2182 UINT8 MinTransferSize;
2183 UINT8 Reserved1;
2184 UINT32 NumberOfInitiatorProximityDomains;
2185 UINT32 NumberOfTargetProximityDomains;
2186 UINT8 Reserved2[4];
2187 UINT64 EntryBaseUnit;
2188 } EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2189
2190 ///
2191 /// Memory Side Cache Information Structure cache attributes
2192 ///
2193 typedef struct {
2194 UINT32 TotalCacheLevels : 4;
2195 UINT32 CacheLevel : 4;
2196 UINT32 CacheAssociativity : 4;
2197 UINT32 WritePolicy : 4;
2198 UINT32 CacheLineSize : 16;
2199 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2200
2201 ///
2202 /// Memory Side Cache Information Structure
2203 ///
2204 typedef struct {
2205 UINT16 Type;
2206 UINT8 Reserved[2];
2207 UINT32 Length;
2208 UINT32 MemoryProximityDomain;
2209 UINT8 Reserved1[4];
2210 UINT64 MemorySideCacheSize;
2211 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;
2212 UINT8 Reserved2[2];
2213 UINT16 NumberOfSmbiosHandles;
2214 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2215
2216 ///
2217 /// ERST - Error Record Serialization Table
2218 ///
2219 typedef struct {
2220 EFI_ACPI_DESCRIPTION_HEADER Header;
2221 UINT32 SerializationHeaderSize;
2222 UINT8 Reserved0[4];
2223 UINT32 InstructionEntryCount;
2224 } EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2225
2226 ///
2227 /// ERST Version (as defined in ACPI 6.5 spec.)
2228 ///
2229 #define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
2230
2231 ///
2232 /// ERST Serialization Actions
2233 ///
2234 #define EFI_ACPI_6_5_ERST_BEGIN_WRITE_OPERATION 0x00
2235 #define EFI_ACPI_6_5_ERST_BEGIN_READ_OPERATION 0x01
2236 #define EFI_ACPI_6_5_ERST_BEGIN_CLEAR_OPERATION 0x02
2237 #define EFI_ACPI_6_5_ERST_END_OPERATION 0x03
2238 #define EFI_ACPI_6_5_ERST_SET_RECORD_OFFSET 0x04
2239 #define EFI_ACPI_6_5_ERST_EXECUTE_OPERATION 0x05
2240 #define EFI_ACPI_6_5_ERST_CHECK_BUSY_STATUS 0x06
2241 #define EFI_ACPI_6_5_ERST_GET_COMMAND_STATUS 0x07
2242 #define EFI_ACPI_6_5_ERST_GET_RECORD_IDENTIFIER 0x08
2243 #define EFI_ACPI_6_5_ERST_SET_RECORD_IDENTIFIER 0x09
2244 #define EFI_ACPI_6_5_ERST_GET_RECORD_COUNT 0x0A
2245 #define EFI_ACPI_6_5_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
2246 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
2247 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
2248 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
2249 #define EFI_ACPI_6_5_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10
2250
2251 ///
2252 /// ERST Action Command Status
2253 ///
2254 #define EFI_ACPI_6_5_ERST_STATUS_SUCCESS 0x00
2255 #define EFI_ACPI_6_5_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
2256 #define EFI_ACPI_6_5_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
2257 #define EFI_ACPI_6_5_ERST_STATUS_FAILED 0x03
2258 #define EFI_ACPI_6_5_ERST_STATUS_RECORD_STORE_EMPTY 0x04
2259 #define EFI_ACPI_6_5_ERST_STATUS_RECORD_NOT_FOUND 0x05
2260
2261 ///
2262 /// ERST Serialization Instructions
2263 ///
2264 #define EFI_ACPI_6_5_ERST_READ_REGISTER 0x00
2265 #define EFI_ACPI_6_5_ERST_READ_REGISTER_VALUE 0x01
2266 #define EFI_ACPI_6_5_ERST_WRITE_REGISTER 0x02
2267 #define EFI_ACPI_6_5_ERST_WRITE_REGISTER_VALUE 0x03
2268 #define EFI_ACPI_6_5_ERST_NOOP 0x04
2269 #define EFI_ACPI_6_5_ERST_LOAD_VAR1 0x05
2270 #define EFI_ACPI_6_5_ERST_LOAD_VAR2 0x06
2271 #define EFI_ACPI_6_5_ERST_STORE_VAR1 0x07
2272 #define EFI_ACPI_6_5_ERST_ADD 0x08
2273 #define EFI_ACPI_6_5_ERST_SUBTRACT 0x09
2274 #define EFI_ACPI_6_5_ERST_ADD_VALUE 0x0A
2275 #define EFI_ACPI_6_5_ERST_SUBTRACT_VALUE 0x0B
2276 #define EFI_ACPI_6_5_ERST_STALL 0x0C
2277 #define EFI_ACPI_6_5_ERST_STALL_WHILE_TRUE 0x0D
2278 #define EFI_ACPI_6_5_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
2279 #define EFI_ACPI_6_5_ERST_GOTO 0x0F
2280 #define EFI_ACPI_6_5_ERST_SET_SRC_ADDRESS_BASE 0x10
2281 #define EFI_ACPI_6_5_ERST_SET_DST_ADDRESS_BASE 0x11
2282 #define EFI_ACPI_6_5_ERST_MOVE_DATA 0x12
2283
2284 ///
2285 /// ERST Instruction Flags
2286 ///
2287 #define EFI_ACPI_6_5_ERST_PRESERVE_REGISTER 0x01
2288
2289 ///
2290 /// ERST Serialization Instruction Entry
2291 ///
2292 typedef struct {
2293 UINT8 SerializationAction;
2294 UINT8 Instruction;
2295 UINT8 Flags;
2296 UINT8 Reserved0;
2297 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2298 UINT64 Value;
2299 UINT64 Mask;
2300 } EFI_ACPI_6_5_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2301
2302 ///
2303 /// EINJ - Error Injection Table
2304 ///
2305 typedef struct {
2306 EFI_ACPI_DESCRIPTION_HEADER Header;
2307 UINT32 InjectionHeaderSize;
2308 UINT8 InjectionFlags;
2309 UINT8 Reserved0[3];
2310 UINT32 InjectionEntryCount;
2311 } EFI_ACPI_6_5_ERROR_INJECTION_TABLE_HEADER;
2312
2313 ///
2314 /// EINJ Version (as defined in ACPI 6.5 spec.)
2315 ///
2316 #define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_REVISION 0x01
2317
2318 ///
2319 /// EINJ Error Injection Actions
2320 ///
2321 #define EFI_ACPI_6_5_EINJ_BEGIN_INJECTION_OPERATION 0x00
2322 #define EFI_ACPI_6_5_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
2323 #define EFI_ACPI_6_5_EINJ_SET_ERROR_TYPE 0x02
2324 #define EFI_ACPI_6_5_EINJ_GET_ERROR_TYPE 0x03
2325 #define EFI_ACPI_6_5_EINJ_END_OPERATION 0x04
2326 #define EFI_ACPI_6_5_EINJ_EXECUTE_OPERATION 0x05
2327 #define EFI_ACPI_6_5_EINJ_CHECK_BUSY_STATUS 0x06
2328 #define EFI_ACPI_6_5_EINJ_GET_COMMAND_STATUS 0x07
2329 #define EFI_ACPI_6_5_EINJ_TRIGGER_ERROR 0xFF
2330
2331 ///
2332 /// EINJ Action Command Status
2333 ///
2334 #define EFI_ACPI_6_5_EINJ_STATUS_SUCCESS 0x00
2335 #define EFI_ACPI_6_5_EINJ_STATUS_UNKNOWN_FAILURE 0x01
2336 #define EFI_ACPI_6_5_EINJ_STATUS_INVALID_ACCESS 0x02
2337
2338 ///
2339 /// EINJ Error Type Definition
2340 ///
2341 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
2342 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
2343 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
2344 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
2345 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
2346 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
2347 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
2348 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
2349 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
2350 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
2351 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
2352 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
2353
2354 ///
2355 /// EINJ Injection Instructions
2356 ///
2357 #define EFI_ACPI_6_5_EINJ_READ_REGISTER 0x00
2358 #define EFI_ACPI_6_5_EINJ_READ_REGISTER_VALUE 0x01
2359 #define EFI_ACPI_6_5_EINJ_WRITE_REGISTER 0x02
2360 #define EFI_ACPI_6_5_EINJ_WRITE_REGISTER_VALUE 0x03
2361 #define EFI_ACPI_6_5_EINJ_NOOP 0x04
2362
2363 ///
2364 /// EINJ Instruction Flags
2365 ///
2366 #define EFI_ACPI_6_5_EINJ_PRESERVE_REGISTER 0x01
2367
2368 ///
2369 /// EINJ Injection Instruction Entry
2370 ///
2371 typedef struct {
2372 UINT8 InjectionAction;
2373 UINT8 Instruction;
2374 UINT8 Flags;
2375 UINT8 Reserved0;
2376 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
2377 UINT64 Value;
2378 UINT64 Mask;
2379 } EFI_ACPI_6_5_EINJ_INJECTION_INSTRUCTION_ENTRY;
2380
2381 ///
2382 /// EINJ Trigger Action Table
2383 ///
2384 typedef struct {
2385 UINT32 HeaderSize;
2386 UINT32 Revision;
2387 UINT32 TableSize;
2388 UINT32 EntryCount;
2389 } EFI_ACPI_6_5_EINJ_TRIGGER_ACTION_TABLE;
2390
2391 ///
2392 /// Platform Communications Channel Table (PCCT)
2393 ///
2394 typedef struct {
2395 EFI_ACPI_DESCRIPTION_HEADER Header;
2396 UINT32 Flags;
2397 UINT64 Reserved;
2398 } EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2399
2400 ///
2401 /// PCCT Version (as defined in ACPI 6.5 spec.)
2402 ///
2403 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02
2404
2405 ///
2406 /// PCCT Global Flags
2407 ///
2408 #define EFI_ACPI_6_5_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0
2409
2410 //
2411 // PCCT Subspace type
2412 //
2413 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_GENERIC 0x00
2414 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01
2415 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02
2416 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03
2417 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04
2418 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05
2419
2420 ///
2421 /// PCC Subspace Structure Header
2422 ///
2423 typedef struct {
2424 UINT8 Type;
2425 UINT8 Length;
2426 } EFI_ACPI_6_5_PCCT_SUBSPACE_HEADER;
2427
2428 ///
2429 /// Generic Communications Subspace Structure
2430 ///
2431 typedef struct {
2432 UINT8 Type;
2433 UINT8 Length;
2434 UINT8 Reserved[6];
2435 UINT64 BaseAddress;
2436 UINT64 AddressLength;
2437 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2438 UINT64 DoorbellPreserve;
2439 UINT64 DoorbellWrite;
2440 UINT32 NominalLatency;
2441 UINT32 MaximumPeriodicAccessRate;
2442 UINT16 MinimumRequestTurnaroundTime;
2443 } EFI_ACPI_6_5_PCCT_SUBSPACE_GENERIC;
2444
2445 ///
2446 /// Generic Communications Channel Shared Memory Region
2447 ///
2448
2449 typedef struct {
2450 UINT8 Command;
2451 UINT8 Reserved : 7;
2452 UINT8 NotifyOnCompletion : 1;
2453 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2454
2455 typedef struct {
2456 UINT8 CommandComplete : 1;
2457 UINT8 PlatformInterrupt : 1;
2458 UINT8 Error : 1;
2459 UINT8 PlatformNotification : 1;
2460 UINT8 Reserved : 4;
2461 UINT8 Reserved1;
2462 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2463
2464 typedef struct {
2465 UINT32 Signature;
2466 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
2467 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
2468 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2469
2470 #define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0
2471 #define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1
2472
2473 ///
2474 /// Type 1 HW-Reduced Communications Subspace Structure
2475 ///
2476 typedef struct {
2477 UINT8 Type;
2478 UINT8 Length;
2479 UINT32 PlatformInterrupt;
2480 UINT8 PlatformInterruptFlags;
2481 UINT8 Reserved;
2482 UINT64 BaseAddress;
2483 UINT64 AddressLength;
2484 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2485 UINT64 DoorbellPreserve;
2486 UINT64 DoorbellWrite;
2487 UINT32 NominalLatency;
2488 UINT32 MaximumPeriodicAccessRate;
2489 UINT16 MinimumRequestTurnaroundTime;
2490 } EFI_ACPI_6_5_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2491
2492 ///
2493 /// Type 2 HW-Reduced Communications Subspace Structure
2494 ///
2495 typedef struct {
2496 UINT8 Type;
2497 UINT8 Length;
2498 UINT32 PlatformInterrupt;
2499 UINT8 PlatformInterruptFlags;
2500 UINT8 Reserved;
2501 UINT64 BaseAddress;
2502 UINT64 AddressLength;
2503 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2504 UINT64 DoorbellPreserve;
2505 UINT64 DoorbellWrite;
2506 UINT32 NominalLatency;
2507 UINT32 MaximumPeriodicAccessRate;
2508 UINT16 MinimumRequestTurnaroundTime;
2509 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2510 UINT64 PlatformInterruptAckPreserve;
2511 UINT64 PlatformInterruptAckWrite;
2512 } EFI_ACPI_6_5_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2513
2514 ///
2515 /// Type 3 Extended PCC Subspace Structure
2516 ///
2517 typedef struct {
2518 UINT8 Type;
2519 UINT8 Length;
2520 UINT32 PlatformInterrupt;
2521 UINT8 PlatformInterruptFlags;
2522 UINT8 Reserved;
2523 UINT64 BaseAddress;
2524 UINT32 AddressLength;
2525 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2526 UINT64 DoorbellPreserve;
2527 UINT64 DoorbellWrite;
2528 UINT32 NominalLatency;
2529 UINT32 MaximumPeriodicAccessRate;
2530 UINT32 MinimumRequestTurnaroundTime;
2531 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;
2532 UINT64 PlatformInterruptAckPreserve;
2533 UINT64 PlatformInterruptAckSet;
2534 UINT8 Reserved1[8];
2535 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2536 UINT64 CommandCompleteCheckMask;
2537 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;
2538 UINT64 CommandCompleteUpdatePreserve;
2539 UINT64 CommandCompleteUpdateSet;
2540 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2541 UINT64 ErrorStatusMask;
2542 } EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC;
2543
2544 ///
2545 /// Type 4 Extended PCC Subspace Structure
2546 ///
2547 typedef EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_5_PCCT_SUBSPACE_4_EXTENDED_PCC;
2548
2549 #define EFI_ACPI_6_5_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0
2550
2551 typedef struct {
2552 UINT32 Signature;
2553 UINT32 Flags;
2554 UINT32 Length;
2555 UINT32 Command;
2556 } EFI_ACPI_6_5_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2557
2558 ///
2559 /// Type 5 HW Registers based Communications Subspace Structure
2560 ///
2561 typedef struct {
2562 UINT8 Type;
2563 UINT8 Length;
2564 UINT16 Version;
2565 UINT64 BaseAddress;
2566 UINT64 SharedMemoryRangeLength;
2567 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
2568 UINT64 DoorbellPreserve;
2569 UINT64 DoorbellWrite;
2570 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;
2571 UINT64 CommandCompleteCheckMask;
2572 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;
2573 UINT64 ErrorStatusMask;
2574 UINT32 NominalLatency;
2575 UINT32 MinimumRequestTurnaroundTime;
2576 } EFI_ACPI_6_5_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;
2577
2578 ///
2579 /// Reduced PCC Subspace Shared Memory Region
2580 ///
2581 typedef struct {
2582 UINT32 Signature;
2583 // UINT8 CommunicationSubspace[];
2584 } EFI_6_5_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;
2585
2586 ///
2587 /// Platform Debug Trigger Table (PDTT)
2588 ///
2589 typedef struct {
2590 EFI_ACPI_DESCRIPTION_HEADER Header;
2591 UINT8 TriggerCount;
2592 UINT8 Reserved[3];
2593 UINT32 TriggerIdentifierArrayOffset;
2594 } EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2595
2596 ///
2597 /// PDTT Revision (as defined in ACPI 6.5 spec.)
2598 ///
2599 #define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00
2600
2601 ///
2602 /// PDTT Platform Communication Channel Identifier Structure
2603 ///
2604 typedef struct {
2605 UINT16 SubChannelIdentifer : 8;
2606 UINT16 Runtime : 1;
2607 UINT16 WaitForCompletion : 1;
2608 UINT16 TriggerOrder : 1;
2609 UINT16 Reserved : 5;
2610 } EFI_ACPI_6_5_PDTT_PCC_IDENTIFIER;
2611
2612 ///
2613 /// PCC Commands Codes used by Platform Debug Trigger Table
2614 ///
2615 #define EFI_ACPI_6_5_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00
2616 #define EFI_ACPI_6_5_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01
2617
2618 ///
2619 /// PDTT Platform Communication Channel
2620 ///
2621 typedef EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_5_PDTT_PCC;
2622
2623 ///
2624 /// Processor Properties Topology Table (PPTT)
2625 ///
2626 typedef struct {
2627 EFI_ACPI_DESCRIPTION_HEADER Header;
2628 } EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2629
2630 ///
2631 /// PPTT Revision (as defined in ACPI 6.5 spec.)
2632 ///
2633 #define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x03
2634
2635 ///
2636 /// PPTT types
2637 ///
2638 #define EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR 0x00
2639 #define EFI_ACPI_6_5_PPTT_TYPE_CACHE 0x01
2640
2641 ///
2642 /// PPTT Structure Header
2643 ///
2644 typedef struct {
2645 UINT8 Type;
2646 UINT8 Length;
2647 UINT8 Reserved[2];
2648 } EFI_ACPI_6_5_PPTT_STRUCTURE_HEADER;
2649
2650 ///
2651 /// For PPTT struct processor flags
2652 ///
2653 #define EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL 0x0
2654 #define EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL 0x1
2655 #define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID 0x0
2656 #define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID 0x1
2657 #define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD 0x0
2658 #define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD 0x1
2659 #define EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF 0x0
2660 #define EFI_ACPI_6_5_PPTT_NODE_IS_LEAF 0x1
2661 #define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0
2662 #define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL 0x1
2663
2664 ///
2665 /// Processor hierarchy node structure flags
2666 ///
2667 typedef struct {
2668 UINT32 PhysicalPackage : 1;
2669 UINT32 AcpiProcessorIdValid : 1;
2670 UINT32 ProcessorIsAThread : 1;
2671 UINT32 NodeIsALeaf : 1;
2672 UINT32 IdenticalImplementation : 1;
2673 UINT32 Reserved : 27;
2674 } EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2675
2676 ///
2677 /// Processor hierarchy node structure
2678 ///
2679 typedef struct {
2680 UINT8 Type;
2681 UINT8 Length;
2682 UINT8 Reserved[2];
2683 EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;
2684 UINT32 Parent;
2685 UINT32 AcpiProcessorId;
2686 UINT32 NumberOfPrivateResources;
2687 } EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR;
2688
2689 ///
2690 /// For PPTT struct cache flags
2691 ///
2692 #define EFI_ACPI_6_5_PPTT_CACHE_SIZE_INVALID 0x0
2693 #define EFI_ACPI_6_5_PPTT_CACHE_SIZE_VALID 0x1
2694 #define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_INVALID 0x0
2695 #define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_VALID 0x1
2696 #define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_INVALID 0x0
2697 #define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_VALID 0x1
2698 #define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_INVALID 0x0
2699 #define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_VALID 0x1
2700 #define EFI_ACPI_6_5_PPTT_CACHE_TYPE_INVALID 0x0
2701 #define EFI_ACPI_6_5_PPTT_CACHE_TYPE_VALID 0x1
2702 #define EFI_ACPI_6_5_PPTT_WRITE_POLICY_INVALID 0x0
2703 #define EFI_ACPI_6_5_PPTT_WRITE_POLICY_VALID 0x1
2704 #define EFI_ACPI_6_5_PPTT_LINE_SIZE_INVALID 0x0
2705 #define EFI_ACPI_6_5_PPTT_LINE_SIZE_VALID 0x1
2706 #define EFI_ACPI_6_5_PPTT_CACHE_ID_INVALID 0x0
2707 #define EFI_ACPI_6_5_PPTT_CACHE_ID_VALID 0x1
2708
2709 ///
2710 /// Cache Type Structure flags
2711 ///
2712 typedef struct {
2713 UINT32 SizePropertyValid : 1;
2714 UINT32 NumberOfSetsValid : 1;
2715 UINT32 AssociativityValid : 1;
2716 UINT32 AllocationTypeValid : 1;
2717 UINT32 CacheTypeValid : 1;
2718 UINT32 WritePolicyValid : 1;
2719 UINT32 LineSizeValid : 1;
2720 UINT32 CacheIdValid : 1;
2721 UINT32 Reserved : 24;
2722 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS;
2723
2724 ///
2725 /// For cache attributes
2726 ///
2727 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0
2728 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1
2729 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2
2730 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0
2731 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1
2732 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2
2733 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0
2734 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1
2735
2736 ///
2737 /// Cache Type Structure cache attributes
2738 ///
2739 typedef struct {
2740 UINT8 AllocationType : 2;
2741 UINT8 CacheType : 2;
2742 UINT8 WritePolicy : 1;
2743 UINT8 Reserved : 3;
2744 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2745
2746 ///
2747 /// Cache Type Structure
2748 ///
2749 typedef struct {
2750 UINT8 Type;
2751 UINT8 Length;
2752 UINT8 Reserved[2];
2753 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS Flags;
2754 UINT32 NextLevelOfCache;
2755 UINT32 Size;
2756 UINT32 NumberOfSets;
2757 UINT8 Associativity;
2758 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;
2759 UINT16 LineSize;
2760 UINT32 CacheId;
2761 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE;
2762
2763 ///
2764 /// Platform Health Assessment Table (PHAT) Format
2765 ///
2766 typedef struct {
2767 EFI_ACPI_DESCRIPTION_HEADER Header;
2768 // UINT8 PlatformTelemetryRecords[];
2769 } EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE;
2770
2771 #define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01
2772
2773 ///
2774 /// PHAT Record Format
2775 ///
2776 typedef struct {
2777 UINT16 PlatformHealthAssessmentRecordType;
2778 UINT16 RecordLength;
2779 UINT8 Revision;
2780 // UINT8 Data[];
2781 } EFI_ACPI_6_5_PHAT_RECORD;
2782
2783 ///
2784 /// PHAT Record Type Format
2785 ///
2786 #define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000
2787 #define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001
2788
2789 ///
2790 /// PHAT Version Element
2791 ///
2792 typedef struct {
2793 GUID ComponentId;
2794 UINT64 VersionValue;
2795 UINT32 ProducerId;
2796 } EFI_ACPI_6_5_PHAT_VERSION_ELEMENT;
2797
2798 ///
2799 /// PHAT Firmware Version Data Record
2800 ///
2801 typedef struct {
2802 UINT16 PlatformRecordType;
2803 UINT16 RecordLength;
2804 UINT8 Revision;
2805 UINT8 Reserved[3];
2806 UINT32 RecordCount;
2807 // UINT8 PhatVersionElement[];
2808 } EFI_ACPI_6_5_PHAT_FIRMWARE_VERISON_DATA_RECORD;
2809
2810 #define EFI_ACPI_6_5_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01
2811
2812 ///
2813 /// Firmware Health Data Record Structure
2814 ///
2815 typedef struct {
2816 UINT16 PlatformRecordType;
2817 UINT16 RecordLength;
2818 UINT8 Revision;
2819 UINT16 Reserved;
2820 UINT8 AmHealthy;
2821 GUID DeviceSignature;
2822 UINT32 DeviceSpecificDataOffset;
2823 // UINT8 DevicePath[];
2824 // UINT8 DeviceSpecificData[];
2825 } EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;
2826
2827 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01
2828
2829 ///
2830 /// Firmware Health Data Record device health state
2831 ///
2832 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00
2833 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01
2834 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02
2835 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03
2836
2837 //
2838 // Known table signatures
2839 //
2840
2841 ///
2842 /// "RSD PTR " Root System Description Pointer
2843 ///
2844 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2845
2846 ///
2847 /// "APIC" Multiple APIC Description Table
2848 ///
2849 #define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
2850
2851 ///
2852 /// "APMT" Arm Performance Monitoring Unit Table
2853 ///
2854 #define EFI_ACPI_6_5_ARM_PERFORMANCE_MONITORING_UNIT_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'M', 'T')
2855
2856 ///
2857 /// "BERT" Boot Error Record Table
2858 ///
2859 #define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
2860
2861 ///
2862 /// "BGRT" Boot Graphics Resource Table
2863 ///
2864 #define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
2865
2866 ///
2867 /// "CDIT" Component Distance Information Table
2868 ///
2869 #define EFI_ACPI_6_5_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')
2870
2871 ///
2872 /// "CPEP" Corrected Platform Error Polling Table
2873 ///
2874 #define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
2875
2876 ///
2877 /// "CRAT" Component Resource Attribute Table
2878 ///
2879 #define EFI_ACPI_6_5_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')
2880
2881 ///
2882 /// "DSDT" Differentiated System Description Table
2883 ///
2884 #define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
2885
2886 ///
2887 /// "ECDT" Embedded Controller Boot Resources Table
2888 ///
2889 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
2890
2891 ///
2892 /// "EINJ" Error Injection Table
2893 ///
2894 #define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
2895
2896 ///
2897 /// "ERST" Error Record Serialization Table
2898 ///
2899 #define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
2900
2901 ///
2902 /// "FACP" Fixed ACPI Description Table
2903 ///
2904 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
2905
2906 ///
2907 /// "FACS" Firmware ACPI Control Structure
2908 ///
2909 #define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
2910
2911 ///
2912 /// "FPDT" Firmware Performance Data Table
2913 ///
2914 #define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
2915
2916 ///
2917 /// "GTDT" Generic Timer Description Table
2918 ///
2919 #define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
2920
2921 ///
2922 /// "HEST" Hardware Error Source Table
2923 ///
2924 #define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
2925
2926 ///
2927 /// "HMAT" Heterogeneous Memory Attribute Table
2928 ///
2929 #define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')
2930
2931 ///
2932 /// "MPST" Memory Power State Table
2933 ///
2934 #define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
2935
2936 ///
2937 /// "MSCT" Maximum System Characteristics Table
2938 ///
2939 #define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
2940
2941 ///
2942 /// "NFIT" NVDIMM Firmware Interface Table
2943 ///
2944 #define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')
2945
2946 ///
2947 /// "PDTT" Platform Debug Trigger Table
2948 ///
2949 #define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')
2950
2951 ///
2952 /// "PMTT" Platform Memory Topology Table
2953 ///
2954 #define EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
2955
2956 ///
2957 /// "PPTT" Processor Properties Topology Table
2958 ///
2959 #define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
2960
2961 ///
2962 /// "PSDT" Persistent System Description Table
2963 ///
2964 #define EFI_ACPI_6_5_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
2965
2966 ///
2967 /// "RASF" ACPI RAS Feature Table
2968 ///
2969 #define EFI_ACPI_6_5_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
2970
2971 ///
2972 /// "RSDT" Root System Description Table
2973 ///
2974 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
2975
2976 ///
2977 /// "SBST" Smart Battery Specification Table
2978 ///
2979 #define EFI_ACPI_6_5_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
2980
2981 ///
2982 /// "SDEV" Secure DEVices Table
2983 ///
2984 #define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')
2985
2986 ///
2987 /// "SLIT" System Locality Information Table
2988 ///
2989 #define EFI_ACPI_6_5_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
2990
2991 ///
2992 /// "SRAT" System Resource Affinity Table
2993 ///
2994 #define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
2995
2996 ///
2997 /// "SSDT" Secondary System Description Table
2998 ///
2999 #define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
3000
3001 ///
3002 /// "XSDT" Extended System Description Table
3003 ///
3004 #define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
3005
3006 ///
3007 /// "BOOT" MS Simple Boot Spec
3008 ///
3009 #define EFI_ACPI_6_5_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
3010
3011 ///
3012 /// "CSRT" MS Core System Resource Table
3013 ///
3014 #define EFI_ACPI_6_5_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
3015
3016 ///
3017 /// "DBG2" MS Debug Port 2 Spec
3018 ///
3019 #define EFI_ACPI_6_5_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
3020
3021 ///
3022 /// "DBGP" MS Debug Port Spec
3023 ///
3024 #define EFI_ACPI_6_5_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
3025
3026 ///
3027 /// "DMAR" DMA Remapping Table
3028 ///
3029 #define EFI_ACPI_6_5_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
3030
3031 ///
3032 /// "DRTM" Dynamic Root of Trust for Measurement Table
3033 ///
3034 #define EFI_ACPI_6_5_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
3035
3036 ///
3037 /// "ETDT" Event Timer Description Table
3038 ///
3039 #define EFI_ACPI_6_5_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
3040
3041 ///
3042 /// "HPET" IA-PC High Precision Event Timer Table
3043 ///
3044 #define EFI_ACPI_6_5_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
3045
3046 ///
3047 /// "iBFT" iSCSI Boot Firmware Table
3048 ///
3049 #define EFI_ACPI_6_5_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
3050
3051 ///
3052 /// "IORT" I/O Remapping Table
3053 ///
3054 #define EFI_ACPI_6_5_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')
3055
3056 ///
3057 /// "IVRS" I/O Virtualization Reporting Structure
3058 ///
3059 #define EFI_ACPI_6_5_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
3060
3061 ///
3062 /// "LPIT" Low Power Idle Table
3063 ///
3064 #define EFI_ACPI_6_5_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')
3065
3066 ///
3067 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
3068 ///
3069 #define EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
3070
3071 ///
3072 /// "MCHI" Management Controller Host Interface Table
3073 ///
3074 #define EFI_ACPI_6_5_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
3075
3076 ///
3077 /// "MSDM" MS Data Management Table
3078 ///
3079 #define EFI_ACPI_6_5_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
3080
3081 ///
3082 /// "PCCT" Platform Communications Channel Table
3083 ///
3084 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')
3085
3086 ///
3087 /// "PHAT" Platform Health Assessment Table
3088 ///
3089 #define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')
3090
3091 ///
3092 /// "SDEI" Software Delegated Exceptions Interface Table
3093 ///
3094 #define EFI_ACPI_6_5_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')
3095
3096 ///
3097 /// "SLIC" MS Software Licensing Table Specification
3098 ///
3099 #define EFI_ACPI_6_5_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
3100
3101 ///
3102 /// "SPCR" Serial Port Concole Redirection Table
3103 ///
3104 #define EFI_ACPI_6_5_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
3105
3106 ///
3107 /// "SPMI" Server Platform Management Interface Table
3108 ///
3109 #define EFI_ACPI_6_5_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
3110
3111 ///
3112 /// "STAO" _STA Override Table
3113 ///
3114 #define EFI_ACPI_6_5_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')
3115
3116 ///
3117 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
3118 ///
3119 #define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
3120
3121 ///
3122 /// "TPM2" Trusted Computing Platform 1 Table
3123 ///
3124 #define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
3125
3126 ///
3127 /// "UEFI" UEFI ACPI Data Table
3128 ///
3129 #define EFI_ACPI_6_5_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
3130
3131 ///
3132 /// "WAET" Windows ACPI Emulated Devices Table
3133 ///
3134 #define EFI_ACPI_6_5_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
3135
3136 ///
3137 /// "WDAT" Watchdog Action Table
3138 ///
3139 #define EFI_ACPI_6_5_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
3140
3141 ///
3142 /// "WDRT" Watchdog Resource Table
3143 ///
3144 #define EFI_ACPI_6_5_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
3145
3146 ///
3147 /// "WPBT" MS Platform Binary Table
3148 ///
3149 #define EFI_ACPI_6_5_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
3150
3151 ///
3152 /// "WSMT" Windows SMM Security Mitigation Table
3153 ///
3154 #define EFI_ACPI_6_5_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')
3155
3156 ///
3157 /// "XENV" Xen Project Table
3158 ///
3159 #define EFI_ACPI_6_5_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')
3160
3161 #pragma pack()
3162
3163 #endif