MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14   @par Revision Reference:
  15     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  16       Specification v2.4, Dated June 2016.
  17       http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
  18
  19   @par Glossary:
  20     - HPET - High Precision Event Timer
  21     - NUMA - Non-uniform Memory Access
  22 **/
  23 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  24 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  25
  26 #pragma pack(1)
  27
  28 ///
  29 /// DMA-Remapping Reporting Structure definitions from section 8.1
  30 ///@{
  31 #define EFI_ACPI_DMAR_REVISION                    0x01
  32
  33 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP            BIT0
  34 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT        BIT1
  35 ///@}
  36
  37 ///
  38 /// Remapping Structure Types definitions from section 8.2
  39 ///@{
  40 #define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
  41 #define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
  42 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
  43 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
  44 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
  45 ///@}
  46
  47 ///
  48 /// DMA-Remapping Hardware Unit definitions from section 8.3
  49 ///
  50 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  51
  52 ///
  53 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  54 ///@{
  55 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  56 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  57 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  58 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  59 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  60 ///@}
  61
  62 ///
  63 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  64 ///
  65 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
  66
  67 ///
  68 /// Definition for DMA Remapping Structure Header
  69 ///
  70 typedef struct {
  71   UINT16        Type;
  72   UINT16        Length;
  73 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  74
  75 ///
  76 /// Definition for DMA-Remapping PCI Path
  77 ///
  78 typedef struct {
  79   UINT8         Device;
  80   UINT8         Function;
  81 } EFI_ACPI_DMAR_PCI_PATH;
  82
  83 ///
  84 /// Device Scope Structure is defined in section 8.3.1
  85 ///
  86 typedef struct {
  87   UINT8         Type;
  88   UINT8         Length;
  89   UINT16        Reserved2;
  90   UINT8         EnumerationId;
  91   UINT8         StartBusNumber;
  92 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  93
  94 /**
  95   DMA-remapping hardware unit definition (DRHD) structure is defined in
  96   section 8.3. This uniquely represents a remapping hardware unit present
  97   in the platform. There must be at least one instance of this structure
  98   for each PCI segment in the platform.
  99 **/
 100 typedef struct {
 101   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 102   /**
 103     - Bit[0]: INCLUDE_PCI_ALL
 104               - If Set, this remapping hardware unit has under its scope all
 105                 PCI compatible devices in the specified Segment, except devices
 106                 reported under the scope of other remapping hardware units for
 107                 the same Segment.
 108               - If Clear, this remapping hardware unit has under its scope only
 109                 devices in the specified Segment that are explicitly identified
 110                 through the DeviceScope field.
 111     - Bits[7:1] Reserved.
 112   **/
 113   UINT8                           Flags;
 114   UINT8                           Reserved;
 115   ///
 116   /// The PCI Segment associated with this unit.
 117   ///
 118   UINT16                          SegmentNumber;
 119   ///
 120   /// Base address of remapping hardware register-set for this unit.
 121   ///
 122   UINT64                          RegisterBaseAddress;
 123 } EFI_ACPI_DMAR_DRHD_HEADER;
 124
 125 /**
 126   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 127   Reserved memory ranges that may be DMA targets may be reported through the
 128   RMRR structures, along with the devices that requires access to the specified
 129   reserved memory region.
 130 **/
 131 typedef struct {
 132   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 133   UINT8                           Reserved[2];
 134   ///
 135   /// PCI Segment Number associated with devices identified through
 136   /// the Device Scope field.
 137   ///
 138   UINT16                          SegmentNumber;
 139   ///
 140   /// Base address of 4KB-aligned reserved memory region
 141   ///
 142   UINT64                          ReservedMemoryRegionBaseAddress;
 143   /**
 144     Last address of the reserved memory region. Value in this field must be
 145     greater than the value in Reserved Memory Region Base Address field.
 146     The reserved memory region size (Limit - Base + 1) must be an integer
 147     multiple of 4KB.
 148   **/
 149   UINT64                          ReservedMemoryRegionLimitAddress;
 150 } EFI_ACPI_DMAR_RMRR_HEADER;
 151
 152 /**
 153   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 154   This structure is applicable only for platforms supporting Device-TLBs as
 155   reported through the Extended Capability Register. For each PCI Segment in
 156   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 157   ATSR structures identifies PCI-Express Root-Ports supporting Address
 158   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 159   devices behind a Root Port only if the Root Port is reported as supporting
 160   ATS transactions.
 161 **/
 162 typedef struct {
 163   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 164   /**
 165     - Bit[0]: ALL_PORTS:
 166               - If Set, indicates all PCI Express Root Ports in the specified
 167                 PCI Segment supports ATS transactions.
 168               - If Clear, indicates ATS transactions are supported only on
 169                 Root Ports identified through the Device Scope field.
 170     - Bits[7:1] Reserved.
 171   **/
 172   UINT8                           Flags;
 173   UINT8                           Reserved;
 174   ///
 175   /// The PCI Segment associated with this ATSR structure
 176   ///
 177   UINT16                          SegmentNumber;
 178 } EFI_ACPI_DMAR_ATSR_HEADER;
 179
 180 /**
 181   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 182   in section 8.6. This is intended to be used only on NUMA platforms with
 183   Remapping hardware units and memory spanned across multiple nodes.
 184   When used, there must be a RHSA structure for each Remapping hardware unit
 185   reported through DRHD structure.
 186 **/
 187 typedef struct {
 188   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 189   UINT8                           Reserved[4];
 190   ///
 191   /// Register Base Address of this Remap hardware unit reported in the
 192   /// corresponding DRHD structure.
 193   ///
 194   UINT64                          RegisterBaseAddress;
 195   ///
 196   /// Proximity Domain to which the Remap hardware unit identified by the
 197   /// Register Base Address field belongs.
 198   ///
 199   UINT32                          ProximityDomain;
 200 } EFI_ACPI_DMAR_RHSA_HEADER;
 201
 202 /**
 203   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 204   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 205   issuing DMA requests in the platform. ANDD structures are used in conjunction
 206   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 207 **/
 208 typedef struct {
 209   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 210   UINT8                           Reserved[3];
 211   /**
 212     Each ACPI device enumerated through an ANDD structure must have a unique
 213     value for this field. To report an ACPI device with ACPI Device Number
 214     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 215     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 216     The Start Bus Number and Path fields in the Device-Scope together
 217     provides the 16-bit source-id allocated by platform for the ACPI device.
 218   **/
 219   UINT8                           AcpiDeviceNumber;
 220 } EFI_ACPI_DMAR_ANDD_HEADER;
 221
 222 /**
 223   DMA Remapping Reporting Structure Header as defined in section 8.1
 224   This header will be followed by list of Remapping Structures listed below
 225     - DMA Remapping Hardware Unit Definition (DRHD)
 226     - Reserved Memory Region Reporting (RMRR)
 227     - Root Port ATS Capability Reporting (ATSR)
 228     - Remapping Hardware Static Affinity (RHSA)
 229     - ACPI Name-space Device Declaration (ANDD)
 230   These structure types must by reported in numerical order.
 231   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 232   structures of type 1 (RMRR), and so forth.
 233 **/
 234 typedef struct {
 235   EFI_ACPI_DESCRIPTION_HEADER     Header;
 236   /**
 237     This field indicates the maximum DMA physical addressability supported by
 238     this platform. The system address map reported by the BIOS indicates what
 239     portions of this addresses are populated. The Host Address Width (HAW) of
 240     the platform is computed as (N+1), where N is the value reported in this
 241     field.
 242     For example, for a platform supporting 40 bits of physical addressability,
 243     the value of 100111b is reported in this field.
 244   **/
 245   UINT8                           HostAddressWidth;
 246   /**
 247     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 248                 remapping. If Set, the platform supports interrupt remapping.
 249     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 250                 firmware may Set this field to request system software to opt
 251                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 252                 valid only when the INTR_REMAP field (bit 0) is Set.
 253     - Bits[7:2] Reserved.
 254   **/
 255   UINT8                           Flags;
 256   UINT8                           Reserved[10];
 257 } EFI_ACPI_DMAR_HEADER;
 258
 259 #pragma pack()
 260
 261 #endif