]> git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Include/IndustryStandard/IoRemappingTable.h
MdePkg: IORT Specification Rev D updates
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / IoRemappingTable.h
1 /** @file
2 ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
3
4 http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf
5
6 Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
7 Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
8
9 This program and the accompanying materials
10 are licensed and made available under the terms and conditions of the BSD License
11 which accompanies this distribution. The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php
13
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 **/
17
18 #ifndef __IO_REMAPPING_TABLE_H__
19 #define __IO_REMAPPING_TABLE_H__
20
21 #include <IndustryStandard/Acpi.h>
22
23 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
24
25 #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
26 #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
27 #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
28 #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
29 #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
30 #define EFI_ACPI_IORT_TYPE_PMCG 0x5
31
32 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
33
34 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
35 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
36 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
37 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
38
39 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
40 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
41
42 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
43 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
44 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
45 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
46 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
47 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
48
49 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
50 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
51
52 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
53 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
54
55 #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
56 #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
57 #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
58
59 #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
60 #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
61 #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
62
63 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
64 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
65
66 #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
67
68 #pragma pack(1)
69
70 ///
71 /// Table header
72 ///
73 typedef struct {
74 EFI_ACPI_DESCRIPTION_HEADER Header;
75 UINT32 NumNodes;
76 UINT32 NodeOffset;
77 UINT32 Reserved;
78 } EFI_ACPI_6_0_IO_REMAPPING_TABLE;
79
80 ///
81 /// Definition for ID mapping table shared by all node types
82 ///
83 typedef struct {
84 UINT32 InputBase;
85 UINT32 NumIds;
86 UINT32 OutputBase;
87 UINT32 OutputReference;
88 UINT32 Flags;
89 } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
90
91 ///
92 /// Node header definition shared by all node types
93 ///
94 typedef struct {
95 UINT8 Type;
96 UINT16 Length;
97 UINT8 Revision;
98 UINT32 Reserved;
99 UINT32 NumIdMappings;
100 UINT32 IdReference;
101 } EFI_ACPI_6_0_IO_REMAPPING_NODE;
102
103 ///
104 /// Node type 0: ITS node
105 ///
106 typedef struct {
107 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
108
109 UINT32 NumItsIdentifiers;
110 //UINT32 ItsIdentifiers[NumItsIdentifiers];
111 } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
112
113 ///
114 /// Node type 1: root complex node
115 ///
116 typedef struct {
117 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
118
119 UINT32 CacheCoherent;
120 UINT8 AllocationHints;
121 UINT16 Reserved;
122 UINT8 MemoryAccessFlags;
123
124 UINT32 AtsAttribute;
125 UINT32 PciSegmentNumber;
126 UINT8 MemoryAddressSize;
127 UINT8 Reserved1[3];
128 } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
129
130 ///
131 /// Node type 2: named component node
132 ///
133 typedef struct {
134 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
135
136 UINT32 Flags;
137 UINT32 CacheCoherent;
138 UINT8 AllocationHints;
139 UINT16 Reserved;
140 UINT8 MemoryAccessFlags;
141 UINT8 AddressSizeLimit;
142 //UINT8 ObjectName[];
143 } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
144
145 ///
146 /// Node type 3: SMMUv1 or SMMUv2 node
147 ///
148 typedef struct {
149 UINT32 Interrupt;
150 UINT32 InterruptFlags;
151 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
152
153 typedef struct {
154 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
155
156 UINT64 Base;
157 UINT64 Span;
158 UINT32 Model;
159 UINT32 Flags;
160 UINT32 GlobalInterruptArrayRef;
161 UINT32 NumContextInterrupts;
162 UINT32 ContextInterruptArrayRef;
163 UINT32 NumPmuInterrupts;
164 UINT32 PmuInterruptArrayRef;
165
166 UINT32 SMMU_NSgIrpt;
167 UINT32 SMMU_NSgIrptFlags;
168 UINT32 SMMU_NSgCfgIrpt;
169 UINT32 SMMU_NSgCfgIrptFlags;
170
171 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
172 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
173 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
174
175 ///
176 /// Node type 4: SMMUv3 node
177 ///
178 typedef struct {
179 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
180
181 UINT64 Base;
182 UINT32 Flags;
183 UINT32 Reserved;
184 UINT64 VatosAddress;
185 UINT32 Model;
186 UINT32 Event;
187 UINT32 Pri;
188 UINT32 Gerr;
189 UINT32 Sync;
190 UINT32 ProximityDomain;
191 UINT32 DeviceIdMappingIndex;
192 } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
193
194 ///
195 /// Node type 5: PMCG node
196 ///
197 typedef struct {
198 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
199
200 UINT64 Base;
201 UINT32 OverflowInterruptGsiv;
202 UINT32 NodeReference;
203 UINT64 Page1Base;
204 //EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
205 } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
206
207 #pragma pack()
208
209 #endif