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MdePkg: SMMUv3 updates for IORT table definitions
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1 /** @file
2 ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049C
3
4 http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf
5
6 Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
7 Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
8
9 This program and the accompanying materials
10 are licensed and made available under the terms and conditions of the BSD License
11 which accompanies this distribution. The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php
13
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 **/
17
18 #ifndef __IO_REMAPPING_TABLE_H__
19 #define __IO_REMAPPING_TABLE_H__
20
21 #include <IndustryStandard/Acpi.h>
22
23 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
24
25 #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
26 #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
27 #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
28 #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
29 #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
30 #define EFI_ACPI_IORT_TYPE_PMCG 0x5
31
32 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
33
34 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
35 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
36 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
37 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
38
39 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
40 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
41
42 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
43 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
44 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
45 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
46 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
47 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
48
49 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
50 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
51
52 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
53 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
54
55 #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
56 #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
57 #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
58
59 #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
60 #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
61 #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
62
63 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
64 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
65
66 #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
67
68 #pragma pack(1)
69
70 ///
71 /// Table header
72 ///
73 typedef struct {
74 EFI_ACPI_DESCRIPTION_HEADER Header;
75 UINT32 NumNodes;
76 UINT32 NodeOffset;
77 UINT32 Reserved;
78 } EFI_ACPI_6_0_IO_REMAPPING_TABLE;
79
80 ///
81 /// Definition for ID mapping table shared by all node types
82 ///
83 typedef struct {
84 UINT32 InputBase;
85 UINT32 NumIds;
86 UINT32 OutputBase;
87 UINT32 OutputReference;
88 UINT32 Flags;
89 } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
90
91 ///
92 /// Node header definition shared by all node types
93 ///
94 typedef struct {
95 UINT8 Type;
96 UINT16 Length;
97 UINT8 Revision;
98 UINT32 Reserved;
99 UINT32 NumIdMappings;
100 UINT32 IdReference;
101 } EFI_ACPI_6_0_IO_REMAPPING_NODE;
102
103 ///
104 /// Node type 0: ITS node
105 ///
106 typedef struct {
107 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
108
109 UINT32 NumItsIdentifiers;
110 //UINT32 ItsIdentifiers[NumItsIdentifiers];
111 } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
112
113 ///
114 /// Node type 1: root complex node
115 ///
116 typedef struct {
117 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
118
119 UINT32 CacheCoherent;
120 UINT8 AllocationHints;
121 UINT16 Reserved;
122 UINT8 MemoryAccessFlags;
123
124 UINT32 AtsAttribute;
125 UINT32 PciSegmentNumber;
126 } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
127
128 ///
129 /// Node type 2: named component node
130 ///
131 typedef struct {
132 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
133
134 UINT32 Flags;
135 UINT32 CacheCoherent;
136 UINT8 AllocationHints;
137 UINT16 Reserved;
138 UINT8 MemoryAccessFlags;
139 UINT8 AddressSizeLimit;
140 //UINT8 ObjectName[];
141 } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
142
143 ///
144 /// Node type 3: SMMUv1 or SMMUv2 node
145 ///
146 typedef struct {
147 UINT32 Interrupt;
148 UINT32 InterruptFlags;
149 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
150
151 typedef struct {
152 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
153
154 UINT64 Base;
155 UINT64 Span;
156 UINT32 Model;
157 UINT32 Flags;
158 UINT32 GlobalInterruptArrayRef;
159 UINT32 NumContextInterrupts;
160 UINT32 ContextInterruptArrayRef;
161 UINT32 NumPmuInterrupts;
162 UINT32 PmuInterruptArrayRef;
163
164 UINT32 SMMU_NSgIrpt;
165 UINT32 SMMU_NSgIrptFlags;
166 UINT32 SMMU_NSgCfgIrpt;
167 UINT32 SMMU_NSgCfgIrptFlags;
168
169 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
170 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
171 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
172
173 ///
174 /// Node type 4: SMMUv3 node
175 ///
176 typedef struct {
177 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
178
179 UINT64 Base;
180 UINT32 Flags;
181 UINT32 Reserved;
182 UINT64 VatosAddress;
183 UINT32 Model;
184 UINT32 Event;
185 UINT32 Pri;
186 UINT32 Gerr;
187 UINT32 Sync;
188 UINT8 ProximityDomain;
189 UINT8 Reserved1[3];
190 UINT32 DeviceIdMappingIndex;
191 } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
192
193 ///
194 /// Node type 5: PMCG node
195 ///
196 typedef struct {
197 EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
198
199 UINT64 Base;
200 UINT32 OverflowInterruptGsiv;
201 UINT32 NodeReference;
202 //EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
203 } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
204
205 #pragma pack()
206
207 #endif