2 ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B
4 http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Remapping_Table.pdf
6 Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
8 This program and the accompanying materials
9 are licensed and made available under the terms and conditions of the BSD License
10 which accompanies this distribution. The full text of the license may be found at
11 http://opensource.org/licenses/bsd-license.php
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef __IO_REMAPPING_TABLE_H__
18 #define __IO_REMAPPING_TABLE_H__
20 #include <IndustryStandard/Acpi.h>
22 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
24 #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
25 #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
26 #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
27 #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
28 #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
30 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
32 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
33 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
34 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
35 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
37 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
38 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
40 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
41 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
42 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
43 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
45 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
46 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
48 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
49 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
51 #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
52 #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
54 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
55 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
57 #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
65 EFI_ACPI_DESCRIPTION_HEADER Header
;
69 } EFI_ACPI_6_0_IO_REMAPPING_TABLE
;
72 /// Definition for ID mapping table shared by all node types
78 UINT32 OutputReference
;
80 } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE
;
83 /// Node header definition shared by all node types
92 } EFI_ACPI_6_0_IO_REMAPPING_NODE
;
95 /// Node type 0: ITS node
98 EFI_ACPI_6_0_IO_REMAPPING_NODE Node
;
100 UINT32 NumItsIdentifiers
;
101 //UINT32 ItsIdentifiers[NumItsIdentifiers];
102 } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE
;
105 /// Node type 1: root complex node
108 EFI_ACPI_6_0_IO_REMAPPING_NODE Node
;
110 UINT32 CacheCoherent
;
111 UINT8 AllocationHints
;
113 UINT8 MemoryAccessFlags
;
116 UINT32 PciSegmentNumber
;
117 } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE
;
120 /// Node type 2: named component node
123 EFI_ACPI_6_0_IO_REMAPPING_NODE Node
;
126 UINT32 CacheCoherent
;
127 UINT8 AllocationHints
;
129 UINT8 MemoryAccessFlags
;
130 UINT8 AddressSizeLimit
;
131 //UINT8 ObjectName[];
132 } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE
;
135 /// Node type 3: SMMUv1 or SMMUv2 node
139 UINT32 InterruptFlags
;
140 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT
;
143 EFI_ACPI_6_0_IO_REMAPPING_NODE Node
;
149 UINT32 GlobalInterruptArrayRef
;
150 UINT32 NumContextInterrupts
;
151 UINT32 ContextInterruptArrayRef
;
152 UINT32 NumPmuInterrupts
;
153 UINT32 PmuInterruptArrayRef
;
156 UINT32 SMMU_NSgIrptFlags
;
157 UINT32 SMMU_NSgCfgIrpt
;
158 UINT32 SMMU_NSgCfgIrptFlags
;
160 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
161 //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
162 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE
;
165 /// Node type 4: SMMUv4 node
168 EFI_ACPI_6_0_IO_REMAPPING_NODE Node
;
179 } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE
;