MdePkg/Include/IndustryStandard/PciCodeId.h

   1 /** @file
   2   The file lists the PCI class codes only defined in PCI code and ID assignment specification
   3   revision 1.3.
   4
   5   Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __PCI_CODE_ID_H__
  17 #define __PCI_CODE_ID_H__
  18
  19
  20 ///
  21 /// PCI_CLASS_MASS_STORAGE, Base Class 01h.
  22 ///
  23 ///@{
  24 #define   PCI_IF_MASS_STORAGE_SCSI_VENDOR_SPECIFIC          0x00
  25 #define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_PQI               0x11
  26 #define   PCI_IF_MASS_STORAGE_SCSI_CONTROLLER_PQI           0x12
  27 #define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_CONTROLLER_PQI    0x13
  28 #define   PCI_IF_MASS_STORAGE_SCSI_DEVICE_NVM_EXPRESS       0x21
  29 #define   PCI_IF_MASS_STORAGE_SATA_SERIAL_BUS               0x02
  30 #define PCI_CLASS_MASS_STORAGE_SAS                        0x07
  31 #define   PCI_IF_MASS_STORAGE_SAS                           0x00
  32 #define   PCI_IF_MASS_STORAGE_SAS_SERIAL_BUS                0x01
  33 #define PCI_CLASS_MASS_STORAGE_SOLID_STATE                0x08
  34 #define   PCI_IF_MASS_STORAGE_SOLID_STATE                   0x00
  35 #define   PCI_IF_MASS_STORAGE_SOLID_STATE_NVMHCI            0x01
  36 #define   PCI_IF_MASS_STORAGE_SOLID_STATE_ENTERPRISE_NVMHCI 0x02
  37 ///@}
  38
  39 ///
  40 /// PCI_CLASS_NETWORK, Base Class 02h.
  41 ///
  42 ///@{
  43 #define PCI_CLASS_NETWORK_INFINIBAND   0x07
  44 ///@}
  45
  46 ///
  47 /// PCI_CLASS_MEDIA, Base Class 04h.
  48 ///
  49 ///@{
  50 #define PCI_CLASS_MEDIA_MIXED_MODE   0x03
  51 ///@}
  52
  53 ///
  54 /// PCI_CLASS_BRIDGE, Base Class 06h.
  55 ///
  56 ///@{
  57 #define PCI_CLASS_BRIDGE_ADVANCED_SWITCHING_TO_PCI      0x0B
  58 #define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_CUSTOM  0x00
  59 #define   PCI_IF_BRIDGE_ADVANCED_SWITCHING_TO_PCI_ASI_SIG 0x01
  60 ///@}
  61
  62 ///
  63 /// PCI_CLASS_SYSTEM_PERIPHERAL, Base Class 08h.
  64 ///
  65 ///@{
  66 #define   PCI_IF_HPET                 0x03
  67 #define PCI_SUBCLASS_SD_HOST_CONTROLLER 0x05
  68 #define PCI_SUBCLASS_IOMMU              0x06
  69 ///@}
  70
  71 ///
  72 /// PCI_CLASS_PROCESSOR, Base Class 0Bh.
  73 ///
  74 ///@{
  75 #define PCI_SUBCLASS_PROC_OTHER 0x80
  76 ///@}
  77
  78 ///
  79 /// PCI_CLASS_SERIAL, Base Class 0Ch.
  80 ///
  81 ///@{
  82 #define   PCI_IF_XHCI             0x30
  83 #define PCI_CLASS_SERIAL_OTHER  0x80
  84 ///@}
  85
  86 ///
  87 /// PCI_CLASS_SATELLITE, Base Class 0Fh.
  88 ///
  89 ///@{
  90 #define PCI_SUBCLASS_SATELLITE_OTHER 0x80
  91 ///@}
  92
  93 ///
  94 /// PCI_CLASS_PROCESSING_ACCELERATOR, Base Class 12h.
  95 ///
  96 ///@{
  97 #define PCI_CLASS_PROCESSING_ACCELERATOR  0x12
  98 ///@}
  99
 100 #endif