MdePkg/Include/IndustryStandard/Sal.h

   1 /** @file
   2   Main SAL API's defined in SAL 3.0 specification.
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef __SAL_API_H__
  16 #define __SAL_API_H__
  17
  18 //
  19 // FIT Types
  20 // Table 2-2 of Intel Itanium Processor Family System Abstraction Layer Specification December 2003
  21 //
  22 #define EFI_SAL_FIT_FIT_HEADER_TYPE 0x00
  23 #define EFI_SAL_FIT_PAL_B_TYPE      0x01
  24 //
  25 // type from 0x02 to 0x0E is reserved.
  26 //
  27 #define EFI_SAL_FIT_PAL_A_TYPE  0x0F
  28 //
  29 // OEM-defined type range is from 0x10 to 0x7E. Here we defined the PEI_CORE type as 0x10
  30 //
  31 #define EFI_SAL_FIT_PEI_CORE_TYPE 0x10
  32 #define EFI_SAL_FIT_UNUSED_TYPE   0x7F
  33
  34 //
  35 // EFI_SAL_STATUS
  36 //
  37 typedef UINTN EFI_SAL_STATUS;
  38
  39 #define EFI_SAL_SUCCESS               ((EFI_SAL_STATUS) 0)
  40 #define EFI_SAL_MORE_RECORDS          ((EFI_SAL_STATUS) 3)
  41 #define EFI_SAL_NOT_IMPLEMENTED       ((EFI_SAL_STATUS) - 1)
  42 #define EFI_SAL_INVALID_ARGUMENT      ((EFI_SAL_STATUS) - 2)
  43 #define EFI_SAL_ERROR                 ((EFI_SAL_STATUS) - 3)
  44 #define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
  45 #define EFI_SAL_NO_INFORMATION        ((EFI_SAL_STATUS) - 5)
  46 #define EFI_SAL_NOT_ENOUGH_SCRATCH    ((EFI_SAL_STATUS) - 9)
  47
  48 //
  49 //  Return values from SAL
  50 //
  51 typedef struct {
  52   EFI_SAL_STATUS  Status; // register r8
  53   UINTN           r9;
  54   UINTN           r10;
  55   UINTN           r11;
  56 } SAL_RETURN_REGS;
  57
  58 //
  59 //  Delivery Mode of IPF CPU.
  60 //
  61 typedef enum {
  62   EFI_DELIVERY_MODE_INT,
  63   EFI_DELIVERY_MODE_MPreserved1,
  64   EFI_DELIVERY_MODE_PMI,
  65   EFI_DELIVERY_MODE_MPreserved2,
  66   EFI_DELIVERY_MODE_NMI,
  67   EFI_DELIVERY_MODE_INIT,
  68   EFI_DELIVERY_MODE_MPreserved3,
  69   EFI_DELIVERY_MODE_ExtINT
  70 } EFI_DELIVERY_MODE;
  71
  72 typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
  73   (
  74     IN UINT64 FunctionId,
  75     IN UINT64 Arg2,
  76     IN UINT64 Arg3,
  77     IN UINT64 Arg4,
  78     IN UINT64 Arg5,
  79     IN UINT64 Arg6,
  80     IN UINT64 Arg7,
  81     IN UINT64 Arg8
  82   );
  83
  84 //
  85 // SAL Procedure FunctionId definition
  86 //
  87 #define EFI_SAL_SET_VECTORS             0x01000000
  88 #define EFI_SAL_GET_STATE_INFO          0x01000001
  89 #define EFI_SAL_GET_STATE_INFO_SIZE     0x01000002
  90 #define EFI_SAL_CLEAR_STATE_INFO        0x01000003
  91 #define EFI_SAL_MC_RENDEZ               0x01000004
  92 #define EFI_SAL_MC_SET_PARAMS           0x01000005
  93 #define EFI_SAL_REGISTER_PHYSICAL_ADDR  0x01000006
  94 #define EFI_SAL_CACHE_FLUSH             0x01000008
  95 #define EFI_SAL_CACHE_INIT              0x01000009
  96 #define EFI_SAL_PCI_CONFIG_READ         0x01000010
  97 #define EFI_SAL_PCI_CONFIG_WRITE        0x01000011
  98 #define EFI_SAL_FREQ_BASE               0x01000012
  99 #define EFI_SAL_PHYSICAL_ID_INFO        0x01000013
 100 #define EFI_SAL_UPDATE_PAL              0x01000020
 101
 102 #define EFI_SAL_FUNCTION_ID_MASK        0x0000ffff
 103 #define EFI_SAL_MAX_SAL_FUNCTION_ID     0x00000021
 104
 105 //
 106 // SAL Procedure parameter definitions
 107 // Not much point in using typedefs or enums because all params
 108 // are UINT64 and the entry point is common
 109 //
 110 // EFI_SAL_SET_VECTORS
 111 //
 112 #define EFI_SAL_SET_MCA_VECTOR          0x0
 113 #define EFI_SAL_SET_INIT_VECTOR         0x1
 114 #define EFI_SAL_SET_BOOT_RENDEZ_VECTOR  0x2
 115
 116 typedef struct {
 117   UINT64  Length : 32;
 118   UINT64  ChecksumValid : 1;
 119   UINT64  Reserved1 : 7;
 120   UINT64  ByteChecksum : 8;
 121   UINT64  Reserved2 : 16;
 122 } SAL_SET_VECTORS_CS_N;
 123
 124 //
 125 // EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
 126 // EFI_SAL_CLEAR_STATE_INFO
 127 //
 128 #define EFI_SAL_MCA_STATE_INFO  0x0
 129 #define EFI_SAL_INIT_STATE_INFO 0x1
 130 #define EFI_SAL_CMC_STATE_INFO  0x2
 131 #define EFI_SAL_CP_STATE_INFO   0x3
 132
 133 //
 134 // EFI_SAL_MC_SET_PARAMS
 135 //
 136 #define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
 137 #define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
 138 #define EFI_SAL_MC_SET_CPE_PARAM    0x3
 139
 140 #define EFI_SAL_MC_SET_INTR_PARAM   0x1
 141 #define EFI_SAL_MC_SET_MEM_PARAM    0x2
 142
 143 //
 144 // EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
 145 //
 146 #define EFI_SAL_REGISTER_PAL_ADDR 0x0
 147
 148 //
 149 // EFI_SAL_CACHE_FLUSH
 150 //
 151 #define EFI_SAL_FLUSH_I_CACHE       0x01
 152 #define EFI_SAL_FLUSH_D_CACHE       0x02
 153 #define EFI_SAL_FLUSH_BOTH_CACHE    0x03
 154 #define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
 155
 156 //
 157 // EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
 158 //
 159 #define EFI_SAL_PCI_CONFIG_ONE_BYTE   0x1
 160 #define EFI_SAL_PCI_CONFIG_TWO_BYTES  0x2
 161 #define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
 162
 163 typedef struct {
 164   UINT64  Register : 8;
 165   UINT64  Function : 3;
 166   UINT64  Device : 5;
 167   UINT64  Bus : 8;
 168   UINT64  Segment : 8;
 169   UINT64  Reserved : 32;
 170 } SAL_PCI_ADDRESS;
 171
 172 //
 173 // EFI_SAL_FREQ_BASE
 174 //
 175 #define EFI_SAL_CPU_INPUT_FREQ_BASE     0x0
 176 #define EFI_SAL_PLATFORM_IT_FREQ_BASE   0x1
 177 #define EFI_SAL_PLATFORM_RTC_FREQ_BASE  0x2
 178
 179 //
 180 // EFI_SAL_UPDATE_PAL
 181 //
 182 #define EFI_SAL_UPDATE_BAD_PAL_VERSION  ((UINT64) -1)
 183 #define EFI_SAL_UPDATE_PAL_AUTH_FAIL    ((UINT64) -2)
 184 #define EFI_SAL_UPDATE_PAL_BAD_TYPE     ((UINT64) -3)
 185 #define EFI_SAL_UPDATE_PAL_READONLY     ((UINT64) -4)
 186 #define EFI_SAL_UPDATE_PAL_WRITE_FAIL   ((UINT64) -10)
 187 #define EFI_SAL_UPDATE_PAL_ERASE_FAIL   ((UINT64) -11)
 188 #define EFI_SAL_UPDATE_PAL_READ_FAIL    ((UINT64) -12)
 189 #define EFI_SAL_UPDATE_PAL_CANT_FIT     ((UINT64) -13)
 190
 191 typedef struct {
 192   UINT32  Size;
 193   UINT32  MmddyyyyDate;
 194   UINT16  Version;
 195   UINT8   Type;
 196   UINT8   Reserved[5];
 197   UINT64  FwVendorId;
 198 } SAL_UPDATE_PAL_DATA_BLOCK;
 199
 200 typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
 201   struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
 202   struct SAL_UPDATE_PAL_DATA_BLOCK  *DataBlock;
 203   UINT8                             StoreChecksum;
 204   UINT8                             Reserved[15];
 205 } SAL_UPDATE_PAL_INFO_BLOCK;
 206
 207 //
 208 // SAL System Table Definitions
 209 //
 210 #pragma pack(1)
 211 typedef struct {
 212   UINT32  Signature;
 213   UINT32  Length;
 214   UINT16  SalRevision;
 215   UINT16  EntryCount;
 216   UINT8   CheckSum;
 217   UINT8   Reserved[7];
 218   UINT16  SalAVersion;
 219   UINT16  SalBVersion;
 220   UINT8   OemId[32];
 221   UINT8   ProductId[32];
 222   UINT8   Reserved2[8];
 223 } SAL_SYSTEM_TABLE_HEADER;
 224 #pragma pack()
 225
 226 #define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
 227 #define EFI_SAL_REVISION            0x0300
 228 //
 229 // SAL System Types
 230 //
 231 #define EFI_SAL_ST_ENTRY_POINT        0
 232 #define EFI_SAL_ST_MEMORY_DESCRIPTOR  1
 233 #define EFI_SAL_ST_PLATFORM_FEATURES  2
 234 #define EFI_SAL_ST_TR_USAGE           3
 235 #define EFI_SAL_ST_PTC                4
 236 #define EFI_SAL_ST_AP_WAKEUP          5
 237
 238 #pragma pack(1)
 239 typedef struct {
 240   UINT8   Type; //  Type == 0
 241   UINT8   Reserved[7];
 242   UINT64  PalProcEntry;
 243   UINT64  SalProcEntry;
 244   UINT64  SalGlobalDataPointer;
 245   UINT64  Reserved2[2];
 246 } SAL_ST_ENTRY_POINT_DESCRIPTOR;
 247
 248 #pragma pack(1)
 249 typedef struct {
 250   UINT8 Type;                     // Type == 2
 251   UINT8 PlatformFeatures;
 252   UINT8 Reserved[14];
 253 } SAL_ST_PLATFORM_FEATURES;
 254 #pragma pack()
 255
 256 #define SAL_PLAT_FEAT_BUS_LOCK      0x01
 257 #define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
 258 #define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
 259
 260 #pragma pack(1)
 261 typedef struct {
 262   UINT8   Type;                   // Type == 3
 263   UINT8   TRType;
 264   UINT8   TRNumber;
 265   UINT8   Reserved[5];
 266   UINT64  VirtualAddress;
 267   UINT64  EncodedPageSize;
 268   UINT64  Reserved1;
 269 } SAL_ST_TR_DECRIPTOR;
 270 #pragma pack()
 271
 272 #define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
 273 #define EFI_SAL_ST_TR_USAGE_DATA        01
 274
 275 #pragma pack(1)
 276 typedef struct {
 277   UINT64  NumberOfProcessors;
 278   UINT64  LocalIDRegister;
 279 } SAL_COHERENCE_DOMAIN_INFO;
 280 #pragma pack()
 281
 282 #pragma pack(1)
 283 typedef struct {
 284   UINT8                     Type; // Type == 4
 285   UINT8                     Reserved[3];
 286   UINT32                    NumberOfDomains;
 287   SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
 288 } SAL_ST_CACHE_COHERENCE_DECRIPTOR;
 289 #pragma pack()
 290
 291 #pragma pack(1)
 292 typedef struct {
 293   UINT8   Type;                   // Type == 5
 294   UINT8   WakeUpType;
 295   UINT8   Reserved[6];
 296   UINT64  ExternalInterruptVector;
 297 } SAL_ST_AP_WAKEUP_DECRIPTOR;
 298 #pragma pack()
 299 //
 300 // FIT Entry
 301 //
 302 #define EFI_SAL_FIT_ENTRY_PTR   (0x100000000 - 32)  // 4GB - 24
 303 #define EFI_SAL_FIT_PALA_ENTRY  (0x100000000 - 48)  // 4GB - 32
 304 #define EFI_SAL_FIT_PALB_TYPE   01
 305
 306 typedef struct {
 307   UINT64  Address;
 308   UINT8   Size[3];
 309   UINT8   Reserved;
 310   UINT16  Revision;
 311   UINT8   Type : 7;
 312   UINT8   CheckSumValid : 1;
 313   UINT8   CheckSum;
 314 } EFI_SAL_FIT_ENTRY;
 315
 316 //
 317 //  SAL Common Record Header
 318 //
 319 typedef struct {
 320   UINT16  Length;
 321   UINT8   Data[1024];
 322 } SAL_OEM_DATA;
 323
 324 typedef struct {
 325   UINT8 Seconds;
 326   UINT8 Minutes;
 327   UINT8 Hours;
 328   UINT8 Reserved;
 329   UINT8 Day;
 330   UINT8 Month;
 331   UINT8 Year;
 332   UINT8 Century;
 333 } SAL_TIME_STAMP;
 334
 335 typedef struct {
 336   UINT64          RecordId;
 337   UINT16          Revision;
 338   UINT8           ErrorSeverity;
 339   UINT8           ValidationBits;
 340   UINT32          RecordLength;
 341   SAL_TIME_STAMP  TimeStamp;
 342   UINT8           OemPlatformId[16];
 343 } SAL_RECORD_HEADER;
 344
 345 typedef struct {
 346   GUID                  Guid;
 347   UINT16    Revision;
 348   UINT8     ErrorRecoveryInfo;
 349   UINT8     Reserved;
 350   UINT32    SectionLength;
 351 } SAL_SEC_HEADER;
 352
 353 //
 354 // SAL Processor Record
 355 //
 356 #define SAL_PROCESSOR_ERROR_RECORD_INFO \
 357   { \
 358     0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 359   }
 360
 361 #define CHECK_INFO_VALID_BIT_MASK   0x1
 362 #define REQUESTOR_ID_VALID_BIT_MASK 0x2
 363 #define RESPONDER_ID_VALID_BIT_MASK 0x4
 364 #define TARGER_ID_VALID_BIT_MASK    0x8
 365 #define PRECISE_IP_VALID_BIT_MASK   0x10
 366
 367 typedef struct {
 368   UINT64  InfoValid : 1;
 369   UINT64  ReqValid : 1;
 370   UINT64  RespValid : 1;
 371   UINT64  TargetValid : 1;
 372   UINT64  IpValid : 1;
 373   UINT64  Reserved : 59;
 374   UINT64  Info;
 375   UINT64  Req;
 376   UINT64  Resp;
 377   UINT64  Target;
 378   UINT64  Ip;
 379 } MOD_ERROR_INFO;
 380
 381 typedef struct {
 382   UINT8 CpuidInfo[40];
 383   UINT8 Reserved;
 384 } CPUID_INFO;
 385
 386 typedef struct {
 387   UINT64  FrLow;
 388   UINT64  FrHigh;
 389 } FR_STRUCT;
 390
 391 #define MIN_STATE_VALID_BIT_MASK  0x1
 392 #define BR_VALID_BIT_MASK         0x2
 393 #define CR_VALID_BIT_MASK         0x4
 394 #define AR_VALID_BIT_MASK         0x8
 395 #define RR_VALID_BIT_MASK         0x10
 396 #define FR_VALID_BIT_MASK         0x20
 397
 398 typedef struct {
 399   UINT64    ValidFieldBits;
 400   UINT8     MinStateInfo[1024];
 401   UINT64    Br[8];
 402   UINT64    Cr[128];
 403   UINT64    Ar[128];
 404   UINT64    Rr[8];
 405   FR_STRUCT Fr[128];
 406 } PSI_STATIC_STRUCT;
 407
 408 #define PROC_ERROR_MAP_VALID_BIT_MASK       0x1
 409 #define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
 410 #define PROC_CR_LID_VALID_BIT_MASK          0x4
 411 #define PROC_STATIC_STRUCT_VALID_BIT_MASK   0x8
 412 #define CPU_INFO_VALID_BIT_MASK             0x1000000
 413
 414 typedef struct {
 415   SAL_SEC_HEADER    SectionHeader;
 416   UINT64            ValidationBits;
 417   UINT64            ProcErrorMap;
 418   UINT64            ProcStateParameter;
 419   UINT64            ProcCrLid;
 420   MOD_ERROR_INFO    CacheError[15];
 421   MOD_ERROR_INFO    TlbError[15];
 422   MOD_ERROR_INFO    BusError[15];
 423   MOD_ERROR_INFO    RegFileCheck[15];
 424   MOD_ERROR_INFO    MsCheck[15];
 425   CPUID_INFO        CpuInfo;
 426   PSI_STATIC_STRUCT PsiValidData;
 427 } SAL_PROCESSOR_ERROR_RECORD;
 428
 429 //
 430 //  Sal Platform memory Error Record
 431 //
 432 #define SAL_MEMORY_ERROR_RECORD_INFO \
 433   { \
 434     0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 435   }
 436
 437 #define MEMORY_ERROR_STATUS_VALID_BIT_MASK                0x1
 438 #define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK            0x2
 439 #define MEMORY_ADDR_BIT_MASK                              0x4
 440 #define MEMORY_NODE_VALID_BIT_MASK                        0x8
 441 #define MEMORY_CARD_VALID_BIT_MASK                        0x10
 442 #define MEMORY_MODULE_VALID_BIT_MASK                      0x20
 443 #define MEMORY_BANK_VALID_BIT_MASK                        0x40
 444 #define MEMORY_DEVICE_VALID_BIT_MASK                      0x80
 445 #define MEMORY_ROW_VALID_BIT_MASK                         0x100
 446 #define MEMORY_COLUMN_VALID_BIT_MASK                      0x200
 447 #define MEMORY_BIT_POSITION_VALID_BIT_MASK                0x400
 448 #define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK       0x800
 449 #define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK       0x1000
 450 #define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK             0x2000
 451 #define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK  0x4000
 452 #define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK             0x8000
 453 #define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK    0x10000
 454
 455 typedef struct {
 456   SAL_SEC_HEADER  SectionHeader;
 457   UINT64          ValidationBits;
 458   UINT64          MemErrorStatus;
 459   UINT64          MemPhysicalAddress;
 460   UINT64          MemPhysicalAddressMask;
 461   UINT16          MemNode;
 462   UINT16          MemCard;
 463   UINT16          MemModule;
 464   UINT16          MemBank;
 465   UINT16          MemDevice;
 466   UINT16          MemRow;
 467   UINT16          MemColumn;
 468   UINT16          MemBitPosition;
 469   UINT64          ModRequestorId;
 470   UINT64          ModResponderId;
 471   UINT64          ModTargetId;
 472   UINT64          BusSpecificData;
 473   UINT8           MemPlatformOemId[16];
 474 } SAL_MEMORY_ERROR_RECORD;
 475
 476 //
 477 //  PCI BUS Errors
 478 //
 479 #define SAL_PCI_BUS_ERROR_RECORD_INFO \
 480   { \
 481     0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 482   }
 483
 484 #define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK     0x1
 485 #define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK       0x2
 486 #define PCI_BUS_ID_VALID_BIT_MASK               0x4
 487 #define PCI_BUS_ADDRESS_VALID_BIT_MASK          0x8
 488 #define PCI_BUS_DATA_VALID_BIT_MASK             0x10
 489 #define PCI_BUS_CMD_VALID_BIT_MASK              0x20
 490 #define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK     0x40
 491 #define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK     0x80
 492 #define PCI_BUS_TARGET_VALID_BIT_MASK           0x100
 493 #define PCI_BUS_OEM_ID_VALID_BIT_MASK           0x200
 494 #define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK  0x400
 495
 496 typedef struct {
 497   UINT8 BusNumber;
 498   UINT8 SegmentNumber;
 499 } PCI_BUS_ID;
 500
 501 typedef struct {
 502   SAL_SEC_HEADER  SectionHeader;
 503   UINT64          ValidationBits;
 504   UINT64          PciBusErrorStatus;
 505   UINT16          PciBusErrorType;
 506   PCI_BUS_ID      PciBusId;
 507   UINT32          Reserved;
 508   UINT64          PciBusAddress;
 509   UINT64          PciBusData;
 510   UINT64          PciBusCommand;
 511   UINT64          PciBusRequestorId;
 512   UINT64          PciBusResponderId;
 513   UINT64          PciBusTargetId;
 514   UINT8           PciBusOemId[16];
 515 } SAL_PCI_BUS_ERROR_RECORD;
 516
 517 //
 518 //  PCI Component Errors
 519 //
 520 #define SAL_PCI_COMP_ERROR_RECORD_INFO \
 521   { \
 522     0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 523   }
 524
 525 #define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK    0x1
 526 #define PCI_COMP_INFO_VALID_BIT_MASK            0x2
 527 #define PCI_COMP_MEM_NUM_VALID_BIT_MASK         0x4
 528 #define PCI_COMP_IO_NUM_VALID_BIT_MASK          0x8
 529 #define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK   0x10
 530 #define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
 531
 532 typedef struct {
 533   UINT16  VendorId;
 534   UINT16  DeviceId;
 535   UINT8   ClassCode[3];
 536   UINT8   FunctionNumber;
 537   UINT8   DeviceNumber;
 538   UINT8   BusNumber;
 539   UINT8   SegmentNumber;
 540   UINT8   Reserved[5];
 541 } PCI_COMP_INFO;
 542
 543 typedef struct {
 544   SAL_SEC_HEADER  SectionHeader;
 545   UINT64          ValidationBits;
 546   UINT64          PciComponentErrorStatus;
 547   PCI_COMP_INFO   PciComponentInfo;
 548   UINT32          PciComponentMemNum;
 549   UINT32          PciComponentIoNum;
 550   UINT8           PciBusOemId[16];
 551 } SAL_PCI_COMPONENT_ERROR_RECORD;
 552
 553 //
 554 //  Sal Device Errors Info.
 555 //
 556 #define SAL_DEVICE_ERROR_RECORD_INFO \
 557   { \
 558     0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 559   }
 560
 561 #define SEL_RECORD_ID_VALID_BIT_MASK      0x1;
 562 #define SEL_RECORD_TYPE_VALID_BIT_MASK    0x2;
 563 #define SEL_GENERATOR_ID_VALID_BIT_MASK   0x4;
 564 #define SEL_EVM_REV_VALID_BIT_MASK        0x8;
 565 #define SEL_SENSOR_TYPE_VALID_BIT_MASK    0x10;
 566 #define SEL_SENSOR_NUM_VALID_BIT_MASK     0x20;
 567 #define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
 568 #define SEL_EVENT_DATA1_VALID_BIT_MASK    0x80;
 569 #define SEL_EVENT_DATA2_VALID_BIT_MASK    0x100;
 570 #define SEL_EVENT_DATA3_VALID_BIT_MASK    0x200;
 571
 572 typedef struct {
 573   SAL_SEC_HEADER  SectionHeader;
 574   UINT64          ValidationBits;
 575   UINT16          SelRecordId;
 576   UINT8           SelRecordType;
 577   UINT32          TimeStamp;
 578   UINT16          GeneratorId;
 579   UINT8           EvmRevision;
 580   UINT8           SensorType;
 581   UINT8           SensorNum;
 582   UINT8           EventDirType;
 583   UINT8           Data1;
 584   UINT8           Data2;
 585   UINT8           Data3;
 586 } SAL_DEVICE_ERROR_RECORD;
 587
 588 //
 589 //  Sal SMBIOS Device Errors Info.
 590 //
 591 #define SAL_SMBIOS_ERROR_RECORD_INFO \
 592   { \
 593     0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 594   }
 595
 596 #define SMBIOS_EVENT_TYPE_VALID_BIT_MASK  0x1
 597 #define SMBIOS_LENGTH_VALID_BIT_MASK      0x2
 598 #define SMBIOS_TIME_STAMP_VALID_BIT_MASK  0x4
 599 #define SMBIOS_DATA_VALID_BIT_MASK        0x8
 600
 601 typedef struct {
 602   SAL_SEC_HEADER  SectionHeader;
 603   UINT64          ValidationBits;
 604   UINT8           SmbiosEventType;
 605   UINT8           SmbiosLength;
 606   UINT8           SmbiosBcdTimeStamp[6];
 607 } SAL_SMBIOS_DEVICE_ERROR_RECORD;
 608
 609 //
 610 //  Sal Platform Specific Errors Info.
 611 //
 612 #define SAL_PLATFORM_ERROR_RECORD_INFO \
 613   { \
 614     0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 615   }
 616
 617 #define PLATFORM_ERROR_STATUS_VALID_BIT_MASK    0x1
 618 #define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK    0x2
 619 #define PLATFORM_RESPONDER_ID_VALID_BIT_MASK    0x4
 620 #define PLATFORM_TARGET_VALID_BIT_MASK          0x8
 621 #define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK   0x10
 622 #define PLATFORM_OEM_ID_VALID_BIT_MASK          0x20
 623 #define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
 624 #define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
 625
 626 typedef struct {
 627   SAL_SEC_HEADER  SectionHeader;
 628   UINT64          ValidationBits;
 629   UINT64          PlatformErrorStatus;
 630   UINT64          PlatformRequestorId;
 631   UINT64          PlatformResponderId;
 632   UINT64          PlatformTargetId;
 633   UINT64          PlatformBusSpecificData;
 634   UINT8           OemComponentId[16];
 635 } SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
 636
 637 //
 638 // Union of all the possible Sal Record Types
 639 //
 640 typedef union {
 641   SAL_RECORD_HEADER                   *RecordHeader;
 642   SAL_PROCESSOR_ERROR_RECORD          *SalProcessorRecord;
 643   SAL_PCI_BUS_ERROR_RECORD            *SalPciBusRecord;
 644   SAL_PCI_COMPONENT_ERROR_RECORD      *SalPciComponentRecord;
 645   SAL_DEVICE_ERROR_RECORD             *ImpiRecord;
 646   SAL_SMBIOS_DEVICE_ERROR_RECORD      *SmbiosRecord;
 647   SAL_PLATFORM_SPECIFIC_ERROR_RECORD  *PlatformRecord;
 648   SAL_MEMORY_ERROR_RECORD             *MemoryRecord;
 649   UINT8                               *Raw;
 650 } SAL_ERROR_RECORDS_POINTERS;
 651
 652 #pragma pack()
 653
 654 #endif