MdePkg/Include/IndustryStandard/Sal.h

   1 /** @file
   2   Main SAL API's defined in SAL 3.0 specification.
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef __SAL_API_H__
  16 #define __SAL_API_H__
  17
  18 //
  19 // FIT Types
  20 // Table 2-2 of Intel Itanium Processor Family System Abstraction Layer Specification December 2003
  21 //
  22 #define EFI_SAL_FIT_FIT_HEADER_TYPE 0x00
  23 #define EFI_SAL_FIT_PAL_B_TYPE      0x01
  24 //
  25 // type from 0x02 to 0x0E is reserved.
  26 //
  27 #define EFI_SAL_FIT_PAL_A_TYPE  0x0F
  28 //
  29 // OEM-defined type range is from 0x10 to 0x7E. Here we defined the PEI_CORE type as 0x10
  30 //
  31 #define EFI_SAL_FIT_PEI_CORE_TYPE 0x10
  32 #define EFI_SAL_FIT_UNUSED_TYPE   0x7F
  33
  34 //
  35 // EFI_SAL_STATUS
  36 //
  37 typedef UINTN EFI_SAL_STATUS;
  38
  39 #define EFI_SAL_SUCCESS               ((EFI_SAL_STATUS) 0)
  40 #define EFI_SAL_MORE_RECORDS          ((EFI_SAL_STATUS) 3)
  41 #define EFI_SAL_NOT_IMPLEMENTED       ((EFI_SAL_STATUS) - 1)
  42 #define EFI_SAL_INVALID_ARGUMENT      ((EFI_SAL_STATUS) - 2)
  43 #define EFI_SAL_ERROR                 ((EFI_SAL_STATUS) - 3)
  44 #define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
  45 #define EFI_SAL_NO_INFORMATION        ((EFI_SAL_STATUS) - 5)
  46 #define EFI_SAL_NOT_ENOUGH_SCRATCH    ((EFI_SAL_STATUS) - 9)
  47
  48 //
  49 //  Return values from SAL
  50 //
  51 typedef struct {
  52   EFI_SAL_STATUS  Status; // register r8
  53   UINTN           r9;
  54   UINTN           r10;
  55   UINTN           r11;
  56 } SAL_RETURN_REGS;
  57
  58 //
  59 //  Delivery Mode of IPF CPU.
  60 //
  61 typedef enum {
  62   EFI_DELIVERY_MODE_INT,
  63   EFI_DELIVERY_MODE_MPreserved1,
  64   EFI_DELIVERY_MODE_PMI,
  65   EFI_DELIVERY_MODE_MPreserved2,
  66   EFI_DELIVERY_MODE_NMI,
  67   EFI_DELIVERY_MODE_INIT,
  68   EFI_DELIVERY_MODE_MPreserved3,
  69   EFI_DELIVERY_MODE_ExtINT
  70 } EFI_DELIVERY_MODE;
  71
  72 typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
  73   (
  74     IN UINT64 FunctionId,
  75     IN UINT64 Arg2,
  76     IN UINT64 Arg3,
  77     IN UINT64 Arg4,
  78     IN UINT64 Arg5,
  79     IN UINT64 Arg6,
  80     IN UINT64 Arg7,
  81     IN UINT64 Arg8
  82   );
  83
  84 //
  85 // SAL Procedure FunctionId definition
  86 //
  87 #define EFI_SAL_SET_VECTORS             0x01000000
  88 #define EFI_SAL_GET_STATE_INFO          0x01000001
  89 #define EFI_SAL_GET_STATE_INFO_SIZE     0x01000002
  90 #define EFI_SAL_CLEAR_STATE_INFO        0x01000003
  91 #define EFI_SAL_MC_RENDEZ               0x01000004
  92 #define EFI_SAL_MC_SET_PARAMS           0x01000005
  93 #define EFI_SAL_REGISTER_PHYSICAL_ADDR  0x01000006
  94 #define EFI_SAL_CACHE_FLUSH             0x01000008
  95 #define EFI_SAL_CACHE_INIT              0x01000009
  96 #define EFI_SAL_PCI_CONFIG_READ         0x01000010
  97 #define EFI_SAL_PCI_CONFIG_WRITE        0x01000011
  98 #define EFI_SAL_FREQ_BASE               0x01000012
  99 #define EFI_SAL_PHYSICAL_ID_INFO        0x01000013
 100 #define EFI_SAL_UPDATE_PAL              0x01000020
 101
 102 #define EFI_SAL_FUNCTION_ID_MASK        0x0000ffff
 103 #define EFI_SAL_MAX_SAL_FUNCTION_ID     0x00000021
 104
 105 //
 106 // SAL Procedure parameter definitions
 107 // Not much point in using typedefs or enums because all params
 108 // are UINT64 and the entry point is common
 109 //
 110 // EFI_SAL_SET_VECTORS
 111 //
 112 #define EFI_SAL_SET_MCA_VECTOR          0x0
 113 #define EFI_SAL_SET_INIT_VECTOR         0x1
 114 #define EFI_SAL_SET_BOOT_RENDEZ_VECTOR  0x2
 115
 116 typedef struct {
 117   UINT64  Length : 32;
 118   UINT64  ChecksumValid : 1;
 119   UINT64  Reserved1 : 7;
 120   UINT64  ByteChecksum : 8;
 121   UINT64  Reserved2 : 16;
 122 } SAL_SET_VECTORS_CS_N;
 123
 124 //
 125 // EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
 126 // EFI_SAL_CLEAR_STATE_INFO
 127 //
 128 #define EFI_SAL_MCA_STATE_INFO  0x0
 129 #define EFI_SAL_INIT_STATE_INFO 0x1
 130 #define EFI_SAL_CMC_STATE_INFO  0x2
 131 #define EFI_SAL_CP_STATE_INFO   0x3
 132
 133 //
 134 // EFI_SAL_MC_SET_PARAMS
 135 //
 136 #define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
 137 #define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
 138 #define EFI_SAL_MC_SET_CPE_PARAM    0x3
 139
 140 #define EFI_SAL_MC_SET_INTR_PARAM   0x1
 141 #define EFI_SAL_MC_SET_MEM_PARAM    0x2
 142
 143 //
 144 // EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
 145 //
 146 #define EFI_SAL_REGISTER_PAL_ADDR 0x0
 147
 148 //
 149 // EFI_SAL_CACHE_FLUSH
 150 //
 151 #define EFI_SAL_FLUSH_I_CACHE       0x01
 152 #define EFI_SAL_FLUSH_D_CACHE       0x02
 153 #define EFI_SAL_FLUSH_BOTH_CACHE    0x03
 154 #define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
 155
 156 //
 157 // EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
 158 //
 159 #define EFI_SAL_PCI_CONFIG_ONE_BYTE   0x1
 160 #define EFI_SAL_PCI_CONFIG_TWO_BYTES  0x2
 161 #define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
 162
 163 typedef struct {
 164   UINT64  Register : 8;
 165   UINT64  Function : 3;
 166   UINT64  Device : 5;
 167   UINT64  Bus : 8;
 168   UINT64  Segment : 8;
 169   UINT64  Reserved : 32;
 170 } SAL_PCI_ADDRESS;
 171
 172 //
 173 // EFI_SAL_FREQ_BASE
 174 //
 175 #define EFI_SAL_CPU_INPUT_FREQ_BASE     0x0
 176 #define EFI_SAL_PLATFORM_IT_FREQ_BASE   0x1
 177 #define EFI_SAL_PLATFORM_RTC_FREQ_BASE  0x2
 178
 179 //
 180 // EFI_SAL_UPDATE_PAL
 181 //
 182 #define EFI_SAL_UPDATE_BAD_PAL_VERSION  ((UINT64) -1)
 183 #define EFI_SAL_UPDATE_PAL_AUTH_FAIL    ((UINT64) -2)
 184 #define EFI_SAL_UPDATE_PAL_BAD_TYPE     ((UINT64) -3)
 185 #define EFI_SAL_UPDATE_PAL_READONLY     ((UINT64) -4)
 186 #define EFI_SAL_UPDATE_PAL_WRITE_FAIL   ((UINT64) -10)
 187 #define EFI_SAL_UPDATE_PAL_ERASE_FAIL   ((UINT64) -11)
 188 #define EFI_SAL_UPDATE_PAL_READ_FAIL    ((UINT64) -12)
 189 #define EFI_SAL_UPDATE_PAL_CANT_FIT     ((UINT64) -13)
 190
 191 typedef struct {
 192   UINT32  Size;
 193   UINT32  MmddyyyyDate;
 194   UINT16  Version;
 195   UINT8   Type;
 196   UINT8   Reserved[5];
 197   UINT64  FwVendorId;
 198 } SAL_UPDATE_PAL_DATA_BLOCK;
 199
 200 typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
 201   struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
 202   struct SAL_UPDATE_PAL_DATA_BLOCK  *DataBlock;
 203   UINT8                             StoreChecksum;
 204   UINT8                             Reserved[15];
 205 } SAL_UPDATE_PAL_INFO_BLOCK;
 206
 207 //
 208 // SAL System Table Definitions
 209 //
 210 #pragma pack(1)
 211 typedef struct {
 212   UINT32  Signature;
 213   UINT32  Length;
 214   UINT16  SalRevision;
 215   UINT16  EntryCount;
 216   UINT8   CheckSum;
 217   UINT8   Reserved[7];
 218   UINT16  SalAVersion;
 219   UINT16  SalBVersion;
 220   UINT8   OemId[32];
 221   UINT8   ProductId[32];
 222   UINT8   Reserved2[8];
 223 } SAL_SYSTEM_TABLE_HEADER;
 224 #pragma pack()
 225
 226 #define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
 227 #define EFI_SAL_REVISION            0x0300
 228 //
 229 // SAL System Types
 230 //
 231 #define EFI_SAL_ST_ENTRY_POINT        0
 232 #define EFI_SAL_ST_MEMORY_DESCRIPTOR  1
 233 #define EFI_SAL_ST_PLATFORM_FEATURES  2
 234 #define EFI_SAL_ST_TR_USAGE           3
 235 #define EFI_SAL_ST_PTC                4
 236 #define EFI_SAL_ST_AP_WAKEUP          5
 237
 238 #pragma pack(1)
 239 typedef struct {
 240   UINT8   Type; //  Type == 0
 241   UINT8   Reserved[7];
 242   UINT64  PalProcEntry;
 243   UINT64  SalProcEntry;
 244   UINT64  SalGlobalDataPointer;
 245   UINT64  Reserved2[2];
 246 } SAL_ST_ENTRY_POINT_DESCRIPTOR;
 247
 248 //
 249 // Not needed for Itanium-based OS boot
 250 //
 251 typedef struct {
 252   UINT8   Type; //  Type == 1
 253   UINT8   NeedVirtualRegistration;
 254   UINT8   MemoryAttributes;
 255   UINT8   PageAccessRights;
 256   UINT8   SupportedAttributes;
 257   UINT8   Reserved;
 258   UINT8   MemoryType;
 259   UINT8   MemoryUsage;
 260   UINT64  PhysicalMemoryAddress;
 261   UINT32  Length;
 262   UINT32  Reserved1;
 263   UINT64  OemReserved;
 264 } SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
 265
 266 #pragma pack()
 267 //
 268 // Memory Attributes
 269 //
 270 #define SAL_MDT_ATTRIB_WB 0x00
 271 //
 272 // #define SAL_MDT_ATTRIB_UC   0x02
 273 //
 274 #define SAL_MDT_ATTRIB_UC   0x04
 275 #define SAL_MDT_ATTRIB_UCE  0x05
 276 #define SAL_MDT_ATTRIB_WC   0x06
 277
 278 //
 279 // Supported memory Attributes
 280 //
 281 #define SAL_MDT_SUPPORT_WB  0x1
 282 #define SAL_MDT_SUPPORT_UC  0x2
 283 #define SAL_MDT_SUPPORT_UCE 0x4
 284 #define SAL_MDT_SUPPORT_WC  0x8
 285
 286 //
 287 // Virtual address registration
 288 //
 289 #define SAL_MDT_NO_VA   0x00
 290 #define SAL_MDT_NEED_VA 0x01
 291 //
 292 // MemoryType info
 293 //
 294 #define SAL_REGULAR_MEMORY  0x0000
 295 #define SAL_MMIO_MAPPING    0x0001
 296 #define SAL_SAPIC_IPI_BLOCK 0x0002
 297 #define SAL_IO_PORT_MAPPING 0x0003
 298 #define SAL_FIRMWARE_MEMORY 0x0004
 299 #define SAL_BLACK_HOLE      0x000A
 300 //
 301 // Memory Usage info
 302 //
 303 #define SAL_MDT_USAGE_UNSPECIFIED 0x00
 304 #define SAL_PAL_CODE              0x01
 305 #define SAL_BOOTSERVICE_CODE      0x02
 306 #define SAL_BOOTSERVICE_DATA      0x03
 307 #define SAL_RUNTIMESERVICE_CODE   0x04
 308 #define SAL_RUNTIMESERVICE_DATA   0x05
 309 #define SAL_IA32_OPTIONROM        0x06
 310 #define SAL_IA32_SYSTEMROM        0x07
 311 #define SAL_PMI_CODE              0x0a
 312 #define SAL_PMI_DATA              0x0b
 313
 314 #pragma pack(1)
 315 typedef struct {
 316   UINT8 Type;                     // Type == 2
 317   UINT8 PlatformFeatures;
 318   UINT8 Reserved[14];
 319 } SAL_ST_PLATFORM_FEATURES;
 320 #pragma pack()
 321
 322 #define SAL_PLAT_FEAT_BUS_LOCK      0x01
 323 #define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
 324 #define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
 325
 326 #pragma pack(1)
 327 typedef struct {
 328   UINT8   Type;                   // Type == 3
 329   UINT8   TRType;
 330   UINT8   TRNumber;
 331   UINT8   Reserved[5];
 332   UINT64  VirtualAddress;
 333   UINT64  EncodedPageSize;
 334   UINT64  Reserved1;
 335 } SAL_ST_TR_DECRIPTOR;
 336 #pragma pack()
 337
 338 #define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
 339 #define EFI_SAL_ST_TR_USAGE_DATA        01
 340
 341 #pragma pack(1)
 342 typedef struct {
 343   UINT64  NumberOfProcessors;
 344   UINT64  LocalIDRegister;
 345 } SAL_COHERENCE_DOMAIN_INFO;
 346 #pragma pack()
 347
 348 #pragma pack(1)
 349 typedef struct {
 350   UINT8                     Type; // Type == 4
 351   UINT8                     Reserved[3];
 352   UINT32                    NumberOfDomains;
 353   SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
 354 } SAL_ST_CACHE_COHERENCE_DECRIPTOR;
 355 #pragma pack()
 356
 357 #pragma pack(1)
 358 typedef struct {
 359   UINT8   Type;                   // Type == 5
 360   UINT8   WakeUpType;
 361   UINT8   Reserved[6];
 362   UINT64  ExternalInterruptVector;
 363 } SAL_ST_AP_WAKEUP_DECRIPTOR;
 364 #pragma pack()
 365 //
 366 // FIT Entry
 367 //
 368 #define EFI_SAL_FIT_ENTRY_PTR   (0x100000000 - 32)  // 4GB - 24
 369 #define EFI_SAL_FIT_PALA_ENTRY  (0x100000000 - 48)  // 4GB - 32
 370 #define EFI_SAL_FIT_PALB_TYPE   01
 371
 372 typedef struct {
 373   UINT64  Address;
 374   UINT8   Size[3];
 375   UINT8   Reserved;
 376   UINT16  Revision;
 377   UINT8   Type : 7;
 378   UINT8   CheckSumValid : 1;
 379   UINT8   CheckSum;
 380 } EFI_SAL_FIT_ENTRY;
 381
 382 //
 383 //  SAL Common Record Header
 384 //
 385 typedef struct {
 386   UINT16  Length;
 387   UINT8   Data[1024];
 388 } SAL_OEM_DATA;
 389
 390 typedef struct {
 391   UINT8 Seconds;
 392   UINT8 Minutes;
 393   UINT8 Hours;
 394   UINT8 Reserved;
 395   UINT8 Day;
 396   UINT8 Month;
 397   UINT8 Year;
 398   UINT8 Century;
 399 } SAL_TIME_STAMP;
 400
 401 typedef struct {
 402   UINT64          RecordId;
 403   UINT16          Revision;
 404   UINT8           ErrorSeverity;
 405   UINT8           ValidationBits;
 406   UINT32          RecordLength;
 407   SAL_TIME_STAMP  TimeStamp;
 408   UINT8           OemPlatformId[16];
 409 } SAL_RECORD_HEADER;
 410
 411 typedef struct {
 412   GUID                  Guid;
 413   UINT16    Revision;
 414   UINT8     ErrorRecoveryInfo;
 415   UINT8     Reserved;
 416   UINT32    SectionLength;
 417 } SAL_SEC_HEADER;
 418
 419 //
 420 // SAL Processor Record
 421 //
 422 #define SAL_PROCESSOR_ERROR_RECORD_INFO \
 423   { \
 424     0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 425   }
 426
 427 #define CHECK_INFO_VALID_BIT_MASK   0x1
 428 #define REQUESTOR_ID_VALID_BIT_MASK 0x2
 429 #define RESPONDER_ID_VALID_BIT_MASK 0x4
 430 #define TARGER_ID_VALID_BIT_MASK    0x8
 431 #define PRECISE_IP_VALID_BIT_MASK   0x10
 432
 433 typedef struct {
 434   UINT64  InfoValid : 1;
 435   UINT64  ReqValid : 1;
 436   UINT64  RespValid : 1;
 437   UINT64  TargetValid : 1;
 438   UINT64  IpValid : 1;
 439   UINT64  Reserved : 59;
 440   UINT64  Info;
 441   UINT64  Req;
 442   UINT64  Resp;
 443   UINT64  Target;
 444   UINT64  Ip;
 445 } MOD_ERROR_INFO;
 446
 447 typedef struct {
 448   UINT8 CpuidInfo[40];
 449   UINT8 Reserved;
 450 } CPUID_INFO;
 451
 452 typedef struct {
 453   UINT64  FrLow;
 454   UINT64  FrHigh;
 455 } FR_STRUCT;
 456
 457 #define MIN_STATE_VALID_BIT_MASK  0x1
 458 #define BR_VALID_BIT_MASK         0x2
 459 #define CR_VALID_BIT_MASK         0x4
 460 #define AR_VALID_BIT_MASK         0x8
 461 #define RR_VALID_BIT_MASK         0x10
 462 #define FR_VALID_BIT_MASK         0x20
 463
 464 typedef struct {
 465   UINT64    ValidFieldBits;
 466   UINT8     MinStateInfo[1024];
 467   UINT64    Br[8];
 468   UINT64    Cr[128];
 469   UINT64    Ar[128];
 470   UINT64    Rr[8];
 471   FR_STRUCT Fr[128];
 472 } PSI_STATIC_STRUCT;
 473
 474 #define PROC_ERROR_MAP_VALID_BIT_MASK       0x1
 475 #define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
 476 #define PROC_CR_LID_VALID_BIT_MASK          0x4
 477 #define PROC_STATIC_STRUCT_VALID_BIT_MASK   0x8
 478 #define CPU_INFO_VALID_BIT_MASK             0x1000000
 479
 480 typedef struct {
 481   SAL_SEC_HEADER    SectionHeader;
 482   UINT64            ValidationBits;
 483   UINT64            ProcErrorMap;
 484   UINT64            ProcStateParameter;
 485   UINT64            ProcCrLid;
 486   MOD_ERROR_INFO    CacheError[15];
 487   MOD_ERROR_INFO    TlbError[15];
 488   MOD_ERROR_INFO    BusError[15];
 489   MOD_ERROR_INFO    RegFileCheck[15];
 490   MOD_ERROR_INFO    MsCheck[15];
 491   CPUID_INFO        CpuInfo;
 492   PSI_STATIC_STRUCT PsiValidData;
 493 } SAL_PROCESSOR_ERROR_RECORD;
 494
 495 //
 496 //  Sal Platform memory Error Record
 497 //
 498 #define SAL_MEMORY_ERROR_RECORD_INFO \
 499   { \
 500     0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 501   }
 502
 503 #define MEMORY_ERROR_STATUS_VALID_BIT_MASK                0x1
 504 #define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK            0x2
 505 #define MEMORY_ADDR_BIT_MASK                              0x4
 506 #define MEMORY_NODE_VALID_BIT_MASK                        0x8
 507 #define MEMORY_CARD_VALID_BIT_MASK                        0x10
 508 #define MEMORY_MODULE_VALID_BIT_MASK                      0x20
 509 #define MEMORY_BANK_VALID_BIT_MASK                        0x40
 510 #define MEMORY_DEVICE_VALID_BIT_MASK                      0x80
 511 #define MEMORY_ROW_VALID_BIT_MASK                         0x100
 512 #define MEMORY_COLUMN_VALID_BIT_MASK                      0x200
 513 #define MEMORY_BIT_POSITION_VALID_BIT_MASK                0x400
 514 #define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK       0x800
 515 #define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK       0x1000
 516 #define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK             0x2000
 517 #define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK  0x4000
 518 #define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK             0x8000
 519 #define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK    0x10000
 520
 521 typedef struct {
 522   SAL_SEC_HEADER  SectionHeader;
 523   UINT64          ValidationBits;
 524   UINT64          MemErrorStatus;
 525   UINT64          MemPhysicalAddress;
 526   UINT64          MemPhysicalAddressMask;
 527   UINT16          MemNode;
 528   UINT16          MemCard;
 529   UINT16          MemModule;
 530   UINT16          MemBank;
 531   UINT16          MemDevice;
 532   UINT16          MemRow;
 533   UINT16          MemColumn;
 534   UINT16          MemBitPosition;
 535   UINT64          ModRequestorId;
 536   UINT64          ModResponderId;
 537   UINT64          ModTargetId;
 538   UINT64          BusSpecificData;
 539   UINT8           MemPlatformOemId[16];
 540 } SAL_MEMORY_ERROR_RECORD;
 541
 542 //
 543 //  PCI BUS Errors
 544 //
 545 #define SAL_PCI_BUS_ERROR_RECORD_INFO \
 546   { \
 547     0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 548   }
 549
 550 #define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK     0x1
 551 #define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK       0x2
 552 #define PCI_BUS_ID_VALID_BIT_MASK               0x4
 553 #define PCI_BUS_ADDRESS_VALID_BIT_MASK          0x8
 554 #define PCI_BUS_DATA_VALID_BIT_MASK             0x10
 555 #define PCI_BUS_CMD_VALID_BIT_MASK              0x20
 556 #define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK     0x40
 557 #define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK     0x80
 558 #define PCI_BUS_TARGET_VALID_BIT_MASK           0x100
 559 #define PCI_BUS_OEM_ID_VALID_BIT_MASK           0x200
 560 #define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK  0x400
 561
 562 typedef struct {
 563   UINT8 BusNumber;
 564   UINT8 SegmentNumber;
 565 } PCI_BUS_ID;
 566
 567 typedef struct {
 568   SAL_SEC_HEADER  SectionHeader;
 569   UINT64          ValidationBits;
 570   UINT64          PciBusErrorStatus;
 571   UINT16          PciBusErrorType;
 572   PCI_BUS_ID      PciBusId;
 573   UINT32          Reserved;
 574   UINT64          PciBusAddress;
 575   UINT64          PciBusData;
 576   UINT64          PciBusCommand;
 577   UINT64          PciBusRequestorId;
 578   UINT64          PciBusResponderId;
 579   UINT64          PciBusTargetId;
 580   UINT8           PciBusOemId[16];
 581 } SAL_PCI_BUS_ERROR_RECORD;
 582
 583 //
 584 //  PCI Component Errors
 585 //
 586 #define SAL_PCI_COMP_ERROR_RECORD_INFO \
 587   { \
 588     0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 589   }
 590
 591 #define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK    0x1
 592 #define PCI_COMP_INFO_VALID_BIT_MASK            0x2
 593 #define PCI_COMP_MEM_NUM_VALID_BIT_MASK         0x4
 594 #define PCI_COMP_IO_NUM_VALID_BIT_MASK          0x8
 595 #define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK   0x10
 596 #define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
 597
 598 typedef struct {
 599   UINT16  VendorId;
 600   UINT16  DeviceId;
 601   UINT8   ClassCode[3];
 602   UINT8   FunctionNumber;
 603   UINT8   DeviceNumber;
 604   UINT8   BusNumber;
 605   UINT8   SegmentNumber;
 606   UINT8   Reserved[5];
 607 } PCI_COMP_INFO;
 608
 609 typedef struct {
 610   SAL_SEC_HEADER  SectionHeader;
 611   UINT64          ValidationBits;
 612   UINT64          PciComponentErrorStatus;
 613   PCI_COMP_INFO   PciComponentInfo;
 614   UINT32          PciComponentMemNum;
 615   UINT32          PciComponentIoNum;
 616   UINT8           PciBusOemId[16];
 617 } SAL_PCI_COMPONENT_ERROR_RECORD;
 618
 619 //
 620 //  Sal Device Errors Info.
 621 //
 622 #define SAL_DEVICE_ERROR_RECORD_INFO \
 623   { \
 624     0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 625   }
 626
 627 #define SEL_RECORD_ID_VALID_BIT_MASK      0x1;
 628 #define SEL_RECORD_TYPE_VALID_BIT_MASK    0x2;
 629 #define SEL_GENERATOR_ID_VALID_BIT_MASK   0x4;
 630 #define SEL_EVM_REV_VALID_BIT_MASK        0x8;
 631 #define SEL_SENSOR_TYPE_VALID_BIT_MASK    0x10;
 632 #define SEL_SENSOR_NUM_VALID_BIT_MASK     0x20;
 633 #define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
 634 #define SEL_EVENT_DATA1_VALID_BIT_MASK    0x80;
 635 #define SEL_EVENT_DATA2_VALID_BIT_MASK    0x100;
 636 #define SEL_EVENT_DATA3_VALID_BIT_MASK    0x200;
 637
 638 typedef struct {
 639   SAL_SEC_HEADER  SectionHeader;
 640   UINT64          ValidationBits;
 641   UINT16          SelRecordId;
 642   UINT8           SelRecordType;
 643   UINT32          TimeStamp;
 644   UINT16          GeneratorId;
 645   UINT8           EvmRevision;
 646   UINT8           SensorType;
 647   UINT8           SensorNum;
 648   UINT8           EventDirType;
 649   UINT8           Data1;
 650   UINT8           Data2;
 651   UINT8           Data3;
 652 } SAL_DEVICE_ERROR_RECORD;
 653
 654 //
 655 //  Sal SMBIOS Device Errors Info.
 656 //
 657 #define SAL_SMBIOS_ERROR_RECORD_INFO \
 658   { \
 659     0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 660   }
 661
 662 #define SMBIOS_EVENT_TYPE_VALID_BIT_MASK  0x1
 663 #define SMBIOS_LENGTH_VALID_BIT_MASK      0x2
 664 #define SMBIOS_TIME_STAMP_VALID_BIT_MASK  0x4
 665 #define SMBIOS_DATA_VALID_BIT_MASK        0x8
 666
 667 typedef struct {
 668   SAL_SEC_HEADER  SectionHeader;
 669   UINT64          ValidationBits;
 670   UINT8           SmbiosEventType;
 671   UINT8           SmbiosLength;
 672   UINT8           SmbiosBcdTimeStamp[6];
 673 } SAL_SMBIOS_DEVICE_ERROR_RECORD;
 674
 675 //
 676 //  Sal Platform Specific Errors Info.
 677 //
 678 #define SAL_PLATFORM_ERROR_RECORD_INFO \
 679   { \
 680     0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
 681   }
 682
 683 #define PLATFORM_ERROR_STATUS_VALID_BIT_MASK    0x1
 684 #define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK    0x2
 685 #define PLATFORM_RESPONDER_ID_VALID_BIT_MASK    0x4
 686 #define PLATFORM_TARGET_VALID_BIT_MASK          0x8
 687 #define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK   0x10
 688 #define PLATFORM_OEM_ID_VALID_BIT_MASK          0x20
 689 #define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
 690 #define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
 691
 692 typedef struct {
 693   SAL_SEC_HEADER  SectionHeader;
 694   UINT64          ValidationBits;
 695   UINT64          PlatformErrorStatus;
 696   UINT64          PlatformRequestorId;
 697   UINT64          PlatformResponderId;
 698   UINT64          PlatformTargetId;
 699   UINT64          PlatformBusSpecificData;
 700   UINT8           OemComponentId[16];
 701 } SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
 702
 703 //
 704 // Union of all the possible Sal Record Types
 705 //
 706 typedef union {
 707   SAL_RECORD_HEADER                   *RecordHeader;
 708   SAL_PROCESSOR_ERROR_RECORD          *SalProcessorRecord;
 709   SAL_PCI_BUS_ERROR_RECORD            *SalPciBusRecord;
 710   SAL_PCI_COMPONENT_ERROR_RECORD      *SalPciComponentRecord;
 711   SAL_DEVICE_ERROR_RECORD             *ImpiRecord;
 712   SAL_SMBIOS_DEVICE_ERROR_RECORD      *SmbiosRecord;
 713   SAL_PLATFORM_SPECIFIC_ERROR_RECORD  *PlatformRecord;
 714   SAL_MEMORY_ERROR_RECORD             *MemoryRecord;
 715   UINT8                               *Raw;
 716 } SAL_ERROR_RECORDS_POINTERS;
 717
 718 #pragma pack()
 719
 720 #endif