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1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v3.0.0.
3
4 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are licensed and made available under
6 the terms and conditions of the BSD License that accompanies this distribution.
7 The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __SMBIOS_STANDARD_H__
16 #define __SMBIOS_STANDARD_H__
17
18 ///
19 /// Reference SMBIOS 2.6, chapter 3.1.2.
20 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
21 /// use by this specification.
22 ///
23 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
24
25 ///
26 /// Reference SMBIOS 2.7, chapter 6.1.2.
27 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
28 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
29 /// This number is not used for any other purpose by the SMBIOS specification.
30 ///
31 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
32
33 ///
34 /// Reference SMBIOS 2.6, chapter 3.1.3.
35 /// Each text string is limited to 64 significant characters due to system MIF limitations.
36 /// Reference SMBIOS 2.7, chapter 6.1.3.
37 /// It will have no limit on the length of each individual text string.
38 ///
39 #define SMBIOS_STRING_MAX_LENGTH 64
40
41 ///
42 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
43 /// Upper-level software that interprets the SMBIOS structure-table should bypass an
44 /// Inactive structure just like a structure type that the software does not recognize.
45 ///
46 #define SMBIOS_TYPE_INACTIVE 0x007E
47
48 ///
49 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
50 /// The end-of-table indicator is used in the last physical structure in a table
51 ///
52 #define SMBIOS_TYPE_END_OF_TABLE 0x007F
53
54 ///
55 /// Smbios Table Entry Point Structure.
56 ///
57 #pragma pack(1)
58 typedef struct {
59 UINT8 AnchorString[4];
60 UINT8 EntryPointStructureChecksum;
61 UINT8 EntryPointLength;
62 UINT8 MajorVersion;
63 UINT8 MinorVersion;
64 UINT16 MaxStructureSize;
65 UINT8 EntryPointRevision;
66 UINT8 FormattedArea[5];
67 UINT8 IntermediateAnchorString[5];
68 UINT8 IntermediateChecksum;
69 UINT16 TableLength;
70 UINT32 TableAddress;
71 UINT16 NumberOfSmbiosStructures;
72 UINT8 SmbiosBcdRevision;
73 } SMBIOS_TABLE_ENTRY_POINT;
74
75 typedef struct {
76 UINT8 AnchorString[5];
77 UINT8 EntryPointStructureChecksum;
78 UINT8 EntryPointLength;
79 UINT8 MajorVersion;
80 UINT8 MinorVersion;
81 UINT8 DocRev;
82 UINT8 EntryPointRevision;
83 UINT8 Reserved;
84 UINT32 TableMaximumSize;
85 UINT64 TableAddress;
86 } SMBIOS_TABLE_3_0_ENTRY_POINT;
87
88 ///
89 /// The Smbios structure header.
90 ///
91 typedef struct {
92 UINT8 Type;
93 UINT8 Length;
94 UINT16 Handle;
95 } SMBIOS_STRUCTURE;
96
97 ///
98 /// String Number for a Null terminated string, 00h stands for no string available.
99 ///
100 typedef UINT8 SMBIOS_TABLE_STRING;
101
102 ///
103 /// BIOS Characteristics
104 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
105 ///
106 typedef struct {
107 UINT32 Reserved :2; ///< Bits 0-1.
108 UINT32 Unknown :1;
109 UINT32 BiosCharacteristicsNotSupported :1;
110 UINT32 IsaIsSupported :1;
111 UINT32 McaIsSupported :1;
112 UINT32 EisaIsSupported :1;
113 UINT32 PciIsSupported :1;
114 UINT32 PcmciaIsSupported :1;
115 UINT32 PlugAndPlayIsSupported :1;
116 UINT32 ApmIsSupported :1;
117 UINT32 BiosIsUpgradable :1;
118 UINT32 BiosShadowingAllowed :1;
119 UINT32 VlVesaIsSupported :1;
120 UINT32 EscdSupportIsAvailable :1;
121 UINT32 BootFromCdIsSupported :1;
122 UINT32 SelectableBootIsSupported :1;
123 UINT32 RomBiosIsSocketed :1;
124 UINT32 BootFromPcmciaIsSupported :1;
125 UINT32 EDDSpecificationIsSupported :1;
126 UINT32 JapaneseNecFloppyIsSupported :1;
127 UINT32 JapaneseToshibaFloppyIsSupported :1;
128 UINT32 Floppy525_360IsSupported :1;
129 UINT32 Floppy525_12IsSupported :1;
130 UINT32 Floppy35_720IsSupported :1;
131 UINT32 Floppy35_288IsSupported :1;
132 UINT32 PrintScreenIsSupported :1;
133 UINT32 Keyboard8042IsSupported :1;
134 UINT32 SerialIsSupported :1;
135 UINT32 PrinterIsSupported :1;
136 UINT32 CgaMonoIsSupported :1;
137 UINT32 NecPc98 :1;
138 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
139 ///< and bits 48-63 reserved for System Vendor.
140 } MISC_BIOS_CHARACTERISTICS;
141
142 ///
143 /// BIOS Characteristics Extension Byte 1.
144 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
145 /// within the BIOS Information structure.
146 ///
147 typedef struct {
148 UINT8 AcpiIsSupported :1;
149 UINT8 UsbLegacyIsSupported :1;
150 UINT8 AgpIsSupported :1;
151 UINT8 I2OBootIsSupported :1;
152 UINT8 Ls120BootIsSupported :1;
153 UINT8 AtapiZipDriveBootIsSupported :1;
154 UINT8 Boot1394IsSupported :1;
155 UINT8 SmartBatteryIsSupported :1;
156 } MBCE_BIOS_RESERVED;
157
158 ///
159 /// BIOS Characteristics Extension Byte 2.
160 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
161 /// within the BIOS Information structure.
162 ///
163 typedef struct {
164 UINT8 BiosBootSpecIsSupported :1;
165 UINT8 FunctionKeyNetworkBootIsSupported :1;
166 UINT8 TargetContentDistributionEnabled :1;
167 UINT8 UefiSpecificationSupported :1;
168 UINT8 VirtualMachineSupported :1;
169 UINT8 ExtensionByte2Reserved :3;
170 } MBCE_SYSTEM_RESERVED;
171
172 ///
173 /// BIOS Characteristics Extension Bytes.
174 ///
175 typedef struct {
176 MBCE_BIOS_RESERVED BiosReserved;
177 MBCE_SYSTEM_RESERVED SystemReserved;
178 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
179
180 ///
181 /// BIOS Information (Type 0).
182 ///
183 typedef struct {
184 SMBIOS_STRUCTURE Hdr;
185 SMBIOS_TABLE_STRING Vendor;
186 SMBIOS_TABLE_STRING BiosVersion;
187 UINT16 BiosSegment;
188 SMBIOS_TABLE_STRING BiosReleaseDate;
189 UINT8 BiosSize;
190 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
191 UINT8 BIOSCharacteristicsExtensionBytes[2];
192 UINT8 SystemBiosMajorRelease;
193 UINT8 SystemBiosMinorRelease;
194 UINT8 EmbeddedControllerFirmwareMajorRelease;
195 UINT8 EmbeddedControllerFirmwareMinorRelease;
196 } SMBIOS_TABLE_TYPE0;
197
198 ///
199 /// System Wake-up Type.
200 ///
201 typedef enum {
202 SystemWakeupTypeReserved = 0x00,
203 SystemWakeupTypeOther = 0x01,
204 SystemWakeupTypeUnknown = 0x02,
205 SystemWakeupTypeApmTimer = 0x03,
206 SystemWakeupTypeModemRing = 0x04,
207 SystemWakeupTypeLanRemote = 0x05,
208 SystemWakeupTypePowerSwitch = 0x06,
209 SystemWakeupTypePciPme = 0x07,
210 SystemWakeupTypeAcPowerRestored = 0x08
211 } MISC_SYSTEM_WAKEUP_TYPE;
212
213 ///
214 /// System Information (Type 1).
215 ///
216 /// The information in this structure defines attributes of the overall system and is
217 /// intended to be associated with the Component ID group of the system's MIF.
218 /// An SMBIOS implementation is associated with a single system instance and contains
219 /// one and only one System Information (Type 1) structure.
220 ///
221 typedef struct {
222 SMBIOS_STRUCTURE Hdr;
223 SMBIOS_TABLE_STRING Manufacturer;
224 SMBIOS_TABLE_STRING ProductName;
225 SMBIOS_TABLE_STRING Version;
226 SMBIOS_TABLE_STRING SerialNumber;
227 GUID Uuid;
228 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
229 SMBIOS_TABLE_STRING SKUNumber;
230 SMBIOS_TABLE_STRING Family;
231 } SMBIOS_TABLE_TYPE1;
232
233 ///
234 /// Base Board - Feature Flags.
235 ///
236 typedef struct {
237 UINT8 Motherboard :1;
238 UINT8 RequiresDaughterCard :1;
239 UINT8 Removable :1;
240 UINT8 Replaceable :1;
241 UINT8 HotSwappable :1;
242 UINT8 Reserved :3;
243 } BASE_BOARD_FEATURE_FLAGS;
244
245 ///
246 /// Base Board - Board Type.
247 ///
248 typedef enum {
249 BaseBoardTypeUnknown = 0x1,
250 BaseBoardTypeOther = 0x2,
251 BaseBoardTypeServerBlade = 0x3,
252 BaseBoardTypeConnectivitySwitch = 0x4,
253 BaseBoardTypeSystemManagementModule = 0x5,
254 BaseBoardTypeProcessorModule = 0x6,
255 BaseBoardTypeIOModule = 0x7,
256 BaseBoardTypeMemoryModule = 0x8,
257 BaseBoardTypeDaughterBoard = 0x9,
258 BaseBoardTypeMotherBoard = 0xA,
259 BaseBoardTypeProcessorMemoryModule = 0xB,
260 BaseBoardTypeProcessorIOModule = 0xC,
261 BaseBoardTypeInterconnectBoard = 0xD
262 } BASE_BOARD_TYPE;
263
264 ///
265 /// Base Board (or Module) Information (Type 2).
266 ///
267 /// The information in this structure defines attributes of a system baseboard -
268 /// for example a motherboard, planar, or server blade or other standard system module.
269 ///
270 typedef struct {
271 SMBIOS_STRUCTURE Hdr;
272 SMBIOS_TABLE_STRING Manufacturer;
273 SMBIOS_TABLE_STRING ProductName;
274 SMBIOS_TABLE_STRING Version;
275 SMBIOS_TABLE_STRING SerialNumber;
276 SMBIOS_TABLE_STRING AssetTag;
277 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
278 SMBIOS_TABLE_STRING LocationInChassis;
279 UINT16 ChassisHandle;
280 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
281 UINT8 NumberOfContainedObjectHandles;
282 UINT16 ContainedObjectHandles[1];
283 } SMBIOS_TABLE_TYPE2;
284
285 ///
286 /// System Enclosure or Chassis Types
287 ///
288 typedef enum {
289 MiscChassisTypeOther = 0x01,
290 MiscChassisTypeUnknown = 0x02,
291 MiscChassisTypeDeskTop = 0x03,
292 MiscChassisTypeLowProfileDesktop = 0x04,
293 MiscChassisTypePizzaBox = 0x05,
294 MiscChassisTypeMiniTower = 0x06,
295 MiscChassisTypeTower = 0x07,
296 MiscChassisTypePortable = 0x08,
297 MiscChassisTypeLapTop = 0x09,
298 MiscChassisTypeNotebook = 0x0A,
299 MiscChassisTypeHandHeld = 0x0B,
300 MiscChassisTypeDockingStation = 0x0C,
301 MiscChassisTypeAllInOne = 0x0D,
302 MiscChassisTypeSubNotebook = 0x0E,
303 MiscChassisTypeSpaceSaving = 0x0F,
304 MiscChassisTypeLunchBox = 0x10,
305 MiscChassisTypeMainServerChassis = 0x11,
306 MiscChassisTypeExpansionChassis = 0x12,
307 MiscChassisTypeSubChassis = 0x13,
308 MiscChassisTypeBusExpansionChassis = 0x14,
309 MiscChassisTypePeripheralChassis = 0x15,
310 MiscChassisTypeRaidChassis = 0x16,
311 MiscChassisTypeRackMountChassis = 0x17,
312 MiscChassisTypeSealedCasePc = 0x18,
313 MiscChassisMultiSystemChassis = 0x19,
314 MiscChassisCompactPCI = 0x1A,
315 MiscChassisAdvancedTCA = 0x1B,
316 MiscChassisBlade = 0x1C,
317 MiscChassisBladeEnclosure = 0x1D,
318 MiscChassisTablet = 0x1E,
319 MiscChassisConvertible = 0x1F,
320 MiscChassisDetachable = 0x20
321 } MISC_CHASSIS_TYPE;
322
323 ///
324 /// System Enclosure or Chassis States .
325 ///
326 typedef enum {
327 ChassisStateOther = 0x01,
328 ChassisStateUnknown = 0x02,
329 ChassisStateSafe = 0x03,
330 ChassisStateWarning = 0x04,
331 ChassisStateCritical = 0x05,
332 ChassisStateNonRecoverable = 0x06
333 } MISC_CHASSIS_STATE;
334
335 ///
336 /// System Enclosure or Chassis Security Status.
337 ///
338 typedef enum {
339 ChassisSecurityStatusOther = 0x01,
340 ChassisSecurityStatusUnknown = 0x02,
341 ChassisSecurityStatusNone = 0x03,
342 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
343 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
344 } MISC_CHASSIS_SECURITY_STATE;
345
346 ///
347 /// Contained Element record
348 ///
349 typedef struct {
350 UINT8 ContainedElementType;
351 UINT8 ContainedElementMinimum;
352 UINT8 ContainedElementMaximum;
353 } CONTAINED_ELEMENT;
354
355
356 ///
357 /// System Enclosure or Chassis (Type 3).
358 ///
359 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
360 /// For example, if a system included a separate enclosure for its peripheral devices,
361 /// two structures would be returned: one for the main, system enclosure and the second for
362 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
363 /// support the population of the CIM_Chassis class.
364 ///
365 typedef struct {
366 SMBIOS_STRUCTURE Hdr;
367 SMBIOS_TABLE_STRING Manufacturer;
368 UINT8 Type;
369 SMBIOS_TABLE_STRING Version;
370 SMBIOS_TABLE_STRING SerialNumber;
371 SMBIOS_TABLE_STRING AssetTag;
372 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
373 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
374 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
375 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
376 UINT8 OemDefined[4];
377 UINT8 Height;
378 UINT8 NumberofPowerCords;
379 UINT8 ContainedElementCount;
380 UINT8 ContainedElementRecordLength;
381 CONTAINED_ELEMENT ContainedElements[1];
382 } SMBIOS_TABLE_TYPE3;
383
384 ///
385 /// Processor Information - Processor Type.
386 ///
387 typedef enum {
388 ProcessorOther = 0x01,
389 ProcessorUnknown = 0x02,
390 CentralProcessor = 0x03,
391 MathProcessor = 0x04,
392 DspProcessor = 0x05,
393 VideoProcessor = 0x06
394 } PROCESSOR_TYPE_DATA;
395
396 ///
397 /// Processor Information - Processor Family.
398 ///
399 typedef enum {
400 ProcessorFamilyOther = 0x01,
401 ProcessorFamilyUnknown = 0x02,
402 ProcessorFamily8086 = 0x03,
403 ProcessorFamily80286 = 0x04,
404 ProcessorFamilyIntel386 = 0x05,
405 ProcessorFamilyIntel486 = 0x06,
406 ProcessorFamily8087 = 0x07,
407 ProcessorFamily80287 = 0x08,
408 ProcessorFamily80387 = 0x09,
409 ProcessorFamily80487 = 0x0A,
410 ProcessorFamilyPentium = 0x0B,
411 ProcessorFamilyPentiumPro = 0x0C,
412 ProcessorFamilyPentiumII = 0x0D,
413 ProcessorFamilyPentiumMMX = 0x0E,
414 ProcessorFamilyCeleron = 0x0F,
415 ProcessorFamilyPentiumIIXeon = 0x10,
416 ProcessorFamilyPentiumIII = 0x11,
417 ProcessorFamilyM1 = 0x12,
418 ProcessorFamilyM2 = 0x13,
419 ProcessorFamilyIntelCeleronM = 0x14,
420 ProcessorFamilyIntelPentium4Ht = 0x15,
421 ProcessorFamilyAmdDuron = 0x18,
422 ProcessorFamilyK5 = 0x19,
423 ProcessorFamilyK6 = 0x1A,
424 ProcessorFamilyK6_2 = 0x1B,
425 ProcessorFamilyK6_3 = 0x1C,
426 ProcessorFamilyAmdAthlon = 0x1D,
427 ProcessorFamilyAmd29000 = 0x1E,
428 ProcessorFamilyK6_2Plus = 0x1F,
429 ProcessorFamilyPowerPC = 0x20,
430 ProcessorFamilyPowerPC601 = 0x21,
431 ProcessorFamilyPowerPC603 = 0x22,
432 ProcessorFamilyPowerPC603Plus = 0x23,
433 ProcessorFamilyPowerPC604 = 0x24,
434 ProcessorFamilyPowerPC620 = 0x25,
435 ProcessorFamilyPowerPCx704 = 0x26,
436 ProcessorFamilyPowerPC750 = 0x27,
437 ProcessorFamilyIntelCoreDuo = 0x28,
438 ProcessorFamilyIntelCoreDuoMobile = 0x29,
439 ProcessorFamilyIntelCoreSoloMobile = 0x2A,
440 ProcessorFamilyIntelAtom = 0x2B,
441 ProcessorFamilyIntelCoreM = 0x2C,
442 ProcessorFamilyAlpha = 0x30,
443 ProcessorFamilyAlpha21064 = 0x31,
444 ProcessorFamilyAlpha21066 = 0x32,
445 ProcessorFamilyAlpha21164 = 0x33,
446 ProcessorFamilyAlpha21164PC = 0x34,
447 ProcessorFamilyAlpha21164a = 0x35,
448 ProcessorFamilyAlpha21264 = 0x36,
449 ProcessorFamilyAlpha21364 = 0x37,
450 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
451 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
452 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
453 ProcessorFamilyAmdOpteron6100Series = 0x3B,
454 ProcessorFamilyAmdOpteron4100Series = 0x3C,
455 ProcessorFamilyAmdOpteron6200Series = 0x3D,
456 ProcessorFamilyAmdOpteron4200Series = 0x3E,
457 ProcessorFamilyAmdFxSeries = 0x3F,
458 ProcessorFamilyMips = 0x40,
459 ProcessorFamilyMIPSR4000 = 0x41,
460 ProcessorFamilyMIPSR4200 = 0x42,
461 ProcessorFamilyMIPSR4400 = 0x43,
462 ProcessorFamilyMIPSR4600 = 0x44,
463 ProcessorFamilyMIPSR10000 = 0x45,
464 ProcessorFamilyAmdCSeries = 0x46,
465 ProcessorFamilyAmdESeries = 0x47,
466 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
467 ProcessorFamilyAmdGSeries = 0x49,
468 ProcessorFamilyAmdZSeries = 0x4A,
469 ProcessorFamilyAmdRSeries = 0x4B,
470 ProcessorFamilyAmdOpteron4300 = 0x4C,
471 ProcessorFamilyAmdOpteron6300 = 0x4D,
472 ProcessorFamilyAmdOpteron3300 = 0x4E,
473 ProcessorFamilyAmdFireProSeries = 0x4F,
474 ProcessorFamilySparc = 0x50,
475 ProcessorFamilySuperSparc = 0x51,
476 ProcessorFamilymicroSparcII = 0x52,
477 ProcessorFamilymicroSparcIIep = 0x53,
478 ProcessorFamilyUltraSparc = 0x54,
479 ProcessorFamilyUltraSparcII = 0x55,
480 ProcessorFamilyUltraSparcIii = 0x56,
481 ProcessorFamilyUltraSparcIII = 0x57,
482 ProcessorFamilyUltraSparcIIIi = 0x58,
483 ProcessorFamily68040 = 0x60,
484 ProcessorFamily68xxx = 0x61,
485 ProcessorFamily68000 = 0x62,
486 ProcessorFamily68010 = 0x63,
487 ProcessorFamily68020 = 0x64,
488 ProcessorFamily68030 = 0x65,
489 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
490 ProcessorFamilyAmdOpteronX1000Series = 0x67,
491 ProcessorFamilyAmdOpteronX2000Series = 0x68,
492 ProcessorFamilyHobbit = 0x70,
493 ProcessorFamilyCrusoeTM5000 = 0x78,
494 ProcessorFamilyCrusoeTM3000 = 0x79,
495 ProcessorFamilyEfficeonTM8000 = 0x7A,
496 ProcessorFamilyWeitek = 0x80,
497 ProcessorFamilyItanium = 0x82,
498 ProcessorFamilyAmdAthlon64 = 0x83,
499 ProcessorFamilyAmdOpteron = 0x84,
500 ProcessorFamilyAmdSempron = 0x85,
501 ProcessorFamilyAmdTurion64Mobile = 0x86,
502 ProcessorFamilyDualCoreAmdOpteron = 0x87,
503 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
504 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
505 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
506 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
507 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
508 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
509 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
510 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
511 ProcessorFamilyPARISC = 0x90,
512 ProcessorFamilyPaRisc8500 = 0x91,
513 ProcessorFamilyPaRisc8000 = 0x92,
514 ProcessorFamilyPaRisc7300LC = 0x93,
515 ProcessorFamilyPaRisc7200 = 0x94,
516 ProcessorFamilyPaRisc7100LC = 0x95,
517 ProcessorFamilyPaRisc7100 = 0x96,
518 ProcessorFamilyV30 = 0xA0,
519 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
520 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
521 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
522 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
523 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
524 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
525 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
526 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
527 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
528 ProcessorFamilyQuadCoreIntelXeon = 0xAA,
529 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
530 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
531 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
532 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
533 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
534 ProcessorFamilyPentiumIIIXeon = 0xB0,
535 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
536 ProcessorFamilyPentium4 = 0xB2,
537 ProcessorFamilyIntelXeon = 0xB3,
538 ProcessorFamilyAS400 = 0xB4,
539 ProcessorFamilyIntelXeonMP = 0xB5,
540 ProcessorFamilyAMDAthlonXP = 0xB6,
541 ProcessorFamilyAMDAthlonMP = 0xB7,
542 ProcessorFamilyIntelItanium2 = 0xB8,
543 ProcessorFamilyIntelPentiumM = 0xB9,
544 ProcessorFamilyIntelCeleronD = 0xBA,
545 ProcessorFamilyIntelPentiumD = 0xBB,
546 ProcessorFamilyIntelPentiumEx = 0xBC,
547 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
548 ProcessorFamilyReserved = 0xBE,
549 ProcessorFamilyIntelCore2 = 0xBF,
550 ProcessorFamilyIntelCore2Solo = 0xC0,
551 ProcessorFamilyIntelCore2Extreme = 0xC1,
552 ProcessorFamilyIntelCore2Quad = 0xC2,
553 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
554 ProcessorFamilyIntelCore2DuoMobile = 0xC4,
555 ProcessorFamilyIntelCore2SoloMobile = 0xC5,
556 ProcessorFamilyIntelCoreI7 = 0xC6,
557 ProcessorFamilyDualCoreIntelCeleron = 0xC7,
558 ProcessorFamilyIBM390 = 0xC8,
559 ProcessorFamilyG4 = 0xC9,
560 ProcessorFamilyG5 = 0xCA,
561 ProcessorFamilyG6 = 0xCB,
562 ProcessorFamilyzArchitecture = 0xCC,
563 ProcessorFamilyIntelCoreI5 = 0xCD,
564 ProcessorFamilyIntelCoreI3 = 0xCE,
565 ProcessorFamilyViaC7M = 0xD2,
566 ProcessorFamilyViaC7D = 0xD3,
567 ProcessorFamilyViaC7 = 0xD4,
568 ProcessorFamilyViaEden = 0xD5,
569 ProcessorFamilyMultiCoreIntelXeon = 0xD6,
570 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
571 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
572 ProcessorFamilyViaNano = 0xD9,
573 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
574 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
575 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
576 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
577 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
578 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
579 ProcessorFamilyAmdOpteron3000Series = 0xE4,
580 ProcessorFamilyAmdSempronII = 0xE5,
581 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
582 ProcessorFamilyAmdPhenomTripleCore = 0xE7,
583 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
584 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
585 ProcessorFamilyAmdAthlonDualCore = 0xEA,
586 ProcessorFamilyAmdSempronSI = 0xEB,
587 ProcessorFamilyAmdPhenomII = 0xEC,
588 ProcessorFamilyAmdAthlonII = 0xED,
589 ProcessorFamilySixCoreAmdOpteron = 0xEE,
590 ProcessorFamilyAmdSempronM = 0xEF,
591 ProcessorFamilyi860 = 0xFA,
592 ProcessorFamilyi960 = 0xFB,
593 ProcessorFamilyIndicatorFamily2 = 0xFE,
594 ProcessorFamilyReserved1 = 0xFF
595 } PROCESSOR_FAMILY_DATA;
596
597 ///
598 /// Processor Information2 - Processor Family2.
599 ///
600 typedef enum {
601 ProcessorFamilySH3 = 0x0104,
602 ProcessorFamilySH4 = 0x0105,
603 ProcessorFamilyARM = 0x0118,
604 ProcessorFamilyStrongARM = 0x0119,
605 ProcessorFamily6x86 = 0x012C,
606 ProcessorFamilyMediaGX = 0x012D,
607 ProcessorFamilyMII = 0x012E,
608 ProcessorFamilyWinChip = 0x0140,
609 ProcessorFamilyDSP = 0x015E,
610 ProcessorFamilyVideoProcessor = 0x01F4
611 } PROCESSOR_FAMILY2_DATA;
612
613 ///
614 /// Processor Information - Voltage.
615 ///
616 typedef struct {
617 UINT8 ProcessorVoltageCapability5V :1;
618 UINT8 ProcessorVoltageCapability3_3V :1;
619 UINT8 ProcessorVoltageCapability2_9V :1;
620 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
621 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
622 UINT8 ProcessorVoltageIndicateLegacy :1;
623 } PROCESSOR_VOLTAGE;
624
625 ///
626 /// Processor Information - Processor Upgrade.
627 ///
628 typedef enum {
629 ProcessorUpgradeOther = 0x01,
630 ProcessorUpgradeUnknown = 0x02,
631 ProcessorUpgradeDaughterBoard = 0x03,
632 ProcessorUpgradeZIFSocket = 0x04,
633 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
634 ProcessorUpgradeNone = 0x06,
635 ProcessorUpgradeLIFSocket = 0x07,
636 ProcessorUpgradeSlot1 = 0x08,
637 ProcessorUpgradeSlot2 = 0x09,
638 ProcessorUpgrade370PinSocket = 0x0A,
639 ProcessorUpgradeSlotA = 0x0B,
640 ProcessorUpgradeSlotM = 0x0C,
641 ProcessorUpgradeSocket423 = 0x0D,
642 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
643 ProcessorUpgradeSocket478 = 0x0F,
644 ProcessorUpgradeSocket754 = 0x10,
645 ProcessorUpgradeSocket940 = 0x11,
646 ProcessorUpgradeSocket939 = 0x12,
647 ProcessorUpgradeSocketmPGA604 = 0x13,
648 ProcessorUpgradeSocketLGA771 = 0x14,
649 ProcessorUpgradeSocketLGA775 = 0x15,
650 ProcessorUpgradeSocketS1 = 0x16,
651 ProcessorUpgradeAM2 = 0x17,
652 ProcessorUpgradeF1207 = 0x18,
653 ProcessorSocketLGA1366 = 0x19,
654 ProcessorUpgradeSocketG34 = 0x1A,
655 ProcessorUpgradeSocketAM3 = 0x1B,
656 ProcessorUpgradeSocketC32 = 0x1C,
657 ProcessorUpgradeSocketLGA1156 = 0x1D,
658 ProcessorUpgradeSocketLGA1567 = 0x1E,
659 ProcessorUpgradeSocketPGA988A = 0x1F,
660 ProcessorUpgradeSocketBGA1288 = 0x20,
661 ProcessorUpgradeSocketrPGA988B = 0x21,
662 ProcessorUpgradeSocketBGA1023 = 0x22,
663 ProcessorUpgradeSocketBGA1224 = 0x23,
664 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
665 ProcessorUpgradeSocketLGA1356 = 0x25,
666 ProcessorUpgradeSocketLGA2011 = 0x26,
667 ProcessorUpgradeSocketFS1 = 0x27,
668 ProcessorUpgradeSocketFS2 = 0x28,
669 ProcessorUpgradeSocketFM1 = 0x29,
670 ProcessorUpgradeSocketFM2 = 0x2A,
671 ProcessorUpgradeSocketLGA2011_3 = 0x2B,
672 ProcessorUpgradeSocketLGA1356_3 = 0x2C,
673 ProcessorUpgradeSocketLGA1150 = 0x2D,
674 ProcessorUpgradeSocketBGA1168 = 0x2E,
675 ProcessorUpgradeSocketBGA1234 = 0x2F,
676 ProcessorUpgradeSocketBGA1364 = 0x30
677 } PROCESSOR_UPGRADE;
678
679 ///
680 /// Processor ID Field Description
681 ///
682 typedef struct {
683 UINT32 ProcessorSteppingId:4;
684 UINT32 ProcessorModel: 4;
685 UINT32 ProcessorFamily: 4;
686 UINT32 ProcessorType: 2;
687 UINT32 ProcessorReserved1: 2;
688 UINT32 ProcessorXModel: 4;
689 UINT32 ProcessorXFamily: 8;
690 UINT32 ProcessorReserved2: 4;
691 } PROCESSOR_SIGNATURE;
692
693 typedef struct {
694 UINT32 ProcessorFpu :1;
695 UINT32 ProcessorVme :1;
696 UINT32 ProcessorDe :1;
697 UINT32 ProcessorPse :1;
698 UINT32 ProcessorTsc :1;
699 UINT32 ProcessorMsr :1;
700 UINT32 ProcessorPae :1;
701 UINT32 ProcessorMce :1;
702 UINT32 ProcessorCx8 :1;
703 UINT32 ProcessorApic :1;
704 UINT32 ProcessorReserved1 :1;
705 UINT32 ProcessorSep :1;
706 UINT32 ProcessorMtrr :1;
707 UINT32 ProcessorPge :1;
708 UINT32 ProcessorMca :1;
709 UINT32 ProcessorCmov :1;
710 UINT32 ProcessorPat :1;
711 UINT32 ProcessorPse36 :1;
712 UINT32 ProcessorPsn :1;
713 UINT32 ProcessorClfsh :1;
714 UINT32 ProcessorReserved2 :1;
715 UINT32 ProcessorDs :1;
716 UINT32 ProcessorAcpi :1;
717 UINT32 ProcessorMmx :1;
718 UINT32 ProcessorFxsr :1;
719 UINT32 ProcessorSse :1;
720 UINT32 ProcessorSse2 :1;
721 UINT32 ProcessorSs :1;
722 UINT32 ProcessorReserved3 :1;
723 UINT32 ProcessorTm :1;
724 UINT32 ProcessorReserved4 :2;
725 } PROCESSOR_FEATURE_FLAGS;
726
727 typedef struct {
728 PROCESSOR_SIGNATURE Signature;
729 PROCESSOR_FEATURE_FLAGS FeatureFlags;
730 } PROCESSOR_ID_DATA;
731
732 ///
733 /// Processor Information (Type 4).
734 ///
735 /// The information in this structure defines the attributes of a single processor;
736 /// a separate structure instance is provided for each system processor socket/slot.
737 /// For example, a system with an IntelDX2 processor would have a single
738 /// structure instance, while a system with an IntelSX2 processor would have a structure
739 /// to describe the main CPU, and a second structure to describe the 80487 co-processor.
740 ///
741 typedef struct {
742 SMBIOS_STRUCTURE Hdr;
743 SMBIOS_TABLE_STRING Socket;
744 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
745 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
746 SMBIOS_TABLE_STRING ProcessorManufacture;
747 PROCESSOR_ID_DATA ProcessorId;
748 SMBIOS_TABLE_STRING ProcessorVersion;
749 PROCESSOR_VOLTAGE Voltage;
750 UINT16 ExternalClock;
751 UINT16 MaxSpeed;
752 UINT16 CurrentSpeed;
753 UINT8 Status;
754 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
755 UINT16 L1CacheHandle;
756 UINT16 L2CacheHandle;
757 UINT16 L3CacheHandle;
758 SMBIOS_TABLE_STRING SerialNumber;
759 SMBIOS_TABLE_STRING AssetTag;
760 SMBIOS_TABLE_STRING PartNumber;
761 //
762 // Add for smbios 2.5
763 //
764 UINT8 CoreCount;
765 UINT8 EnabledCoreCount;
766 UINT8 ThreadCount;
767 UINT16 ProcessorCharacteristics;
768 //
769 // Add for smbios 2.6
770 //
771 UINT16 ProcessorFamily2;
772 //
773 // Add for smbios 3.0
774 //
775 UINT16 CoreCount2;
776 UINT16 EnabledCoreCount2;
777 UINT16 ThreadCount2;
778 } SMBIOS_TABLE_TYPE4;
779
780 ///
781 /// Memory Controller Error Detecting Method.
782 ///
783 typedef enum {
784 ErrorDetectingMethodOther = 0x01,
785 ErrorDetectingMethodUnknown = 0x02,
786 ErrorDetectingMethodNone = 0x03,
787 ErrorDetectingMethodParity = 0x04,
788 ErrorDetectingMethod32Ecc = 0x05,
789 ErrorDetectingMethod64Ecc = 0x06,
790 ErrorDetectingMethod128Ecc = 0x07,
791 ErrorDetectingMethodCrc = 0x08
792 } MEMORY_ERROR_DETECT_METHOD;
793
794 ///
795 /// Memory Controller Error Correcting Capability.
796 ///
797 typedef struct {
798 UINT8 Other :1;
799 UINT8 Unknown :1;
800 UINT8 None :1;
801 UINT8 SingleBitErrorCorrect :1;
802 UINT8 DoubleBitErrorCorrect :1;
803 UINT8 ErrorScrubbing :1;
804 UINT8 Reserved :2;
805 } MEMORY_ERROR_CORRECT_CAPABILITY;
806
807 ///
808 /// Memory Controller Information - Interleave Support.
809 ///
810 typedef enum {
811 MemoryInterleaveOther = 0x01,
812 MemoryInterleaveUnknown = 0x02,
813 MemoryInterleaveOneWay = 0x03,
814 MemoryInterleaveTwoWay = 0x04,
815 MemoryInterleaveFourWay = 0x05,
816 MemoryInterleaveEightWay = 0x06,
817 MemoryInterleaveSixteenWay = 0x07
818 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
819
820 ///
821 /// Memory Controller Information - Memory Speeds.
822 ///
823 typedef struct {
824 UINT16 Other :1;
825 UINT16 Unknown :1;
826 UINT16 SeventyNs:1;
827 UINT16 SixtyNs :1;
828 UINT16 FiftyNs :1;
829 UINT16 Reserved :11;
830 } MEMORY_SPEED_TYPE;
831
832 ///
833 /// Memory Controller Information (Type 5, Obsolete).
834 ///
835 /// The information in this structure defines the attributes of the system's memory controller(s)
836 /// and the supported attributes of any memory-modules present in the sockets controlled by
837 /// this controller.
838 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
839 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
840 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
841 /// choose to implement both memory description types to allow existing DMI browsers
842 /// to properly display the system's memory attributes.
843 ///
844 typedef struct {
845 SMBIOS_STRUCTURE Hdr;
846 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
847 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
848 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
849 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
850 UINT8 MaxMemoryModuleSize;
851 MEMORY_SPEED_TYPE SupportSpeed;
852 UINT16 SupportMemoryType;
853 UINT8 MemoryModuleVoltage;
854 UINT8 AssociatedMemorySlotNum;
855 UINT16 MemoryModuleConfigHandles[1];
856 } SMBIOS_TABLE_TYPE5;
857
858 ///
859 /// Memory Module Information - Memory Types
860 ///
861 typedef struct {
862 UINT16 Other :1;
863 UINT16 Unknown :1;
864 UINT16 Standard :1;
865 UINT16 FastPageMode:1;
866 UINT16 Edo :1;
867 UINT16 Parity :1;
868 UINT16 Ecc :1;
869 UINT16 Simm :1;
870 UINT16 Dimm :1;
871 UINT16 BurstEdo :1;
872 UINT16 Sdram :1;
873 UINT16 Reserved :5;
874 } MEMORY_CURRENT_TYPE;
875
876 ///
877 /// Memory Module Information - Memory Size.
878 ///
879 typedef struct {
880 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
881 UINT8 SingleOrDoubleBank :1;
882 } MEMORY_INSTALLED_ENABLED_SIZE;
883
884 ///
885 /// Memory Module Information (Type 6, Obsolete)
886 ///
887 /// One Memory Module Information structure is included for each memory-module socket
888 /// in the system. The structure describes the speed, type, size, and error status
889 /// of each system memory module. The supported attributes of each module are described
890 /// by the "owning" Memory Controller Information structure.
891 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
892 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
893 /// and Memory Device (Type 17) structures should be used instead.
894 ///
895 typedef struct {
896 SMBIOS_STRUCTURE Hdr;
897 SMBIOS_TABLE_STRING SocketDesignation;
898 UINT8 BankConnections;
899 UINT8 CurrentSpeed;
900 MEMORY_CURRENT_TYPE CurrentMemoryType;
901 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
902 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
903 UINT8 ErrorStatus;
904 } SMBIOS_TABLE_TYPE6;
905
906 ///
907 /// Cache Information - SRAM Type.
908 ///
909 typedef struct {
910 UINT16 Other :1;
911 UINT16 Unknown :1;
912 UINT16 NonBurst :1;
913 UINT16 Burst :1;
914 UINT16 PipelineBurst :1;
915 UINT16 Synchronous :1;
916 UINT16 Asynchronous :1;
917 UINT16 Reserved :9;
918 } CACHE_SRAM_TYPE_DATA;
919
920 ///
921 /// Cache Information - Error Correction Type.
922 ///
923 typedef enum {
924 CacheErrorOther = 0x01,
925 CacheErrorUnknown = 0x02,
926 CacheErrorNone = 0x03,
927 CacheErrorParity = 0x04,
928 CacheErrorSingleBit = 0x05, ///< ECC
929 CacheErrorMultiBit = 0x06 ///< ECC
930 } CACHE_ERROR_TYPE_DATA;
931
932 ///
933 /// Cache Information - System Cache Type.
934 ///
935 typedef enum {
936 CacheTypeOther = 0x01,
937 CacheTypeUnknown = 0x02,
938 CacheTypeInstruction = 0x03,
939 CacheTypeData = 0x04,
940 CacheTypeUnified = 0x05
941 } CACHE_TYPE_DATA;
942
943 ///
944 /// Cache Information - Associativity.
945 ///
946 typedef enum {
947 CacheAssociativityOther = 0x01,
948 CacheAssociativityUnknown = 0x02,
949 CacheAssociativityDirectMapped = 0x03,
950 CacheAssociativity2Way = 0x04,
951 CacheAssociativity4Way = 0x05,
952 CacheAssociativityFully = 0x06,
953 CacheAssociativity8Way = 0x07,
954 CacheAssociativity16Way = 0x08,
955 CacheAssociativity12Way = 0x09,
956 CacheAssociativity24Way = 0x0A,
957 CacheAssociativity32Way = 0x0B,
958 CacheAssociativity48Way = 0x0C,
959 CacheAssociativity64Way = 0x0D,
960 CacheAssociativity20Way = 0x0E
961 } CACHE_ASSOCIATIVITY_DATA;
962
963 ///
964 /// Cache Information (Type 7).
965 ///
966 /// The information in this structure defines the attributes of CPU cache device in the system.
967 /// One structure is specified for each such device, whether the device is internal to
968 /// or external to the CPU module. Cache modules can be associated with a processor structure
969 /// in one or two ways, depending on the SMBIOS version.
970 ///
971 typedef struct {
972 SMBIOS_STRUCTURE Hdr;
973 SMBIOS_TABLE_STRING SocketDesignation;
974 UINT16 CacheConfiguration;
975 UINT16 MaximumCacheSize;
976 UINT16 InstalledSize;
977 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
978 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
979 UINT8 CacheSpeed;
980 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
981 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
982 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
983 } SMBIOS_TABLE_TYPE7;
984
985 ///
986 /// Port Connector Information - Connector Types.
987 ///
988 typedef enum {
989 PortConnectorTypeNone = 0x00,
990 PortConnectorTypeCentronics = 0x01,
991 PortConnectorTypeMiniCentronics = 0x02,
992 PortConnectorTypeProprietary = 0x03,
993 PortConnectorTypeDB25Male = 0x04,
994 PortConnectorTypeDB25Female = 0x05,
995 PortConnectorTypeDB15Male = 0x06,
996 PortConnectorTypeDB15Female = 0x07,
997 PortConnectorTypeDB9Male = 0x08,
998 PortConnectorTypeDB9Female = 0x09,
999 PortConnectorTypeRJ11 = 0x0A,
1000 PortConnectorTypeRJ45 = 0x0B,
1001 PortConnectorType50PinMiniScsi = 0x0C,
1002 PortConnectorTypeMiniDin = 0x0D,
1003 PortConnectorTypeMicroDin = 0x0E,
1004 PortConnectorTypePS2 = 0x0F,
1005 PortConnectorTypeInfrared = 0x10,
1006 PortConnectorTypeHpHil = 0x11,
1007 PortConnectorTypeUsb = 0x12,
1008 PortConnectorTypeSsaScsi = 0x13,
1009 PortConnectorTypeCircularDin8Male = 0x14,
1010 PortConnectorTypeCircularDin8Female = 0x15,
1011 PortConnectorTypeOnboardIde = 0x16,
1012 PortConnectorTypeOnboardFloppy = 0x17,
1013 PortConnectorType9PinDualInline = 0x18,
1014 PortConnectorType25PinDualInline = 0x19,
1015 PortConnectorType50PinDualInline = 0x1A,
1016 PortConnectorType68PinDualInline = 0x1B,
1017 PortConnectorTypeOnboardSoundInput = 0x1C,
1018 PortConnectorTypeMiniCentronicsType14 = 0x1D,
1019 PortConnectorTypeMiniCentronicsType26 = 0x1E,
1020 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
1021 PortConnectorTypeBNC = 0x20,
1022 PortConnectorType1394 = 0x21,
1023 PortConnectorTypeSasSata = 0x22,
1024 PortConnectorTypePC98 = 0xA0,
1025 PortConnectorTypePC98Hireso = 0xA1,
1026 PortConnectorTypePCH98 = 0xA2,
1027 PortConnectorTypePC98Note = 0xA3,
1028 PortConnectorTypePC98Full = 0xA4,
1029 PortConnectorTypeOther = 0xFF
1030 } MISC_PORT_CONNECTOR_TYPE;
1031
1032 ///
1033 /// Port Connector Information - Port Types
1034 ///
1035 typedef enum {
1036 PortTypeNone = 0x00,
1037 PortTypeParallelXtAtCompatible = 0x01,
1038 PortTypeParallelPortPs2 = 0x02,
1039 PortTypeParallelPortEcp = 0x03,
1040 PortTypeParallelPortEpp = 0x04,
1041 PortTypeParallelPortEcpEpp = 0x05,
1042 PortTypeSerialXtAtCompatible = 0x06,
1043 PortTypeSerial16450Compatible = 0x07,
1044 PortTypeSerial16550Compatible = 0x08,
1045 PortTypeSerial16550ACompatible = 0x09,
1046 PortTypeScsi = 0x0A,
1047 PortTypeMidi = 0x0B,
1048 PortTypeJoyStick = 0x0C,
1049 PortTypeKeyboard = 0x0D,
1050 PortTypeMouse = 0x0E,
1051 PortTypeSsaScsi = 0x0F,
1052 PortTypeUsb = 0x10,
1053 PortTypeFireWire = 0x11,
1054 PortTypePcmciaTypeI = 0x12,
1055 PortTypePcmciaTypeII = 0x13,
1056 PortTypePcmciaTypeIII = 0x14,
1057 PortTypeCardBus = 0x15,
1058 PortTypeAccessBusPort = 0x16,
1059 PortTypeScsiII = 0x17,
1060 PortTypeScsiWide = 0x18,
1061 PortTypePC98 = 0x19,
1062 PortTypePC98Hireso = 0x1A,
1063 PortTypePCH98 = 0x1B,
1064 PortTypeVideoPort = 0x1C,
1065 PortTypeAudioPort = 0x1D,
1066 PortTypeModemPort = 0x1E,
1067 PortTypeNetworkPort = 0x1F,
1068 PortType8251Compatible = 0xA0,
1069 PortType8251FifoCompatible = 0xA1,
1070 PortTypeOther = 0xFF
1071 } MISC_PORT_TYPE;
1072
1073 ///
1074 /// Port Connector Information (Type 8).
1075 ///
1076 /// The information in this structure defines the attributes of a system port connector,
1077 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1078 /// are provided. One structure is present for each port provided by the system.
1079 ///
1080 typedef struct {
1081 SMBIOS_STRUCTURE Hdr;
1082 SMBIOS_TABLE_STRING InternalReferenceDesignator;
1083 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1084 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1085 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1086 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1087 } SMBIOS_TABLE_TYPE8;
1088
1089 ///
1090 /// System Slots - Slot Type
1091 ///
1092 typedef enum {
1093 SlotTypeOther = 0x01,
1094 SlotTypeUnknown = 0x02,
1095 SlotTypeIsa = 0x03,
1096 SlotTypeMca = 0x04,
1097 SlotTypeEisa = 0x05,
1098 SlotTypePci = 0x06,
1099 SlotTypePcmcia = 0x07,
1100 SlotTypeVlVesa = 0x08,
1101 SlotTypeProprietary = 0x09,
1102 SlotTypeProcessorCardSlot = 0x0A,
1103 SlotTypeProprietaryMemoryCardSlot = 0x0B,
1104 SlotTypeIORiserCardSlot = 0x0C,
1105 SlotTypeNuBus = 0x0D,
1106 SlotTypePci66MhzCapable = 0x0E,
1107 SlotTypeAgp = 0x0F,
1108 SlotTypeApg2X = 0x10,
1109 SlotTypeAgp4X = 0x11,
1110 SlotTypePciX = 0x12,
1111 SlotTypeAgp8X = 0x13,
1112 SlotTypeM2Socket1_DP = 0x14,
1113 SlotTypeM2Socket1_SD = 0x15,
1114 SlotTypeM2Socket2 = 0x16,
1115 SlotTypeM2Socket3 = 0x17,
1116 SlotTypeMxmTypeI = 0x18,
1117 SlotTypeMxmTypeII = 0x19,
1118 SlotTypeMxmTypeIIIStandard = 0x1A,
1119 SlotTypeMxmTypeIIIHe = 0x1B,
1120 SlotTypeMxmTypeIV = 0x1C,
1121 SlotTypeMxm30TypeA = 0x1D,
1122 SlotTypeMxm30TypeB = 0x1E,
1123 SlotTypePciExpressGen2Sff_8639 = 0x1F,
1124 SlotTypePciExpressGen3Sff_8639 = 0x20,
1125 SlotTypePC98C20 = 0xA0,
1126 SlotTypePC98C24 = 0xA1,
1127 SlotTypePC98E = 0xA2,
1128 SlotTypePC98LocalBus = 0xA3,
1129 SlotTypePC98Card = 0xA4,
1130 SlotTypePciExpress = 0xA5,
1131 SlotTypePciExpressX1 = 0xA6,
1132 SlotTypePciExpressX2 = 0xA7,
1133 SlotTypePciExpressX4 = 0xA8,
1134 SlotTypePciExpressX8 = 0xA9,
1135 SlotTypePciExpressX16 = 0xAA,
1136 SlotTypePciExpressGen2 = 0xAB,
1137 SlotTypePciExpressGen2X1 = 0xAC,
1138 SlotTypePciExpressGen2X2 = 0xAD,
1139 SlotTypePciExpressGen2X4 = 0xAE,
1140 SlotTypePciExpressGen2X8 = 0xAF,
1141 SlotTypePciExpressGen2X16 = 0xB0,
1142 SlotTypePciExpressGen3 = 0xB1,
1143 SlotTypePciExpressGen3X1 = 0xB2,
1144 SlotTypePciExpressGen3X2 = 0xB3,
1145 SlotTypePciExpressGen3X4 = 0xB4,
1146 SlotTypePciExpressGen3X8 = 0xB5,
1147 SlotTypePciExpressGen3X16 = 0xB6
1148 } MISC_SLOT_TYPE;
1149
1150 ///
1151 /// System Slots - Slot Data Bus Width.
1152 ///
1153 typedef enum {
1154 SlotDataBusWidthOther = 0x01,
1155 SlotDataBusWidthUnknown = 0x02,
1156 SlotDataBusWidth8Bit = 0x03,
1157 SlotDataBusWidth16Bit = 0x04,
1158 SlotDataBusWidth32Bit = 0x05,
1159 SlotDataBusWidth64Bit = 0x06,
1160 SlotDataBusWidth128Bit = 0x07,
1161 SlotDataBusWidth1X = 0x08, ///< Or X1
1162 SlotDataBusWidth2X = 0x09, ///< Or X2
1163 SlotDataBusWidth4X = 0x0A, ///< Or X4
1164 SlotDataBusWidth8X = 0x0B, ///< Or X8
1165 SlotDataBusWidth12X = 0x0C, ///< Or X12
1166 SlotDataBusWidth16X = 0x0D, ///< Or X16
1167 SlotDataBusWidth32X = 0x0E ///< Or X32
1168 } MISC_SLOT_DATA_BUS_WIDTH;
1169
1170 ///
1171 /// System Slots - Current Usage.
1172 ///
1173 typedef enum {
1174 SlotUsageOther = 0x01,
1175 SlotUsageUnknown = 0x02,
1176 SlotUsageAvailable = 0x03,
1177 SlotUsageInUse = 0x04
1178 } MISC_SLOT_USAGE;
1179
1180 ///
1181 /// System Slots - Slot Length.
1182 ///
1183 typedef enum {
1184 SlotLengthOther = 0x01,
1185 SlotLengthUnknown = 0x02,
1186 SlotLengthShort = 0x03,
1187 SlotLengthLong = 0x04
1188 } MISC_SLOT_LENGTH;
1189
1190 ///
1191 /// System Slots - Slot Characteristics 1.
1192 ///
1193 typedef struct {
1194 UINT8 CharacteristicsUnknown :1;
1195 UINT8 Provides50Volts :1;
1196 UINT8 Provides33Volts :1;
1197 UINT8 SharedSlot :1;
1198 UINT8 PcCard16Supported :1;
1199 UINT8 CardBusSupported :1;
1200 UINT8 ZoomVideoSupported :1;
1201 UINT8 ModemRingResumeSupported:1;
1202 } MISC_SLOT_CHARACTERISTICS1;
1203 ///
1204 /// System Slots - Slot Characteristics 2.
1205 ///
1206 typedef struct {
1207 UINT8 PmeSignalSupported :1;
1208 UINT8 HotPlugDevicesSupported :1;
1209 UINT8 SmbusSignalSupported :1;
1210 UINT8 Reserved :5; ///< Set to 0.
1211 } MISC_SLOT_CHARACTERISTICS2;
1212
1213 ///
1214 /// System Slots (Type 9)
1215 ///
1216 /// The information in this structure defines the attributes of a system slot.
1217 /// One structure is provided for each slot in the system.
1218 ///
1219 ///
1220 typedef struct {
1221 SMBIOS_STRUCTURE Hdr;
1222 SMBIOS_TABLE_STRING SlotDesignation;
1223 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1224 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1225 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1226 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1227 UINT16 SlotID;
1228 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1229 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1230 //
1231 // Add for smbios 2.6
1232 //
1233 UINT16 SegmentGroupNum;
1234 UINT8 BusNum;
1235 UINT8 DevFuncNum;
1236 } SMBIOS_TABLE_TYPE9;
1237
1238 ///
1239 /// On Board Devices Information - Device Types.
1240 ///
1241 typedef enum {
1242 OnBoardDeviceTypeOther = 0x01,
1243 OnBoardDeviceTypeUnknown = 0x02,
1244 OnBoardDeviceTypeVideo = 0x03,
1245 OnBoardDeviceTypeScsiController = 0x04,
1246 OnBoardDeviceTypeEthernet = 0x05,
1247 OnBoardDeviceTypeTokenRing = 0x06,
1248 OnBoardDeviceTypeSound = 0x07,
1249 OnBoardDeviceTypePATAController = 0x08,
1250 OnBoardDeviceTypeSATAController = 0x09,
1251 OnBoardDeviceTypeSASController = 0x0A
1252 } MISC_ONBOARD_DEVICE_TYPE;
1253
1254 ///
1255 /// Device Item Entry
1256 ///
1257 typedef struct {
1258 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1259 ///< Bit 7 - 1 : device enabled, 0 : device disabled.
1260 SMBIOS_TABLE_STRING DescriptionString;
1261 } DEVICE_STRUCT;
1262
1263 ///
1264 /// On Board Devices Information (Type 10, obsolete).
1265 ///
1266 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1267 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1268 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1269 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1270 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1271 /// has some level of control over the enabling of the associated device for use by the system.
1272 ///
1273 typedef struct {
1274 SMBIOS_STRUCTURE Hdr;
1275 DEVICE_STRUCT Device[1];
1276 } SMBIOS_TABLE_TYPE10;
1277
1278 ///
1279 /// OEM Strings (Type 11).
1280 /// This structure contains free form strings defined by the OEM. Examples of this are:
1281 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1282 ///
1283 typedef struct {
1284 SMBIOS_STRUCTURE Hdr;
1285 UINT8 StringCount;
1286 } SMBIOS_TABLE_TYPE11;
1287
1288 ///
1289 /// System Configuration Options (Type 12).
1290 ///
1291 /// This structure contains information required to configure the base board's Jumpers and Switches.
1292 ///
1293 typedef struct {
1294 SMBIOS_STRUCTURE Hdr;
1295 UINT8 StringCount;
1296 } SMBIOS_TABLE_TYPE12;
1297
1298
1299 ///
1300 /// BIOS Language Information (Type 13).
1301 ///
1302 /// The information in this structure defines the installable language attributes of the BIOS.
1303 ///
1304 typedef struct {
1305 SMBIOS_STRUCTURE Hdr;
1306 UINT8 InstallableLanguages;
1307 UINT8 Flags;
1308 UINT8 Reserved[15];
1309 SMBIOS_TABLE_STRING CurrentLanguages;
1310 } SMBIOS_TABLE_TYPE13;
1311
1312 ///
1313 /// Group Item Entry
1314 ///
1315 typedef struct {
1316 UINT8 ItemType;
1317 UINT16 ItemHandle;
1318 } GROUP_STRUCT;
1319
1320 ///
1321 /// Group Associations (Type 14).
1322 ///
1323 /// The Group Associations structure is provided for OEMs who want to specify
1324 /// the arrangement or hierarchy of certain components (including other Group Associations)
1325 /// within the system.
1326 ///
1327 typedef struct {
1328 SMBIOS_STRUCTURE Hdr;
1329 SMBIOS_TABLE_STRING GroupName;
1330 GROUP_STRUCT Group[1];
1331 } SMBIOS_TABLE_TYPE14;
1332
1333 ///
1334 /// System Event Log - Event Log Types.
1335 ///
1336 typedef enum {
1337 EventLogTypeReserved = 0x00,
1338 EventLogTypeSingleBitECC = 0x01,
1339 EventLogTypeMultiBitECC = 0x02,
1340 EventLogTypeParityMemErr = 0x03,
1341 EventLogTypeBusTimeOut = 0x04,
1342 EventLogTypeIOChannelCheck = 0x05,
1343 EventLogTypeSoftwareNMI = 0x06,
1344 EventLogTypePOSTMemResize = 0x07,
1345 EventLogTypePOSTErr = 0x08,
1346 EventLogTypePCIParityErr = 0x09,
1347 EventLogTypePCISystemErr = 0x0A,
1348 EventLogTypeCPUFailure = 0x0B,
1349 EventLogTypeEISATimeOut = 0x0C,
1350 EventLogTypeMemLogDisabled = 0x0D,
1351 EventLogTypeLoggingDisabled = 0x0E,
1352 EventLogTypeSysLimitExce = 0x10,
1353 EventLogTypeAsyncHWTimer = 0x11,
1354 EventLogTypeSysConfigInfo = 0x12,
1355 EventLogTypeHDInfo = 0x13,
1356 EventLogTypeSysReconfig = 0x14,
1357 EventLogTypeUncorrectCPUErr = 0x15,
1358 EventLogTypeAreaResetAndClr = 0x16,
1359 EventLogTypeSystemBoot = 0x17,
1360 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1361 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1362 EventLogTypeEndOfLog = 0xFF
1363 } EVENT_LOG_TYPE_DATA;
1364
1365 ///
1366 /// System Event Log - Variable Data Format Types.
1367 ///
1368 typedef enum {
1369 EventLogVariableNone = 0x00,
1370 EventLogVariableHandle = 0x01,
1371 EventLogVariableMutilEvent = 0x02,
1372 EventLogVariableMutilEventHandle = 0x03,
1373 EventLogVariablePOSTResultBitmap = 0x04,
1374 EventLogVariableSysManagementType = 0x05,
1375 EventLogVariableMutliEventSysManagmentType = 0x06,
1376 EventLogVariableUnused = 0x07,
1377 EventLogVariableOEMAssigned = 0x80
1378 } EVENT_LOG_VARIABLE_DATA;
1379
1380 ///
1381 /// Event Log Type Descriptors
1382 ///
1383 typedef struct {
1384 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1385 UINT8 DataFormatType;
1386 } EVENT_LOG_TYPE;
1387
1388 ///
1389 /// System Event Log (Type 15).
1390 ///
1391 /// The presence of this structure within the SMBIOS data returned for a system indicates
1392 /// that the system supports an event log. An event log is a fixed-length area within a
1393 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1394 /// record, followed by one or more variable-length log records.
1395 ///
1396 typedef struct {
1397 SMBIOS_STRUCTURE Hdr;
1398 UINT16 LogAreaLength;
1399 UINT16 LogHeaderStartOffset;
1400 UINT16 LogDataStartOffset;
1401 UINT8 AccessMethod;
1402 UINT8 LogStatus;
1403 UINT32 LogChangeToken;
1404 UINT32 AccessMethodAddress;
1405 UINT8 LogHeaderFormat;
1406 UINT8 NumberOfSupportedLogTypeDescriptors;
1407 UINT8 LengthOfLogTypeDescriptor;
1408 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1409 } SMBIOS_TABLE_TYPE15;
1410
1411 ///
1412 /// Physical Memory Array - Location.
1413 ///
1414 typedef enum {
1415 MemoryArrayLocationOther = 0x01,
1416 MemoryArrayLocationUnknown = 0x02,
1417 MemoryArrayLocationSystemBoard = 0x03,
1418 MemoryArrayLocationIsaAddonCard = 0x04,
1419 MemoryArrayLocationEisaAddonCard = 0x05,
1420 MemoryArrayLocationPciAddonCard = 0x06,
1421 MemoryArrayLocationMcaAddonCard = 0x07,
1422 MemoryArrayLocationPcmciaAddonCard = 0x08,
1423 MemoryArrayLocationProprietaryAddonCard = 0x09,
1424 MemoryArrayLocationNuBus = 0x0A,
1425 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1426 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1427 MemoryArrayLocationPc98EAddonCard = 0xA2,
1428 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3
1429 } MEMORY_ARRAY_LOCATION;
1430
1431 ///
1432 /// Physical Memory Array - Use.
1433 ///
1434 typedef enum {
1435 MemoryArrayUseOther = 0x01,
1436 MemoryArrayUseUnknown = 0x02,
1437 MemoryArrayUseSystemMemory = 0x03,
1438 MemoryArrayUseVideoMemory = 0x04,
1439 MemoryArrayUseFlashMemory = 0x05,
1440 MemoryArrayUseNonVolatileRam = 0x06,
1441 MemoryArrayUseCacheMemory = 0x07
1442 } MEMORY_ARRAY_USE;
1443
1444 ///
1445 /// Physical Memory Array - Error Correction Types.
1446 ///
1447 typedef enum {
1448 MemoryErrorCorrectionOther = 0x01,
1449 MemoryErrorCorrectionUnknown = 0x02,
1450 MemoryErrorCorrectionNone = 0x03,
1451 MemoryErrorCorrectionParity = 0x04,
1452 MemoryErrorCorrectionSingleBitEcc = 0x05,
1453 MemoryErrorCorrectionMultiBitEcc = 0x06,
1454 MemoryErrorCorrectionCrc = 0x07
1455 } MEMORY_ERROR_CORRECTION;
1456
1457 ///
1458 /// Physical Memory Array (Type 16).
1459 ///
1460 /// This structure describes a collection of memory devices that operate
1461 /// together to form a memory address space.
1462 ///
1463 typedef struct {
1464 SMBIOS_STRUCTURE Hdr;
1465 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1466 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1467 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1468 UINT32 MaximumCapacity;
1469 UINT16 MemoryErrorInformationHandle;
1470 UINT16 NumberOfMemoryDevices;
1471 //
1472 // Add for smbios 2.7
1473 //
1474 UINT64 ExtendedMaximumCapacity;
1475 } SMBIOS_TABLE_TYPE16;
1476
1477 ///
1478 /// Memory Device - Form Factor.
1479 ///
1480 typedef enum {
1481 MemoryFormFactorOther = 0x01,
1482 MemoryFormFactorUnknown = 0x02,
1483 MemoryFormFactorSimm = 0x03,
1484 MemoryFormFactorSip = 0x04,
1485 MemoryFormFactorChip = 0x05,
1486 MemoryFormFactorDip = 0x06,
1487 MemoryFormFactorZip = 0x07,
1488 MemoryFormFactorProprietaryCard = 0x08,
1489 MemoryFormFactorDimm = 0x09,
1490 MemoryFormFactorTsop = 0x0A,
1491 MemoryFormFactorRowOfChips = 0x0B,
1492 MemoryFormFactorRimm = 0x0C,
1493 MemoryFormFactorSodimm = 0x0D,
1494 MemoryFormFactorSrimm = 0x0E,
1495 MemoryFormFactorFbDimm = 0x0F
1496 } MEMORY_FORM_FACTOR;
1497
1498 ///
1499 /// Memory Device - Type
1500 ///
1501 typedef enum {
1502 MemoryTypeOther = 0x01,
1503 MemoryTypeUnknown = 0x02,
1504 MemoryTypeDram = 0x03,
1505 MemoryTypeEdram = 0x04,
1506 MemoryTypeVram = 0x05,
1507 MemoryTypeSram = 0x06,
1508 MemoryTypeRam = 0x07,
1509 MemoryTypeRom = 0x08,
1510 MemoryTypeFlash = 0x09,
1511 MemoryTypeEeprom = 0x0A,
1512 MemoryTypeFeprom = 0x0B,
1513 MemoryTypeEprom = 0x0C,
1514 MemoryTypeCdram = 0x0D,
1515 MemoryType3Dram = 0x0E,
1516 MemoryTypeSdram = 0x0F,
1517 MemoryTypeSgram = 0x10,
1518 MemoryTypeRdram = 0x11,
1519 MemoryTypeDdr = 0x12,
1520 MemoryTypeDdr2 = 0x13,
1521 MemoryTypeDdr2FbDimm = 0x14,
1522 MemoryTypeDdr3 = 0x18,
1523 MemoryTypeFbd2 = 0x19,
1524 MemoryTypeDdr4 = 0x1A,
1525 MemoryTypeLpddr = 0x1B,
1526 MemoryTypeLpddr2 = 0x1C,
1527 MemoryTypeLpddr3 = 0x1D,
1528 MemoryTypeLpddr4 = 0x1E
1529 } MEMORY_DEVICE_TYPE;
1530
1531 typedef struct {
1532 UINT16 Reserved :1;
1533 UINT16 Other :1;
1534 UINT16 Unknown :1;
1535 UINT16 FastPaged :1;
1536 UINT16 StaticColumn :1;
1537 UINT16 PseudoStatic :1;
1538 UINT16 Rambus :1;
1539 UINT16 Synchronous :1;
1540 UINT16 Cmos :1;
1541 UINT16 Edo :1;
1542 UINT16 WindowDram :1;
1543 UINT16 CacheDram :1;
1544 UINT16 Nonvolatile :1;
1545 UINT16 Registered :1;
1546 UINT16 Unbuffered :1;
1547 UINT16 LrDimm :1;
1548 } MEMORY_DEVICE_TYPE_DETAIL;
1549
1550 ///
1551 /// Memory Device (Type 17).
1552 ///
1553 /// This structure describes a single memory device that is part of
1554 /// a larger Physical Memory Array (Type 16).
1555 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1556 /// includes a Memory Device structure instance for each slot, whether or not the
1557 /// socket is currently populated.
1558 ///
1559 typedef struct {
1560 SMBIOS_STRUCTURE Hdr;
1561 UINT16 MemoryArrayHandle;
1562 UINT16 MemoryErrorInformationHandle;
1563 UINT16 TotalWidth;
1564 UINT16 DataWidth;
1565 UINT16 Size;
1566 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1567 UINT8 DeviceSet;
1568 SMBIOS_TABLE_STRING DeviceLocator;
1569 SMBIOS_TABLE_STRING BankLocator;
1570 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1571 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1572 UINT16 Speed;
1573 SMBIOS_TABLE_STRING Manufacturer;
1574 SMBIOS_TABLE_STRING SerialNumber;
1575 SMBIOS_TABLE_STRING AssetTag;
1576 SMBIOS_TABLE_STRING PartNumber;
1577 //
1578 // Add for smbios 2.6
1579 //
1580 UINT8 Attributes;
1581 //
1582 // Add for smbios 2.7
1583 //
1584 UINT32 ExtendedSize;
1585 UINT16 ConfiguredMemoryClockSpeed;
1586 //
1587 // Add for smbios 2.8.0
1588 //
1589 UINT16 MinimumVoltage;
1590 UINT16 MaximumVoltage;
1591 UINT16 ConfiguredVoltage;
1592 } SMBIOS_TABLE_TYPE17;
1593
1594 ///
1595 /// 32-bit Memory Error Information - Error Type.
1596 ///
1597 typedef enum {
1598 MemoryErrorOther = 0x01,
1599 MemoryErrorUnknown = 0x02,
1600 MemoryErrorOk = 0x03,
1601 MemoryErrorBadRead = 0x04,
1602 MemoryErrorParity = 0x05,
1603 MemoryErrorSigleBit = 0x06,
1604 MemoryErrorDoubleBit = 0x07,
1605 MemoryErrorMultiBit = 0x08,
1606 MemoryErrorNibble = 0x09,
1607 MemoryErrorChecksum = 0x0A,
1608 MemoryErrorCrc = 0x0B,
1609 MemoryErrorCorrectSingleBit = 0x0C,
1610 MemoryErrorCorrected = 0x0D,
1611 MemoryErrorUnCorrectable = 0x0E
1612 } MEMORY_ERROR_TYPE;
1613
1614 ///
1615 /// 32-bit Memory Error Information - Error Granularity.
1616 ///
1617 typedef enum {
1618 MemoryGranularityOther = 0x01,
1619 MemoryGranularityOtherUnknown = 0x02,
1620 MemoryGranularityDeviceLevel = 0x03,
1621 MemoryGranularityMemPartitionLevel = 0x04
1622 } MEMORY_ERROR_GRANULARITY;
1623
1624 ///
1625 /// 32-bit Memory Error Information - Error Operation.
1626 ///
1627 typedef enum {
1628 MemoryErrorOperationOther = 0x01,
1629 MemoryErrorOperationUnknown = 0x02,
1630 MemoryErrorOperationRead = 0x03,
1631 MemoryErrorOperationWrite = 0x04,
1632 MemoryErrorOperationPartialWrite = 0x05
1633 } MEMORY_ERROR_OPERATION;
1634
1635 ///
1636 /// 32-bit Memory Error Information (Type 18).
1637 ///
1638 /// This structure identifies the specifics of an error that might be detected
1639 /// within a Physical Memory Array.
1640 ///
1641 typedef struct {
1642 SMBIOS_STRUCTURE Hdr;
1643 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1644 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1645 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1646 UINT32 VendorSyndrome;
1647 UINT32 MemoryArrayErrorAddress;
1648 UINT32 DeviceErrorAddress;
1649 UINT32 ErrorResolution;
1650 } SMBIOS_TABLE_TYPE18;
1651
1652 ///
1653 /// Memory Array Mapped Address (Type 19).
1654 ///
1655 /// This structure provides the address mapping for a Physical Memory Array.
1656 /// One structure is present for each contiguous address range described.
1657 ///
1658 typedef struct {
1659 SMBIOS_STRUCTURE Hdr;
1660 UINT32 StartingAddress;
1661 UINT32 EndingAddress;
1662 UINT16 MemoryArrayHandle;
1663 UINT8 PartitionWidth;
1664 //
1665 // Add for smbios 2.7
1666 //
1667 UINT64 ExtendedStartingAddress;
1668 UINT64 ExtendedEndingAddress;
1669 } SMBIOS_TABLE_TYPE19;
1670
1671 ///
1672 /// Memory Device Mapped Address (Type 20).
1673 ///
1674 /// This structure maps memory address space usually to a device-level granularity.
1675 /// One structure is present for each contiguous address range described.
1676 ///
1677 typedef struct {
1678 SMBIOS_STRUCTURE Hdr;
1679 UINT32 StartingAddress;
1680 UINT32 EndingAddress;
1681 UINT16 MemoryDeviceHandle;
1682 UINT16 MemoryArrayMappedAddressHandle;
1683 UINT8 PartitionRowPosition;
1684 UINT8 InterleavePosition;
1685 UINT8 InterleavedDataDepth;
1686 //
1687 // Add for smbios 2.7
1688 //
1689 UINT64 ExtendedStartingAddress;
1690 UINT64 ExtendedEndingAddress;
1691 } SMBIOS_TABLE_TYPE20;
1692
1693 ///
1694 /// Built-in Pointing Device - Type
1695 ///
1696 typedef enum {
1697 PointingDeviceTypeOther = 0x01,
1698 PointingDeviceTypeUnknown = 0x02,
1699 PointingDeviceTypeMouse = 0x03,
1700 PointingDeviceTypeTrackBall = 0x04,
1701 PointingDeviceTypeTrackPoint = 0x05,
1702 PointingDeviceTypeGlidePoint = 0x06,
1703 PointingDeviceTouchPad = 0x07,
1704 PointingDeviceTouchScreen = 0x08,
1705 PointingDeviceOpticalSensor = 0x09
1706 } BUILTIN_POINTING_DEVICE_TYPE;
1707
1708 ///
1709 /// Built-in Pointing Device - Interface.
1710 ///
1711 typedef enum {
1712 PointingDeviceInterfaceOther = 0x01,
1713 PointingDeviceInterfaceUnknown = 0x02,
1714 PointingDeviceInterfaceSerial = 0x03,
1715 PointingDeviceInterfacePs2 = 0x04,
1716 PointingDeviceInterfaceInfrared = 0x05,
1717 PointingDeviceInterfaceHpHil = 0x06,
1718 PointingDeviceInterfaceBusMouse = 0x07,
1719 PointingDeviceInterfaceADB = 0x08,
1720 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1721 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1722 PointingDeviceInterfaceUsb = 0xA2
1723 } BUILTIN_POINTING_DEVICE_INTERFACE;
1724
1725 ///
1726 /// Built-in Pointing Device (Type 21).
1727 ///
1728 /// This structure describes the attributes of the built-in pointing device for the
1729 /// system. The presence of this structure does not imply that the built-in
1730 /// pointing device is active for the system's use!
1731 ///
1732 typedef struct {
1733 SMBIOS_STRUCTURE Hdr;
1734 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
1735 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
1736 UINT8 NumberOfButtons;
1737 } SMBIOS_TABLE_TYPE21;
1738
1739 ///
1740 /// Portable Battery - Device Chemistry
1741 ///
1742 typedef enum {
1743 PortableBatteryDeviceChemistryOther = 0x01,
1744 PortableBatteryDeviceChemistryUnknown = 0x02,
1745 PortableBatteryDeviceChemistryLeadAcid = 0x03,
1746 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
1747 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
1748 PortableBatteryDeviceChemistryLithiumIon = 0x06,
1749 PortableBatteryDeviceChemistryZincAir = 0x07,
1750 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
1751 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
1752
1753 ///
1754 /// Portable Battery (Type 22).
1755 ///
1756 /// This structure describes the attributes of the portable battery(s) for the system.
1757 /// The structure contains the static attributes for the group. Each structure describes
1758 /// a single battery pack's attributes.
1759 ///
1760 typedef struct {
1761 SMBIOS_STRUCTURE Hdr;
1762 SMBIOS_TABLE_STRING Location;
1763 SMBIOS_TABLE_STRING Manufacturer;
1764 SMBIOS_TABLE_STRING ManufactureDate;
1765 SMBIOS_TABLE_STRING SerialNumber;
1766 SMBIOS_TABLE_STRING DeviceName;
1767 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
1768 UINT16 DeviceCapacity;
1769 UINT16 DesignVoltage;
1770 SMBIOS_TABLE_STRING SBDSVersionNumber;
1771 UINT8 MaximumErrorInBatteryData;
1772 UINT16 SBDSSerialNumber;
1773 UINT16 SBDSManufactureDate;
1774 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
1775 UINT8 DesignCapacityMultiplier;
1776 UINT32 OEMSpecific;
1777 } SMBIOS_TABLE_TYPE22;
1778
1779 ///
1780 /// System Reset (Type 23)
1781 ///
1782 /// This structure describes whether Automatic System Reset functions enabled (Status).
1783 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
1784 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
1785 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
1786 /// the system will re-boot according to the Boot Option at Limit.
1787 ///
1788 typedef struct {
1789 SMBIOS_STRUCTURE Hdr;
1790 UINT8 Capabilities;
1791 UINT16 ResetCount;
1792 UINT16 ResetLimit;
1793 UINT16 TimerInterval;
1794 UINT16 Timeout;
1795 } SMBIOS_TABLE_TYPE23;
1796
1797 ///
1798 /// Hardware Security (Type 24).
1799 ///
1800 /// This structure describes the system-wide hardware security settings.
1801 ///
1802 typedef struct {
1803 SMBIOS_STRUCTURE Hdr;
1804 UINT8 HardwareSecuritySettings;
1805 } SMBIOS_TABLE_TYPE24;
1806
1807 ///
1808 /// System Power Controls (Type 25).
1809 ///
1810 /// This structure describes the attributes for controlling the main power supply to the system.
1811 /// Software that interprets this structure uses the month, day, hour, minute, and second values
1812 /// to determine the number of seconds until the next power-on of the system. The presence of
1813 /// this structure implies that a timed power-on facility is available for the system.
1814 ///
1815 typedef struct {
1816 SMBIOS_STRUCTURE Hdr;
1817 UINT8 NextScheduledPowerOnMonth;
1818 UINT8 NextScheduledPowerOnDayOfMonth;
1819 UINT8 NextScheduledPowerOnHour;
1820 UINT8 NextScheduledPowerOnMinute;
1821 UINT8 NextScheduledPowerOnSecond;
1822 } SMBIOS_TABLE_TYPE25;
1823
1824 ///
1825 /// Voltage Probe - Location and Status.
1826 ///
1827 typedef struct {
1828 UINT8 VoltageProbeSite :5;
1829 UINT8 VoltageProbeStatus :3;
1830 } MISC_VOLTAGE_PROBE_LOCATION;
1831
1832 ///
1833 /// Voltage Probe (Type 26)
1834 ///
1835 /// This describes the attributes for a voltage probe in the system.
1836 /// Each structure describes a single voltage probe.
1837 ///
1838 typedef struct {
1839 SMBIOS_STRUCTURE Hdr;
1840 SMBIOS_TABLE_STRING Description;
1841 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
1842 UINT16 MaximumValue;
1843 UINT16 MinimumValue;
1844 UINT16 Resolution;
1845 UINT16 Tolerance;
1846 UINT16 Accuracy;
1847 UINT32 OEMDefined;
1848 UINT16 NominalValue;
1849 } SMBIOS_TABLE_TYPE26;
1850
1851 ///
1852 /// Cooling Device - Device Type and Status.
1853 ///
1854 typedef struct {
1855 UINT8 CoolingDevice :5;
1856 UINT8 CoolingDeviceStatus :3;
1857 } MISC_COOLING_DEVICE_TYPE;
1858
1859 ///
1860 /// Cooling Device (Type 27)
1861 ///
1862 /// This structure describes the attributes for a cooling device in the system.
1863 /// Each structure describes a single cooling device.
1864 ///
1865 typedef struct {
1866 SMBIOS_STRUCTURE Hdr;
1867 UINT16 TemperatureProbeHandle;
1868 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
1869 UINT8 CoolingUnitGroup;
1870 UINT32 OEMDefined;
1871 UINT16 NominalSpeed;
1872 //
1873 // Add for smbios 2.7
1874 //
1875 SMBIOS_TABLE_STRING Description;
1876 } SMBIOS_TABLE_TYPE27;
1877
1878 ///
1879 /// Temperature Probe - Location and Status.
1880 ///
1881 typedef struct {
1882 UINT8 TemperatureProbeSite :5;
1883 UINT8 TemperatureProbeStatus :3;
1884 } MISC_TEMPERATURE_PROBE_LOCATION;
1885
1886 ///
1887 /// Temperature Probe (Type 28).
1888 ///
1889 /// This structure describes the attributes for a temperature probe in the system.
1890 /// Each structure describes a single temperature probe.
1891 ///
1892 typedef struct {
1893 SMBIOS_STRUCTURE Hdr;
1894 SMBIOS_TABLE_STRING Description;
1895 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
1896 UINT16 MaximumValue;
1897 UINT16 MinimumValue;
1898 UINT16 Resolution;
1899 UINT16 Tolerance;
1900 UINT16 Accuracy;
1901 UINT32 OEMDefined;
1902 UINT16 NominalValue;
1903 } SMBIOS_TABLE_TYPE28;
1904
1905 ///
1906 /// Electrical Current Probe - Location and Status.
1907 ///
1908 typedef struct {
1909 UINT8 ElectricalCurrentProbeSite :5;
1910 UINT8 ElectricalCurrentProbeStatus :3;
1911 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
1912
1913 ///
1914 /// Electrical Current Probe (Type 29).
1915 ///
1916 /// This structure describes the attributes for an electrical current probe in the system.
1917 /// Each structure describes a single electrical current probe.
1918 ///
1919 typedef struct {
1920 SMBIOS_STRUCTURE Hdr;
1921 SMBIOS_TABLE_STRING Description;
1922 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
1923 UINT16 MaximumValue;
1924 UINT16 MinimumValue;
1925 UINT16 Resolution;
1926 UINT16 Tolerance;
1927 UINT16 Accuracy;
1928 UINT32 OEMDefined;
1929 UINT16 NominalValue;
1930 } SMBIOS_TABLE_TYPE29;
1931
1932 ///
1933 /// Out-of-Band Remote Access (Type 30).
1934 ///
1935 /// This structure describes the attributes and policy settings of a hardware facility
1936 /// that may be used to gain remote access to a hardware system when the operating system
1937 /// is not available due to power-down status, hardware failures, or boot failures.
1938 ///
1939 typedef struct {
1940 SMBIOS_STRUCTURE Hdr;
1941 SMBIOS_TABLE_STRING ManufacturerName;
1942 UINT8 Connections;
1943 } SMBIOS_TABLE_TYPE30;
1944
1945 ///
1946 /// Boot Integrity Services (BIS) Entry Point (Type 31).
1947 ///
1948 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
1949 ///
1950 typedef struct {
1951 SMBIOS_STRUCTURE Hdr;
1952 UINT8 Checksum;
1953 UINT8 Reserved1;
1954 UINT16 Reserved2;
1955 UINT32 BisEntry16;
1956 UINT32 BisEntry32;
1957 UINT64 Reserved3;
1958 UINT32 Reserved4;
1959 } SMBIOS_TABLE_TYPE31;
1960
1961 ///
1962 /// System Boot Information - System Boot Status.
1963 ///
1964 typedef enum {
1965 BootInformationStatusNoError = 0x00,
1966 BootInformationStatusNoBootableMedia = 0x01,
1967 BootInformationStatusNormalOSFailedLoading = 0x02,
1968 BootInformationStatusFirmwareDetectedFailure = 0x03,
1969 BootInformationStatusOSDetectedFailure = 0x04,
1970 BootInformationStatusUserRequestedBoot = 0x05,
1971 BootInformationStatusSystemSecurityViolation = 0x06,
1972 BootInformationStatusPreviousRequestedImage = 0x07,
1973 BootInformationStatusWatchdogTimerExpired = 0x08,
1974 BootInformationStatusStartReserved = 0x09,
1975 BootInformationStatusStartOemSpecific = 0x80,
1976 BootInformationStatusStartProductSpecific = 0xC0
1977 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
1978
1979 ///
1980 /// System Boot Information (Type 32).
1981 ///
1982 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
1983 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
1984 /// application via this structure. When used in the PXE environment, for example,
1985 /// this code identifies the reason the PXE was initiated and can be used by boot-image
1986 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
1987 /// could choose to automatically download a hardware-diagnostic image to a client whose
1988 /// reason code indicated either a firmware- or operating system-detected hardware failure.
1989 ///
1990 typedef struct {
1991 SMBIOS_STRUCTURE Hdr;
1992 UINT8 Reserved[6];
1993 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
1994 } SMBIOS_TABLE_TYPE32;
1995
1996 ///
1997 /// 64-bit Memory Error Information (Type 33).
1998 ///
1999 /// This structure describes an error within a Physical Memory Array,
2000 /// when the error address is above 4G (0xFFFFFFFF).
2001 ///
2002 typedef struct {
2003 SMBIOS_STRUCTURE Hdr;
2004 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
2005 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
2006 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
2007 UINT32 VendorSyndrome;
2008 UINT64 MemoryArrayErrorAddress;
2009 UINT64 DeviceErrorAddress;
2010 UINT32 ErrorResolution;
2011 } SMBIOS_TABLE_TYPE33;
2012
2013 ///
2014 /// Management Device - Type.
2015 ///
2016 typedef enum {
2017 ManagementDeviceTypeOther = 0x01,
2018 ManagementDeviceTypeUnknown = 0x02,
2019 ManagementDeviceTypeLm75 = 0x03,
2020 ManagementDeviceTypeLm78 = 0x04,
2021 ManagementDeviceTypeLm79 = 0x05,
2022 ManagementDeviceTypeLm80 = 0x06,
2023 ManagementDeviceTypeLm81 = 0x07,
2024 ManagementDeviceTypeAdm9240 = 0x08,
2025 ManagementDeviceTypeDs1780 = 0x09,
2026 ManagementDeviceTypeMaxim1617 = 0x0A,
2027 ManagementDeviceTypeGl518Sm = 0x0B,
2028 ManagementDeviceTypeW83781D = 0x0C,
2029 ManagementDeviceTypeHt82H791 = 0x0D
2030 } MISC_MANAGEMENT_DEVICE_TYPE;
2031
2032 ///
2033 /// Management Device - Address Type.
2034 ///
2035 typedef enum {
2036 ManagementDeviceAddressTypeOther = 0x01,
2037 ManagementDeviceAddressTypeUnknown = 0x02,
2038 ManagementDeviceAddressTypeIOPort = 0x03,
2039 ManagementDeviceAddressTypeMemory = 0x04,
2040 ManagementDeviceAddressTypeSmbus = 0x05
2041 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
2042
2043 ///
2044 /// Management Device (Type 34).
2045 ///
2046 /// The information in this structure defines the attributes of a Management Device.
2047 /// A Management Device might control one or more fans or voltage, current, or temperature
2048 /// probes as defined by one or more Management Device Component structures.
2049 ///
2050 typedef struct {
2051 SMBIOS_STRUCTURE Hdr;
2052 SMBIOS_TABLE_STRING Description;
2053 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
2054 UINT32 Address;
2055 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
2056 } SMBIOS_TABLE_TYPE34;
2057
2058 ///
2059 /// Management Device Component (Type 35)
2060 ///
2061 /// This structure associates a cooling device or environmental probe with structures
2062 /// that define the controlling hardware device and (optionally) the component's thresholds.
2063 ///
2064 typedef struct {
2065 SMBIOS_STRUCTURE Hdr;
2066 SMBIOS_TABLE_STRING Description;
2067 UINT16 ManagementDeviceHandle;
2068 UINT16 ComponentHandle;
2069 UINT16 ThresholdHandle;
2070 } SMBIOS_TABLE_TYPE35;
2071
2072 ///
2073 /// Management Device Threshold Data (Type 36).
2074 ///
2075 /// The information in this structure defines threshold information for
2076 /// a component (probe or cooling-unit) contained within a Management Device.
2077 ///
2078 typedef struct {
2079 SMBIOS_STRUCTURE Hdr;
2080 UINT16 LowerThresholdNonCritical;
2081 UINT16 UpperThresholdNonCritical;
2082 UINT16 LowerThresholdCritical;
2083 UINT16 UpperThresholdCritical;
2084 UINT16 LowerThresholdNonRecoverable;
2085 UINT16 UpperThresholdNonRecoverable;
2086 } SMBIOS_TABLE_TYPE36;
2087
2088 ///
2089 /// Memory Channel Entry.
2090 ///
2091 typedef struct {
2092 UINT8 DeviceLoad;
2093 UINT16 DeviceHandle;
2094 } MEMORY_DEVICE;
2095
2096 ///
2097 /// Memory Channel - Channel Type.
2098 ///
2099 typedef enum {
2100 MemoryChannelTypeOther = 0x01,
2101 MemoryChannelTypeUnknown = 0x02,
2102 MemoryChannelTypeRambus = 0x03,
2103 MemoryChannelTypeSyncLink = 0x04
2104 } MEMORY_CHANNEL_TYPE;
2105
2106 ///
2107 /// Memory Channel (Type 37)
2108 ///
2109 /// The information in this structure provides the correlation between a Memory Channel
2110 /// and its associated Memory Devices. Each device presents one or more loads to the channel.
2111 /// The sum of all device loads cannot exceed the channel's defined maximum.
2112 ///
2113 typedef struct {
2114 SMBIOS_STRUCTURE Hdr;
2115 UINT8 ChannelType;
2116 UINT8 MaximumChannelLoad;
2117 UINT8 MemoryDeviceCount;
2118 MEMORY_DEVICE MemoryDevice[1];
2119 } SMBIOS_TABLE_TYPE37;
2120
2121 ///
2122 /// IPMI Device Information - BMC Interface Type
2123 ///
2124 typedef enum {
2125 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2126 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2127 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2128 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2129 IPMIDeviceInfoInterfaceTypeReserved = 0x04
2130 } BMC_INTERFACE_TYPE;
2131
2132 ///
2133 /// IPMI Device Information (Type 38).
2134 ///
2135 /// The information in this structure defines the attributes of an
2136 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2137 ///
2138 /// The Type 42 structure can also be used to describe a physical management controller
2139 /// host interface and one or more protocols that share that interface. If IPMI is not
2140 /// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2141 /// Providing Type 38 is recommended for backward compatibility.
2142 ///
2143 typedef struct {
2144 SMBIOS_STRUCTURE Hdr;
2145 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2146 UINT8 IPMISpecificationRevision;
2147 UINT8 I2CSlaveAddress;
2148 UINT8 NVStorageDeviceAddress;
2149 UINT64 BaseAddress;
2150 UINT8 BaseAddressModifier_InterruptInfo;
2151 UINT8 InterruptNumber;
2152 } SMBIOS_TABLE_TYPE38;
2153
2154 ///
2155 /// System Power Supply - Power Supply Characteristics.
2156 ///
2157 typedef struct {
2158 UINT16 PowerSupplyHotReplaceable:1;
2159 UINT16 PowerSupplyPresent :1;
2160 UINT16 PowerSupplyUnplugged :1;
2161 UINT16 InputVoltageRangeSwitch :4;
2162 UINT16 PowerSupplyStatus :3;
2163 UINT16 PowerSupplyType :4;
2164 UINT16 Reserved :2;
2165 } SYS_POWER_SUPPLY_CHARACTERISTICS;
2166
2167 ///
2168 /// System Power Supply (Type 39).
2169 ///
2170 /// This structure identifies attributes of a system power supply. One instance
2171 /// of this record is present for each possible power supply in a system.
2172 ///
2173 typedef struct {
2174 SMBIOS_STRUCTURE Hdr;
2175 UINT8 PowerUnitGroup;
2176 SMBIOS_TABLE_STRING Location;
2177 SMBIOS_TABLE_STRING DeviceName;
2178 SMBIOS_TABLE_STRING Manufacturer;
2179 SMBIOS_TABLE_STRING SerialNumber;
2180 SMBIOS_TABLE_STRING AssetTagNumber;
2181 SMBIOS_TABLE_STRING ModelPartNumber;
2182 SMBIOS_TABLE_STRING RevisionLevel;
2183 UINT16 MaxPowerCapacity;
2184 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2185 UINT16 InputVoltageProbeHandle;
2186 UINT16 CoolingDeviceHandle;
2187 UINT16 InputCurrentProbeHandle;
2188 } SMBIOS_TABLE_TYPE39;
2189
2190 ///
2191 /// Additional Information Entry Format.
2192 ///
2193 typedef struct {
2194 UINT8 EntryLength;
2195 UINT16 ReferencedHandle;
2196 UINT8 ReferencedOffset;
2197 SMBIOS_TABLE_STRING EntryString;
2198 UINT8 Value[1];
2199 }ADDITIONAL_INFORMATION_ENTRY;
2200
2201 ///
2202 /// Additional Information (Type 40).
2203 ///
2204 /// This structure is intended to provide additional information for handling unspecified
2205 /// enumerated values and interim field updates in another structure.
2206 ///
2207 typedef struct {
2208 SMBIOS_STRUCTURE Hdr;
2209 UINT8 NumberOfAdditionalInformationEntries;
2210 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2211 } SMBIOS_TABLE_TYPE40;
2212
2213 ///
2214 /// Onboard Devices Extended Information - Onboard Device Types.
2215 ///
2216 typedef enum{
2217 OnBoardDeviceExtendedTypeOther = 0x01,
2218 OnBoardDeviceExtendedTypeUnknown = 0x02,
2219 OnBoardDeviceExtendedTypeVideo = 0x03,
2220 OnBoardDeviceExtendedTypeScsiController = 0x04,
2221 OnBoardDeviceExtendedTypeEthernet = 0x05,
2222 OnBoardDeviceExtendedTypeTokenRing = 0x06,
2223 OnBoardDeviceExtendedTypeSound = 0x07,
2224 OnBoardDeviceExtendedTypePATAController = 0x08,
2225 OnBoardDeviceExtendedTypeSATAController = 0x09,
2226 OnBoardDeviceExtendedTypeSASController = 0x0A
2227 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2228
2229 ///
2230 /// Onboard Devices Extended Information (Type 41).
2231 ///
2232 /// The information in this structure defines the attributes of devices that
2233 /// are onboard (soldered onto) a system element, usually the baseboard.
2234 /// In general, an entry in this table implies that the BIOS has some level of
2235 /// control over the enabling of the associated device for use by the system.
2236 ///
2237 typedef struct {
2238 SMBIOS_STRUCTURE Hdr;
2239 SMBIOS_TABLE_STRING ReferenceDesignation;
2240 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2241 UINT8 DeviceTypeInstance;
2242 UINT16 SegmentGroupNum;
2243 UINT8 BusNum;
2244 UINT8 DevFuncNum;
2245 } SMBIOS_TABLE_TYPE41;
2246
2247 ///
2248 /// Management Controller Host Interface (Type 42).
2249 ///
2250 /// The information in this structure defines the attributes of a Management
2251 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2252 ///
2253 /// Type 42 should be used for management controller host interfaces that use protocols
2254 /// other than IPMI or that use multiple protocols on a single host interface type.
2255 ///
2256 /// This structure should also be provided if IPMI is shared with other protocols
2257 /// over the same interface hardware. If IPMI is not shared with other protocols,
2258 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2259 /// recommended for backward compatibility. The structures are not required to
2260 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2261 /// simultaneously to provide backward compatibility with IPMI applications or drivers
2262 /// that do not yet recognize the Type 42 structure.
2263 ///
2264 typedef struct {
2265 SMBIOS_STRUCTURE Hdr;
2266 UINT8 InterfaceType;
2267 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes
2268 } SMBIOS_TABLE_TYPE42;
2269
2270 ///
2271 /// Inactive (Type 126)
2272 ///
2273 typedef struct {
2274 SMBIOS_STRUCTURE Hdr;
2275 } SMBIOS_TABLE_TYPE126;
2276
2277 ///
2278 /// End-of-Table (Type 127)
2279 ///
2280 typedef struct {
2281 SMBIOS_STRUCTURE Hdr;
2282 } SMBIOS_TABLE_TYPE127;
2283
2284 ///
2285 /// Union of all the possible SMBIOS record types.
2286 ///
2287 typedef union {
2288 SMBIOS_STRUCTURE *Hdr;
2289 SMBIOS_TABLE_TYPE0 *Type0;
2290 SMBIOS_TABLE_TYPE1 *Type1;
2291 SMBIOS_TABLE_TYPE2 *Type2;
2292 SMBIOS_TABLE_TYPE3 *Type3;
2293 SMBIOS_TABLE_TYPE4 *Type4;
2294 SMBIOS_TABLE_TYPE5 *Type5;
2295 SMBIOS_TABLE_TYPE6 *Type6;
2296 SMBIOS_TABLE_TYPE7 *Type7;
2297 SMBIOS_TABLE_TYPE8 *Type8;
2298 SMBIOS_TABLE_TYPE9 *Type9;
2299 SMBIOS_TABLE_TYPE10 *Type10;
2300 SMBIOS_TABLE_TYPE11 *Type11;
2301 SMBIOS_TABLE_TYPE12 *Type12;
2302 SMBIOS_TABLE_TYPE13 *Type13;
2303 SMBIOS_TABLE_TYPE14 *Type14;
2304 SMBIOS_TABLE_TYPE15 *Type15;
2305 SMBIOS_TABLE_TYPE16 *Type16;
2306 SMBIOS_TABLE_TYPE17 *Type17;
2307 SMBIOS_TABLE_TYPE18 *Type18;
2308 SMBIOS_TABLE_TYPE19 *Type19;
2309 SMBIOS_TABLE_TYPE20 *Type20;
2310 SMBIOS_TABLE_TYPE21 *Type21;
2311 SMBIOS_TABLE_TYPE22 *Type22;
2312 SMBIOS_TABLE_TYPE23 *Type23;
2313 SMBIOS_TABLE_TYPE24 *Type24;
2314 SMBIOS_TABLE_TYPE25 *Type25;
2315 SMBIOS_TABLE_TYPE26 *Type26;
2316 SMBIOS_TABLE_TYPE27 *Type27;
2317 SMBIOS_TABLE_TYPE28 *Type28;
2318 SMBIOS_TABLE_TYPE29 *Type29;
2319 SMBIOS_TABLE_TYPE30 *Type30;
2320 SMBIOS_TABLE_TYPE31 *Type31;
2321 SMBIOS_TABLE_TYPE32 *Type32;
2322 SMBIOS_TABLE_TYPE33 *Type33;
2323 SMBIOS_TABLE_TYPE34 *Type34;
2324 SMBIOS_TABLE_TYPE35 *Type35;
2325 SMBIOS_TABLE_TYPE36 *Type36;
2326 SMBIOS_TABLE_TYPE37 *Type37;
2327 SMBIOS_TABLE_TYPE38 *Type38;
2328 SMBIOS_TABLE_TYPE39 *Type39;
2329 SMBIOS_TABLE_TYPE40 *Type40;
2330 SMBIOS_TABLE_TYPE41 *Type41;
2331 SMBIOS_TABLE_TYPE42 *Type42;
2332 SMBIOS_TABLE_TYPE126 *Type126;
2333 SMBIOS_TABLE_TYPE127 *Type127;
2334 UINT8 *Raw;
2335 } SMBIOS_STRUCTURE_POINTER;
2336
2337 #pragma pack()
2338
2339 #endif