MdePkg/Include/IndustryStandard/SmBios.h

   1 /** @file
   2   Industry Standard Definitions of SMBIOS Table Specification v2.6
   3
   4   Copyright (c) 2006 - 2009, Intel Corporation All rights
   5   reserved. This program and the accompanying materials are
   6   licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #ifndef __SMBIOS_STANDARD_H__
  16 #define __SMBIOS_STANDARD_H__
  17
  18 ///
  19 /// Smbios Table Entry Point Structure
  20 ///
  21 #pragma pack(1)
  22 typedef struct {
  23   UINT8   AnchorString[4];
  24   UINT8   EntryPointStructureChecksum;
  25   UINT8   EntryPointLength;
  26   UINT8   MajorVersion;
  27   UINT8   MinorVersion;
  28   UINT16  MaxStructureSize;
  29   UINT8   EntryPointRevision;
  30   UINT8   FormattedArea[5];
  31   UINT8   IntermediateAnchorString[5];
  32   UINT8   IntermediateChecksum;
  33   UINT16  TableLength;
  34   UINT32  TableAddress;
  35   UINT16  NumberOfSmbiosStructures;
  36   UINT8   SmbiosBcdRevision;
  37 } SMBIOS_TABLE_ENTRY_POINT;
  38
  39 ///
  40 /// The Smbios structure header
  41 ///
  42 typedef struct {
  43   UINT8   Type;
  44   UINT8   Length;
  45   UINT16  Handle;
  46 } SMBIOS_STRUCTURE;
  47
  48 ///
  49 /// String Number for a Null terminated string, 00h stands for no string available.
  50 ///
  51 typedef UINT8 SMBIOS_TABLE_STRING;
  52
  53 ///
  54 /// BIOS Characteristics
  55 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
  56 ///
  57 typedef struct {
  58   UINT32  Reserved                          :2;  ///< Bits 0-1
  59   UINT32  Unknown                           :1;
  60   UINT32  BiosCharacteristicsNotSupported   :1;
  61   UINT32  IsaIsSupported                    :1;
  62   UINT32  McaIsSupported                    :1;
  63   UINT32  EisaIsSupported                   :1;
  64   UINT32  PciIsSupported                    :1;
  65   UINT32  PcmciaIsSupported                 :1;
  66   UINT32  PlugAndPlayIsSupported            :1;
  67   UINT32  ApmIsSupported                    :1;
  68   UINT32  BiosIsUpgradable                  :1;
  69   UINT32  BiosShadowingAllowed              :1;
  70   UINT32  VlVesaIsSupported                 :1;
  71   UINT32  EscdSupportIsAvailable            :1;
  72   UINT32  BootFromCdIsSupported             :1;
  73   UINT32  SelectableBootIsSupported         :1;
  74   UINT32  RomBiosIsSocketed                 :1;
  75   UINT32  BootFromPcmciaIsSupported         :1;
  76   UINT32  EDDSpecificationIsSupported       :1;
  77   UINT32  JapaneseNecFloppyIsSupported      :1;
  78   UINT32  JapaneseToshibaFloppyIsSupported  :1;
  79   UINT32  Floppy525_360IsSupported          :1;
  80   UINT32  Floppy525_12IsSupported           :1;
  81   UINT32  Floppy35_720IsSupported           :1;
  82   UINT32  Floppy35_288IsSupported           :1;
  83   UINT32  PrintScreenIsSupported            :1;
  84   UINT32  Keyboard8042IsSupported           :1;
  85   UINT32  SerialIsSupported                 :1;
  86   UINT32  PrinterIsSupported                :1;
  87   UINT32  CgaMonoIsSupported                :1;
  88   UINT32  NecPc98                           :1;
  89   UINT32  ReservedForVendor                 :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
  90                                                  ///< and bits 48-63 reserved for System Vendor.
  91 } MISC_BIOS_CHARACTERISTICS;
  92
  93 ///
  94 /// BIOS Characteristics Extension Byte 1
  95 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
  96 /// within the BIOS Information  structure.
  97 ///
  98 typedef struct {
  99   UINT8  AcpiIsSupported                   :1;
 100   UINT8  UsbLegacyIsSupported              :1;
 101   UINT8  AgpIsSupported                    :1;
 102   UINT8  I20BootIsSupported                :1;
 103   UINT8  Ls120BootIsSupported              :1;
 104   UINT8  AtapiZipDriveBootIsSupported      :1;
 105   UINT8  Boot1394IsSupported               :1;
 106   UINT8  SmartBatteryIsSupported           :1;
 107 } MBCE_BIOS_RESERVED;
 108
 109 ///
 110 /// BIOS Characteristics Extension Byte 2
 111 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
 112 /// within the BIOS Information structure.
 113 ///
 114 typedef struct {
 115   UINT8  BiosBootSpecIsSupported              :1;
 116   UINT8  FunctionKeyNetworkBootIsSupported    :1;
 117   UINT8  TargetContentDistributionEnabled     :1;
 118   UINT8  ExtensionByte2Reserved               :1;
 119 } MBCE_SYSTEM_RESERVED;
 120
 121 ///
 122 /// BIOS Characteristics Extension Bytes
 123 ///
 124 typedef struct {
 125   MBCE_BIOS_RESERVED    BiosReserved;
 126   MBCE_SYSTEM_RESERVED  SystemReserved;
 127   UINT8                 Reserved;
 128 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
 129
 130 ///
 131 /// BIOS Information (Type 0)
 132 ///
 133 typedef struct {
 134   SMBIOS_STRUCTURE          Hdr;
 135   SMBIOS_TABLE_STRING       Vendor;
 136   SMBIOS_TABLE_STRING       BiosVersion;
 137   UINT16                    BiosSegment;
 138   SMBIOS_TABLE_STRING       BiosReleaseDate;
 139   UINT8                     BiosSize;
 140   MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
 141   UINT8                     BIOSCharacteristicsExtensionBytes[2];
 142   UINT8                     SystemBiosMajorRelease;
 143   UINT8                     SystemBiosMinorRelease;
 144   UINT8                     EmbeddedControllerFirmwareMajorRelease;
 145   UINT8                     EmbeddedControllerFirmwareMinorRelease;
 146 } SMBIOS_TABLE_TYPE0;
 147
 148 ///
 149 ///  System Wake-up Type
 150 ///
 151 typedef enum {
 152   SystemWakeupTypeReserved         = 0x00,
 153   SystemWakeupTypeOther            = 0x01,
 154   SystemWakeupTypeUnknown          = 0x02,
 155   SystemWakeupTypeApmTimer         = 0x03,
 156   SystemWakeupTypeModemRing        = 0x04,
 157   SystemWakeupTypeLanRemote        = 0x05,
 158   SystemWakeupTypePowerSwitch      = 0x06,
 159   SystemWakeupTypePciPme           = 0x07,
 160   SystemWakeupTypeAcPowerRestored  = 0x08
 161 } MISC_SYSTEM_WAKEUP_TYPE;
 162
 163 ///
 164 /// System Information (Type 1)
 165 ///
 166 /// The information in this structure defines attributes of the overall system and is
 167 /// intended to be associated with the Component ID group of the system's MIF.
 168 /// An SMBIOS implementation is associated with a single system instance and contains
 169 /// one and only one System Information (Type 1) structure.
 170 ///
 171 typedef struct {
 172   SMBIOS_STRUCTURE        Hdr;
 173   SMBIOS_TABLE_STRING     Manufacturer;
 174   SMBIOS_TABLE_STRING     ProductName;
 175   SMBIOS_TABLE_STRING     Version;
 176   SMBIOS_TABLE_STRING     SerialNumber;
 177   GUID                    Uuid;
 178   MISC_SYSTEM_WAKEUP_TYPE WakeUpType;
 179   SMBIOS_TABLE_STRING     SKUNumber;
 180   SMBIOS_TABLE_STRING     Family;
 181 } SMBIOS_TABLE_TYPE1;
 182
 183 ///
 184 ///  Base Board - Feature Flags
 185 ///
 186 typedef struct {
 187   UINT8  Motherboard           :1;
 188   UINT8  RequiresDaughterCard  :1;
 189   UINT8  Removable             :1;
 190   UINT8  Replaceable           :1;
 191   UINT8  HotSwappable          :1;
 192   UINT8  Reserved              :3;
 193 } BASE_BOARD_FEATURE_FLAGS;
 194
 195 ///
 196 ///  Base Board - Board Type
 197 ///
 198 typedef enum {
 199   BaseBoardTypeUnknown                  = 0x1,
 200   BaseBoardTypeOther                    = 0x2,
 201   BaseBoardTypeServerBlade              = 0x3,
 202   BaseBoardTypeConnectivitySwitch       = 0x4,
 203   BaseBoardTypeSystemManagementModule   = 0x5,
 204   BaseBoardTypeProcessorModule          = 0x6,
 205   BaseBoardTypeIOModule                 = 0x7,
 206   BaseBoardTypeMemoryModule             = 0x8,
 207   BaseBoardTypeDaughterBoard            = 0x9,
 208   BaseBoardTypeMotherBoard              = 0xA,
 209   BaseBoardTypeProcessorMemoryModule    = 0xB,
 210   BaseBoardTypeProcessorIOModule        = 0xC,
 211   BaseBoardTypeInterconnectBoard        = 0xD
 212 } BASE_BOARD_TYPE;
 213
 214 ///
 215 /// Base Board (or Module) Information (Type 2)
 216 ///
 217 /// The information in this structure defines attributes of a system baseboard -
 218 /// for example a motherboard, planar, or server blade or other standard system module.
 219 ///
 220 typedef struct {
 221   SMBIOS_STRUCTURE          Hdr;
 222   SMBIOS_TABLE_STRING       Manufacturer;
 223   SMBIOS_TABLE_STRING       ProductName;
 224   SMBIOS_TABLE_STRING       Version;
 225   SMBIOS_TABLE_STRING       SerialNumber;
 226   SMBIOS_TABLE_STRING       AssetTag;
 227   BASE_BOARD_FEATURE_FLAGS  FeatureFlag;
 228   SMBIOS_TABLE_STRING       LocationInChassis;
 229   UINT16                    ChassisHandle;
 230   BASE_BOARD_TYPE           BoardType;
 231   UINT8                     NumberOfContainedObjectHandles;
 232   UINT16                    ContainedObjectHandles[1];
 233 } SMBIOS_TABLE_TYPE2;
 234
 235 ///
 236 /// System Enclosure or Chassis Types
 237 ///
 238 typedef enum {
 239   MiscChassisTypeOther                = 0x01,
 240   MiscChassisTypeUnknown              = 0x02,
 241   MiscChassisTypeDeskTop              = 0x03,
 242   MiscChassisTypeLowProfileDesktop    = 0x04,
 243   MiscChassisTypePizzaBox             = 0x05,
 244   MiscChassisTypeMiniTower            = 0x06,
 245   MiscChassisTypeTower                = 0x07,
 246   MiscChassisTypePortable             = 0x08,
 247   MiscChassisTypeLapTop               = 0x09,
 248   MiscChassisTypeNotebook             = 0x0A,
 249   MiscChassisTypeHandHeld             = 0x0B,
 250   MiscChassisTypeDockingStation       = 0x0C,
 251   MiscChassisTypeAllInOne             = 0x0D,
 252   MiscChassisTypeSubNotebook          = 0x0E,
 253   MiscChassisTypeSpaceSaving          = 0x0F,
 254   MiscChassisTypeLunchBox             = 0x10,
 255   MiscChassisTypeMainServerChassis    = 0x11,
 256   MiscChassisTypeExpansionChassis     = 0x12,
 257   MiscChassisTypeSubChassis           = 0x13,
 258   MiscChassisTypeBusExpansionChassis  = 0x14,
 259   MiscChassisTypePeripheralChassis    = 0x15,
 260   MiscChassisTypeRaidChassis          = 0x16,
 261   MiscChassisTypeRackMountChassis     = 0x17,
 262   MiscChassisTypeSealedCasePc         = 0x18,
 263   MiscChassisMultiSystemChassis       = 0x19,
 264   MiscChassisCompactPCI               = 0x1A,
 265   MiscChassisAdvancedTCA              = 0x1B,
 266   MiscChassisBlade                    = 0x1C,
 267   MiscChassisBladeEnclosure           = 0x1D
 268 } MISC_CHASSIS_TYPE;
 269
 270 ///
 271 /// System Enclosure or Chassis States
 272 ///
 273 typedef enum {
 274   ChassisStateOther           = 0x01,
 275   ChassisStateUnknown         = 0x02,
 276   ChassisStateSafe            = 0x03,
 277   ChassisStateWarning         = 0x04,
 278   ChassisStateCritical        = 0x05,
 279   ChassisStateNonRecoverable  = 0x06
 280 } MISC_CHASSIS_STATE;
 281
 282 ///
 283 /// System Enclosure or Chassis Security Status
 284 ///
 285 typedef enum {
 286   ChassisSecurityStatusOther                          = 0x01,
 287   ChassisSecurityStatusUnknown                        = 0x02,
 288   ChassisSecurityStatusNone                           = 0x03,
 289   ChassisSecurityStatusExternalInterfaceLockedOut     = 0x04,
 290   ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
 291 } MISC_CHASSIS_SECURITY_STATE;
 292
 293 ///
 294 /// Contained Element record
 295 ///
 296 typedef struct {
 297   UINT8                 ContainedElementType;
 298   UINT8                 ContainedElementMinimum;
 299   UINT8                 ContainedElementMaximum;
 300 } CONTAINED_ELEMENT;
 301
 302
 303 ///
 304 /// System Enclosure or Chassis (Type 3)
 305 ///
 306 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
 307 /// For example, if a system included a separate enclosure for its peripheral devices,
 308 /// two structures would be returned: one for the main, system enclosure and the second for
 309 /// the peripheral device enclosure.  The additions to this structure in v2.1 of this specification
 310 /// support the population of the CIM_Chassis class.
 311 ///
 312 typedef struct {
 313   SMBIOS_STRUCTURE            Hdr;
 314   SMBIOS_TABLE_STRING         Manufacturer;
 315   UINT8                       Type;
 316   SMBIOS_TABLE_STRING         Version;
 317   SMBIOS_TABLE_STRING         SerialNumber;
 318   SMBIOS_TABLE_STRING         AssetTag;
 319   MISC_CHASSIS_STATE          BootupState;
 320   MISC_CHASSIS_STATE          PowerSupplyState;
 321   MISC_CHASSIS_STATE          ThermalState;
 322   MISC_CHASSIS_SECURITY_STATE SecurityStatus;
 323   UINT8                       OemDefined[4];
 324   UINT8                       Height;
 325   UINT8                       NumberofPowerCords;
 326   UINT8                       ContainedElementCount;
 327   UINT8                       ContainedElementRecordLength;
 328   CONTAINED_ELEMENT           ContainedElements[1];
 329 } SMBIOS_TABLE_TYPE3;
 330
 331 ///
 332 /// Processor Information - Processor Type
 333 ///
 334 typedef enum {
 335   ProcessorOther   = 0x01,
 336   ProcessorUnknown = 0x02,
 337   CentralProcessor = 0x03,
 338   MathProcessor    = 0x04,
 339   DspProcessor     = 0x05,
 340   VideoProcessor   = 0x06
 341 } PROCESSOR_TYPE_DATA;
 342
 343 ///
 344 /// Processor Information - Processor Family
 345 ///
 346 typedef enum {
 347   ProcessorFamilyOther                  = 0x01,
 348   ProcessorFamilyUnknown                = 0x02,
 349   ProcessorFamily8086                   = 0x03,
 350   ProcessorFamily80286                  = 0x04,
 351   ProcessorFamilyIntel386               = 0x05,
 352   ProcessorFamilyIntel486               = 0x06,
 353   ProcessorFamily8087                   = 0x07,
 354   ProcessorFamily80287                  = 0x08,
 355   ProcessorFamily80387                  = 0x09,
 356   ProcessorFamily80487                  = 0x0A,
 357   ProcessorFamilyPentium                = 0x0B,
 358   ProcessorFamilyPentiumPro             = 0x0C,
 359   ProcessorFamilyPentiumII              = 0x0D,
 360   ProcessorFamilyPentiumMMX             = 0x0E,
 361   ProcessorFamilyCeleron                = 0x0F,
 362   ProcessorFamilyPentiumIIXeon          = 0x10,
 363   ProcessorFamilyPentiumIII             = 0x11,
 364   ProcessorFamilyM1                     = 0x12,
 365   ProcessorFamilyM2                     = 0x13,
 366   ProcessorFamilyM1Reserved2            = 0x14,
 367   ProcessorFamilyM1Reserved3            = 0x15,
 368   ProcessorFamilyM1Reserved4            = 0x16,
 369   ProcessorFamilyM1Reserved5            = 0x17,
 370   ProcessorFamilyAmdDuron               = 0x18,
 371   ProcessorFamilyK5                     = 0x19,
 372   ProcessorFamilyK6                     = 0x1A,
 373   ProcessorFamilyK6_2                   = 0x1B,
 374   ProcessorFamilyK6_3                   = 0x1C,
 375   ProcessorFamilyAmdAthlon              = 0x1D,
 376   ProcessorFamilyAmd29000               = 0x1E,
 377   ProcessorFamilyK6_2Plus               = 0x1F,
 378   ProcessorFamilyPowerPC                = 0x20,
 379   ProcessorFamilyPowerPC601             = 0x21,
 380   ProcessorFamilyPowerPC603             = 0x22,
 381   ProcessorFamilyPowerPC603Plus         = 0x23,
 382   ProcessorFamilyPowerPC604             = 0x24,
 383   ProcessorFamilyPowerPC620             = 0x25,
 384   ProcessorFamilyPowerPCx704            = 0x26,
 385   ProcessorFamilyPowerPC750             = 0x27,
 386   ProcessorFamilyAlpha3                 = 0x30,
 387   ProcessorFamilyAlpha21064             = 0x31,
 388   ProcessorFamilyAlpha21066             = 0x32,
 389   ProcessorFamilyAlpha21164             = 0x33,
 390   ProcessorFamilyAlpha21164PC           = 0x34,
 391   ProcessorFamilyAlpha21164a            = 0x35,
 392   ProcessorFamilyAlpha21264             = 0x36,
 393   ProcessorFamilyAlpha21364             = 0x37,
 394   ProcessorFamilyMips                   = 0x40,
 395   ProcessorFamilyMIPSR4000              = 0x41,
 396   ProcessorFamilyMIPSR4200              = 0x42,
 397   ProcessorFamilyMIPSR4400              = 0x43,
 398   ProcessorFamilyMIPSR4600              = 0x44,
 399   ProcessorFamilyMIPSR10000             = 0x45,
 400   ProcessorFamilySparc                  = 0x50,
 401   ProcessorFamilySuperSparc             = 0x51,
 402   ProcessorFamilymicroSparcII           = 0x52,
 403   ProcessorFamilymicroSparcIIep         = 0x53,
 404   ProcessorFamilyUltraSparc             = 0x54,
 405   ProcessorFamilyUltraSparcII           = 0x55,
 406   ProcessorFamilyUltraSparcIIi          = 0x56,
 407   ProcessorFamilyUltraSparcIII          = 0x57,
 408   ProcessorFamilyUltraSparcIIIi         = 0x58,
 409   ProcessorFamily68040                  = 0x60,
 410   ProcessorFamily68xxx                  = 0x61,
 411   ProcessorFamily68000                  = 0x62,
 412   ProcessorFamily68010                  = 0x63,
 413   ProcessorFamily68020                  = 0x64,
 414   ProcessorFamily68030                  = 0x65,
 415   ProcessorFamilyHobbit                 = 0x70,
 416   ProcessorFamilyCrusoeTM5000           = 0x78,
 417   ProcessorFamilyCrusoeTM3000           = 0x79,
 418   ProcessorFamilyEfficeonTM8000         = 0x7A,
 419   ProcessorFamilyWeitek                 = 0x80,
 420   ProcessorFamilyItanium                = 0x82,
 421   ProcessorFamilyAmdAthlon64            = 0x83,
 422   ProcessorFamilyAmdOpteron             = 0x84,
 423   ProcessorFamilyAmdSempron             = 0x85,
 424   ProcessorFamilyAmdTurion64Mobile      = 0x86,
 425   ProcessorFamilyDualCoreAmdOpteron     = 0x87,
 426   ProcessorFamilyAmdAthlon64X2DualCore  = 0x88,
 427   ProcessorFamilyAmdTurion64X2Mobile    = 0x89,
 428   ProcessorFamilyPARISC                 = 0x90,
 429   ProcessorFamilyPaRisc8500             = 0x91,
 430   ProcessorFamilyPaRisc8000             = 0x92,
 431   ProcessorFamilyPaRisc7300LC           = 0x93,
 432   ProcessorFamilyPaRisc7200             = 0x94,
 433   ProcessorFamilyPaRisc7100LC           = 0x95,
 434   ProcessorFamilyPaRisc7100             = 0x96,
 435   ProcessorFamilyV30                    = 0xA0,
 436   ProcessorFamilyPentiumIIIXeon         = 0xB0,
 437   ProcessorFamilyPentiumIIISpeedStep    = 0xB1,
 438   ProcessorFamilyPentium4               = 0xB2,
 439   ProcessorFamilyIntelXeon              = 0xB3,
 440   ProcessorFamilyAS400                  = 0xB4,
 441   ProcessorFamilyIntelXeonMP            = 0xB5,
 442   ProcessorFamilyAMDAthlonXP            = 0xB6,
 443   ProcessorFamilyAMDAthlonMP            = 0xB7,
 444   ProcessorFamilyIntelItanium2          = 0xB8,
 445   ProcessorFamilyIntelPentiumM          = 0xB9,
 446   ProcessorFamilyIntelCeleronD          = 0xBA,
 447   ProcessorFamilyIntelPentiumD          = 0xBB,
 448   ProcessorFamilyIntelPentiumEx         = 0xBC,
 449   ProcessorFamilyIntelCoreSolo          = 0xBD,  ///< SMBIOS spec 2.6 correct this value
 450   ProcessorFamilyReserved               = 0xBE,
 451   ProcessorFamilyIntelCore2             = 0xBF,
 452   ProcessorFamilyIBM390                 = 0xC8,
 453   ProcessorFamilyG4                     = 0xC9,
 454   ProcessorFamilyG5                     = 0xCA,
 455   ProcessorFamilyG6                     = 0xCB,
 456   ProcessorFamilyzArchitectur           = 0xCC,
 457   ProcessorFamilyViaC7M                 = 0xD2,
 458   ProcessorFamilyViaC7D                 = 0xD3,
 459   ProcessorFamilyViaC7                  = 0xD4,
 460   ProcessorFamilyViaEden                = 0xD5,
 461   ProcessorFamilyi860                   = 0xFA,
 462   ProcessorFamilyi960                   = 0xFB,
 463   ProcessorFamilyIndicatorFamily2       = 0xFE,
 464   ProcessorFamilyReserved1              = 0xFF
 465 } PROCESSOR_FAMILY_DATA;
 466
 467 ///
 468 /// Processor Information - Voltage
 469 ///
 470 typedef struct {
 471   UINT8  ProcessorVoltageCapability5V        :1;
 472   UINT8  ProcessorVoltageCapability3_3V      :1;
 473   UINT8  ProcessorVoltageCapability2_9V      :1;
 474   UINT8  ProcessorVoltageCapabilityReserved  :1; ///< Bit 3, must be zero.
 475   UINT8  ProcessorVoltageReserved            :3; ///< Bits 4-6, must be zero.
 476   UINT8  ProcessorVoltageIndicateLegacy      :1;
 477 } PROCESSOR_VOLTAGE;
 478
 479 ///
 480 /// Processor Information - Processor Upgrade
 481 ///
 482 typedef enum {
 483   ProcessorUpgradeOther         = 0x01,
 484   ProcessorUpgradeUnknown       = 0x02,
 485   ProcessorUpgradeDaughterBoard = 0x03,
 486   ProcessorUpgradeZIFSocket     = 0x04,
 487   ProcessorUpgradePiggyBack     = 0x05, ///< Replaceable
 488   ProcessorUpgradeNone          = 0x06,
 489   ProcessorUpgradeLIFSocket     = 0x07,
 490   ProcessorUpgradeSlot1         = 0x08,
 491   ProcessorUpgradeSlot2         = 0x09,
 492   ProcessorUpgrade370PinSocket  = 0x0A,
 493   ProcessorUpgradeSlotA         = 0x0B,
 494   ProcessorUpgradeSlotM         = 0x0C,
 495   ProcessorUpgradeSocket423     = 0x0D,
 496   ProcessorUpgradeSocketA       = 0x0E, ///< Socket 462
 497   ProcessorUpgradeSocket478     = 0x0F,
 498   ProcessorUpgradeSocket754     = 0x10,
 499   ProcessorUpgradeSocket940     = 0x11,
 500   ProcessorUpgradeSocket939     = 0x12,
 501   ProcessorUpgradeSocketmPGA604 = 0x13,
 502   ProcessorUpgradeSocketLGA771  = 0x14,
 503   ProcessorUpgradeSocketLGA775  = 0x15,
 504   ProcessorUpgradeSocketS1      = 0x16,
 505   ProcessorUpgradeAM2           = 0x17,
 506   ProcessorUpgradeF1207         = 0x18
 507 } PROCESSOR_UPGRADE;
 508
 509 ///
 510 /// Processor ID Field Description
 511 ///
 512 typedef struct {
 513   UINT32  ProcessorSteppingId:4;
 514   UINT32  ProcessorModel:     4;
 515   UINT32  ProcessorFamily:    4;
 516   UINT32  ProcessorType:      2;
 517   UINT32  ProcessorReserved1: 2;
 518   UINT32  ProcessorXModel:    4;
 519   UINT32  ProcessorXFamily:   8;
 520   UINT32  ProcessorReserved2: 4;
 521 } PROCESSOR_SIGNATURE;
 522
 523 typedef struct {
 524   UINT32  ProcessorBrandIndex :8;
 525   UINT32  ProcessorClflush    :8;
 526   UINT32  ProcessorReserved   :8;
 527   UINT32  ProcessorDfltApicId :8;
 528 } PROCESSOR_MISC_INFO;
 529
 530 typedef struct {
 531   UINT32  ProcessorFpu       :1;
 532   UINT32  ProcessorVme       :1;
 533   UINT32  ProcessorDe        :1;
 534   UINT32  ProcessorPse       :1;
 535   UINT32  ProcessorTsc       :1;
 536   UINT32  ProcessorMsr       :1;
 537   UINT32  ProcessorPae       :1;
 538   UINT32  ProcessorMce       :1;
 539   UINT32  ProcessorCx8       :1;
 540   UINT32  ProcessorApic      :1;
 541   UINT32  ProcessorReserved1 :1;
 542   UINT32  ProcessorSep       :1;
 543   UINT32  ProcessorMtrr      :1;
 544   UINT32  ProcessorPge       :1;
 545   UINT32  ProcessorMca       :1;
 546   UINT32  ProcessorCmov      :1;
 547   UINT32  ProcessorPat       :1;
 548   UINT32  ProcessorPse36     :1;
 549   UINT32  ProcessorPsn       :1;
 550   UINT32  ProcessorClfsh     :1;
 551   UINT32  ProcessorReserved2 :1;
 552   UINT32  ProcessorDs        :1;
 553   UINT32  ProcessorAcpi      :1;
 554   UINT32  ProcessorMmx       :1;
 555   UINT32  ProcessorFxsr      :1;
 556   UINT32  ProcessorSse       :1;
 557   UINT32  ProcessorSse2      :1;
 558   UINT32  ProcessorSs        :1;
 559   UINT32  ProcessorReserved3 :1;
 560   UINT32  ProcessorTm        :1;
 561   UINT32  ProcessorReserved4 :2;
 562 } PROCESSOR_FEATURE_FLAGS;
 563
 564 typedef struct {
 565   PROCESSOR_SIGNATURE     Signature;
 566   PROCESSOR_MISC_INFO     MiscInfo;
 567   UINT32                  Reserved;
 568   PROCESSOR_FEATURE_FLAGS FeatureFlags;
 569 } PROCESSOR_ID_DATA;
 570
 571 ///
 572 /// Processor Information (Type 4)
 573 ///
 574 /// The information in this structure defines the attributes of a single processor;
 575 /// a separate structure instance is provided for each system processor socket/slot.
 576 /// For example, a system with an IntelDX2 processor would have a single
 577 /// structure instance while a system with an IntelSX2 processor would have a structure
 578 /// to describe the main CPU and a second structure to describe the 80487 co-processor.
 579 ///
 580 typedef struct {
 581   SMBIOS_STRUCTURE      Hdr;
 582   UINT8                 Socket;
 583   PROCESSOR_TYPE_DATA   ProcessorType;
 584   PROCESSOR_FAMILY_DATA ProcessorFamily;
 585   SMBIOS_TABLE_STRING   ProcessorManufacture;
 586   PROCESSOR_ID_DATA     ProcessorId;
 587   SMBIOS_TABLE_STRING   ProcessorVersion;
 588   PROCESSOR_VOLTAGE     Voltage;
 589   UINT16                ExternalClock;
 590   UINT16                MaxSpeed;
 591   UINT16                CurrentSpeed;
 592   UINT8                 Status;
 593   PROCESSOR_UPGRADE     ProcessorUpgrade;
 594   UINT16                L1CacheHandle;
 595   UINT16                L2CacheHandle;
 596   UINT16                L3CacheHandle;
 597   SMBIOS_TABLE_STRING   SerialNumber;
 598   SMBIOS_TABLE_STRING   AssetTag;
 599   SMBIOS_TABLE_STRING   PartNumber;
 600   //
 601   // Add for smbios 2.5
 602   //
 603   UINT8                 CoreCount;
 604   UINT8                 EnabledCoreCount;
 605   UINT8                 ThreadCount;
 606   UINT16                ProcessorCharacteristics;
 607   //
 608   // Add for smbios 2.6
 609   //
 610   UINT16                ProcessorFamily2;
 611 } SMBIOS_TABLE_TYPE4;
 612
 613 ///
 614 /// Memory Controller Error Detecting Method
 615 ///
 616 typedef enum {
 617   ErrorDetectingMethodOther   = 0x01,
 618   ErrorDetectingMethodUnknown = 0x02,
 619   ErrorDetectingMethodNone    = 0x03,
 620   ErrorDetectingMethodParity  = 0x04,
 621   ErrorDetectingMethod32Ecc   = 0x05,
 622   ErrorDetectingMethod64Ecc   = 0x06,
 623   ErrorDetectingMethod128Ecc  = 0x07,
 624   ErrorDetectingMethodCrc     = 0x08
 625 } MEMORY_ERROR_DETECT_METHOD;
 626
 627 ///
 628 /// Memory Controller Error Correcting Capability
 629 ///
 630 typedef struct {
 631   UINT8  Other                 :1;
 632   UINT8  Unknown               :1;
 633   UINT8  None                  :1;
 634   UINT8  SingleBitErrorCorrect :1;
 635   UINT8  DoubleBitErrorCorrect :1;
 636   UINT8  ErrorScrubbing        :1;
 637   UINT8  Reserved              :2;
 638 } MEMORY_ERROR_CORRECT_CAPABILITY;
 639
 640 ///
 641 /// Memory Controller Information - Interleave Support
 642 ///
 643 typedef enum {
 644   MemoryInterleaveOther      = 0x01,
 645   MemoryInterleaveUnknown    = 0x02,
 646   MemoryInterleaveOneWay     = 0x03,
 647   MemoryInterleaveTwoWay     = 0x04,
 648   MemoryInterleaveFourWay    = 0x05,
 649   MemoryInterleaveEightWay   = 0x06,
 650   MemoryInterleaveSixteenWay = 0x07
 651 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
 652
 653 ///
 654 /// Memory Controller Information - Memory Speeds
 655 ///
 656 typedef struct {
 657   UINT16     Other    :1;
 658   UINT16     Unknown  :1;
 659   UINT16     SeventyNs:1;
 660   UINT16     SixtyNs  :1;
 661   UINT16     FiftyNs  :1;
 662   UINT16     Reserved :11;
 663 } MEMORY_SPEED_TYPE;
 664
 665 ///
 666 /// Memory Controller Information (Type 5, Obsolete)
 667 ///
 668 /// The information in this structure defines the attributes of the system's memory controller(s)
 669 /// and the supported attributes of any memory-modules present in the sockets controlled by
 670 /// this controller.
 671 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
 672 /// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
 673 /// and Memory Device (Type 17) structures should be used instead.  BIOS providers might
 674 /// choose to implement both memory description types to allow existing DMI browsers
 675 /// to properly display the system's memory attributes.
 676 ///
 677 typedef struct {
 678   SMBIOS_STRUCTURE                Hdr;
 679   MEMORY_ERROR_DETECT_METHOD      ErrDetectMethod;
 680   MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
 681   MEMORY_SUPPORT_INTERLEAVE_TYPE  SupportInterleave;
 682   UINT8                           CurrentInterleave;
 683   UINT8                           MaxMemoryModuleSize;
 684   MEMORY_SPEED_TYPE               SupportSpeed;
 685   UINT16                          SupportMemoryType;
 686   UINT8                           MemoryModuleVoltage;
 687   UINT8                           AssociatedMemorySlotNum;
 688   UINT16                          MemoryModuleConfigHandles[1];
 689 } SMBIOS_TABLE_TYPE5;
 690
 691 ///
 692 /// Memory Module Information - Memory Types
 693 ///
 694 typedef struct {
 695   UINT16  Other       :1;
 696   UINT16  Unknown     :1;
 697   UINT16  Standard    :1;
 698   UINT16  FastPageMode:1;
 699   UINT16  EDO         :1;
 700   UINT16  Parity      :1;
 701   UINT16  ECC         :1;
 702   UINT16  SIMM        :1;
 703   UINT16  DIMM        :1;
 704   UINT16  BurstEdo    :1;
 705   UINT16  SDRAM       :1;
 706   UINT16  Reserved    :5;
 707 } MEMORY_CURRENT_TYPE;
 708
 709 ///
 710 /// Memory Module Information - Memory Size
 711 ///
 712 typedef struct {
 713   UINT8   InstalledOrEnabledSize  :7; ///< Size (n), where 2**n is the size in MB.
 714   UINT8   SingleOrDoubleBank      :1;
 715 } MEMORY_INSTALLED_ENABLED_SIZE;
 716
 717 ///
 718 /// Memory Module Information (Type 6, Obsolete)
 719 ///
 720 /// One Memory Module Information structure is included for each memory-module socket
 721 /// in the system.  The structure describes the speed, type, size, and error status
 722 /// of each system memory module.  The supported attributes of each module are described
 723 /// by the "owning" Memory Controller Information structure.
 724 /// Note:  This structure, and its companion Memory Controller Information (Type 5, Obsolete),
 725 /// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)
 726 /// and Memory Device (Type 17) structures should be used instead.
 727 ///
 728 typedef struct {
 729   SMBIOS_STRUCTURE              Hdr;
 730   SMBIOS_TABLE_STRING           SocketDesignation;
 731   UINT8                         BankConnections;
 732   UINT8                         CurrentSpeed;
 733   MEMORY_CURRENT_TYPE           CurrentMemoryType;
 734   MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
 735   MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
 736   UINT8                         ErrorStatus;
 737 } SMBIOS_TABLE_TYPE6;
 738
 739 ///
 740 /// Cache Information - SRAM Type
 741 ///
 742 typedef struct {
 743   UINT16  Other         :1;
 744   UINT16  Unknown       :1;
 745   UINT16  NonBurst      :1;
 746   UINT16  Burst         :1;
 747   UINT16  PipelineBurst :1;
 748   UINT16  Asynchronous  :1;
 749   UINT16  Synchronous   :1;
 750   UINT16  Reserved      :9;
 751 } CACHE_SRAM_TYPE_DATA;
 752
 753 ///
 754 /// Cache Information - Error Correction Type
 755 ///
 756 typedef enum {
 757   CacheErrorOther     = 0x01,
 758   CacheErrorUnknown   = 0x02,
 759   CacheErrorNone      = 0x03,
 760   CacheErrorParity    = 0x04,
 761   CacheErrorSingleBit = 0x05, ///< ECC
 762   CacheErrorMultiBit  = 0x06  ///< ECC
 763 } CACHE_ERROR_TYPE_DATA;
 764
 765 ///
 766 /// Cache Information - System Cache Type
 767 ///
 768 typedef enum {
 769   CacheTypeOther       = 0x01,
 770   CacheTypeUnknown     = 0x02,
 771   CacheTypeInstruction = 0x03,
 772   CacheTypeData        = 0x04,
 773   CacheTypeUnified     = 0x05
 774 } CACHE_TYPE_DATA;
 775
 776 ///
 777 /// Cache Information - Associativity
 778 ///
 779 typedef enum {
 780   CacheAssociativityOther        = 0x01,
 781   CacheAssociativityUnknown      = 0x02,
 782   CacheAssociativityDirectMapped = 0x03,
 783   CacheAssociativity2Way         = 0x04,
 784   CacheAssociativity4Way         = 0x05,
 785   CacheAssociativityFully        = 0x06,
 786   CacheAssociativity8Way         = 0x07,
 787   CacheAssociativity16Way        = 0x08,
 788   CacheAssociativity24Way        = 0x09
 789 } CACHE_ASSOCIATIVITY_DATA;
 790
 791 ///
 792 /// Cache Information (Type 7)
 793 ///
 794 /// he information in this structure defines the attributes of CPU cache device in the system.
 795 /// One structure is specified for each such device, whether the device is internal to
 796 /// or external to the CPU module.  Cache modules can be associated with a processor structure
 797 /// in one or two ways depending on the SMBIOS version.
 798 ///
 799 typedef struct {
 800   SMBIOS_STRUCTURE          Hdr;
 801   SMBIOS_TABLE_STRING       SocketDesignation;
 802   UINT16                    CacheConfiguration;
 803   UINT16                    MaximumCacheSize;
 804   UINT16                    InstalledSize;
 805   CACHE_SRAM_TYPE_DATA      SupportedSRAMType;
 806   CACHE_SRAM_TYPE_DATA      CurrentSRAMType;
 807   UINT8                     CacheSpeed;
 808   CACHE_ERROR_TYPE_DATA     ErrorCorrectionType;
 809   CACHE_TYPE_DATA           SystemCacheType;
 810   CACHE_ASSOCIATIVITY_DATA  Associativity;
 811 } SMBIOS_TABLE_TYPE7;
 812
 813 ///
 814 /// Port Connector Information - Connector Types
 815 ///
 816 typedef enum {
 817   PortConnectorTypeNone                   = 0x00,
 818   PortConnectorTypeCentronics             = 0x01,
 819   PortConnectorTypeMiniCentronics         = 0x02,
 820   PortConnectorTypeProprietary            = 0x03,
 821   PortConnectorTypeDB25Male               = 0x04,
 822   PortConnectorTypeDB25Female             = 0x05,
 823   PortConnectorTypeDB15Male               = 0x06,
 824   PortConnectorTypeDB15Female             = 0x07,
 825   PortConnectorTypeDB9Male                = 0x08,
 826   PortConnectorTypeDB9Female              = 0x09,
 827   PortConnectorTypeRJ11                   = 0x0A,
 828   PortConnectorTypeRJ45                   = 0x0B,
 829   PortConnectorType50PinMiniScsi          = 0x0C,
 830   PortConnectorTypeMiniDin                = 0x0D,
 831   PortConnectorTypeMicriDin               = 0x0E,
 832   PortConnectorTypePS2                    = 0x0F,
 833   PortConnectorTypeInfrared               = 0x10,
 834   PortConnectorTypeHpHil                  = 0x11,
 835   PortConnectorTypeUsb                    = 0x12,
 836   PortConnectorTypeSsaScsi                = 0x13,
 837   PortConnectorTypeCircularDin8Male       = 0x14,
 838   PortConnectorTypeCircularDin8Female     = 0x15,
 839   PortConnectorTypeOnboardIde             = 0x16,
 840   PortConnectorTypeOnboardFloppy          = 0x17,
 841   PortConnectorType9PinDualInline         = 0x18,
 842   PortConnectorType25PinDualInline        = 0x19,
 843   PortConnectorType50PinDualInline        = 0x1A,
 844   PortConnectorType68PinDualInline        = 0x1B,
 845   PortConnectorTypeOnboardSoundInput      = 0x1C,
 846   PortConnectorTypeMiniCentronicsType14   = 0x1D,
 847   PortConnectorTypeMiniCentronicsType26   = 0x1E,
 848   PortConnectorTypeHeadPhoneMiniJack      = 0x1F,
 849   PortConnectorTypeBNC                    = 0x20,
 850   PortConnectorType1394                   = 0x21,
 851   PortConnectorTypePC98                   = 0xA0,
 852   PortConnectorTypePC98Hireso             = 0xA1,
 853   PortConnectorTypePCH98                  = 0xA2,
 854   PortConnectorTypePC98Note               = 0xA3,
 855   PortConnectorTypePC98Full               = 0xA4,
 856   PortConnectorTypeOther                  = 0xFF
 857 } MISC_PORT_CONNECTOR_TYPE;
 858
 859 ///
 860 /// Port Connector Information - Port Types
 861 ///
 862 typedef enum {
 863   PortTypeNone                      = 0x00,
 864   PortTypeParallelXtAtCompatible    = 0x01,
 865   PortTypeParallelPortPs2           = 0x02,
 866   PortTypeParallelPortEcp           = 0x03,
 867   PortTypeParallelPortEpp           = 0x04,
 868   PortTypeParallelPortEcpEpp        = 0x05,
 869   PortTypeSerialXtAtCompatible      = 0x06,
 870   PortTypeSerial16450Compatible     = 0x07,
 871   PortTypeSerial16550Compatible     = 0x08,
 872   PortTypeSerial16550ACompatible    = 0x09,
 873   PortTypeScsi                      = 0x0A,
 874   PortTypeMidi                      = 0x0B,
 875   PortTypeJoyStick                  = 0x0C,
 876   PortTypeKeyboard                  = 0x0D,
 877   PortTypeMouse                     = 0x0E,
 878   PortTypeSsaScsi                   = 0x0F,
 879   PortTypeUsb                       = 0x10,
 880   PortTypeFireWire                  = 0x11,
 881   PortTypePcmciaTypeI               = 0x12,
 882   PortTypePcmciaTypeII              = 0x13,
 883   PortTypePcmciaTypeIII             = 0x14,
 884   PortTypeCardBus                   = 0x15,
 885   PortTypeAccessBusPort             = 0x16,
 886   PortTypeScsiII                    = 0x17,
 887   PortTypeScsiWide                  = 0x18,
 888   PortTypePC98                      = 0x19,
 889   PortTypePC98Hireso                = 0x1A,
 890   PortTypePCH98                     = 0x1B,
 891   PortTypeVideoPort                 = 0x1C,
 892   PortTypeAudioPort                 = 0x1D,
 893   PortTypeModemPort                 = 0x1E,
 894   PortTypeNetworkPort               = 0x1F,
 895   PortType8251Compatible            = 0xA0,
 896   PortType8251FifoCompatible        = 0xA1,
 897   PortTypeOther                     = 0xFF
 898 } MISC_PORT_TYPE;
 899
 900 ///
 901 /// Port Connector Information (Type 8)
 902 ///
 903 /// The information in this structure defines the attributes of a system port connector,
 904 /// e.g. parallel, serial, keyboard, or mouse ports.  The port's type and connector information
 905 /// are provided. One structure is present for each port provided by the system.
 906 ///
 907 typedef struct {
 908   SMBIOS_STRUCTURE          Hdr;
 909   SMBIOS_TABLE_STRING       InternalReferenceDesignator;
 910   MISC_PORT_CONNECTOR_TYPE  InternalConnectorType;
 911   SMBIOS_TABLE_STRING       ExternalReferenceDesignator;
 912   MISC_PORT_CONNECTOR_TYPE  ExternalConnectorType;
 913   MISC_PORT_TYPE            PortType;
 914 } SMBIOS_TABLE_TYPE8;
 915
 916 ///
 917 /// System Slots - Slot Type
 918 ///
 919 typedef enum {
 920   SlotTypeOther                        = 0x01,
 921   SlotTypeUnknown                      = 0x02,
 922   SlotTypeIsa                          = 0x03,
 923   SlotTypeMca                          = 0x04,
 924   SlotTypeEisa                         = 0x05,
 925   SlotTypePci                          = 0x06,
 926   SlotTypePcmcia                       = 0x07,
 927   SlotTypeVlVesa                       = 0x08,
 928   SlotTypeProprietary                  = 0x09,
 929   SlotTypeProcessorCardSlot            = 0x0A,
 930   SlotTypeProprietaryMemoryCardSlot    = 0x0B,
 931   SlotTypeIORiserCardSlot              = 0x0C,
 932   SlotTypeNuBus                        = 0x0D,
 933   SlotTypePci66MhzCapable              = 0x0E,
 934   SlotTypeAgp                          = 0x0F,
 935   SlotTypeApg2X                        = 0x10,
 936   SlotTypeAgp4X                        = 0x11,
 937   SlotTypePciX                         = 0x12,
 938   SlotTypeAgp4x                        = 0x13,
 939   SlotTypePC98C20                      = 0xA0,
 940   SlotTypePC98C24                      = 0xA1,
 941   SlotTypePC98E                        = 0xA2,
 942   SlotTypePC98LocalBus                 = 0xA3,
 943   SlotTypePC98Card                     = 0xA4,
 944   SlotTypePciExpress                   = 0xA5,
 945   SlotTypePciExpressX1                 = 0xA6,
 946   SlotTypePciExpressX2                 = 0xA7,
 947   SlotTypePciExpressX4                 = 0xA8,
 948   SlotTypePciExpressX8                 = 0xA9,
 949   SlotTypePciExpressX16                = 0xAA
 950 } MISC_SLOT_TYPE;
 951
 952 ///
 953 /// System Slots - Slot Data Bus Width
 954 ///
 955 typedef enum {
 956   SlotDataBusWidthOther      = 0x01,
 957   SlotDataBusWidthUnknown    = 0x02,
 958   SlotDataBusWidth8Bit       = 0x03,
 959   SlotDataBusWidth16Bit      = 0x04,
 960   SlotDataBusWidth32Bit      = 0x05,
 961   SlotDataBusWidth64Bit      = 0x06,
 962   SlotDataBusWidth128Bit     = 0x07,
 963   SlotDataBusWidth1X         = 0x08, ///< Or X1
 964   SlotDataBusWidth2X         = 0x09, ///< Or X2
 965   SlotDataBusWidth4X         = 0x0A, ///< Or X4
 966   SlotDataBusWidth8X         = 0x0B, ///< Or X8
 967   SlotDataBusWidth12X        = 0x0C, ///< Or X12
 968   SlotDataBusWidth16X        = 0x0D, ///< Or X16
 969   SlotDataBusWidth32X        = 0x0E  ///< Or X32
 970 } MISC_SLOT_DATA_BUS_WIDTH;
 971
 972 ///
 973 /// System Slots - Current Usage
 974 ///
 975 typedef enum {
 976   SlotUsageOther     = 0x01,
 977   SlotUsageUnknown   = 0x02,
 978   SlotUsageAvailable = 0x03,
 979   SlotUsageInUse     = 0x04
 980 } MISC_SLOT_USAGE;
 981
 982 ///
 983 /// System Slots - Slot Length
 984 ///
 985 typedef enum {
 986   SlotLengthOther   = 0x01,
 987   SlotLengthUnknown = 0x02,
 988   SlotLengthShort   = 0x03,
 989   SlotLengthLong    = 0x04
 990 } MISC_SLOT_LENGTH;
 991
 992 ///
 993 /// System Slots - Slot Characteristics 1
 994 ///
 995 typedef struct {
 996   UINT8  CharacteristicsUnknown  :1;
 997   UINT8  Provides50Volts         :1;
 998   UINT8  Provides33Volts         :1;
 999   UINT8  SharedSlot              :1;
1000   UINT8  PcCard16Supported       :1;
1001   UINT8  CardBusSupported        :1;
1002   UINT8  ZoomVideoSupported      :1;
1003   UINT8  ModemRingResumeSupported:1;
1004 } MISC_SLOT_CHARACTERISTICS1;
1005 ///
1006 /// System Slots - Slot Characteristics 2
1007 ///
1008 typedef struct {
1009   UINT8  PmeSignalSupported      :1;
1010   UINT8  HotPlugDevicesSupported :1;
1011   UINT8  SmbusSignalSupported    :1;
1012   UINT8  Reserved                :5;  ///< Set to 0.
1013 } MISC_SLOT_CHARACTERISTICS2;
1014
1015 ///
1016 /// System Slots (Type 9)
1017 ///
1018 /// The information in this structure defines the attributes of a system slot.
1019 /// One structure is provided for each slot in the system.
1020 ///
1021 ///
1022 typedef struct {
1023   SMBIOS_STRUCTURE            Hdr;
1024   SMBIOS_TABLE_STRING         SlotDesignation;
1025   MISC_SLOT_TYPE              SlotType;
1026   MISC_SLOT_DATA_BUS_WIDTH    SlotDataBusWidth;
1027   MISC_SLOT_USAGE             CurrentUsage;
1028   MISC_SLOT_LENGTH            SlotLength;
1029   UINT16                      SlotID;
1030   MISC_SLOT_CHARACTERISTICS1  SlotCharacteristics1;
1031   MISC_SLOT_CHARACTERISTICS2  SlotCharacteristics2;
1032   //
1033   // Add for smbios 2.6
1034   //
1035   UINT16                      SegmentGroupNum;
1036   UINT8                       BusNum;
1037   UINT8                       DevFuncNum;
1038 } SMBIOS_TABLE_TYPE9;
1039
1040 ///
1041 /// On Board Devices Information - Device Types
1042 ///
1043 typedef enum {
1044   OnBoardDeviceTypeOther          = 0x01,
1045   OnBoardDeviceTypeUnknown        = 0x02,
1046   OnBoardDeviceTypeVideo          = 0x03,
1047   OnBoardDeviceTypeScsiController = 0x04,
1048   OnBoardDeviceTypeEthernet       = 0x05,
1049   OnBoardDeviceTypeTokenRing      = 0x06,
1050   OnBoardDeviceTypeSound          = 0x07
1051 } MISC_ONBOARD_DEVICE_TYPE;
1052
1053 ///
1054 /// Device Item Entry
1055 ///
1056 typedef struct {
1057   MISC_ONBOARD_DEVICE_TYPE  DeviceType;
1058   SMBIOS_TABLE_STRING       DescriptionString;
1059 } DEVICE_STRUCT;
1060
1061 ///
1062 /// On Board Devices Information (Type 10, obsolete)
1063 ///
1064 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1065 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1066 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1067 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1068 /// a system element, usually the baseboard.  In general, an entry in this table implies that the BIOS
1069 /// has some level of control over the enabling of the associated device for use by the system.
1070 ///
1071 typedef struct {
1072   SMBIOS_STRUCTURE      Hdr;
1073   DEVICE_STRUCT         Device[1];
1074 } SMBIOS_TABLE_TYPE10;
1075
1076 ///
1077 /// OEM Strings (Type 11)
1078 /// This structure contains free form strings defined by the OEM. Examples of this are:
1079 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1080 ///
1081 typedef struct {
1082   SMBIOS_STRUCTURE      Hdr;
1083   UINT8                 StringCount;
1084 } SMBIOS_TABLE_TYPE11;
1085
1086 ///
1087 /// System Configuration Options (Type 12)
1088 ///
1089 /// This structure contains information required to configure the base board's Jumpers and Switches.
1090 ///
1091 typedef struct {
1092   SMBIOS_STRUCTURE      Hdr;
1093   UINT8                 StringCount;
1094 } SMBIOS_TABLE_TYPE12;
1095
1096
1097 ///
1098 /// BIOS Language Information (Type 13)
1099 ///
1100 /// The information in this structure defines the installable language attributes of the BIOS.
1101 ///
1102 typedef struct {
1103   SMBIOS_STRUCTURE      Hdr;
1104   UINT8                 InstallableLanguages;
1105   UINT8                 Flags;
1106   UINT8                 Reserved[15];
1107   SMBIOS_TABLE_STRING   CurrentLanguages;
1108 } SMBIOS_TABLE_TYPE13;
1109
1110 ///
1111 /// System Event Log - Event Log Types
1112 ///
1113 typedef enum {
1114   EventLogTypeReserved         = 0x00,
1115   EventLogTypeSingleBitECC     = 0x01,
1116   EventLogTypeMultiBitECC      = 0x02,
1117   EventLogTypeParityMemErr     = 0x03,
1118   EventLogTypeBusTimeOut       = 0x04,
1119   EventLogTypeIOChannelCheck   = 0x05,
1120   EventLogTypeSoftwareNMI      = 0x06,
1121   EventLogTypePOSTMemResize    = 0x07,
1122   EventLogTypePOSTErr          = 0x08,
1123   EventLogTypePCIParityErr     = 0x09,
1124   EventLogTypePCISystemErr     = 0x0A,
1125   EventLogTypeCPUFailure       = 0x0B,
1126   EventLogTypeEISATimeOut      = 0x0C,
1127   EventLogTypeMemLogDisabled   = 0x0D,
1128   EventLogTypeLoggingDisabled  = 0x0E,
1129   EventLogTypeSysLimitExce     = 0x10,
1130   EventLogTypeAsyncHWTimer     = 0x11,
1131   EventLogTypeSysConfigInfo    = 0x12,
1132   EventLogTypeHDInfo           = 0x13,
1133   EventLogTypeSysReconfig      = 0x14,
1134   EventLogTypeUncorrectCPUErr  = 0x15,
1135   EventLogTypeAreaResetAndClr  = 0x16,
1136   EventLogTypeSystemBoot       = 0x17,
1137   EventLogTypeUnused           = 0x18, ///< 0x18 - 0x7F
1138   EventLogTypeAvailForSys      = 0x80, ///< 0x80 - 0xFE
1139   EventLogTypeEndOfLog         = 0xFF
1140 } EVENT_LOG_TYPE_DATA;
1141
1142 ///
1143 /// System Event Log - Variable Data Format Types
1144 ///
1145 typedef enum {
1146   EventLogVariableNone                        = 0x00,
1147   EventLogVariableHandle                      = 0x01,
1148   EventLogVariableMutilEvent                  = 0x02,
1149   EventLogVariableMutilEventHandle            = 0x03,
1150   EventLogVariablePOSTResultBitmap            = 0x04,
1151   EventLogVariableSysManagementType           = 0x05,
1152   EventLogVariableMutliEventSysManagmentType  = 0x06,
1153   EventLogVariableUnused                      = 0x07,
1154   EventLogVariableOEMAssigned                 = 0x80
1155 } EVENT_LOG_VARIABLE_DATA;
1156
1157 ///
1158 /// Group Item Entry
1159 ///
1160 typedef struct {
1161   UINT8                 ItemType;
1162   UINT16                ItemHandle;
1163 } GROUP_STRUCT;
1164
1165 ///
1166 /// Event Log Type Descriptors
1167 ///
1168 typedef struct {
1169   EVENT_LOG_TYPE_DATA   LogType;
1170   UINT8                 DataFormatType;
1171 } EVENT_LOG_TYPE;
1172
1173 ///
1174 /// Group Associations (Type 14)
1175 ///
1176 /// The Group Associations structure is provided for OEMs who want to specify
1177 /// the arrangement or hierarchy of certain components (including other Group Associations)
1178 /// within the system.
1179 ///
1180 typedef struct {
1181   SMBIOS_STRUCTURE      Hdr;
1182   SMBIOS_TABLE_STRING   GroupName;
1183   GROUP_STRUCT          Group[1];
1184 } SMBIOS_TABLE_TYPE14;
1185
1186 ///
1187 /// System Event Log (Type 15)
1188 ///
1189 /// The presence of this structure within the SMBIOS data returned for a system indicates
1190 /// that the system supports an event log.  An event log is a fixed-length area within a
1191 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1192 /// record, followed by one or more variable-length log records.
1193 ///
1194 typedef struct {
1195   SMBIOS_STRUCTURE      Hdr;
1196   UINT16                LogAreaLength;
1197   UINT16                LogHeaderStartOffset;
1198   UINT16                LogDataStartOffset;
1199   UINT8                 AccessMethod;
1200   UINT8                 LogStatus;
1201   UINT32                LogChangeToken;
1202   UINT32                AccessMethodAddress;
1203   UINT8                 LogHeaderFormat;
1204   UINT8                 NumberOfSupportedLogTypeDescriptors;
1205   UINT8                 LengthOfLogTypeDescriptor;
1206   EVENT_LOG_TYPE        EventLogTypeDescriptors[1];
1207 } SMBIOS_TABLE_TYPE15;
1208
1209 ///
1210 /// Physical Memory Array - Location
1211 ///
1212 typedef enum {
1213   MemoryArrayLocationOther                 = 0x01,
1214   MemoryArrayLocationUnknown               = 0x02,
1215   MemoryArrayLocationSystemBoard           = 0x03,
1216   MemoryArrayLocationIsaAddonCard          = 0x04,
1217   MemoryArrayLocationEisaAddonCard         = 0x05,
1218   MemoryArrayLocationPciAddonCard          = 0x06,
1219   MemoryArrayLocationMcaAddonCard          = 0x07,
1220   MemoryArrayLocationPcmciaAddonCard       = 0x08,
1221   MemoryArrayLocationProprietaryAddonCard  = 0x09,
1222   MemoryArrayLocationNuBus                 = 0x0A,
1223   MemoryArrayLocationPc98C20AddonCard      = 0xA0,
1224   MemoryArrayLocationPc98C24AddonCard      = 0xA1,
1225   MemoryArrayLocationPc98EAddonCard        = 0xA2,
1226   MemoryArrayLocationPc98LocalBusAddonCard = 0xA3
1227 } MEMORY_ARRAY_LOCATION;
1228
1229 ///
1230 /// Physical Memory Array - Use
1231 ///
1232 typedef enum {
1233   MemoryArrayUseOther                      = 0x01,
1234   MemoryArrayUseUnknown                    = 0x02,
1235   MemoryArrayUseSystemMemory               = 0x03,
1236   MemoryArrayUseVideoMemory                = 0x04,
1237   MemoryArrayUseFlashMemory                = 0x05,
1238   MemoryArrayUseNonVolatileRam             = 0x06,
1239   MemoryArrayUseCacheMemory                = 0x07
1240 } MEMORY_ARRAY_USE;
1241
1242 ///
1243 /// Physical Memory Array - Error Correction Types
1244 ///
1245 typedef enum {
1246   MemoryErrorCorrectionOther               = 0x01,
1247   MemoryErrorCorrectionUnknown             = 0x02,
1248   MemoryErrorCorrectionNone                = 0x03,
1249   MemoryErrorCorrectionParity              = 0x04,
1250   MemoryErrorCorrectionSingleBitEcc        = 0x05,
1251   MemoryErrorCorrectionMultiBitEcc         = 0x06,
1252   MemoryErrorCorrectionCrc                 = 0x07
1253 } MEMORY_ERROR_CORRECTION;
1254
1255 ///
1256 /// Physical Memory Array (Type 16)
1257 ///
1258 /// This structure describes a collection of memory devices that operate
1259 /// together to form a memory address space.
1260 ///
1261 typedef struct {
1262   SMBIOS_STRUCTURE          Hdr;
1263   MEMORY_ARRAY_LOCATION     Location;
1264   MEMORY_ARRAY_USE          Use;
1265   MEMORY_ERROR_CORRECTION   MemoryErrorCorrection;
1266   UINT32                    MaximumCapacity;
1267   UINT16                    MemoryErrorInformationHandle;
1268   UINT16                    NumberOfMemoryDevices;
1269 } SMBIOS_TABLE_TYPE16;
1270
1271 ///
1272 /// Memory Device - Form Factor
1273 ///
1274 typedef enum {
1275   MemoryFormFactorOther                    = 0x01,
1276   MemoryFormFactorUnknown                  = 0x02,
1277   MemoryFormFactorSimm                     = 0x03,
1278   MemoryFormFactorSip                      = 0x04,
1279   MemoryFormFactorChip                     = 0x05,
1280   MemoryFormFactorDip                      = 0x06,
1281   MemoryFormFactorZip                      = 0x07,
1282   MemoryFormFactorProprietaryCard          = 0x08,
1283   MemoryFormFactorDimm                     = 0x09,
1284   MemoryFormFactorTsop                     = 0x0A,
1285   MemoryFormFactorRowOfChips               = 0x0B,
1286   MemoryFormFactorRimm                     = 0x0C,
1287   MemoryFormFactorSodimm                   = 0x0D,
1288   MemoryFormFactorSrimm                    = 0x0E,
1289   MemoryFormFactorFbDimm                   = 0x0F
1290 } MEMORY_FORM_FACTOR;
1291
1292 ///
1293 /// Memory Device - Type
1294 ///
1295 typedef enum {
1296   MemoryTypeOther                          = 0x01,
1297   MemoryTypeUnknown                        = 0x02,
1298   MemoryTypeDram                           = 0x03,
1299   MemoryTypeEdram                          = 0x04,
1300   MemoryTypeVram                           = 0x05,
1301   MemoryTypeSram                           = 0x06,
1302   MemoryTypeRam                            = 0x07,
1303   MemoryTypeRom                            = 0x08,
1304   MemoryTypeFlash                          = 0x09,
1305   MemoryTypeEeprom                         = 0x0A,
1306   MemoryTypeFeprom                         = 0x0B,
1307   MemoryTypeEprom                          = 0x0C,
1308   MemoryTypeCdram                          = 0x0D,
1309   MemoryType3Dram                          = 0x0E,
1310   MemoryTypeSdram                          = 0x0F,
1311   MemoryTypeSgram                          = 0x10,
1312   MemoryTypeRdram                          = 0x11,
1313   MemoryTypeDdr                            = 0x12,
1314   MemoryTypeDdr2                           = 0x13,
1315   MemoryTypeDdr2FbDimm                     = 0x14
1316 } MEMORY_DEVICE_TYPE;
1317
1318 typedef struct {
1319   UINT16    Reserved        :1;
1320   UINT16    Other           :1;
1321   UINT16    Unknown         :1;
1322   UINT16    FastPaged       :1;
1323   UINT16    StaticColumn    :1;
1324   UINT16    PseudoStatic    :1;
1325   UINT16    Rambus          :1;
1326   UINT16    Synchronous     :1;
1327   UINT16    Cmos            :1;
1328   UINT16    Edo             :1;
1329   UINT16    WindowDram      :1;
1330   UINT16    CacheDram       :1;
1331   UINT16    Nonvolatile     :1;
1332   UINT16    Reserved1       :3;
1333 } MEMORY_DEVICE_TYPE_DETAIL;
1334
1335 ///
1336 /// Memory Device (Type 17)
1337 ///
1338 /// This structure describes a single memory device that is part of
1339 /// a larger Physical Memory Array (Type 16).
1340 /// Note:  If a system includes memory-device sockets, the SMBIOS implementation
1341 /// includes a Memory Device structure instance for each slot whether or not the
1342 /// socket is currently populated.
1343 ///
1344 typedef struct {
1345   SMBIOS_STRUCTURE          Hdr;
1346   UINT16                    MemoryArrayHandle;
1347   UINT16                    MemoryErrorInformationHandle;
1348   UINT16                    TotalWidth;
1349   UINT16                    DataWidth;
1350   UINT16                    Size;
1351   MEMORY_FORM_FACTOR        FormFactor;
1352   UINT8                     DeviceSet;
1353   SMBIOS_TABLE_STRING       DeviceLocator;
1354   SMBIOS_TABLE_STRING       BankLocator;
1355   MEMORY_DEVICE_TYPE        MemoryType;
1356   MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1357   UINT16                    Speed;
1358   SMBIOS_TABLE_STRING       Manufacturer;
1359   SMBIOS_TABLE_STRING       SerialNumber;
1360   SMBIOS_TABLE_STRING       AssetTag;
1361   SMBIOS_TABLE_STRING       PartNumber;
1362   //
1363   // Add for smbios 2.6
1364   //
1365   UINT8                 Attributes;
1366 } SMBIOS_TABLE_TYPE17;
1367
1368 ///
1369 /// 32-bit Memory Error Information - Error Type
1370 ///
1371 typedef enum {
1372   MemoryErrorOther             = 0x01,
1373   MemoryErrorUnknown           = 0x02,
1374   MemoryErrorOk                = 0x03,
1375   MemoryErrorBadRead           = 0x04,
1376   MemoryErrorParity            = 0x05,
1377   MemoryErrorSigleBit          = 0x06,
1378   MemoryErrorDoubleBit         = 0x07,
1379   MemoryErrorMultiBit          = 0x08,
1380   MemoryErrorNibble            = 0x09,
1381   MemoryErrorChecksum          = 0x0A,
1382   MemoryErrorCrc               = 0x0B,
1383   MemoryErrorCorrectSingleBit  = 0x0C,
1384   MemoryErrorCorrected         = 0x0D,
1385   MemoryErrorUnCorrectable     = 0x0E
1386 } MEMORY_ERROR_TYPE;
1387
1388 ///
1389 /// 32-bit Memory Error Information - Error Granularity
1390 ///
1391 typedef enum {
1392   MemoryGranularityOther               = 0x01,
1393   MemoryGranularityOtherUnknown        = 0x02,
1394   MemoryGranularityDeviceLevel         = 0x03,
1395   MemoryGranularityMemPartitionLevel   = 0x04
1396 } MEMORY_ERROR_GRANULARITY;
1397
1398 ///
1399 /// 32-bit Memory Error Information - Error Operation
1400 ///
1401 typedef enum {
1402   MemoryErrorOperationOther            = 0x01,
1403   MemoryErrorOperationUnknown          = 0x02,
1404   MemoryErrorOperationRead             = 0x03,
1405   MemoryErrorOperationWrite            = 0x04,
1406   MemoryErrorOperationPartialWrite     = 0x05
1407 } MEMORY_ERROR_OPERATION;
1408
1409 ///
1410 /// 32-bit Memory Error Information (Type 18)
1411 ///
1412 /// This structure identifies the specifics of an error that might be detected
1413 /// within a Physical Memory Array.
1414 ///
1415 typedef struct {
1416   SMBIOS_STRUCTURE          Hdr;
1417   MEMORY_ERROR_TYPE         ErrorType;
1418   MEMORY_ERROR_GRANULARITY  ErrorGranularity;
1419   MEMORY_ERROR_OPERATION    ErrorOperation;
1420   UINT32                    VendorSyndrome;
1421   UINT32                    MemoryArrayErrorAddress;
1422   UINT32                    DeviceErrorAddress;
1423   UINT32                    ErrorResolution;
1424 } SMBIOS_TABLE_TYPE18;
1425
1426 ///
1427 /// Memory Array Mapped Address (Type 19)
1428 ///
1429 /// This structure provides the address mapping for a Physical Memory Array.
1430 /// One structure is present for each contiguous address range described.
1431 ///
1432 typedef struct {
1433   SMBIOS_STRUCTURE      Hdr;
1434   UINT32                StartingAddress;
1435   UINT32                EndingAddress;
1436   UINT16                MemoryArrayHandle;
1437   UINT8                 PartitionWidth;
1438 } SMBIOS_TABLE_TYPE19;
1439
1440 ///
1441 /// Memory Device Mapped Address (Type 20)
1442 ///
1443 /// This structure maps memory address space usually to a device-level granularity.
1444 /// One structure is present for each contiguous address range described.
1445 ///
1446 typedef struct {
1447   SMBIOS_STRUCTURE      Hdr;
1448   UINT32                StartingAddress;
1449   UINT32                EndingAddress;
1450   UINT16                MemoryDeviceHandle;
1451   UINT16                MemoryArrayMappedAddressHandle;
1452   UINT8                 PartitionRowPosition;
1453   UINT8                 InterleavePosition;
1454   UINT8                 InterleavedDataDepth;
1455 } SMBIOS_TABLE_TYPE20;
1456
1457 ///
1458 /// Built-in Pointing Device - Type
1459 ///
1460 typedef enum {
1461   PointingDeviceTypeOther         = 0x01,
1462   PointingDeviceTypeUnknown       = 0x02,
1463   PointingDeviceTypeMouse         = 0x03,
1464   PointingDeviceTypeTrackBall     = 0x04,
1465   PointingDeviceTypeTrackPoint    = 0x05,
1466   PointingDeviceTypeGlidePoint    = 0x06,
1467   PointingDeviceTouchPad          = 0x07,
1468   PointingDeviceTouchScreen       = 0x08,
1469   PointingDeviceOpticalSensor     = 0x09
1470 } BUILTIN_POINTING_DEVICE_TYPE;
1471
1472 ///
1473 /// Built-in Pointing Device - Interface
1474 ///
1475 typedef enum {
1476   PointingDeviceInterfaceOther              = 0x01,
1477   PointingDeviceInterfaceUnknown            = 0x02,
1478   PointingDeviceInterfaceSerial             = 0x03,
1479   PointingDeviceInterfacePs2                = 0x04,
1480   PointingDeviceInterfaceInfrared           = 0x05,
1481   PointingDeviceInterfaceHpHil              = 0x06,
1482   PointingDeviceInterfaceBusMouse           = 0x07,
1483   PointingDeviceInterfaceADB                = 0x08,
1484   PointingDeviceInterfaceBusMouseDB9        = 0xA0,
1485   PointingDeviceInterfaceBusMouseMicroDin   = 0xA1,
1486   PointingDeviceInterfaceUsb                = 0xA2
1487 } BUILTIN_POINTING_DEVICE_INTERFACE;
1488
1489 ///
1490 /// Built-in Pointing Device (Type 21)
1491 ///
1492 /// This structure describes the attributes of the built-in pointing device for the
1493 /// system - the presence of this structure does not imply that the built-in
1494 /// pointing device is active for the system's use!
1495 ///
1496 typedef struct {
1497   SMBIOS_STRUCTURE                  Hdr;
1498   BUILTIN_POINTING_DEVICE_TYPE      Type;
1499   BUILTIN_POINTING_DEVICE_INTERFACE Interface;
1500   UINT8                             NumberOfButtons;
1501 } SMBIOS_TABLE_TYPE21;
1502
1503 ///
1504 /// Portable Battery - Device Chemistry
1505 ///
1506 typedef enum {
1507   PortableBatteryDeviceChemistryOther               = 0x01,
1508   PortableBatteryDeviceChemistryUnknown             = 0x02,
1509   PortableBatteryDeviceChemistryLeadAcid            = 0x03,
1510   PortableBatteryDeviceChemistryNickelCadmium       = 0x04,
1511   PortableBatteryDeviceChemistryNickelMetalHydride  = 0x05,
1512   PortableBatteryDeviceChemistryLithiumIon          = 0x06,
1513   PortableBatteryDeviceChemistryZincAir             = 0x07,
1514   PortableBatteryDeviceChemistryLithiumPolymer      = 0x08
1515 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
1516
1517 ///
1518 /// Portable Battery (Type 22)
1519 ///
1520 /// This structure describes the attributes of the portable battery(s) for the system.
1521 /// The structure contains the static attributes for the group.  Each structure describes
1522 /// a single battery pack's attributes.
1523 ///
1524 typedef struct {
1525   SMBIOS_STRUCTURE                  Hdr;
1526   SMBIOS_TABLE_STRING               Location;
1527   SMBIOS_TABLE_STRING               Manufacturer;
1528   SMBIOS_TABLE_STRING               ManufactureDate;
1529   SMBIOS_TABLE_STRING               SerialNumber;
1530   SMBIOS_TABLE_STRING               DeviceName;
1531   PORTABLE_BATTERY_DEVICE_CHEMISTRY DeviceChemistry;
1532   UINT16                            DeviceCapacity;
1533   UINT16                            DesignVoltage;
1534   SMBIOS_TABLE_STRING               SBDSVersionNumber;
1535   UINT8                             MaximumErrorInBatteryData;
1536   UINT16                            SBDSSerialNumber;
1537   UINT16                            SBDSManufactureDate;
1538   SMBIOS_TABLE_STRING               SBDSDeviceChemistry;
1539   UINT8                             DesignCapacityMultiplier;
1540   UINT32                            OEMSpecific;
1541 } SMBIOS_TABLE_TYPE22;
1542
1543 ///
1544 /// System Reset (Type 23)
1545 ///
1546 /// This structure describes whether Automatic System Reset functions enabled (Status).
1547 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
1548 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
1549 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
1550 /// the system will re-boot according to the Boot Option at Limit.
1551 ///
1552 typedef struct {
1553   SMBIOS_STRUCTURE      Hdr;
1554   UINT8                 Capabilities;
1555   UINT16                ResetCount;
1556   UINT16                ResetLimit;
1557   UINT16                TimerInterval;
1558   UINT16                Timeout;
1559 } SMBIOS_TABLE_TYPE23;
1560
1561 ///
1562 /// Hardware Security (Type 24)
1563 ///
1564 /// This structure describes the system-wide hardware security settings.
1565 ///
1566 typedef struct {
1567   SMBIOS_STRUCTURE      Hdr;
1568   UINT8                 HardwareSecuritySettings;
1569 } SMBIOS_TABLE_TYPE24;
1570
1571 ///
1572 /// System Power Controls (Type 25)
1573 ///
1574 /// This structure describes the attributes for controlling the main power supply to the system.
1575 /// Software that interprets this structure uses the month, day, hour, minute, and second values
1576 /// to determine the number of seconds until the next power-on of the system.  The presence of
1577 /// this structure implies that a timed power-on facility is available for the system.
1578 ///
1579 typedef struct {
1580   SMBIOS_STRUCTURE      Hdr;
1581   UINT8                 NextScheduledPowerOnMonth;
1582   UINT8                 NextScheduledPowerOnDayOfMonth;
1583   UINT8                 NextScheduledPowerOnHour;
1584   UINT8                 NextScheduledPowerOnMinute;
1585   UINT8                 NextScheduledPowerOnSecond;
1586 } SMBIOS_TABLE_TYPE25;
1587
1588 ///
1589 /// Voltage Probe - Location and Status
1590 ///
1591 typedef struct {
1592   UINT8 VoltageProbeSite      :5;
1593   UINT8  VoltageProbeStatus   :3;
1594 } MISC_VOLTAGE_PROBE_LOCATION;
1595
1596 ///
1597 /// Voltage Probe (Type 26)
1598 ///
1599 /// This describes the attributes for a voltage probe in the system.
1600 /// Each structure describes a single voltage probe.
1601 ///
1602 typedef struct {
1603   SMBIOS_STRUCTURE              Hdr;
1604   SMBIOS_TABLE_STRING           Description;
1605   MISC_VOLTAGE_PROBE_LOCATION   LocationAndStatus;
1606   UINT16                        MaximumValue;
1607   UINT16                        MinimumValue;
1608   UINT16                        Resolution;
1609   UINT16                        Tolerance;
1610   UINT16                        Accuracy;
1611   UINT32                        OEMDefined;
1612   UINT16                        NominalValue;
1613 } SMBIOS_TABLE_TYPE26;
1614
1615 ///
1616 /// Cooling Device - Device Type and Status
1617 ///
1618 typedef struct {
1619   UINT8 CoolingDevice       :5;
1620   UINT8 CoolingDeviceStatus :3;
1621 } MISC_COOLING_DEVICE_TYPE;
1622
1623 ///
1624 /// Cooling Device (Type 27)
1625 ///
1626 /// This structure describes the attributes for a cooling device in the system.
1627 /// Each structure describes a single cooling device.
1628 ///
1629 typedef struct {
1630   SMBIOS_STRUCTURE                  Hdr;
1631   UINT16                            TemperatureProbeHandle;
1632   MISC_COOLING_DEVICE_TYPE          DeviceTypeAndStatus;
1633   UINT8                             CoolingUnitGroup;
1634   UINT32                            OEMDefined;
1635   UINT16                            NominalSpeed;
1636 } SMBIOS_TABLE_TYPE27;
1637
1638 ///
1639 /// Temperature Probe - Location and Status
1640 ///
1641 typedef struct {
1642   UINT8 TemperatureProbeSite   :5;
1643   UINT8 TemperatureProbeStatus :3;
1644 } MISC_TEMPERATURE_PROBE_LOCATION;
1645
1646 ///
1647 /// Temperature Probe (Type 28)
1648 ///
1649 /// This structure describes the attributes for a temperature probe in the system.
1650 /// Each structure describes a single temperature probe.
1651 ///
1652 typedef struct {
1653   SMBIOS_STRUCTURE                  Hdr;
1654   SMBIOS_TABLE_STRING               Description;
1655   MISC_TEMPERATURE_PROBE_LOCATION   LocationAndStatus;
1656   UINT16                            MaximumValue;
1657   UINT16                            MinimumValue;
1658   UINT16                            Resolution;
1659   UINT16                            Tolerance;
1660   UINT16                            Accuracy;
1661   UINT32                            OEMDefined;
1662   UINT16                            NominalValue;
1663 } SMBIOS_TABLE_TYPE28;
1664
1665 ///
1666 /// Electrical Current Probe - Location and Status
1667 ///
1668 typedef struct {
1669   UINT8 ElectricalCurrentProbeSite   :5;
1670   UINT8 ElectricalCurrentProbeStatus :3;
1671 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
1672
1673 ///
1674 /// Electrical Current Probe (Type 29)
1675 ///
1676 /// This structure describes the attributes for an electrical current probe in the system.
1677 /// Each structure describes a single electrical current probe.
1678 ///
1679 typedef struct {
1680   SMBIOS_STRUCTURE                        Hdr;
1681   SMBIOS_TABLE_STRING                     Description;
1682   MISC_ELECTRICAL_CURRENT_PROBE_LOCATION  LocationAndStatus;
1683   UINT16                                  MaximumValue;
1684   UINT16                                  MinimumValue;
1685   UINT16                                  Resolution;
1686   UINT16                                  Tolerance;
1687   UINT16                                  Accuracy;
1688   UINT32                                  OEMDefined;
1689   UINT16                                  NominalValue;
1690 } SMBIOS_TABLE_TYPE29;
1691
1692 ///
1693 /// Out-of-Band Remote Access (Type 30)
1694 ///
1695 /// This structure describes the attributes and policy settings of a hardware facility
1696 /// that may be used to gain remote access to a hardware system when the operating system
1697 /// is not available due to power-down status, hardware failures, or boot failures.
1698 ///
1699 typedef struct {
1700   SMBIOS_STRUCTURE      Hdr;
1701   SMBIOS_TABLE_STRING   ManufacturerName;
1702   UINT8                 Connections;
1703 } SMBIOS_TABLE_TYPE30;
1704
1705 ///
1706 /// Boot Integrity Services (BIS) Entry Point (Type 31)
1707 ///
1708 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
1709 ///
1710 typedef struct {
1711   SMBIOS_STRUCTURE      Hdr;
1712   UINT8                 Checksum;
1713   UINT8                 Reserved1;
1714   UINT16                Reserved2;
1715   UINT32                BisEntry16;
1716   UINT32                BisEntry32;
1717   UINT64                Reserved3;
1718   UINT32                Reserved4;
1719 } SMBIOS_TABLE_TYPE31;
1720
1721 ///
1722 /// System Boot Information - System Boot Status
1723 ///
1724 typedef enum {
1725   BootInformationStatusNoError                  = 0x00,
1726   BootInformationStatusNoBootableMedia          = 0x01,
1727   BootInformationStatusNormalOSFailedLoading    = 0x02,
1728   BootInformationStatusFirmwareDetectedFailure  = 0x03,
1729   BootInformationStatusOSDetectedFailure        = 0x04,
1730   BootInformationStatusUserRequestedBoot        = 0x05,
1731   BootInformationStatusSystemSecurityViolation  = 0x06,
1732   BootInformationStatusPreviousRequestedImage   = 0x07,
1733   BootInformationStatusWatchdogTimerExpired     = 0x08,
1734   BootInformationStatusStartReserved            = 0x09,
1735   BootInformationStatusStartOemSpecific         = 0x80,
1736   BootInformationStatusStartProductSpecific     = 0xC0
1737 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
1738
1739 ///
1740 /// System Boot Information (Type 32)
1741 ///
1742 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
1743 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
1744 /// application via this structure. When used in the PXE environment, for example,
1745 /// this code identifies the reason the PXE was initiated and can be used by boot-image
1746 /// software to further automate an enterprise's PXE sessions.  For example, an enterprise
1747 /// could choose to automatically download a hardware-diagnostic image to a client whose
1748 /// reason code indicated either a firmware- or operating system-detected hardware failure.
1749 ///
1750 typedef struct {
1751   SMBIOS_STRUCTURE                        Hdr;
1752   UINT8                                   Reserved[6];
1753   MISC_BOOT_INFORMATION_STATUS_DATA_TYPE  BootStatus;
1754 } SMBIOS_TABLE_TYPE32;
1755
1756 ///
1757 /// 64-bit Memory Error Information (Type 33)
1758 ///
1759 /// This structure describes an error within a Physical Memory Array,
1760 /// when the error address is above 4G (0xFFFFFFFF).
1761 ///
1762 typedef struct {
1763   SMBIOS_STRUCTURE          Hdr;
1764   MEMORY_ERROR_TYPE         ErrorType;          ///< Same as Type 18
1765   MEMORY_ERROR_GRANULARITY  ErrorGranularity;   ///< Same as Type 18
1766   MEMORY_ERROR_OPERATION    ErrorOperation;     ///< Same as Type 18
1767   UINT32                    VendorSyndrome;
1768   UINT64                    MemoryArrayErrorAddress;
1769   UINT64                    DeviceErrorAddress;
1770   UINT32                    ErrorResolution;
1771 } SMBIOS_TABLE_TYPE33;
1772
1773 ///
1774 /// Management Device -  Type
1775 ///
1776 typedef enum {
1777   ManagementDeviceTypeOther      = 0x01,
1778   ManagementDeviceTypeUnknown    = 0x02,
1779   ManagementDeviceTypeLm75       = 0x03,
1780   ManagementDeviceTypeLm78       = 0x04,
1781   ManagementDeviceTypeLm79       = 0x05,
1782   ManagementDeviceTypeLm80       = 0x06,
1783   ManagementDeviceTypeLm81       = 0x07,
1784   ManagementDeviceTypeAdm9240    = 0x08,
1785   ManagementDeviceTypeDs1780     = 0x09,
1786   ManagementDeviceTypeMaxim1617  = 0x0A,
1787   ManagementDeviceTypeGl518Sm    = 0x0B,
1788   ManagementDeviceTypeW83781D    = 0x0C,
1789   ManagementDeviceTypeHt82H791   = 0x0D
1790 } MISC_MANAGEMENT_DEVICE_TYPE;
1791
1792 ///
1793 /// Management Device -  Address Type
1794 ///
1795 typedef enum {
1796   ManagementDeviceAddressTypeOther   = 0x01,
1797   ManagementDeviceAddressTypeUnknown = 0x02,
1798   ManagementDeviceAddressTypeIOPort  = 0x03,
1799   ManagementDeviceAddressTypeMemory  = 0x04,
1800   ManagementDeviceAddressTypeSmbus   = 0x05
1801 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
1802
1803 ///
1804 /// Management Device (Type 34)
1805 ///
1806 /// The information in this structure defines the attributes of a Management Device.
1807 /// A Management Device might control one or more fans or voltage, current, or temperature
1808 /// probes as defined by one or more Management Device Component structures.
1809 ///
1810 typedef struct {
1811   SMBIOS_STRUCTURE                      Hdr;
1812   SMBIOS_TABLE_STRING                   Description;
1813   MISC_MANAGEMENT_DEVICE_TYPE           Type;
1814   UINT32                                Address;
1815   MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE   AddressType;
1816 } SMBIOS_TABLE_TYPE34;
1817
1818 ///
1819 /// Management Device Component (Type 35)
1820 ///
1821 /// This structure associates a cooling device or environmental probe with structures
1822 /// that define the controlling hardware device and (optionally) the component's thresholds.
1823 ///
1824 typedef struct {
1825   SMBIOS_STRUCTURE      Hdr;
1826   SMBIOS_TABLE_STRING   Description;
1827   UINT16                ManagementDeviceHandle;
1828   UINT16                ComponentHandle;
1829   UINT16                ThresholdHandle;
1830 } SMBIOS_TABLE_TYPE35;
1831
1832 ///
1833 /// Management Device Threshold Data (Type 36)
1834 ///
1835 /// The information in this structure defines threshold information for
1836 /// a component (probe or cooling-unit) contained within a Management Device.
1837 ///
1838 typedef struct {
1839   SMBIOS_STRUCTURE      Hdr;
1840   UINT16                LowerThresholdNonCritical;
1841   UINT16                UpperThresholdNonCritical;
1842   UINT16                LowerThresholdCritical;
1843   UINT16                UpperThresholdCritical;
1844   UINT16                LowerThresholdNonRecoverable;
1845   UINT16                UpperThresholdNonRecoverable;
1846 } SMBIOS_TABLE_TYPE36;
1847
1848 ///
1849 /// Memory Channel Entry
1850 ///
1851 typedef struct {
1852   UINT8                 DeviceLoad;
1853   UINT16                DeviceHandle;
1854 } MEMORY_DEVICE;
1855
1856 ///
1857 /// Memory Channel - Channel Type
1858 ///
1859 typedef enum {
1860   MemoryChannelTypeOther       = 0x01,
1861   MemoryChannelTypeUnknown     = 0x02,
1862   MemoryChannelTypeRambus      = 0x03,
1863   MemoryChannelTypeSyncLink    = 0x04
1864 } MEMORY_CHANNEL_TYPE;
1865
1866 ///
1867 /// Memory Channel (Type 37)
1868 ///
1869 /// The information in this structure provides the correlation between a Memory Channel
1870 /// and its associated Memory Devices.  Each device presents one or more loads to the channel;
1871 /// the sum of all device loads cannot exceed the channel's defined maximum.
1872 ///
1873 typedef struct {
1874   SMBIOS_STRUCTURE      Hdr;
1875   UINT8                 ChannelType;
1876   UINT8                 MaximumChannelLoad;
1877   UINT8                 MemoryDeviceCount;
1878   MEMORY_DEVICE         MemoryDevice[1];
1879 } SMBIOS_TABLE_TYPE37;
1880
1881 ///
1882 /// IPMI Device Information - BMC Interface Type
1883 ///
1884 typedef enum {
1885   IPMIDeviceInfoInterfaceTypeUnknown       = 0x00,
1886   IPMIDeviceInfoInterfaceTypeKCS           = 0x01, ///< Keyboard Controller Style
1887   IPMIDeviceInfoInterfaceTypeSMIC          = 0x02, ///< Server Management Interface Chip
1888   IPMIDeviceInfoInterfaceTypeBT            = 0x03, ///< Block Transfer
1889   IPMIDeviceInfoInterfaceTypeReserved      = 0x04
1890 } BMC_INTERFACE_TYPE;
1891
1892 ///
1893 /// IPMI Device Information (Type 38)
1894 ///
1895 /// The information in this structure defines the attributes of an
1896 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
1897 ///
1898 typedef struct {
1899   SMBIOS_STRUCTURE      Hdr;
1900   BMC_INTERFACE_TYPE    InterfaceType;
1901   UINT8                 IPMISpecificationRevision;
1902   UINT8                 I2CSlaveAddress;
1903   UINT8                 NVStorageDeviceAddress;
1904   UINT64                BaseAddress;
1905   UINT8                 BaseAddressModifier_InterruptInfo;
1906   UINT8                 InterruptNumber;
1907 } SMBIOS_TABLE_TYPE38;
1908
1909 ///
1910 /// System Power Supply - Power Supply Characteristics
1911 ///
1912 typedef struct {
1913   UINT16                        PowerSupplyHotReplaceable:1;
1914   UINT16                        PowerSupplyPresent       :1;
1915   UINT16                        PowerSupplyUnplugged     :1;
1916   UINT16                        InputVoltageRangeSwitch  :4;
1917   UINT16                        PowerSupplyStatus        :3;
1918   UINT16                        PowerSupplyType          :4;
1919   UINT16                        Reserved                 :2;
1920 } SYS_POWER_SUPPLY_CHARACTERISTICS;
1921
1922 ///
1923 /// System Power Supply (Type 39)
1924 ///
1925 /// This structure identifies attributes of a system power supply.  One instance
1926 /// of this record is present for each possible power supply in a system.
1927 ///
1928 typedef struct {
1929   SMBIOS_STRUCTURE                  Hdr;
1930   UINT8                             PowerUnitGroup;
1931   SMBIOS_TABLE_STRING               Location;
1932   SMBIOS_TABLE_STRING               DeviceName;
1933   SMBIOS_TABLE_STRING               Manufacturer;
1934   SMBIOS_TABLE_STRING               SerialNumber;
1935   SMBIOS_TABLE_STRING               AssetTagNumber;
1936   SMBIOS_TABLE_STRING               ModelPartNumber;
1937   SMBIOS_TABLE_STRING               RevisionLevel;
1938   UINT16                            MaxPowerCapacity;
1939   SYS_POWER_SUPPLY_CHARACTERISTICS  PowerSupplyCharacteristics;
1940   UINT16                            InputVoltageProbeHandle;
1941   UINT16                            CoolingDeviceHandle;
1942   UINT16                            InputCurrentProbeHandle;
1943 } SMBIOS_TABLE_TYPE39;
1944
1945 ///
1946 /// Additional Information Entry Format
1947 ///
1948 typedef struct {
1949   UINT8                   EntryLength;
1950   UINT16                  ReferencedHandle;
1951   UINT8                   ReferencedOffset;
1952   SMBIOS_TABLE_STRING     EntryString;
1953   UINT8                   Value[1];
1954 }ADDITIONAL_INFORMATION_ENTRY;
1955
1956 ///
1957 /// Additional Information (Type 40)
1958 ///
1959 /// This structure is intended to provide additional information for handling unspecified
1960 /// enumerated values and interim field updates in another structure.
1961 ///
1962 typedef struct {
1963   SMBIOS_STRUCTURE                      Hdr;
1964   UINT8                                 NumberOfAdditionalInformationEntries;
1965   ADDITIONAL_INFORMATION_ENTRY          AdditionalInfoEntries[1];
1966 } SMBIOS_TABLE_TYPE40;
1967
1968 ///
1969 /// Onboard Devices Extended Information - Onboard Device Types
1970 ///
1971 typedef enum{
1972   OnBoardDeviceExtendedTypeOther          = 0x01,
1973   OnBoardDeviceExtendedTypeUnknown        = 0x02,
1974   OnBoardDeviceExtendedTypeVideo          = 0x03,
1975   OnBoardDeviceExtendedTypeScsiController = 0x04,
1976   OnBoardDeviceExtendedTypeEthernet       = 0x05,
1977   OnBoardDeviceExtendedTypeTokenRing      = 0x06,
1978   OnBoardDeviceExtendedTypeSound          = 0x07,
1979   OnBoardDeviceExtendedTypePATAController = 0x08,
1980   OnBoardDeviceExtendedTypeSATAController = 0x09,
1981   OnBoardDeviceExtendedTypeSASController  = 0x0A
1982 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
1983
1984 ///
1985 /// Onboard Devices Extended Information (Type 41)
1986 ///
1987 /// The information in this structure defines the attributes of devices that
1988 /// are onboard (soldered onto) a system element, usually the baseboard.
1989 /// In general, an entry in this table implies that the BIOS has some level of
1990 /// control over the enabling of the associated device for use by the system.
1991 ///
1992 typedef struct {
1993   SMBIOS_STRUCTURE                  Hdr;
1994   SMBIOS_TABLE_STRING               ReferenceDesignation;
1995   ONBOARD_DEVICE_EXTENDED_INFO_TYPE DeviceType;
1996   UINT8                             DeviceTypeInstance;
1997   UINT16                            SegmentGroupNum;
1998   UINT8                             BusNum;
1999   UINT8                             DevFuncNum;
2000 } SMBIOS_TABLE_TYPE41;
2001
2002 ///
2003 /// Inactive (Type 126)
2004 ///
2005 typedef struct {
2006   SMBIOS_STRUCTURE   Hdr;
2007 } SMBIOS_TABLE_TYPE126;
2008
2009 ///
2010 /// End-of-Table (Type 127)
2011 ///
2012 typedef struct {
2013   SMBIOS_STRUCTURE   Hdr;
2014 } SMBIOS_TABLE_TYPE127;
2015
2016 ///
2017 /// Union of all the possible SMBIOS record types
2018 ///
2019 typedef union {
2020   SMBIOS_STRUCTURE      *Hdr;
2021   SMBIOS_TABLE_TYPE0    *Type0;
2022   SMBIOS_TABLE_TYPE1    *Type1;
2023   SMBIOS_TABLE_TYPE2    *Type2;
2024   SMBIOS_TABLE_TYPE3    *Type3;
2025   SMBIOS_TABLE_TYPE4    *Type4;
2026   SMBIOS_TABLE_TYPE5    *Type5;
2027   SMBIOS_TABLE_TYPE6    *Type6;
2028   SMBIOS_TABLE_TYPE7    *Type7;
2029   SMBIOS_TABLE_TYPE8    *Type8;
2030   SMBIOS_TABLE_TYPE9    *Type9;
2031   SMBIOS_TABLE_TYPE10   *Type10;
2032   SMBIOS_TABLE_TYPE11   *Type11;
2033   SMBIOS_TABLE_TYPE12   *Type12;
2034   SMBIOS_TABLE_TYPE13   *Type13;
2035   SMBIOS_TABLE_TYPE14   *Type14;
2036   SMBIOS_TABLE_TYPE15   *Type15;
2037   SMBIOS_TABLE_TYPE16   *Type16;
2038   SMBIOS_TABLE_TYPE17   *Type17;
2039   SMBIOS_TABLE_TYPE18   *Type18;
2040   SMBIOS_TABLE_TYPE19   *Type19;
2041   SMBIOS_TABLE_TYPE20   *Type20;
2042   SMBIOS_TABLE_TYPE21   *Type21;
2043   SMBIOS_TABLE_TYPE22   *Type22;
2044   SMBIOS_TABLE_TYPE23   *Type23;
2045   SMBIOS_TABLE_TYPE24   *Type24;
2046   SMBIOS_TABLE_TYPE25   *Type25;
2047   SMBIOS_TABLE_TYPE26   *Type26;
2048   SMBIOS_TABLE_TYPE27   *Type27;
2049   SMBIOS_TABLE_TYPE28   *Type28;
2050   SMBIOS_TABLE_TYPE29   *Type29;
2051   SMBIOS_TABLE_TYPE30   *Type30;
2052   SMBIOS_TABLE_TYPE31   *Type31;
2053   SMBIOS_TABLE_TYPE32   *Type32;
2054   SMBIOS_TABLE_TYPE33   *Type33;
2055   SMBIOS_TABLE_TYPE34   *Type34;
2056   SMBIOS_TABLE_TYPE35   *Type35;
2057   SMBIOS_TABLE_TYPE36   *Type36;
2058   SMBIOS_TABLE_TYPE37   *Type37;
2059   SMBIOS_TABLE_TYPE38   *Type38;
2060   SMBIOS_TABLE_TYPE39   *Type39;
2061   SMBIOS_TABLE_TYPE40   *Type40;
2062   SMBIOS_TABLE_TYPE41   *Type41;
2063   SMBIOS_TABLE_TYPE126  *Type126;
2064   SMBIOS_TABLE_TYPE127  *Type127;
2065   UINT8                 *Raw;
2066 } SMBIOS_STRUCTURE_POINTER;
2067
2068 #pragma pack()
2069
2070 #endif