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1.Measure ACPI table data comes from flash event type EV_POST_CODE ACPI DATA to PCR[0]
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v2.7.1
3
4 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are licensed and made available under
6 the terms and conditions of the BSD License that accompanies this distribution.
7 The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __SMBIOS_STANDARD_H__
16 #define __SMBIOS_STANDARD_H__
17
18 ///
19 /// Reference SMBIOS 2.6, chapter 3.1.2.
20 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
21 /// use by this specification.
22 ///
23 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
24
25 ///
26 /// Reference SMBIOS 2.7, chapter 6.1.2.
27 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
28 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
29 /// This number is not used for any other purpose by the SMBIOS specification.
30 ///
31 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
32
33 ///
34 /// Reference SMBIOS 2.6, chapter 3.1.3.
35 /// Each text string is limited to 64 significant characters due to system MIF limitations.
36 /// Reference SMBIOS 2.7, chapter 6.1.3.
37 /// It will have no limit on the length of each individual text string.
38 ///
39 #define SMBIOS_STRING_MAX_LENGTH 64
40
41 ///
42 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
43 /// Upper-level software that interprets the SMBIOS structure-table should bypass an
44 /// Inactive structure just like a structure type that the software does not recognize.
45 ///
46 #define SMBIOS_TYPE_INACTIVE 0x007E
47
48 ///
49 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
50 /// The end-of-table indicator is used in the last physical structure in a table
51 ///
52 #define SMBIOS_TYPE_END_OF_TABLE 0x007F
53
54 ///
55 /// Smbios Table Entry Point Structure.
56 ///
57 #pragma pack(1)
58 typedef struct {
59 UINT8 AnchorString[4];
60 UINT8 EntryPointStructureChecksum;
61 UINT8 EntryPointLength;
62 UINT8 MajorVersion;
63 UINT8 MinorVersion;
64 UINT16 MaxStructureSize;
65 UINT8 EntryPointRevision;
66 UINT8 FormattedArea[5];
67 UINT8 IntermediateAnchorString[5];
68 UINT8 IntermediateChecksum;
69 UINT16 TableLength;
70 UINT32 TableAddress;
71 UINT16 NumberOfSmbiosStructures;
72 UINT8 SmbiosBcdRevision;
73 } SMBIOS_TABLE_ENTRY_POINT;
74
75 ///
76 /// The Smbios structure header.
77 ///
78 typedef struct {
79 UINT8 Type;
80 UINT8 Length;
81 UINT16 Handle;
82 } SMBIOS_STRUCTURE;
83
84 ///
85 /// String Number for a Null terminated string, 00h stands for no string available.
86 ///
87 typedef UINT8 SMBIOS_TABLE_STRING;
88
89 ///
90 /// BIOS Characteristics
91 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
92 ///
93 typedef struct {
94 UINT32 Reserved :2; ///< Bits 0-1.
95 UINT32 Unknown :1;
96 UINT32 BiosCharacteristicsNotSupported :1;
97 UINT32 IsaIsSupported :1;
98 UINT32 McaIsSupported :1;
99 UINT32 EisaIsSupported :1;
100 UINT32 PciIsSupported :1;
101 UINT32 PcmciaIsSupported :1;
102 UINT32 PlugAndPlayIsSupported :1;
103 UINT32 ApmIsSupported :1;
104 UINT32 BiosIsUpgradable :1;
105 UINT32 BiosShadowingAllowed :1;
106 UINT32 VlVesaIsSupported :1;
107 UINT32 EscdSupportIsAvailable :1;
108 UINT32 BootFromCdIsSupported :1;
109 UINT32 SelectableBootIsSupported :1;
110 UINT32 RomBiosIsSocketed :1;
111 UINT32 BootFromPcmciaIsSupported :1;
112 UINT32 EDDSpecificationIsSupported :1;
113 UINT32 JapaneseNecFloppyIsSupported :1;
114 UINT32 JapaneseToshibaFloppyIsSupported :1;
115 UINT32 Floppy525_360IsSupported :1;
116 UINT32 Floppy525_12IsSupported :1;
117 UINT32 Floppy35_720IsSupported :1;
118 UINT32 Floppy35_288IsSupported :1;
119 UINT32 PrintScreenIsSupported :1;
120 UINT32 Keyboard8042IsSupported :1;
121 UINT32 SerialIsSupported :1;
122 UINT32 PrinterIsSupported :1;
123 UINT32 CgaMonoIsSupported :1;
124 UINT32 NecPc98 :1;
125 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
126 ///< and bits 48-63 reserved for System Vendor.
127 } MISC_BIOS_CHARACTERISTICS;
128
129 ///
130 /// BIOS Characteristics Extension Byte 1.
131 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
132 /// within the BIOS Information structure.
133 ///
134 typedef struct {
135 UINT8 AcpiIsSupported :1;
136 UINT8 UsbLegacyIsSupported :1;
137 UINT8 AgpIsSupported :1;
138 UINT8 I2OBootIsSupported :1;
139 UINT8 Ls120BootIsSupported :1;
140 UINT8 AtapiZipDriveBootIsSupported :1;
141 UINT8 Boot1394IsSupported :1;
142 UINT8 SmartBatteryIsSupported :1;
143 } MBCE_BIOS_RESERVED;
144
145 ///
146 /// BIOS Characteristics Extension Byte 2.
147 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
148 /// within the BIOS Information structure.
149 ///
150 typedef struct {
151 UINT8 BiosBootSpecIsSupported :1;
152 UINT8 FunctionKeyNetworkBootIsSupported :1;
153 UINT8 TargetContentDistributionEnabled :1;
154 UINT8 UefiSpecificationSupported :1;
155 UINT8 VirtualMachineSupported :1;
156 UINT8 ExtensionByte2Reserved :3;
157 } MBCE_SYSTEM_RESERVED;
158
159 ///
160 /// BIOS Characteristics Extension Bytes.
161 ///
162 typedef struct {
163 MBCE_BIOS_RESERVED BiosReserved;
164 MBCE_SYSTEM_RESERVED SystemReserved;
165 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
166
167 ///
168 /// BIOS Information (Type 0).
169 ///
170 typedef struct {
171 SMBIOS_STRUCTURE Hdr;
172 SMBIOS_TABLE_STRING Vendor;
173 SMBIOS_TABLE_STRING BiosVersion;
174 UINT16 BiosSegment;
175 SMBIOS_TABLE_STRING BiosReleaseDate;
176 UINT8 BiosSize;
177 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
178 UINT8 BIOSCharacteristicsExtensionBytes[2];
179 UINT8 SystemBiosMajorRelease;
180 UINT8 SystemBiosMinorRelease;
181 UINT8 EmbeddedControllerFirmwareMajorRelease;
182 UINT8 EmbeddedControllerFirmwareMinorRelease;
183 } SMBIOS_TABLE_TYPE0;
184
185 ///
186 /// System Wake-up Type.
187 ///
188 typedef enum {
189 SystemWakeupTypeReserved = 0x00,
190 SystemWakeupTypeOther = 0x01,
191 SystemWakeupTypeUnknown = 0x02,
192 SystemWakeupTypeApmTimer = 0x03,
193 SystemWakeupTypeModemRing = 0x04,
194 SystemWakeupTypeLanRemote = 0x05,
195 SystemWakeupTypePowerSwitch = 0x06,
196 SystemWakeupTypePciPme = 0x07,
197 SystemWakeupTypeAcPowerRestored = 0x08
198 } MISC_SYSTEM_WAKEUP_TYPE;
199
200 ///
201 /// System Information (Type 1).
202 ///
203 /// The information in this structure defines attributes of the overall system and is
204 /// intended to be associated with the Component ID group of the system's MIF.
205 /// An SMBIOS implementation is associated with a single system instance and contains
206 /// one and only one System Information (Type 1) structure.
207 ///
208 typedef struct {
209 SMBIOS_STRUCTURE Hdr;
210 SMBIOS_TABLE_STRING Manufacturer;
211 SMBIOS_TABLE_STRING ProductName;
212 SMBIOS_TABLE_STRING Version;
213 SMBIOS_TABLE_STRING SerialNumber;
214 GUID Uuid;
215 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
216 SMBIOS_TABLE_STRING SKUNumber;
217 SMBIOS_TABLE_STRING Family;
218 } SMBIOS_TABLE_TYPE1;
219
220 ///
221 /// Base Board - Feature Flags.
222 ///
223 typedef struct {
224 UINT8 Motherboard :1;
225 UINT8 RequiresDaughterCard :1;
226 UINT8 Removable :1;
227 UINT8 Replaceable :1;
228 UINT8 HotSwappable :1;
229 UINT8 Reserved :3;
230 } BASE_BOARD_FEATURE_FLAGS;
231
232 ///
233 /// Base Board - Board Type.
234 ///
235 typedef enum {
236 BaseBoardTypeUnknown = 0x1,
237 BaseBoardTypeOther = 0x2,
238 BaseBoardTypeServerBlade = 0x3,
239 BaseBoardTypeConnectivitySwitch = 0x4,
240 BaseBoardTypeSystemManagementModule = 0x5,
241 BaseBoardTypeProcessorModule = 0x6,
242 BaseBoardTypeIOModule = 0x7,
243 BaseBoardTypeMemoryModule = 0x8,
244 BaseBoardTypeDaughterBoard = 0x9,
245 BaseBoardTypeMotherBoard = 0xA,
246 BaseBoardTypeProcessorMemoryModule = 0xB,
247 BaseBoardTypeProcessorIOModule = 0xC,
248 BaseBoardTypeInterconnectBoard = 0xD
249 } BASE_BOARD_TYPE;
250
251 ///
252 /// Base Board (or Module) Information (Type 2).
253 ///
254 /// The information in this structure defines attributes of a system baseboard -
255 /// for example a motherboard, planar, or server blade or other standard system module.
256 ///
257 typedef struct {
258 SMBIOS_STRUCTURE Hdr;
259 SMBIOS_TABLE_STRING Manufacturer;
260 SMBIOS_TABLE_STRING ProductName;
261 SMBIOS_TABLE_STRING Version;
262 SMBIOS_TABLE_STRING SerialNumber;
263 SMBIOS_TABLE_STRING AssetTag;
264 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
265 SMBIOS_TABLE_STRING LocationInChassis;
266 UINT16 ChassisHandle;
267 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
268 UINT8 NumberOfContainedObjectHandles;
269 UINT16 ContainedObjectHandles[1];
270 } SMBIOS_TABLE_TYPE2;
271
272 ///
273 /// System Enclosure or Chassis Types
274 ///
275 typedef enum {
276 MiscChassisTypeOther = 0x01,
277 MiscChassisTypeUnknown = 0x02,
278 MiscChassisTypeDeskTop = 0x03,
279 MiscChassisTypeLowProfileDesktop = 0x04,
280 MiscChassisTypePizzaBox = 0x05,
281 MiscChassisTypeMiniTower = 0x06,
282 MiscChassisTypeTower = 0x07,
283 MiscChassisTypePortable = 0x08,
284 MiscChassisTypeLapTop = 0x09,
285 MiscChassisTypeNotebook = 0x0A,
286 MiscChassisTypeHandHeld = 0x0B,
287 MiscChassisTypeDockingStation = 0x0C,
288 MiscChassisTypeAllInOne = 0x0D,
289 MiscChassisTypeSubNotebook = 0x0E,
290 MiscChassisTypeSpaceSaving = 0x0F,
291 MiscChassisTypeLunchBox = 0x10,
292 MiscChassisTypeMainServerChassis = 0x11,
293 MiscChassisTypeExpansionChassis = 0x12,
294 MiscChassisTypeSubChassis = 0x13,
295 MiscChassisTypeBusExpansionChassis = 0x14,
296 MiscChassisTypePeripheralChassis = 0x15,
297 MiscChassisTypeRaidChassis = 0x16,
298 MiscChassisTypeRackMountChassis = 0x17,
299 MiscChassisTypeSealedCasePc = 0x18,
300 MiscChassisMultiSystemChassis = 0x19,
301 MiscChassisCompactPCI = 0x1A,
302 MiscChassisAdvancedTCA = 0x1B,
303 MiscChassisBlade = 0x1C,
304 MiscChassisBladeEnclosure = 0x1D
305 } MISC_CHASSIS_TYPE;
306
307 ///
308 /// System Enclosure or Chassis States .
309 ///
310 typedef enum {
311 ChassisStateOther = 0x01,
312 ChassisStateUnknown = 0x02,
313 ChassisStateSafe = 0x03,
314 ChassisStateWarning = 0x04,
315 ChassisStateCritical = 0x05,
316 ChassisStateNonRecoverable = 0x06
317 } MISC_CHASSIS_STATE;
318
319 ///
320 /// System Enclosure or Chassis Security Status.
321 ///
322 typedef enum {
323 ChassisSecurityStatusOther = 0x01,
324 ChassisSecurityStatusUnknown = 0x02,
325 ChassisSecurityStatusNone = 0x03,
326 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
327 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
328 } MISC_CHASSIS_SECURITY_STATE;
329
330 ///
331 /// Contained Element record
332 ///
333 typedef struct {
334 UINT8 ContainedElementType;
335 UINT8 ContainedElementMinimum;
336 UINT8 ContainedElementMaximum;
337 } CONTAINED_ELEMENT;
338
339
340 ///
341 /// System Enclosure or Chassis (Type 3).
342 ///
343 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
344 /// For example, if a system included a separate enclosure for its peripheral devices,
345 /// two structures would be returned: one for the main, system enclosure and the second for
346 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
347 /// support the population of the CIM_Chassis class.
348 ///
349 typedef struct {
350 SMBIOS_STRUCTURE Hdr;
351 SMBIOS_TABLE_STRING Manufacturer;
352 UINT8 Type;
353 SMBIOS_TABLE_STRING Version;
354 SMBIOS_TABLE_STRING SerialNumber;
355 SMBIOS_TABLE_STRING AssetTag;
356 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
357 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
358 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
359 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
360 UINT8 OemDefined[4];
361 UINT8 Height;
362 UINT8 NumberofPowerCords;
363 UINT8 ContainedElementCount;
364 UINT8 ContainedElementRecordLength;
365 CONTAINED_ELEMENT ContainedElements[1];
366 } SMBIOS_TABLE_TYPE3;
367
368 ///
369 /// Processor Information - Processor Type.
370 ///
371 typedef enum {
372 ProcessorOther = 0x01,
373 ProcessorUnknown = 0x02,
374 CentralProcessor = 0x03,
375 MathProcessor = 0x04,
376 DspProcessor = 0x05,
377 VideoProcessor = 0x06
378 } PROCESSOR_TYPE_DATA;
379
380 ///
381 /// Processor Information - Processor Family.
382 ///
383 typedef enum {
384 ProcessorFamilyOther = 0x01,
385 ProcessorFamilyUnknown = 0x02,
386 ProcessorFamily8086 = 0x03,
387 ProcessorFamily80286 = 0x04,
388 ProcessorFamilyIntel386 = 0x05,
389 ProcessorFamilyIntel486 = 0x06,
390 ProcessorFamily8087 = 0x07,
391 ProcessorFamily80287 = 0x08,
392 ProcessorFamily80387 = 0x09,
393 ProcessorFamily80487 = 0x0A,
394 ProcessorFamilyPentium = 0x0B,
395 ProcessorFamilyPentiumPro = 0x0C,
396 ProcessorFamilyPentiumII = 0x0D,
397 ProcessorFamilyPentiumMMX = 0x0E,
398 ProcessorFamilyCeleron = 0x0F,
399 ProcessorFamilyPentiumIIXeon = 0x10,
400 ProcessorFamilyPentiumIII = 0x11,
401 ProcessorFamilyM1 = 0x12,
402 ProcessorFamilyM2 = 0x13,
403 ProcessorFamilyIntelCeleronM = 0x14,
404 ProcessorFamilyIntelPentium4Ht = 0x15,
405 ProcessorFamilyAmdDuron = 0x18,
406 ProcessorFamilyK5 = 0x19,
407 ProcessorFamilyK6 = 0x1A,
408 ProcessorFamilyK6_2 = 0x1B,
409 ProcessorFamilyK6_3 = 0x1C,
410 ProcessorFamilyAmdAthlon = 0x1D,
411 ProcessorFamilyAmd29000 = 0x1E,
412 ProcessorFamilyK6_2Plus = 0x1F,
413 ProcessorFamilyPowerPC = 0x20,
414 ProcessorFamilyPowerPC601 = 0x21,
415 ProcessorFamilyPowerPC603 = 0x22,
416 ProcessorFamilyPowerPC603Plus = 0x23,
417 ProcessorFamilyPowerPC604 = 0x24,
418 ProcessorFamilyPowerPC620 = 0x25,
419 ProcessorFamilyPowerPCx704 = 0x26,
420 ProcessorFamilyPowerPC750 = 0x27,
421 ProcessorFamilyIntelCoreDuo = 0x28,
422 ProcessorFamilyIntelCoreDuoMobile = 0x29,
423 ProcessorFamilyIntelCoreSoloMobile = 0x2A,
424 ProcessorFamilyIntelAtom = 0x2B,
425 ProcessorFamilyAlpha3 = 0x30,
426 ProcessorFamilyAlpha21064 = 0x31,
427 ProcessorFamilyAlpha21066 = 0x32,
428 ProcessorFamilyAlpha21164 = 0x33,
429 ProcessorFamilyAlpha21164PC = 0x34,
430 ProcessorFamilyAlpha21164a = 0x35,
431 ProcessorFamilyAlpha21264 = 0x36,
432 ProcessorFamilyAlpha21364 = 0x37,
433 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
434 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
435 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
436 ProcessorFamilyAmdOpteron6100Series = 0x3B,
437 ProcessorFamilyAmdOpteron4100Series = 0x3C,
438 ProcessorFamilyAmdOpteron6200Series = 0x3D,
439 ProcessorFamilyAmdOpteron4200Series = 0x3E,
440 ProcessorFamilyMips = 0x40,
441 ProcessorFamilyMIPSR4000 = 0x41,
442 ProcessorFamilyMIPSR4200 = 0x42,
443 ProcessorFamilyMIPSR4400 = 0x43,
444 ProcessorFamilyMIPSR4600 = 0x44,
445 ProcessorFamilyMIPSR10000 = 0x45,
446 ProcessorFamilyAmdCSeries = 0x46,
447 ProcessorFamilyAmdESeries = 0x47,
448 ProcessorFamilyAmdSSeries = 0x48,
449 ProcessorFamilyAmdGSeries = 0x49,
450 ProcessorFamilySparc = 0x50,
451 ProcessorFamilySuperSparc = 0x51,
452 ProcessorFamilymicroSparcII = 0x52,
453 ProcessorFamilymicroSparcIIep = 0x53,
454 ProcessorFamilyUltraSparc = 0x54,
455 ProcessorFamilyUltraSparcII = 0x55,
456 ProcessorFamilyUltraSparcIIi = 0x56,
457 ProcessorFamilyUltraSparcIII = 0x57,
458 ProcessorFamilyUltraSparcIIIi = 0x58,
459 ProcessorFamily68040 = 0x60,
460 ProcessorFamily68xxx = 0x61,
461 ProcessorFamily68000 = 0x62,
462 ProcessorFamily68010 = 0x63,
463 ProcessorFamily68020 = 0x64,
464 ProcessorFamily68030 = 0x65,
465 ProcessorFamilyHobbit = 0x70,
466 ProcessorFamilyCrusoeTM5000 = 0x78,
467 ProcessorFamilyCrusoeTM3000 = 0x79,
468 ProcessorFamilyEfficeonTM8000 = 0x7A,
469 ProcessorFamilyWeitek = 0x80,
470 ProcessorFamilyItanium = 0x82,
471 ProcessorFamilyAmdAthlon64 = 0x83,
472 ProcessorFamilyAmdOpteron = 0x84,
473 ProcessorFamilyAmdSempron = 0x85,
474 ProcessorFamilyAmdTurion64Mobile = 0x86,
475 ProcessorFamilyDualCoreAmdOpteron = 0x87,
476 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
477 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
478 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
479 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
480 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
481 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
482 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
483 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
484 ProcessorFamilyPARISC = 0x90,
485 ProcessorFamilyPaRisc8500 = 0x91,
486 ProcessorFamilyPaRisc8000 = 0x92,
487 ProcessorFamilyPaRisc7300LC = 0x93,
488 ProcessorFamilyPaRisc7200 = 0x94,
489 ProcessorFamilyPaRisc7100LC = 0x95,
490 ProcessorFamilyPaRisc7100 = 0x96,
491 ProcessorFamilyV30 = 0xA0,
492 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
493 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
494 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
495 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
496 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
497 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
498 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
499 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
500 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
501 ProcessorFamilyQuadCoreIntelXeon = 0xAA,
502 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
503 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
504 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
505 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
506 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
507 ProcessorFamilyPentiumIIIXeon = 0xB0,
508 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
509 ProcessorFamilyPentium4 = 0xB2,
510 ProcessorFamilyIntelXeon = 0xB3,
511 ProcessorFamilyAS400 = 0xB4,
512 ProcessorFamilyIntelXeonMP = 0xB5,
513 ProcessorFamilyAMDAthlonXP = 0xB6,
514 ProcessorFamilyAMDAthlonMP = 0xB7,
515 ProcessorFamilyIntelItanium2 = 0xB8,
516 ProcessorFamilyIntelPentiumM = 0xB9,
517 ProcessorFamilyIntelCeleronD = 0xBA,
518 ProcessorFamilyIntelPentiumD = 0xBB,
519 ProcessorFamilyIntelPentiumEx = 0xBC,
520 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
521 ProcessorFamilyReserved = 0xBE,
522 ProcessorFamilyIntelCore2 = 0xBF,
523 ProcessorFamilyIntelCore2Solo = 0xC0,
524 ProcessorFamilyIntelCore2Extreme = 0xC1,
525 ProcessorFamilyIntelCore2Quad = 0xC2,
526 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
527 ProcessorFamilyIntelCore2DuoMobile = 0xC4,
528 ProcessorFamilyIntelCore2SoloMobile = 0xC5,
529 ProcessorFamilyIntelCoreI7 = 0xC6,
530 ProcessorFamilyDualCoreIntelCeleron = 0xC7,
531 ProcessorFamilyIBM390 = 0xC8,
532 ProcessorFamilyG4 = 0xC9,
533 ProcessorFamilyG5 = 0xCA,
534 ProcessorFamilyG6 = 0xCB,
535 ProcessorFamilyzArchitectur = 0xCC,
536 ProcessorFamilyIntelCoreI5 = 0xCD,
537 ProcessorFamilyIntelCoreI3 = 0xCE,
538 ProcessorFamilyViaC7M = 0xD2,
539 ProcessorFamilyViaC7D = 0xD3,
540 ProcessorFamilyViaC7 = 0xD4,
541 ProcessorFamilyViaEden = 0xD5,
542 ProcessorFamilyMultiCoreIntelXeon = 0xD6,
543 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
544 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
545 ProcessorFamilyViaNano = 0xD9,
546 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
547 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
548 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
549 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
550 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
551 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
552 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
553 ProcessorFamilyAmdPhenomTripleCore = 0xE7,
554 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
555 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
556 ProcessorFamilyAmdAthlonDualCore = 0xEA,
557 ProcessorFamilyAmdSempronSI = 0xEB,
558 ProcessorFamilyAmdPhenomII = 0xEC,
559 ProcessorFamilyAmdAthlonII = 0xED,
560 ProcessorFamilySixCoreAmdOpteron = 0xEE,
561 ProcessorFamilyAmdSempronM = 0xEF,
562 ProcessorFamilyi860 = 0xFA,
563 ProcessorFamilyi960 = 0xFB,
564 ProcessorFamilyIndicatorFamily2 = 0xFE,
565 ProcessorFamilyReserved1 = 0xFF
566 } PROCESSOR_FAMILY_DATA;
567
568 ///
569 /// Processor Information - Voltage.
570 ///
571 typedef struct {
572 UINT8 ProcessorVoltageCapability5V :1;
573 UINT8 ProcessorVoltageCapability3_3V :1;
574 UINT8 ProcessorVoltageCapability2_9V :1;
575 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
576 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
577 UINT8 ProcessorVoltageIndicateLegacy :1;
578 } PROCESSOR_VOLTAGE;
579
580 ///
581 /// Processor Information - Processor Upgrade.
582 ///
583 typedef enum {
584 ProcessorUpgradeOther = 0x01,
585 ProcessorUpgradeUnknown = 0x02,
586 ProcessorUpgradeDaughterBoard = 0x03,
587 ProcessorUpgradeZIFSocket = 0x04,
588 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
589 ProcessorUpgradeNone = 0x06,
590 ProcessorUpgradeLIFSocket = 0x07,
591 ProcessorUpgradeSlot1 = 0x08,
592 ProcessorUpgradeSlot2 = 0x09,
593 ProcessorUpgrade370PinSocket = 0x0A,
594 ProcessorUpgradeSlotA = 0x0B,
595 ProcessorUpgradeSlotM = 0x0C,
596 ProcessorUpgradeSocket423 = 0x0D,
597 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
598 ProcessorUpgradeSocket478 = 0x0F,
599 ProcessorUpgradeSocket754 = 0x10,
600 ProcessorUpgradeSocket940 = 0x11,
601 ProcessorUpgradeSocket939 = 0x12,
602 ProcessorUpgradeSocketmPGA604 = 0x13,
603 ProcessorUpgradeSocketLGA771 = 0x14,
604 ProcessorUpgradeSocketLGA775 = 0x15,
605 ProcessorUpgradeSocketS1 = 0x16,
606 ProcessorUpgradeAM2 = 0x17,
607 ProcessorUpgradeF1207 = 0x18,
608 ProcessorSocketLGA1366 = 0x19,
609 ProcessorUpgradeSocketG34 = 0x1A,
610 ProcessorUpgradeSocketAM3 = 0x1B,
611 ProcessorUpgradeSocketC32 = 0x1C,
612 ProcessorUpgradeSocketLGA1156 = 0x1D,
613 ProcessorUpgradeSocketLGA1567 = 0x1E,
614 ProcessorUpgradeSocketPGA988A = 0x1F,
615 ProcessorUpgradeSocketBGA1288 = 0x20,
616 ProcessorUpgradeSocketrPGA988B = 0x21,
617 ProcessorUpgradeSocketBGA1023 = 0x22,
618 ProcessorUpgradeSocketBGA1224 = 0x23,
619 ProcessorUpgradeSocketBGA1155 = 0x24,
620 ProcessorUpgradeSocketLGA1356 = 0x25,
621 ProcessorUpgradeSocketLGA2011 = 0x26,
622 ProcessorUpgradeSocketFS1 = 0x27,
623 ProcessorUpgradeSocketFS2 = 0x28,
624 ProcessorUpgradeSocketFM1 = 0x29,
625 ProcessorUpgradeSocketFM2 = 0x2A
626 } PROCESSOR_UPGRADE;
627
628 ///
629 /// Processor ID Field Description
630 ///
631 typedef struct {
632 UINT32 ProcessorSteppingId:4;
633 UINT32 ProcessorModel: 4;
634 UINT32 ProcessorFamily: 4;
635 UINT32 ProcessorType: 2;
636 UINT32 ProcessorReserved1: 2;
637 UINT32 ProcessorXModel: 4;
638 UINT32 ProcessorXFamily: 8;
639 UINT32 ProcessorReserved2: 4;
640 } PROCESSOR_SIGNATURE;
641
642 typedef struct {
643 UINT32 ProcessorFpu :1;
644 UINT32 ProcessorVme :1;
645 UINT32 ProcessorDe :1;
646 UINT32 ProcessorPse :1;
647 UINT32 ProcessorTsc :1;
648 UINT32 ProcessorMsr :1;
649 UINT32 ProcessorPae :1;
650 UINT32 ProcessorMce :1;
651 UINT32 ProcessorCx8 :1;
652 UINT32 ProcessorApic :1;
653 UINT32 ProcessorReserved1 :1;
654 UINT32 ProcessorSep :1;
655 UINT32 ProcessorMtrr :1;
656 UINT32 ProcessorPge :1;
657 UINT32 ProcessorMca :1;
658 UINT32 ProcessorCmov :1;
659 UINT32 ProcessorPat :1;
660 UINT32 ProcessorPse36 :1;
661 UINT32 ProcessorPsn :1;
662 UINT32 ProcessorClfsh :1;
663 UINT32 ProcessorReserved2 :1;
664 UINT32 ProcessorDs :1;
665 UINT32 ProcessorAcpi :1;
666 UINT32 ProcessorMmx :1;
667 UINT32 ProcessorFxsr :1;
668 UINT32 ProcessorSse :1;
669 UINT32 ProcessorSse2 :1;
670 UINT32 ProcessorSs :1;
671 UINT32 ProcessorReserved3 :1;
672 UINT32 ProcessorTm :1;
673 UINT32 ProcessorReserved4 :2;
674 } PROCESSOR_FEATURE_FLAGS;
675
676 typedef struct {
677 PROCESSOR_SIGNATURE Signature;
678 PROCESSOR_FEATURE_FLAGS FeatureFlags;
679 } PROCESSOR_ID_DATA;
680
681 ///
682 /// Processor Information (Type 4).
683 ///
684 /// The information in this structure defines the attributes of a single processor;
685 /// a separate structure instance is provided for each system processor socket/slot.
686 /// For example, a system with an IntelDX2 processor would have a single
687 /// structure instance, while a system with an IntelSX2 processor would have a structure
688 /// to describe the main CPU, and a second structure to describe the 80487 co-processor.
689 ///
690 typedef struct {
691 SMBIOS_STRUCTURE Hdr;
692 SMBIOS_TABLE_STRING Socket;
693 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
694 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
695 SMBIOS_TABLE_STRING ProcessorManufacture;
696 PROCESSOR_ID_DATA ProcessorId;
697 SMBIOS_TABLE_STRING ProcessorVersion;
698 PROCESSOR_VOLTAGE Voltage;
699 UINT16 ExternalClock;
700 UINT16 MaxSpeed;
701 UINT16 CurrentSpeed;
702 UINT8 Status;
703 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
704 UINT16 L1CacheHandle;
705 UINT16 L2CacheHandle;
706 UINT16 L3CacheHandle;
707 SMBIOS_TABLE_STRING SerialNumber;
708 SMBIOS_TABLE_STRING AssetTag;
709 SMBIOS_TABLE_STRING PartNumber;
710 //
711 // Add for smbios 2.5
712 //
713 UINT8 CoreCount;
714 UINT8 EnabledCoreCount;
715 UINT8 ThreadCount;
716 UINT16 ProcessorCharacteristics;
717 //
718 // Add for smbios 2.6
719 //
720 UINT16 ProcessorFamily2;
721 } SMBIOS_TABLE_TYPE4;
722
723 ///
724 /// Memory Controller Error Detecting Method.
725 ///
726 typedef enum {
727 ErrorDetectingMethodOther = 0x01,
728 ErrorDetectingMethodUnknown = 0x02,
729 ErrorDetectingMethodNone = 0x03,
730 ErrorDetectingMethodParity = 0x04,
731 ErrorDetectingMethod32Ecc = 0x05,
732 ErrorDetectingMethod64Ecc = 0x06,
733 ErrorDetectingMethod128Ecc = 0x07,
734 ErrorDetectingMethodCrc = 0x08
735 } MEMORY_ERROR_DETECT_METHOD;
736
737 ///
738 /// Memory Controller Error Correcting Capability.
739 ///
740 typedef struct {
741 UINT8 Other :1;
742 UINT8 Unknown :1;
743 UINT8 None :1;
744 UINT8 SingleBitErrorCorrect :1;
745 UINT8 DoubleBitErrorCorrect :1;
746 UINT8 ErrorScrubbing :1;
747 UINT8 Reserved :2;
748 } MEMORY_ERROR_CORRECT_CAPABILITY;
749
750 ///
751 /// Memory Controller Information - Interleave Support.
752 ///
753 typedef enum {
754 MemoryInterleaveOther = 0x01,
755 MemoryInterleaveUnknown = 0x02,
756 MemoryInterleaveOneWay = 0x03,
757 MemoryInterleaveTwoWay = 0x04,
758 MemoryInterleaveFourWay = 0x05,
759 MemoryInterleaveEightWay = 0x06,
760 MemoryInterleaveSixteenWay = 0x07
761 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
762
763 ///
764 /// Memory Controller Information - Memory Speeds.
765 ///
766 typedef struct {
767 UINT16 Other :1;
768 UINT16 Unknown :1;
769 UINT16 SeventyNs:1;
770 UINT16 SixtyNs :1;
771 UINT16 FiftyNs :1;
772 UINT16 Reserved :11;
773 } MEMORY_SPEED_TYPE;
774
775 ///
776 /// Memory Controller Information (Type 5, Obsolete).
777 ///
778 /// The information in this structure defines the attributes of the system's memory controller(s)
779 /// and the supported attributes of any memory-modules present in the sockets controlled by
780 /// this controller.
781 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
782 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
783 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
784 /// choose to implement both memory description types to allow existing DMI browsers
785 /// to properly display the system's memory attributes.
786 ///
787 typedef struct {
788 SMBIOS_STRUCTURE Hdr;
789 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
790 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
791 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
792 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
793 UINT8 MaxMemoryModuleSize;
794 MEMORY_SPEED_TYPE SupportSpeed;
795 UINT16 SupportMemoryType;
796 UINT8 MemoryModuleVoltage;
797 UINT8 AssociatedMemorySlotNum;
798 UINT16 MemoryModuleConfigHandles[1];
799 } SMBIOS_TABLE_TYPE5;
800
801 ///
802 /// Memory Module Information - Memory Types
803 ///
804 typedef struct {
805 UINT16 Other :1;
806 UINT16 Unknown :1;
807 UINT16 Standard :1;
808 UINT16 FastPageMode:1;
809 UINT16 Edo :1;
810 UINT16 Parity :1;
811 UINT16 Ecc :1;
812 UINT16 Simm :1;
813 UINT16 Dimm :1;
814 UINT16 BurstEdo :1;
815 UINT16 Sdram :1;
816 UINT16 Reserved :5;
817 } MEMORY_CURRENT_TYPE;
818
819 ///
820 /// Memory Module Information - Memory Size.
821 ///
822 typedef struct {
823 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
824 UINT8 SingleOrDoubleBank :1;
825 } MEMORY_INSTALLED_ENABLED_SIZE;
826
827 ///
828 /// Memory Module Information (Type 6, Obsolete)
829 ///
830 /// One Memory Module Information structure is included for each memory-module socket
831 /// in the system. The structure describes the speed, type, size, and error status
832 /// of each system memory module. The supported attributes of each module are described
833 /// by the "owning" Memory Controller Information structure.
834 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
835 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
836 /// and Memory Device (Type 17) structures should be used instead.
837 ///
838 typedef struct {
839 SMBIOS_STRUCTURE Hdr;
840 SMBIOS_TABLE_STRING SocketDesignation;
841 UINT8 BankConnections;
842 UINT8 CurrentSpeed;
843 MEMORY_CURRENT_TYPE CurrentMemoryType;
844 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
845 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
846 UINT8 ErrorStatus;
847 } SMBIOS_TABLE_TYPE6;
848
849 ///
850 /// Cache Information - SRAM Type.
851 ///
852 typedef struct {
853 UINT16 Other :1;
854 UINT16 Unknown :1;
855 UINT16 NonBurst :1;
856 UINT16 Burst :1;
857 UINT16 PipelineBurst :1;
858 UINT16 Synchronous :1;
859 UINT16 Asynchronous :1;
860 UINT16 Reserved :9;
861 } CACHE_SRAM_TYPE_DATA;
862
863 ///
864 /// Cache Information - Error Correction Type.
865 ///
866 typedef enum {
867 CacheErrorOther = 0x01,
868 CacheErrorUnknown = 0x02,
869 CacheErrorNone = 0x03,
870 CacheErrorParity = 0x04,
871 CacheErrorSingleBit = 0x05, ///< ECC
872 CacheErrorMultiBit = 0x06 ///< ECC
873 } CACHE_ERROR_TYPE_DATA;
874
875 ///
876 /// Cache Information - System Cache Type.
877 ///
878 typedef enum {
879 CacheTypeOther = 0x01,
880 CacheTypeUnknown = 0x02,
881 CacheTypeInstruction = 0x03,
882 CacheTypeData = 0x04,
883 CacheTypeUnified = 0x05
884 } CACHE_TYPE_DATA;
885
886 ///
887 /// Cache Information - Associativity.
888 ///
889 typedef enum {
890 CacheAssociativityOther = 0x01,
891 CacheAssociativityUnknown = 0x02,
892 CacheAssociativityDirectMapped = 0x03,
893 CacheAssociativity2Way = 0x04,
894 CacheAssociativity4Way = 0x05,
895 CacheAssociativityFully = 0x06,
896 CacheAssociativity8Way = 0x07,
897 CacheAssociativity16Way = 0x08,
898 CacheAssociativity12Way = 0x09,
899 CacheAssociativity24Way = 0x0A,
900 CacheAssociativity32Way = 0x0B,
901 CacheAssociativity48Way = 0x0C,
902 CacheAssociativity64Way = 0x0D,
903 CacheAssociativity20Way = 0x0E
904 } CACHE_ASSOCIATIVITY_DATA;
905
906 ///
907 /// Cache Information (Type 7).
908 ///
909 /// The information in this structure defines the attributes of CPU cache device in the system.
910 /// One structure is specified for each such device, whether the device is internal to
911 /// or external to the CPU module. Cache modules can be associated with a processor structure
912 /// in one or two ways, depending on the SMBIOS version.
913 ///
914 typedef struct {
915 SMBIOS_STRUCTURE Hdr;
916 SMBIOS_TABLE_STRING SocketDesignation;
917 UINT16 CacheConfiguration;
918 UINT16 MaximumCacheSize;
919 UINT16 InstalledSize;
920 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
921 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
922 UINT8 CacheSpeed;
923 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
924 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
925 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
926 } SMBIOS_TABLE_TYPE7;
927
928 ///
929 /// Port Connector Information - Connector Types.
930 ///
931 typedef enum {
932 PortConnectorTypeNone = 0x00,
933 PortConnectorTypeCentronics = 0x01,
934 PortConnectorTypeMiniCentronics = 0x02,
935 PortConnectorTypeProprietary = 0x03,
936 PortConnectorTypeDB25Male = 0x04,
937 PortConnectorTypeDB25Female = 0x05,
938 PortConnectorTypeDB15Male = 0x06,
939 PortConnectorTypeDB15Female = 0x07,
940 PortConnectorTypeDB9Male = 0x08,
941 PortConnectorTypeDB9Female = 0x09,
942 PortConnectorTypeRJ11 = 0x0A,
943 PortConnectorTypeRJ45 = 0x0B,
944 PortConnectorType50PinMiniScsi = 0x0C,
945 PortConnectorTypeMiniDin = 0x0D,
946 PortConnectorTypeMicroDin = 0x0E,
947 PortConnectorTypePS2 = 0x0F,
948 PortConnectorTypeInfrared = 0x10,
949 PortConnectorTypeHpHil = 0x11,
950 PortConnectorTypeUsb = 0x12,
951 PortConnectorTypeSsaScsi = 0x13,
952 PortConnectorTypeCircularDin8Male = 0x14,
953 PortConnectorTypeCircularDin8Female = 0x15,
954 PortConnectorTypeOnboardIde = 0x16,
955 PortConnectorTypeOnboardFloppy = 0x17,
956 PortConnectorType9PinDualInline = 0x18,
957 PortConnectorType25PinDualInline = 0x19,
958 PortConnectorType50PinDualInline = 0x1A,
959 PortConnectorType68PinDualInline = 0x1B,
960 PortConnectorTypeOnboardSoundInput = 0x1C,
961 PortConnectorTypeMiniCentronicsType14 = 0x1D,
962 PortConnectorTypeMiniCentronicsType26 = 0x1E,
963 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
964 PortConnectorTypeBNC = 0x20,
965 PortConnectorType1394 = 0x21,
966 PortConnectorTypeSasSata = 0x22,
967 PortConnectorTypePC98 = 0xA0,
968 PortConnectorTypePC98Hireso = 0xA1,
969 PortConnectorTypePCH98 = 0xA2,
970 PortConnectorTypePC98Note = 0xA3,
971 PortConnectorTypePC98Full = 0xA4,
972 PortConnectorTypeOther = 0xFF
973 } MISC_PORT_CONNECTOR_TYPE;
974
975 ///
976 /// Port Connector Information - Port Types
977 ///
978 typedef enum {
979 PortTypeNone = 0x00,
980 PortTypeParallelXtAtCompatible = 0x01,
981 PortTypeParallelPortPs2 = 0x02,
982 PortTypeParallelPortEcp = 0x03,
983 PortTypeParallelPortEpp = 0x04,
984 PortTypeParallelPortEcpEpp = 0x05,
985 PortTypeSerialXtAtCompatible = 0x06,
986 PortTypeSerial16450Compatible = 0x07,
987 PortTypeSerial16550Compatible = 0x08,
988 PortTypeSerial16550ACompatible = 0x09,
989 PortTypeScsi = 0x0A,
990 PortTypeMidi = 0x0B,
991 PortTypeJoyStick = 0x0C,
992 PortTypeKeyboard = 0x0D,
993 PortTypeMouse = 0x0E,
994 PortTypeSsaScsi = 0x0F,
995 PortTypeUsb = 0x10,
996 PortTypeFireWire = 0x11,
997 PortTypePcmciaTypeI = 0x12,
998 PortTypePcmciaTypeII = 0x13,
999 PortTypePcmciaTypeIII = 0x14,
1000 PortTypeCardBus = 0x15,
1001 PortTypeAccessBusPort = 0x16,
1002 PortTypeScsiII = 0x17,
1003 PortTypeScsiWide = 0x18,
1004 PortTypePC98 = 0x19,
1005 PortTypePC98Hireso = 0x1A,
1006 PortTypePCH98 = 0x1B,
1007 PortTypeVideoPort = 0x1C,
1008 PortTypeAudioPort = 0x1D,
1009 PortTypeModemPort = 0x1E,
1010 PortTypeNetworkPort = 0x1F,
1011 PortType8251Compatible = 0xA0,
1012 PortType8251FifoCompatible = 0xA1,
1013 PortTypeOther = 0xFF
1014 } MISC_PORT_TYPE;
1015
1016 ///
1017 /// Port Connector Information (Type 8).
1018 ///
1019 /// The information in this structure defines the attributes of a system port connector,
1020 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1021 /// are provided. One structure is present for each port provided by the system.
1022 ///
1023 typedef struct {
1024 SMBIOS_STRUCTURE Hdr;
1025 SMBIOS_TABLE_STRING InternalReferenceDesignator;
1026 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1027 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1028 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1029 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1030 } SMBIOS_TABLE_TYPE8;
1031
1032 ///
1033 /// System Slots - Slot Type
1034 ///
1035 typedef enum {
1036 SlotTypeOther = 0x01,
1037 SlotTypeUnknown = 0x02,
1038 SlotTypeIsa = 0x03,
1039 SlotTypeMca = 0x04,
1040 SlotTypeEisa = 0x05,
1041 SlotTypePci = 0x06,
1042 SlotTypePcmcia = 0x07,
1043 SlotTypeVlVesa = 0x08,
1044 SlotTypeProprietary = 0x09,
1045 SlotTypeProcessorCardSlot = 0x0A,
1046 SlotTypeProprietaryMemoryCardSlot = 0x0B,
1047 SlotTypeIORiserCardSlot = 0x0C,
1048 SlotTypeNuBus = 0x0D,
1049 SlotTypePci66MhzCapable = 0x0E,
1050 SlotTypeAgp = 0x0F,
1051 SlotTypeApg2X = 0x10,
1052 SlotTypeAgp4X = 0x11,
1053 SlotTypePciX = 0x12,
1054 SlotTypeAgp4x = 0x13,
1055 SlotTypePC98C20 = 0xA0,
1056 SlotTypePC98C24 = 0xA1,
1057 SlotTypePC98E = 0xA2,
1058 SlotTypePC98LocalBus = 0xA3,
1059 SlotTypePC98Card = 0xA4,
1060 SlotTypePciExpress = 0xA5,
1061 SlotTypePciExpressX1 = 0xA6,
1062 SlotTypePciExpressX2 = 0xA7,
1063 SlotTypePciExpressX4 = 0xA8,
1064 SlotTypePciExpressX8 = 0xA9,
1065 SlotTypePciExpressX16 = 0xAA,
1066 SlotTypePciExpressGen2 = 0xAB,
1067 SlotTypePciExpressGen2X1 = 0xAC,
1068 SlotTypePciExpressGen2X2 = 0xAD,
1069 SlotTypePciExpressGen2X4 = 0xAE,
1070 SlotTypePciExpressGen2X8 = 0xAF,
1071 SlotTypePciExpressGen2X16 = 0xB0,
1072 SlotTypePciExpressGen3 = 0xB1,
1073 SlotTypePciExpressGen3X1 = 0xB2,
1074 SlotTypePciExpressGen3X2 = 0xB3,
1075 SlotTypePciExpressGen3X4 = 0xB4,
1076 SlotTypePciExpressGen3X8 = 0xB5,
1077 SlotTypePciExpressGen3X16 = 0xB6
1078 } MISC_SLOT_TYPE;
1079
1080 ///
1081 /// System Slots - Slot Data Bus Width.
1082 ///
1083 typedef enum {
1084 SlotDataBusWidthOther = 0x01,
1085 SlotDataBusWidthUnknown = 0x02,
1086 SlotDataBusWidth8Bit = 0x03,
1087 SlotDataBusWidth16Bit = 0x04,
1088 SlotDataBusWidth32Bit = 0x05,
1089 SlotDataBusWidth64Bit = 0x06,
1090 SlotDataBusWidth128Bit = 0x07,
1091 SlotDataBusWidth1X = 0x08, ///< Or X1
1092 SlotDataBusWidth2X = 0x09, ///< Or X2
1093 SlotDataBusWidth4X = 0x0A, ///< Or X4
1094 SlotDataBusWidth8X = 0x0B, ///< Or X8
1095 SlotDataBusWidth12X = 0x0C, ///< Or X12
1096 SlotDataBusWidth16X = 0x0D, ///< Or X16
1097 SlotDataBusWidth32X = 0x0E ///< Or X32
1098 } MISC_SLOT_DATA_BUS_WIDTH;
1099
1100 ///
1101 /// System Slots - Current Usage.
1102 ///
1103 typedef enum {
1104 SlotUsageOther = 0x01,
1105 SlotUsageUnknown = 0x02,
1106 SlotUsageAvailable = 0x03,
1107 SlotUsageInUse = 0x04
1108 } MISC_SLOT_USAGE;
1109
1110 ///
1111 /// System Slots - Slot Length.
1112 ///
1113 typedef enum {
1114 SlotLengthOther = 0x01,
1115 SlotLengthUnknown = 0x02,
1116 SlotLengthShort = 0x03,
1117 SlotLengthLong = 0x04
1118 } MISC_SLOT_LENGTH;
1119
1120 ///
1121 /// System Slots - Slot Characteristics 1.
1122 ///
1123 typedef struct {
1124 UINT8 CharacteristicsUnknown :1;
1125 UINT8 Provides50Volts :1;
1126 UINT8 Provides33Volts :1;
1127 UINT8 SharedSlot :1;
1128 UINT8 PcCard16Supported :1;
1129 UINT8 CardBusSupported :1;
1130 UINT8 ZoomVideoSupported :1;
1131 UINT8 ModemRingResumeSupported:1;
1132 } MISC_SLOT_CHARACTERISTICS1;
1133 ///
1134 /// System Slots - Slot Characteristics 2.
1135 ///
1136 typedef struct {
1137 UINT8 PmeSignalSupported :1;
1138 UINT8 HotPlugDevicesSupported :1;
1139 UINT8 SmbusSignalSupported :1;
1140 UINT8 Reserved :5; ///< Set to 0.
1141 } MISC_SLOT_CHARACTERISTICS2;
1142
1143 ///
1144 /// System Slots (Type 9)
1145 ///
1146 /// The information in this structure defines the attributes of a system slot.
1147 /// One structure is provided for each slot in the system.
1148 ///
1149 ///
1150 typedef struct {
1151 SMBIOS_STRUCTURE Hdr;
1152 SMBIOS_TABLE_STRING SlotDesignation;
1153 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1154 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1155 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1156 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1157 UINT16 SlotID;
1158 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1159 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1160 //
1161 // Add for smbios 2.6
1162 //
1163 UINT16 SegmentGroupNum;
1164 UINT8 BusNum;
1165 UINT8 DevFuncNum;
1166 } SMBIOS_TABLE_TYPE9;
1167
1168 ///
1169 /// On Board Devices Information - Device Types.
1170 ///
1171 typedef enum {
1172 OnBoardDeviceTypeOther = 0x01,
1173 OnBoardDeviceTypeUnknown = 0x02,
1174 OnBoardDeviceTypeVideo = 0x03,
1175 OnBoardDeviceTypeScsiController = 0x04,
1176 OnBoardDeviceTypeEthernet = 0x05,
1177 OnBoardDeviceTypeTokenRing = 0x06,
1178 OnBoardDeviceTypeSound = 0x07,
1179 OnBoardDeviceTypePATAController = 0x08,
1180 OnBoardDeviceTypeSATAController = 0x09,
1181 OnBoardDeviceTypeSASController = 0x0A
1182 } MISC_ONBOARD_DEVICE_TYPE;
1183
1184 ///
1185 /// Device Item Entry
1186 ///
1187 typedef struct {
1188 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1189 ///< Bit 7 - 1 : device enabled, 0 : device disabled.
1190 SMBIOS_TABLE_STRING DescriptionString;
1191 } DEVICE_STRUCT;
1192
1193 ///
1194 /// On Board Devices Information (Type 10, obsolete).
1195 ///
1196 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1197 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1198 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1199 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1200 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1201 /// has some level of control over the enabling of the associated device for use by the system.
1202 ///
1203 typedef struct {
1204 SMBIOS_STRUCTURE Hdr;
1205 DEVICE_STRUCT Device[1];
1206 } SMBIOS_TABLE_TYPE10;
1207
1208 ///
1209 /// OEM Strings (Type 11).
1210 /// This structure contains free form strings defined by the OEM. Examples of this are:
1211 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1212 ///
1213 typedef struct {
1214 SMBIOS_STRUCTURE Hdr;
1215 UINT8 StringCount;
1216 } SMBIOS_TABLE_TYPE11;
1217
1218 ///
1219 /// System Configuration Options (Type 12).
1220 ///
1221 /// This structure contains information required to configure the base board's Jumpers and Switches.
1222 ///
1223 typedef struct {
1224 SMBIOS_STRUCTURE Hdr;
1225 UINT8 StringCount;
1226 } SMBIOS_TABLE_TYPE12;
1227
1228
1229 ///
1230 /// BIOS Language Information (Type 13).
1231 ///
1232 /// The information in this structure defines the installable language attributes of the BIOS.
1233 ///
1234 typedef struct {
1235 SMBIOS_STRUCTURE Hdr;
1236 UINT8 InstallableLanguages;
1237 UINT8 Flags;
1238 UINT8 Reserved[15];
1239 SMBIOS_TABLE_STRING CurrentLanguages;
1240 } SMBIOS_TABLE_TYPE13;
1241
1242 ///
1243 /// Group Item Entry
1244 ///
1245 typedef struct {
1246 UINT8 ItemType;
1247 UINT16 ItemHandle;
1248 } GROUP_STRUCT;
1249
1250 ///
1251 /// Group Associations (Type 14).
1252 ///
1253 /// The Group Associations structure is provided for OEMs who want to specify
1254 /// the arrangement or hierarchy of certain components (including other Group Associations)
1255 /// within the system.
1256 ///
1257 typedef struct {
1258 SMBIOS_STRUCTURE Hdr;
1259 SMBIOS_TABLE_STRING GroupName;
1260 GROUP_STRUCT Group[1];
1261 } SMBIOS_TABLE_TYPE14;
1262
1263 ///
1264 /// System Event Log - Event Log Types.
1265 ///
1266 typedef enum {
1267 EventLogTypeReserved = 0x00,
1268 EventLogTypeSingleBitECC = 0x01,
1269 EventLogTypeMultiBitECC = 0x02,
1270 EventLogTypeParityMemErr = 0x03,
1271 EventLogTypeBusTimeOut = 0x04,
1272 EventLogTypeIOChannelCheck = 0x05,
1273 EventLogTypeSoftwareNMI = 0x06,
1274 EventLogTypePOSTMemResize = 0x07,
1275 EventLogTypePOSTErr = 0x08,
1276 EventLogTypePCIParityErr = 0x09,
1277 EventLogTypePCISystemErr = 0x0A,
1278 EventLogTypeCPUFailure = 0x0B,
1279 EventLogTypeEISATimeOut = 0x0C,
1280 EventLogTypeMemLogDisabled = 0x0D,
1281 EventLogTypeLoggingDisabled = 0x0E,
1282 EventLogTypeSysLimitExce = 0x10,
1283 EventLogTypeAsyncHWTimer = 0x11,
1284 EventLogTypeSysConfigInfo = 0x12,
1285 EventLogTypeHDInfo = 0x13,
1286 EventLogTypeSysReconfig = 0x14,
1287 EventLogTypeUncorrectCPUErr = 0x15,
1288 EventLogTypeAreaResetAndClr = 0x16,
1289 EventLogTypeSystemBoot = 0x17,
1290 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1291 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1292 EventLogTypeEndOfLog = 0xFF
1293 } EVENT_LOG_TYPE_DATA;
1294
1295 ///
1296 /// System Event Log - Variable Data Format Types.
1297 ///
1298 typedef enum {
1299 EventLogVariableNone = 0x00,
1300 EventLogVariableHandle = 0x01,
1301 EventLogVariableMutilEvent = 0x02,
1302 EventLogVariableMutilEventHandle = 0x03,
1303 EventLogVariablePOSTResultBitmap = 0x04,
1304 EventLogVariableSysManagementType = 0x05,
1305 EventLogVariableMutliEventSysManagmentType = 0x06,
1306 EventLogVariableUnused = 0x07,
1307 EventLogVariableOEMAssigned = 0x80
1308 } EVENT_LOG_VARIABLE_DATA;
1309
1310 ///
1311 /// Event Log Type Descriptors
1312 ///
1313 typedef struct {
1314 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1315 UINT8 DataFormatType;
1316 } EVENT_LOG_TYPE;
1317
1318 ///
1319 /// System Event Log (Type 15).
1320 ///
1321 /// The presence of this structure within the SMBIOS data returned for a system indicates
1322 /// that the system supports an event log. An event log is a fixed-length area within a
1323 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1324 /// record, followed by one or more variable-length log records.
1325 ///
1326 typedef struct {
1327 SMBIOS_STRUCTURE Hdr;
1328 UINT16 LogAreaLength;
1329 UINT16 LogHeaderStartOffset;
1330 UINT16 LogDataStartOffset;
1331 UINT8 AccessMethod;
1332 UINT8 LogStatus;
1333 UINT32 LogChangeToken;
1334 UINT32 AccessMethodAddress;
1335 UINT8 LogHeaderFormat;
1336 UINT8 NumberOfSupportedLogTypeDescriptors;
1337 UINT8 LengthOfLogTypeDescriptor;
1338 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1339 } SMBIOS_TABLE_TYPE15;
1340
1341 ///
1342 /// Physical Memory Array - Location.
1343 ///
1344 typedef enum {
1345 MemoryArrayLocationOther = 0x01,
1346 MemoryArrayLocationUnknown = 0x02,
1347 MemoryArrayLocationSystemBoard = 0x03,
1348 MemoryArrayLocationIsaAddonCard = 0x04,
1349 MemoryArrayLocationEisaAddonCard = 0x05,
1350 MemoryArrayLocationPciAddonCard = 0x06,
1351 MemoryArrayLocationMcaAddonCard = 0x07,
1352 MemoryArrayLocationPcmciaAddonCard = 0x08,
1353 MemoryArrayLocationProprietaryAddonCard = 0x09,
1354 MemoryArrayLocationNuBus = 0x0A,
1355 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1356 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1357 MemoryArrayLocationPc98EAddonCard = 0xA2,
1358 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3
1359 } MEMORY_ARRAY_LOCATION;
1360
1361 ///
1362 /// Physical Memory Array - Use.
1363 ///
1364 typedef enum {
1365 MemoryArrayUseOther = 0x01,
1366 MemoryArrayUseUnknown = 0x02,
1367 MemoryArrayUseSystemMemory = 0x03,
1368 MemoryArrayUseVideoMemory = 0x04,
1369 MemoryArrayUseFlashMemory = 0x05,
1370 MemoryArrayUseNonVolatileRam = 0x06,
1371 MemoryArrayUseCacheMemory = 0x07
1372 } MEMORY_ARRAY_USE;
1373
1374 ///
1375 /// Physical Memory Array - Error Correction Types.
1376 ///
1377 typedef enum {
1378 MemoryErrorCorrectionOther = 0x01,
1379 MemoryErrorCorrectionUnknown = 0x02,
1380 MemoryErrorCorrectionNone = 0x03,
1381 MemoryErrorCorrectionParity = 0x04,
1382 MemoryErrorCorrectionSingleBitEcc = 0x05,
1383 MemoryErrorCorrectionMultiBitEcc = 0x06,
1384 MemoryErrorCorrectionCrc = 0x07
1385 } MEMORY_ERROR_CORRECTION;
1386
1387 ///
1388 /// Physical Memory Array (Type 16).
1389 ///
1390 /// This structure describes a collection of memory devices that operate
1391 /// together to form a memory address space.
1392 ///
1393 typedef struct {
1394 SMBIOS_STRUCTURE Hdr;
1395 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1396 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1397 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1398 UINT32 MaximumCapacity;
1399 UINT16 MemoryErrorInformationHandle;
1400 UINT16 NumberOfMemoryDevices;
1401 //
1402 // Add for smbios 2.7
1403 //
1404 UINT64 ExtendedMaximumCapacity;
1405 } SMBIOS_TABLE_TYPE16;
1406
1407 ///
1408 /// Memory Device - Form Factor.
1409 ///
1410 typedef enum {
1411 MemoryFormFactorOther = 0x01,
1412 MemoryFormFactorUnknown = 0x02,
1413 MemoryFormFactorSimm = 0x03,
1414 MemoryFormFactorSip = 0x04,
1415 MemoryFormFactorChip = 0x05,
1416 MemoryFormFactorDip = 0x06,
1417 MemoryFormFactorZip = 0x07,
1418 MemoryFormFactorProprietaryCard = 0x08,
1419 MemoryFormFactorDimm = 0x09,
1420 MemoryFormFactorTsop = 0x0A,
1421 MemoryFormFactorRowOfChips = 0x0B,
1422 MemoryFormFactorRimm = 0x0C,
1423 MemoryFormFactorSodimm = 0x0D,
1424 MemoryFormFactorSrimm = 0x0E,
1425 MemoryFormFactorFbDimm = 0x0F
1426 } MEMORY_FORM_FACTOR;
1427
1428 ///
1429 /// Memory Device - Type
1430 ///
1431 typedef enum {
1432 MemoryTypeOther = 0x01,
1433 MemoryTypeUnknown = 0x02,
1434 MemoryTypeDram = 0x03,
1435 MemoryTypeEdram = 0x04,
1436 MemoryTypeVram = 0x05,
1437 MemoryTypeSram = 0x06,
1438 MemoryTypeRam = 0x07,
1439 MemoryTypeRom = 0x08,
1440 MemoryTypeFlash = 0x09,
1441 MemoryTypeEeprom = 0x0A,
1442 MemoryTypeFeprom = 0x0B,
1443 MemoryTypeEprom = 0x0C,
1444 MemoryTypeCdram = 0x0D,
1445 MemoryType3Dram = 0x0E,
1446 MemoryTypeSdram = 0x0F,
1447 MemoryTypeSgram = 0x10,
1448 MemoryTypeRdram = 0x11,
1449 MemoryTypeDdr = 0x12,
1450 MemoryTypeDdr2 = 0x13,
1451 MemoryTypeDdr2FbDimm = 0x14,
1452 MemoryTypeDdr3 = 0x18,
1453 MemoryTypeFbd2 = 0x19
1454 } MEMORY_DEVICE_TYPE;
1455
1456 typedef struct {
1457 UINT16 Reserved :1;
1458 UINT16 Other :1;
1459 UINT16 Unknown :1;
1460 UINT16 FastPaged :1;
1461 UINT16 StaticColumn :1;
1462 UINT16 PseudoStatic :1;
1463 UINT16 Rambus :1;
1464 UINT16 Synchronous :1;
1465 UINT16 Cmos :1;
1466 UINT16 Edo :1;
1467 UINT16 WindowDram :1;
1468 UINT16 CacheDram :1;
1469 UINT16 Nonvolatile :1;
1470 UINT16 Registered :1;
1471 UINT16 Unbuffered :1;
1472 UINT16 Reserved1 :1;
1473 } MEMORY_DEVICE_TYPE_DETAIL;
1474
1475 ///
1476 /// Memory Device (Type 17).
1477 ///
1478 /// This structure describes a single memory device that is part of
1479 /// a larger Physical Memory Array (Type 16).
1480 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1481 /// includes a Memory Device structure instance for each slot, whether or not the
1482 /// socket is currently populated.
1483 ///
1484 typedef struct {
1485 SMBIOS_STRUCTURE Hdr;
1486 UINT16 MemoryArrayHandle;
1487 UINT16 MemoryErrorInformationHandle;
1488 UINT16 TotalWidth;
1489 UINT16 DataWidth;
1490 UINT16 Size;
1491 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1492 UINT8 DeviceSet;
1493 SMBIOS_TABLE_STRING DeviceLocator;
1494 SMBIOS_TABLE_STRING BankLocator;
1495 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1496 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1497 UINT16 Speed;
1498 SMBIOS_TABLE_STRING Manufacturer;
1499 SMBIOS_TABLE_STRING SerialNumber;
1500 SMBIOS_TABLE_STRING AssetTag;
1501 SMBIOS_TABLE_STRING PartNumber;
1502 //
1503 // Add for smbios 2.6
1504 //
1505 UINT8 Attributes;
1506 //
1507 // Add for smbios 2.7
1508 //
1509 UINT32 ExtendedSize;
1510 UINT16 ConfiguredMemoryClockSpeed;
1511 } SMBIOS_TABLE_TYPE17;
1512
1513 ///
1514 /// 32-bit Memory Error Information - Error Type.
1515 ///
1516 typedef enum {
1517 MemoryErrorOther = 0x01,
1518 MemoryErrorUnknown = 0x02,
1519 MemoryErrorOk = 0x03,
1520 MemoryErrorBadRead = 0x04,
1521 MemoryErrorParity = 0x05,
1522 MemoryErrorSigleBit = 0x06,
1523 MemoryErrorDoubleBit = 0x07,
1524 MemoryErrorMultiBit = 0x08,
1525 MemoryErrorNibble = 0x09,
1526 MemoryErrorChecksum = 0x0A,
1527 MemoryErrorCrc = 0x0B,
1528 MemoryErrorCorrectSingleBit = 0x0C,
1529 MemoryErrorCorrected = 0x0D,
1530 MemoryErrorUnCorrectable = 0x0E
1531 } MEMORY_ERROR_TYPE;
1532
1533 ///
1534 /// 32-bit Memory Error Information - Error Granularity.
1535 ///
1536 typedef enum {
1537 MemoryGranularityOther = 0x01,
1538 MemoryGranularityOtherUnknown = 0x02,
1539 MemoryGranularityDeviceLevel = 0x03,
1540 MemoryGranularityMemPartitionLevel = 0x04
1541 } MEMORY_ERROR_GRANULARITY;
1542
1543 ///
1544 /// 32-bit Memory Error Information - Error Operation.
1545 ///
1546 typedef enum {
1547 MemoryErrorOperationOther = 0x01,
1548 MemoryErrorOperationUnknown = 0x02,
1549 MemoryErrorOperationRead = 0x03,
1550 MemoryErrorOperationWrite = 0x04,
1551 MemoryErrorOperationPartialWrite = 0x05
1552 } MEMORY_ERROR_OPERATION;
1553
1554 ///
1555 /// 32-bit Memory Error Information (Type 18).
1556 ///
1557 /// This structure identifies the specifics of an error that might be detected
1558 /// within a Physical Memory Array.
1559 ///
1560 typedef struct {
1561 SMBIOS_STRUCTURE Hdr;
1562 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1563 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1564 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1565 UINT32 VendorSyndrome;
1566 UINT32 MemoryArrayErrorAddress;
1567 UINT32 DeviceErrorAddress;
1568 UINT32 ErrorResolution;
1569 } SMBIOS_TABLE_TYPE18;
1570
1571 ///
1572 /// Memory Array Mapped Address (Type 19).
1573 ///
1574 /// This structure provides the address mapping for a Physical Memory Array.
1575 /// One structure is present for each contiguous address range described.
1576 ///
1577 typedef struct {
1578 SMBIOS_STRUCTURE Hdr;
1579 UINT32 StartingAddress;
1580 UINT32 EndingAddress;
1581 UINT16 MemoryArrayHandle;
1582 UINT8 PartitionWidth;
1583 //
1584 // Add for smbios 2.7
1585 //
1586 UINT64 ExtendedStartingAddress;
1587 UINT64 ExtendedEndingAddress;
1588 } SMBIOS_TABLE_TYPE19;
1589
1590 ///
1591 /// Memory Device Mapped Address (Type 20).
1592 ///
1593 /// This structure maps memory address space usually to a device-level granularity.
1594 /// One structure is present for each contiguous address range described.
1595 ///
1596 typedef struct {
1597 SMBIOS_STRUCTURE Hdr;
1598 UINT32 StartingAddress;
1599 UINT32 EndingAddress;
1600 UINT16 MemoryDeviceHandle;
1601 UINT16 MemoryArrayMappedAddressHandle;
1602 UINT8 PartitionRowPosition;
1603 UINT8 InterleavePosition;
1604 UINT8 InterleavedDataDepth;
1605 //
1606 // Add for smbios 2.7
1607 //
1608 UINT64 ExtendedStartingAddress;
1609 UINT64 ExtendedEndingAddress;
1610 } SMBIOS_TABLE_TYPE20;
1611
1612 ///
1613 /// Built-in Pointing Device - Type
1614 ///
1615 typedef enum {
1616 PointingDeviceTypeOther = 0x01,
1617 PointingDeviceTypeUnknown = 0x02,
1618 PointingDeviceTypeMouse = 0x03,
1619 PointingDeviceTypeTrackBall = 0x04,
1620 PointingDeviceTypeTrackPoint = 0x05,
1621 PointingDeviceTypeGlidePoint = 0x06,
1622 PointingDeviceTouchPad = 0x07,
1623 PointingDeviceTouchScreen = 0x08,
1624 PointingDeviceOpticalSensor = 0x09
1625 } BUILTIN_POINTING_DEVICE_TYPE;
1626
1627 ///
1628 /// Built-in Pointing Device - Interface.
1629 ///
1630 typedef enum {
1631 PointingDeviceInterfaceOther = 0x01,
1632 PointingDeviceInterfaceUnknown = 0x02,
1633 PointingDeviceInterfaceSerial = 0x03,
1634 PointingDeviceInterfacePs2 = 0x04,
1635 PointingDeviceInterfaceInfrared = 0x05,
1636 PointingDeviceInterfaceHpHil = 0x06,
1637 PointingDeviceInterfaceBusMouse = 0x07,
1638 PointingDeviceInterfaceADB = 0x08,
1639 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1640 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1641 PointingDeviceInterfaceUsb = 0xA2
1642 } BUILTIN_POINTING_DEVICE_INTERFACE;
1643
1644 ///
1645 /// Built-in Pointing Device (Type 21).
1646 ///
1647 /// This structure describes the attributes of the built-in pointing device for the
1648 /// system. The presence of this structure does not imply that the built-in
1649 /// pointing device is active for the system's use!
1650 ///
1651 typedef struct {
1652 SMBIOS_STRUCTURE Hdr;
1653 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
1654 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
1655 UINT8 NumberOfButtons;
1656 } SMBIOS_TABLE_TYPE21;
1657
1658 ///
1659 /// Portable Battery - Device Chemistry
1660 ///
1661 typedef enum {
1662 PortableBatteryDeviceChemistryOther = 0x01,
1663 PortableBatteryDeviceChemistryUnknown = 0x02,
1664 PortableBatteryDeviceChemistryLeadAcid = 0x03,
1665 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
1666 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
1667 PortableBatteryDeviceChemistryLithiumIon = 0x06,
1668 PortableBatteryDeviceChemistryZincAir = 0x07,
1669 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
1670 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
1671
1672 ///
1673 /// Portable Battery (Type 22).
1674 ///
1675 /// This structure describes the attributes of the portable battery(s) for the system.
1676 /// The structure contains the static attributes for the group. Each structure describes
1677 /// a single battery pack's attributes.
1678 ///
1679 typedef struct {
1680 SMBIOS_STRUCTURE Hdr;
1681 SMBIOS_TABLE_STRING Location;
1682 SMBIOS_TABLE_STRING Manufacturer;
1683 SMBIOS_TABLE_STRING ManufactureDate;
1684 SMBIOS_TABLE_STRING SerialNumber;
1685 SMBIOS_TABLE_STRING DeviceName;
1686 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
1687 UINT16 DeviceCapacity;
1688 UINT16 DesignVoltage;
1689 SMBIOS_TABLE_STRING SBDSVersionNumber;
1690 UINT8 MaximumErrorInBatteryData;
1691 UINT16 SBDSSerialNumber;
1692 UINT16 SBDSManufactureDate;
1693 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
1694 UINT8 DesignCapacityMultiplier;
1695 UINT32 OEMSpecific;
1696 } SMBIOS_TABLE_TYPE22;
1697
1698 ///
1699 /// System Reset (Type 23)
1700 ///
1701 /// This structure describes whether Automatic System Reset functions enabled (Status).
1702 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
1703 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
1704 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
1705 /// the system will re-boot according to the Boot Option at Limit.
1706 ///
1707 typedef struct {
1708 SMBIOS_STRUCTURE Hdr;
1709 UINT8 Capabilities;
1710 UINT16 ResetCount;
1711 UINT16 ResetLimit;
1712 UINT16 TimerInterval;
1713 UINT16 Timeout;
1714 } SMBIOS_TABLE_TYPE23;
1715
1716 ///
1717 /// Hardware Security (Type 24).
1718 ///
1719 /// This structure describes the system-wide hardware security settings.
1720 ///
1721 typedef struct {
1722 SMBIOS_STRUCTURE Hdr;
1723 UINT8 HardwareSecuritySettings;
1724 } SMBIOS_TABLE_TYPE24;
1725
1726 ///
1727 /// System Power Controls (Type 25).
1728 ///
1729 /// This structure describes the attributes for controlling the main power supply to the system.
1730 /// Software that interprets this structure uses the month, day, hour, minute, and second values
1731 /// to determine the number of seconds until the next power-on of the system. The presence of
1732 /// this structure implies that a timed power-on facility is available for the system.
1733 ///
1734 typedef struct {
1735 SMBIOS_STRUCTURE Hdr;
1736 UINT8 NextScheduledPowerOnMonth;
1737 UINT8 NextScheduledPowerOnDayOfMonth;
1738 UINT8 NextScheduledPowerOnHour;
1739 UINT8 NextScheduledPowerOnMinute;
1740 UINT8 NextScheduledPowerOnSecond;
1741 } SMBIOS_TABLE_TYPE25;
1742
1743 ///
1744 /// Voltage Probe - Location and Status.
1745 ///
1746 typedef struct {
1747 UINT8 VoltageProbeSite :5;
1748 UINT8 VoltageProbeStatus :3;
1749 } MISC_VOLTAGE_PROBE_LOCATION;
1750
1751 ///
1752 /// Voltage Probe (Type 26)
1753 ///
1754 /// This describes the attributes for a voltage probe in the system.
1755 /// Each structure describes a single voltage probe.
1756 ///
1757 typedef struct {
1758 SMBIOS_STRUCTURE Hdr;
1759 SMBIOS_TABLE_STRING Description;
1760 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
1761 UINT16 MaximumValue;
1762 UINT16 MinimumValue;
1763 UINT16 Resolution;
1764 UINT16 Tolerance;
1765 UINT16 Accuracy;
1766 UINT32 OEMDefined;
1767 UINT16 NominalValue;
1768 } SMBIOS_TABLE_TYPE26;
1769
1770 ///
1771 /// Cooling Device - Device Type and Status.
1772 ///
1773 typedef struct {
1774 UINT8 CoolingDevice :5;
1775 UINT8 CoolingDeviceStatus :3;
1776 } MISC_COOLING_DEVICE_TYPE;
1777
1778 ///
1779 /// Cooling Device (Type 27)
1780 ///
1781 /// This structure describes the attributes for a cooling device in the system.
1782 /// Each structure describes a single cooling device.
1783 ///
1784 typedef struct {
1785 SMBIOS_STRUCTURE Hdr;
1786 UINT16 TemperatureProbeHandle;
1787 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
1788 UINT8 CoolingUnitGroup;
1789 UINT32 OEMDefined;
1790 UINT16 NominalSpeed;
1791 //
1792 // Add for smbios 2.7
1793 //
1794 SMBIOS_TABLE_STRING Description;
1795 } SMBIOS_TABLE_TYPE27;
1796
1797 ///
1798 /// Temperature Probe - Location and Status.
1799 ///
1800 typedef struct {
1801 UINT8 TemperatureProbeSite :5;
1802 UINT8 TemperatureProbeStatus :3;
1803 } MISC_TEMPERATURE_PROBE_LOCATION;
1804
1805 ///
1806 /// Temperature Probe (Type 28).
1807 ///
1808 /// This structure describes the attributes for a temperature probe in the system.
1809 /// Each structure describes a single temperature probe.
1810 ///
1811 typedef struct {
1812 SMBIOS_STRUCTURE Hdr;
1813 SMBIOS_TABLE_STRING Description;
1814 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
1815 UINT16 MaximumValue;
1816 UINT16 MinimumValue;
1817 UINT16 Resolution;
1818 UINT16 Tolerance;
1819 UINT16 Accuracy;
1820 UINT32 OEMDefined;
1821 UINT16 NominalValue;
1822 } SMBIOS_TABLE_TYPE28;
1823
1824 ///
1825 /// Electrical Current Probe - Location and Status.
1826 ///
1827 typedef struct {
1828 UINT8 ElectricalCurrentProbeSite :5;
1829 UINT8 ElectricalCurrentProbeStatus :3;
1830 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
1831
1832 ///
1833 /// Electrical Current Probe (Type 29).
1834 ///
1835 /// This structure describes the attributes for an electrical current probe in the system.
1836 /// Each structure describes a single electrical current probe.
1837 ///
1838 typedef struct {
1839 SMBIOS_STRUCTURE Hdr;
1840 SMBIOS_TABLE_STRING Description;
1841 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
1842 UINT16 MaximumValue;
1843 UINT16 MinimumValue;
1844 UINT16 Resolution;
1845 UINT16 Tolerance;
1846 UINT16 Accuracy;
1847 UINT32 OEMDefined;
1848 UINT16 NominalValue;
1849 } SMBIOS_TABLE_TYPE29;
1850
1851 ///
1852 /// Out-of-Band Remote Access (Type 30).
1853 ///
1854 /// This structure describes the attributes and policy settings of a hardware facility
1855 /// that may be used to gain remote access to a hardware system when the operating system
1856 /// is not available due to power-down status, hardware failures, or boot failures.
1857 ///
1858 typedef struct {
1859 SMBIOS_STRUCTURE Hdr;
1860 SMBIOS_TABLE_STRING ManufacturerName;
1861 UINT8 Connections;
1862 } SMBIOS_TABLE_TYPE30;
1863
1864 ///
1865 /// Boot Integrity Services (BIS) Entry Point (Type 31).
1866 ///
1867 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
1868 ///
1869 typedef struct {
1870 SMBIOS_STRUCTURE Hdr;
1871 UINT8 Checksum;
1872 UINT8 Reserved1;
1873 UINT16 Reserved2;
1874 UINT32 BisEntry16;
1875 UINT32 BisEntry32;
1876 UINT64 Reserved3;
1877 UINT32 Reserved4;
1878 } SMBIOS_TABLE_TYPE31;
1879
1880 ///
1881 /// System Boot Information - System Boot Status.
1882 ///
1883 typedef enum {
1884 BootInformationStatusNoError = 0x00,
1885 BootInformationStatusNoBootableMedia = 0x01,
1886 BootInformationStatusNormalOSFailedLoading = 0x02,
1887 BootInformationStatusFirmwareDetectedFailure = 0x03,
1888 BootInformationStatusOSDetectedFailure = 0x04,
1889 BootInformationStatusUserRequestedBoot = 0x05,
1890 BootInformationStatusSystemSecurityViolation = 0x06,
1891 BootInformationStatusPreviousRequestedImage = 0x07,
1892 BootInformationStatusWatchdogTimerExpired = 0x08,
1893 BootInformationStatusStartReserved = 0x09,
1894 BootInformationStatusStartOemSpecific = 0x80,
1895 BootInformationStatusStartProductSpecific = 0xC0
1896 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
1897
1898 ///
1899 /// System Boot Information (Type 32).
1900 ///
1901 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
1902 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
1903 /// application via this structure. When used in the PXE environment, for example,
1904 /// this code identifies the reason the PXE was initiated and can be used by boot-image
1905 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
1906 /// could choose to automatically download a hardware-diagnostic image to a client whose
1907 /// reason code indicated either a firmware- or operating system-detected hardware failure.
1908 ///
1909 typedef struct {
1910 SMBIOS_STRUCTURE Hdr;
1911 UINT8 Reserved[6];
1912 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
1913 } SMBIOS_TABLE_TYPE32;
1914
1915 ///
1916 /// 64-bit Memory Error Information (Type 33).
1917 ///
1918 /// This structure describes an error within a Physical Memory Array,
1919 /// when the error address is above 4G (0xFFFFFFFF).
1920 ///
1921 typedef struct {
1922 SMBIOS_STRUCTURE Hdr;
1923 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1924 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1925 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1926 UINT32 VendorSyndrome;
1927 UINT64 MemoryArrayErrorAddress;
1928 UINT64 DeviceErrorAddress;
1929 UINT32 ErrorResolution;
1930 } SMBIOS_TABLE_TYPE33;
1931
1932 ///
1933 /// Management Device - Type.
1934 ///
1935 typedef enum {
1936 ManagementDeviceTypeOther = 0x01,
1937 ManagementDeviceTypeUnknown = 0x02,
1938 ManagementDeviceTypeLm75 = 0x03,
1939 ManagementDeviceTypeLm78 = 0x04,
1940 ManagementDeviceTypeLm79 = 0x05,
1941 ManagementDeviceTypeLm80 = 0x06,
1942 ManagementDeviceTypeLm81 = 0x07,
1943 ManagementDeviceTypeAdm9240 = 0x08,
1944 ManagementDeviceTypeDs1780 = 0x09,
1945 ManagementDeviceTypeMaxim1617 = 0x0A,
1946 ManagementDeviceTypeGl518Sm = 0x0B,
1947 ManagementDeviceTypeW83781D = 0x0C,
1948 ManagementDeviceTypeHt82H791 = 0x0D
1949 } MISC_MANAGEMENT_DEVICE_TYPE;
1950
1951 ///
1952 /// Management Device - Address Type.
1953 ///
1954 typedef enum {
1955 ManagementDeviceAddressTypeOther = 0x01,
1956 ManagementDeviceAddressTypeUnknown = 0x02,
1957 ManagementDeviceAddressTypeIOPort = 0x03,
1958 ManagementDeviceAddressTypeMemory = 0x04,
1959 ManagementDeviceAddressTypeSmbus = 0x05
1960 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
1961
1962 ///
1963 /// Management Device (Type 34).
1964 ///
1965 /// The information in this structure defines the attributes of a Management Device.
1966 /// A Management Device might control one or more fans or voltage, current, or temperature
1967 /// probes as defined by one or more Management Device Component structures.
1968 ///
1969 typedef struct {
1970 SMBIOS_STRUCTURE Hdr;
1971 SMBIOS_TABLE_STRING Description;
1972 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
1973 UINT32 Address;
1974 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
1975 } SMBIOS_TABLE_TYPE34;
1976
1977 ///
1978 /// Management Device Component (Type 35)
1979 ///
1980 /// This structure associates a cooling device or environmental probe with structures
1981 /// that define the controlling hardware device and (optionally) the component's thresholds.
1982 ///
1983 typedef struct {
1984 SMBIOS_STRUCTURE Hdr;
1985 SMBIOS_TABLE_STRING Description;
1986 UINT16 ManagementDeviceHandle;
1987 UINT16 ComponentHandle;
1988 UINT16 ThresholdHandle;
1989 } SMBIOS_TABLE_TYPE35;
1990
1991 ///
1992 /// Management Device Threshold Data (Type 36).
1993 ///
1994 /// The information in this structure defines threshold information for
1995 /// a component (probe or cooling-unit) contained within a Management Device.
1996 ///
1997 typedef struct {
1998 SMBIOS_STRUCTURE Hdr;
1999 UINT16 LowerThresholdNonCritical;
2000 UINT16 UpperThresholdNonCritical;
2001 UINT16 LowerThresholdCritical;
2002 UINT16 UpperThresholdCritical;
2003 UINT16 LowerThresholdNonRecoverable;
2004 UINT16 UpperThresholdNonRecoverable;
2005 } SMBIOS_TABLE_TYPE36;
2006
2007 ///
2008 /// Memory Channel Entry.
2009 ///
2010 typedef struct {
2011 UINT8 DeviceLoad;
2012 UINT16 DeviceHandle;
2013 } MEMORY_DEVICE;
2014
2015 ///
2016 /// Memory Channel - Channel Type.
2017 ///
2018 typedef enum {
2019 MemoryChannelTypeOther = 0x01,
2020 MemoryChannelTypeUnknown = 0x02,
2021 MemoryChannelTypeRambus = 0x03,
2022 MemoryChannelTypeSyncLink = 0x04
2023 } MEMORY_CHANNEL_TYPE;
2024
2025 ///
2026 /// Memory Channel (Type 37)
2027 ///
2028 /// The information in this structure provides the correlation between a Memory Channel
2029 /// and its associated Memory Devices. Each device presents one or more loads to the channel.
2030 /// The sum of all device loads cannot exceed the channel's defined maximum.
2031 ///
2032 typedef struct {
2033 SMBIOS_STRUCTURE Hdr;
2034 UINT8 ChannelType;
2035 UINT8 MaximumChannelLoad;
2036 UINT8 MemoryDeviceCount;
2037 MEMORY_DEVICE MemoryDevice[1];
2038 } SMBIOS_TABLE_TYPE37;
2039
2040 ///
2041 /// IPMI Device Information - BMC Interface Type
2042 ///
2043 typedef enum {
2044 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2045 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2046 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2047 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2048 IPMIDeviceInfoInterfaceTypeReserved = 0x04
2049 } BMC_INTERFACE_TYPE;
2050
2051 ///
2052 /// IPMI Device Information (Type 38).
2053 ///
2054 /// The information in this structure defines the attributes of an
2055 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2056 ///
2057 /// The Type 42 structure can also be used to describe a physical management controller
2058 /// host interface and one or more protocols that share that interface. If IPMI is not
2059 /// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2060 /// Providing Type 38 is recommended for backward compatibility.
2061 ///
2062 typedef struct {
2063 SMBIOS_STRUCTURE Hdr;
2064 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2065 UINT8 IPMISpecificationRevision;
2066 UINT8 I2CSlaveAddress;
2067 UINT8 NVStorageDeviceAddress;
2068 UINT64 BaseAddress;
2069 UINT8 BaseAddressModifier_InterruptInfo;
2070 UINT8 InterruptNumber;
2071 } SMBIOS_TABLE_TYPE38;
2072
2073 ///
2074 /// System Power Supply - Power Supply Characteristics.
2075 ///
2076 typedef struct {
2077 UINT16 PowerSupplyHotReplaceable:1;
2078 UINT16 PowerSupplyPresent :1;
2079 UINT16 PowerSupplyUnplugged :1;
2080 UINT16 InputVoltageRangeSwitch :4;
2081 UINT16 PowerSupplyStatus :3;
2082 UINT16 PowerSupplyType :4;
2083 UINT16 Reserved :2;
2084 } SYS_POWER_SUPPLY_CHARACTERISTICS;
2085
2086 ///
2087 /// System Power Supply (Type 39).
2088 ///
2089 /// This structure identifies attributes of a system power supply. One instance
2090 /// of this record is present for each possible power supply in a system.
2091 ///
2092 typedef struct {
2093 SMBIOS_STRUCTURE Hdr;
2094 UINT8 PowerUnitGroup;
2095 SMBIOS_TABLE_STRING Location;
2096 SMBIOS_TABLE_STRING DeviceName;
2097 SMBIOS_TABLE_STRING Manufacturer;
2098 SMBIOS_TABLE_STRING SerialNumber;
2099 SMBIOS_TABLE_STRING AssetTagNumber;
2100 SMBIOS_TABLE_STRING ModelPartNumber;
2101 SMBIOS_TABLE_STRING RevisionLevel;
2102 UINT16 MaxPowerCapacity;
2103 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2104 UINT16 InputVoltageProbeHandle;
2105 UINT16 CoolingDeviceHandle;
2106 UINT16 InputCurrentProbeHandle;
2107 } SMBIOS_TABLE_TYPE39;
2108
2109 ///
2110 /// Additional Information Entry Format.
2111 ///
2112 typedef struct {
2113 UINT8 EntryLength;
2114 UINT16 ReferencedHandle;
2115 UINT8 ReferencedOffset;
2116 SMBIOS_TABLE_STRING EntryString;
2117 UINT8 Value[1];
2118 }ADDITIONAL_INFORMATION_ENTRY;
2119
2120 ///
2121 /// Additional Information (Type 40).
2122 ///
2123 /// This structure is intended to provide additional information for handling unspecified
2124 /// enumerated values and interim field updates in another structure.
2125 ///
2126 typedef struct {
2127 SMBIOS_STRUCTURE Hdr;
2128 UINT8 NumberOfAdditionalInformationEntries;
2129 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2130 } SMBIOS_TABLE_TYPE40;
2131
2132 ///
2133 /// Onboard Devices Extended Information - Onboard Device Types.
2134 ///
2135 typedef enum{
2136 OnBoardDeviceExtendedTypeOther = 0x01,
2137 OnBoardDeviceExtendedTypeUnknown = 0x02,
2138 OnBoardDeviceExtendedTypeVideo = 0x03,
2139 OnBoardDeviceExtendedTypeScsiController = 0x04,
2140 OnBoardDeviceExtendedTypeEthernet = 0x05,
2141 OnBoardDeviceExtendedTypeTokenRing = 0x06,
2142 OnBoardDeviceExtendedTypeSound = 0x07,
2143 OnBoardDeviceExtendedTypePATAController = 0x08,
2144 OnBoardDeviceExtendedTypeSATAController = 0x09,
2145 OnBoardDeviceExtendedTypeSASController = 0x0A
2146 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2147
2148 ///
2149 /// Onboard Devices Extended Information (Type 41).
2150 ///
2151 /// The information in this structure defines the attributes of devices that
2152 /// are onboard (soldered onto) a system element, usually the baseboard.
2153 /// In general, an entry in this table implies that the BIOS has some level of
2154 /// control over the enabling of the associated device for use by the system.
2155 ///
2156 typedef struct {
2157 SMBIOS_STRUCTURE Hdr;
2158 SMBIOS_TABLE_STRING ReferenceDesignation;
2159 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2160 UINT8 DeviceTypeInstance;
2161 UINT16 SegmentGroupNum;
2162 UINT8 BusNum;
2163 UINT8 DevFuncNum;
2164 } SMBIOS_TABLE_TYPE41;
2165
2166 ///
2167 /// Management Controller Host Interface (Type 42).
2168 ///
2169 /// The information in this structure defines the attributes of a Management
2170 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2171 ///
2172 /// Type 42 should be used for management controller host interfaces that use protocols
2173 /// other than IPMI or that use multiple protocols on a single host interface type.
2174 ///
2175 /// This structure should also be provided if IPMI is shared with other protocols
2176 /// over the same interface hardware. If IPMI is not shared with other protocols,
2177 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2178 /// recommended for backward compatibility. The structures are not required to
2179 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2180 /// simultaneously to provide backward compatibility with IPMI applications or drivers
2181 /// that do not yet recognize the Type 42 structure.
2182 ///
2183 typedef struct {
2184 SMBIOS_STRUCTURE Hdr;
2185 UINT8 InterfaceType;
2186 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes
2187 } SMBIOS_TABLE_TYPE42;
2188
2189 ///
2190 /// Inactive (Type 126)
2191 ///
2192 typedef struct {
2193 SMBIOS_STRUCTURE Hdr;
2194 } SMBIOS_TABLE_TYPE126;
2195
2196 ///
2197 /// End-of-Table (Type 127)
2198 ///
2199 typedef struct {
2200 SMBIOS_STRUCTURE Hdr;
2201 } SMBIOS_TABLE_TYPE127;
2202
2203 ///
2204 /// Union of all the possible SMBIOS record types.
2205 ///
2206 typedef union {
2207 SMBIOS_STRUCTURE *Hdr;
2208 SMBIOS_TABLE_TYPE0 *Type0;
2209 SMBIOS_TABLE_TYPE1 *Type1;
2210 SMBIOS_TABLE_TYPE2 *Type2;
2211 SMBIOS_TABLE_TYPE3 *Type3;
2212 SMBIOS_TABLE_TYPE4 *Type4;
2213 SMBIOS_TABLE_TYPE5 *Type5;
2214 SMBIOS_TABLE_TYPE6 *Type6;
2215 SMBIOS_TABLE_TYPE7 *Type7;
2216 SMBIOS_TABLE_TYPE8 *Type8;
2217 SMBIOS_TABLE_TYPE9 *Type9;
2218 SMBIOS_TABLE_TYPE10 *Type10;
2219 SMBIOS_TABLE_TYPE11 *Type11;
2220 SMBIOS_TABLE_TYPE12 *Type12;
2221 SMBIOS_TABLE_TYPE13 *Type13;
2222 SMBIOS_TABLE_TYPE14 *Type14;
2223 SMBIOS_TABLE_TYPE15 *Type15;
2224 SMBIOS_TABLE_TYPE16 *Type16;
2225 SMBIOS_TABLE_TYPE17 *Type17;
2226 SMBIOS_TABLE_TYPE18 *Type18;
2227 SMBIOS_TABLE_TYPE19 *Type19;
2228 SMBIOS_TABLE_TYPE20 *Type20;
2229 SMBIOS_TABLE_TYPE21 *Type21;
2230 SMBIOS_TABLE_TYPE22 *Type22;
2231 SMBIOS_TABLE_TYPE23 *Type23;
2232 SMBIOS_TABLE_TYPE24 *Type24;
2233 SMBIOS_TABLE_TYPE25 *Type25;
2234 SMBIOS_TABLE_TYPE26 *Type26;
2235 SMBIOS_TABLE_TYPE27 *Type27;
2236 SMBIOS_TABLE_TYPE28 *Type28;
2237 SMBIOS_TABLE_TYPE29 *Type29;
2238 SMBIOS_TABLE_TYPE30 *Type30;
2239 SMBIOS_TABLE_TYPE31 *Type31;
2240 SMBIOS_TABLE_TYPE32 *Type32;
2241 SMBIOS_TABLE_TYPE33 *Type33;
2242 SMBIOS_TABLE_TYPE34 *Type34;
2243 SMBIOS_TABLE_TYPE35 *Type35;
2244 SMBIOS_TABLE_TYPE36 *Type36;
2245 SMBIOS_TABLE_TYPE37 *Type37;
2246 SMBIOS_TABLE_TYPE38 *Type38;
2247 SMBIOS_TABLE_TYPE39 *Type39;
2248 SMBIOS_TABLE_TYPE40 *Type40;
2249 SMBIOS_TABLE_TYPE41 *Type41;
2250 SMBIOS_TABLE_TYPE42 *Type42;
2251 SMBIOS_TABLE_TYPE126 *Type126;
2252 SMBIOS_TABLE_TYPE127 *Type127;
2253 UINT8 *Raw;
2254 } SMBIOS_STRUCTURE_POINTER;
2255
2256 #pragma pack()
2257
2258 #endif