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MdePkg: Fix typos in SmBios.h PROCESSOR_CHARACTERISTIC_FLAGS struct
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
1 /** @file
2 Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
3
4 Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
5 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
6 (C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef __SMBIOS_STANDARD_H__
12 #define __SMBIOS_STANDARD_H__
13
14 ///
15 /// Reference SMBIOS 2.6, chapter 3.1.2.
16 /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
17 /// use by this specification.
18 ///
19 #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
20
21 ///
22 /// Reference SMBIOS 2.7, chapter 6.1.2.
23 /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
24 /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
25 /// This number is not used for any other purpose by the SMBIOS specification.
26 ///
27 #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
28
29 ///
30 /// Reference SMBIOS 2.6, chapter 3.1.3.
31 /// Each text string is limited to 64 significant characters due to system MIF limitations.
32 /// Reference SMBIOS 2.7, chapter 6.1.3.
33 /// It will have no limit on the length of each individual text string.
34 ///
35 #define SMBIOS_STRING_MAX_LENGTH 64
36
37 //
38 // The length of the entire structure table (including all strings) must be reported
39 // in the Structure Table Length field of the SMBIOS Structure Table Entry Point,
40 // which is a WORD field limited to 65,535 bytes.
41 //
42 #define SMBIOS_TABLE_MAX_LENGTH 0xFFFF
43
44 //
45 // For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.
46 //
47 #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
48
49 //
50 // SMBIOS type macros which is according to SMBIOS 3.3.0 specification.
51 //
52 #define SMBIOS_TYPE_BIOS_INFORMATION 0
53 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1
54 #define SMBIOS_TYPE_BASEBOARD_INFORMATION 2
55 #define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3
56 #define SMBIOS_TYPE_PROCESSOR_INFORMATION 4
57 #define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5
58 #define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6
59 #define SMBIOS_TYPE_CACHE_INFORMATION 7
60 #define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8
61 #define SMBIOS_TYPE_SYSTEM_SLOTS 9
62 #define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10
63 #define SMBIOS_TYPE_OEM_STRINGS 11
64 #define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12
65 #define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13
66 #define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14
67 #define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15
68 #define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16
69 #define SMBIOS_TYPE_MEMORY_DEVICE 17
70 #define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18
71 #define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19
72 #define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20
73 #define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21
74 #define SMBIOS_TYPE_PORTABLE_BATTERY 22
75 #define SMBIOS_TYPE_SYSTEM_RESET 23
76 #define SMBIOS_TYPE_HARDWARE_SECURITY 24
77 #define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25
78 #define SMBIOS_TYPE_VOLTAGE_PROBE 26
79 #define SMBIOS_TYPE_COOLING_DEVICE 27
80 #define SMBIOS_TYPE_TEMPERATURE_PROBE 28
81 #define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29
82 #define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30
83 #define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31
84 #define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32
85 #define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33
86 #define SMBIOS_TYPE_MANAGEMENT_DEVICE 34
87 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35
88 #define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36
89 #define SMBIOS_TYPE_MEMORY_CHANNEL 37
90 #define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38
91 #define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39
92 #define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40
93 #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41
94 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42
95 #define SMBIOS_TYPE_TPM_DEVICE 43
96 #define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44
97
98 ///
99 /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
100 /// Upper-level software that interprets the SMBIOS structure-table should bypass an
101 /// Inactive structure just like a structure type that the software does not recognize.
102 ///
103 #define SMBIOS_TYPE_INACTIVE 0x007E
104
105 ///
106 /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.
107 /// The end-of-table indicator is used in the last physical structure in a table
108 ///
109 #define SMBIOS_TYPE_END_OF_TABLE 0x007F
110
111 #define SMBIOS_OEM_BEGIN 128
112 #define SMBIOS_OEM_END 255
113
114 ///
115 /// Types 0 through 127 (7Fh) are reserved for and defined by this
116 /// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.
117 ///
118 typedef UINT8 SMBIOS_TYPE;
119
120 ///
121 /// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version
122 /// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS
123 /// Structure function to retrieve a specific structure; the handle numbers are not required to be
124 /// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for
125 /// use by this specification.
126 /// If the system configuration changes, a previously assigned handle might no longer exist.
127 /// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle
128 /// number to another structure.
129 ///
130 typedef UINT16 SMBIOS_HANDLE;
131
132 ///
133 /// Smbios Table Entry Point Structure.
134 ///
135 #pragma pack(1)
136 typedef struct {
137 UINT8 AnchorString[4];
138 UINT8 EntryPointStructureChecksum;
139 UINT8 EntryPointLength;
140 UINT8 MajorVersion;
141 UINT8 MinorVersion;
142 UINT16 MaxStructureSize;
143 UINT8 EntryPointRevision;
144 UINT8 FormattedArea[5];
145 UINT8 IntermediateAnchorString[5];
146 UINT8 IntermediateChecksum;
147 UINT16 TableLength;
148 UINT32 TableAddress;
149 UINT16 NumberOfSmbiosStructures;
150 UINT8 SmbiosBcdRevision;
151 } SMBIOS_TABLE_ENTRY_POINT;
152
153 typedef struct {
154 UINT8 AnchorString[5];
155 UINT8 EntryPointStructureChecksum;
156 UINT8 EntryPointLength;
157 UINT8 MajorVersion;
158 UINT8 MinorVersion;
159 UINT8 DocRev;
160 UINT8 EntryPointRevision;
161 UINT8 Reserved;
162 UINT32 TableMaximumSize;
163 UINT64 TableAddress;
164 } SMBIOS_TABLE_3_0_ENTRY_POINT;
165
166 ///
167 /// The Smbios structure header.
168 ///
169 typedef struct {
170 SMBIOS_TYPE Type;
171 UINT8 Length;
172 SMBIOS_HANDLE Handle;
173 } SMBIOS_STRUCTURE;
174
175 ///
176 /// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after
177 /// the formatted portion of the structure. This method of returning string information eliminates the need for
178 /// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null
179 /// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of
180 /// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's
181 /// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion
182 /// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the
183 /// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string
184 /// references), the formatted section of the structure is followed by two null (00h) BYTES.
185 ///
186 typedef UINT8 SMBIOS_TABLE_STRING;
187
188 ///
189 /// BIOS Characteristics
190 /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
191 ///
192 typedef struct {
193 UINT32 Reserved :2; ///< Bits 0-1.
194 UINT32 Unknown :1;
195 UINT32 BiosCharacteristicsNotSupported :1;
196 UINT32 IsaIsSupported :1;
197 UINT32 McaIsSupported :1;
198 UINT32 EisaIsSupported :1;
199 UINT32 PciIsSupported :1;
200 UINT32 PcmciaIsSupported :1;
201 UINT32 PlugAndPlayIsSupported :1;
202 UINT32 ApmIsSupported :1;
203 UINT32 BiosIsUpgradable :1;
204 UINT32 BiosShadowingAllowed :1;
205 UINT32 VlVesaIsSupported :1;
206 UINT32 EscdSupportIsAvailable :1;
207 UINT32 BootFromCdIsSupported :1;
208 UINT32 SelectableBootIsSupported :1;
209 UINT32 RomBiosIsSocketed :1;
210 UINT32 BootFromPcmciaIsSupported :1;
211 UINT32 EDDSpecificationIsSupported :1;
212 UINT32 JapaneseNecFloppyIsSupported :1;
213 UINT32 JapaneseToshibaFloppyIsSupported :1;
214 UINT32 Floppy525_360IsSupported :1;
215 UINT32 Floppy525_12IsSupported :1;
216 UINT32 Floppy35_720IsSupported :1;
217 UINT32 Floppy35_288IsSupported :1;
218 UINT32 PrintScreenIsSupported :1;
219 UINT32 Keyboard8042IsSupported :1;
220 UINT32 SerialIsSupported :1;
221 UINT32 PrinterIsSupported :1;
222 UINT32 CgaMonoIsSupported :1;
223 UINT32 NecPc98 :1;
224 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor
225 ///< and bits 48-63 reserved for System Vendor.
226 } MISC_BIOS_CHARACTERISTICS;
227
228 ///
229 /// BIOS Characteristics Extension Byte 1.
230 /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
231 /// within the BIOS Information structure.
232 ///
233 typedef struct {
234 UINT8 AcpiIsSupported :1;
235 UINT8 UsbLegacyIsSupported :1;
236 UINT8 AgpIsSupported :1;
237 UINT8 I2OBootIsSupported :1;
238 UINT8 Ls120BootIsSupported :1;
239 UINT8 AtapiZipDriveBootIsSupported :1;
240 UINT8 Boot1394IsSupported :1;
241 UINT8 SmartBatteryIsSupported :1;
242 } MBCE_BIOS_RESERVED;
243
244 ///
245 /// BIOS Characteristics Extension Byte 2.
246 /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
247 /// within the BIOS Information structure.
248 ///
249 typedef struct {
250 UINT8 BiosBootSpecIsSupported :1;
251 UINT8 FunctionKeyNetworkBootIsSupported :1;
252 UINT8 TargetContentDistributionEnabled :1;
253 UINT8 UefiSpecificationSupported :1;
254 UINT8 VirtualMachineSupported :1;
255 UINT8 ExtensionByte2Reserved :3;
256 } MBCE_SYSTEM_RESERVED;
257
258 ///
259 /// BIOS Characteristics Extension Bytes.
260 ///
261 typedef struct {
262 MBCE_BIOS_RESERVED BiosReserved;
263 MBCE_SYSTEM_RESERVED SystemReserved;
264 } MISC_BIOS_CHARACTERISTICS_EXTENSION;
265
266 ///
267 /// Extended BIOS ROM size.
268 ///
269 typedef struct {
270 UINT16 Size :14;
271 UINT16 Unit :2;
272 } EXTENDED_BIOS_ROM_SIZE;
273
274 ///
275 /// BIOS Information (Type 0).
276 ///
277 typedef struct {
278 SMBIOS_STRUCTURE Hdr;
279 SMBIOS_TABLE_STRING Vendor;
280 SMBIOS_TABLE_STRING BiosVersion;
281 UINT16 BiosSegment;
282 SMBIOS_TABLE_STRING BiosReleaseDate;
283 UINT8 BiosSize;
284 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;
285 UINT8 BIOSCharacteristicsExtensionBytes[2];
286 UINT8 SystemBiosMajorRelease;
287 UINT8 SystemBiosMinorRelease;
288 UINT8 EmbeddedControllerFirmwareMajorRelease;
289 UINT8 EmbeddedControllerFirmwareMinorRelease;
290 //
291 // Add for smbios 3.1.0
292 //
293 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;
294 } SMBIOS_TABLE_TYPE0;
295
296 ///
297 /// System Wake-up Type.
298 ///
299 typedef enum {
300 SystemWakeupTypeReserved = 0x00,
301 SystemWakeupTypeOther = 0x01,
302 SystemWakeupTypeUnknown = 0x02,
303 SystemWakeupTypeApmTimer = 0x03,
304 SystemWakeupTypeModemRing = 0x04,
305 SystemWakeupTypeLanRemote = 0x05,
306 SystemWakeupTypePowerSwitch = 0x06,
307 SystemWakeupTypePciPme = 0x07,
308 SystemWakeupTypeAcPowerRestored = 0x08
309 } MISC_SYSTEM_WAKEUP_TYPE;
310
311 ///
312 /// System Information (Type 1).
313 ///
314 /// The information in this structure defines attributes of the overall system and is
315 /// intended to be associated with the Component ID group of the system's MIF.
316 /// An SMBIOS implementation is associated with a single system instance and contains
317 /// one and only one System Information (Type 1) structure.
318 ///
319 typedef struct {
320 SMBIOS_STRUCTURE Hdr;
321 SMBIOS_TABLE_STRING Manufacturer;
322 SMBIOS_TABLE_STRING ProductName;
323 SMBIOS_TABLE_STRING Version;
324 SMBIOS_TABLE_STRING SerialNumber;
325 GUID Uuid;
326 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.
327 SMBIOS_TABLE_STRING SKUNumber;
328 SMBIOS_TABLE_STRING Family;
329 } SMBIOS_TABLE_TYPE1;
330
331 ///
332 /// Base Board - Feature Flags.
333 ///
334 typedef struct {
335 UINT8 Motherboard :1;
336 UINT8 RequiresDaughterCard :1;
337 UINT8 Removable :1;
338 UINT8 Replaceable :1;
339 UINT8 HotSwappable :1;
340 UINT8 Reserved :3;
341 } BASE_BOARD_FEATURE_FLAGS;
342
343 ///
344 /// Base Board - Board Type.
345 ///
346 typedef enum {
347 BaseBoardTypeUnknown = 0x1,
348 BaseBoardTypeOther = 0x2,
349 BaseBoardTypeServerBlade = 0x3,
350 BaseBoardTypeConnectivitySwitch = 0x4,
351 BaseBoardTypeSystemManagementModule = 0x5,
352 BaseBoardTypeProcessorModule = 0x6,
353 BaseBoardTypeIOModule = 0x7,
354 BaseBoardTypeMemoryModule = 0x8,
355 BaseBoardTypeDaughterBoard = 0x9,
356 BaseBoardTypeMotherBoard = 0xA,
357 BaseBoardTypeProcessorMemoryModule = 0xB,
358 BaseBoardTypeProcessorIOModule = 0xC,
359 BaseBoardTypeInterconnectBoard = 0xD
360 } BASE_BOARD_TYPE;
361
362 ///
363 /// Base Board (or Module) Information (Type 2).
364 ///
365 /// The information in this structure defines attributes of a system baseboard -
366 /// for example a motherboard, planar, or server blade or other standard system module.
367 ///
368 typedef struct {
369 SMBIOS_STRUCTURE Hdr;
370 SMBIOS_TABLE_STRING Manufacturer;
371 SMBIOS_TABLE_STRING ProductName;
372 SMBIOS_TABLE_STRING Version;
373 SMBIOS_TABLE_STRING SerialNumber;
374 SMBIOS_TABLE_STRING AssetTag;
375 BASE_BOARD_FEATURE_FLAGS FeatureFlag;
376 SMBIOS_TABLE_STRING LocationInChassis;
377 UINT16 ChassisHandle;
378 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.
379 UINT8 NumberOfContainedObjectHandles;
380 UINT16 ContainedObjectHandles[1];
381 } SMBIOS_TABLE_TYPE2;
382
383 ///
384 /// System Enclosure or Chassis Types
385 ///
386 typedef enum {
387 MiscChassisTypeOther = 0x01,
388 MiscChassisTypeUnknown = 0x02,
389 MiscChassisTypeDeskTop = 0x03,
390 MiscChassisTypeLowProfileDesktop = 0x04,
391 MiscChassisTypePizzaBox = 0x05,
392 MiscChassisTypeMiniTower = 0x06,
393 MiscChassisTypeTower = 0x07,
394 MiscChassisTypePortable = 0x08,
395 MiscChassisTypeLapTop = 0x09,
396 MiscChassisTypeNotebook = 0x0A,
397 MiscChassisTypeHandHeld = 0x0B,
398 MiscChassisTypeDockingStation = 0x0C,
399 MiscChassisTypeAllInOne = 0x0D,
400 MiscChassisTypeSubNotebook = 0x0E,
401 MiscChassisTypeSpaceSaving = 0x0F,
402 MiscChassisTypeLunchBox = 0x10,
403 MiscChassisTypeMainServerChassis = 0x11,
404 MiscChassisTypeExpansionChassis = 0x12,
405 MiscChassisTypeSubChassis = 0x13,
406 MiscChassisTypeBusExpansionChassis = 0x14,
407 MiscChassisTypePeripheralChassis = 0x15,
408 MiscChassisTypeRaidChassis = 0x16,
409 MiscChassisTypeRackMountChassis = 0x17,
410 MiscChassisTypeSealedCasePc = 0x18,
411 MiscChassisMultiSystemChassis = 0x19,
412 MiscChassisCompactPCI = 0x1A,
413 MiscChassisAdvancedTCA = 0x1B,
414 MiscChassisBlade = 0x1C,
415 MiscChassisBladeEnclosure = 0x1D,
416 MiscChassisTablet = 0x1E,
417 MiscChassisConvertible = 0x1F,
418 MiscChassisDetachable = 0x20,
419 MiscChassisIoTGateway = 0x21,
420 MiscChassisEmbeddedPc = 0x22,
421 MiscChassisMiniPc = 0x23,
422 MiscChassisStickPc = 0x24
423 } MISC_CHASSIS_TYPE;
424
425 ///
426 /// System Enclosure or Chassis States .
427 ///
428 typedef enum {
429 ChassisStateOther = 0x01,
430 ChassisStateUnknown = 0x02,
431 ChassisStateSafe = 0x03,
432 ChassisStateWarning = 0x04,
433 ChassisStateCritical = 0x05,
434 ChassisStateNonRecoverable = 0x06
435 } MISC_CHASSIS_STATE;
436
437 ///
438 /// System Enclosure or Chassis Security Status.
439 ///
440 typedef enum {
441 ChassisSecurityStatusOther = 0x01,
442 ChassisSecurityStatusUnknown = 0x02,
443 ChassisSecurityStatusNone = 0x03,
444 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
445 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05
446 } MISC_CHASSIS_SECURITY_STATE;
447
448 ///
449 /// Contained Element record
450 ///
451 typedef struct {
452 UINT8 ContainedElementType;
453 UINT8 ContainedElementMinimum;
454 UINT8 ContainedElementMaximum;
455 } CONTAINED_ELEMENT;
456
457
458 ///
459 /// System Enclosure or Chassis (Type 3).
460 ///
461 /// The information in this structure defines attributes of the system's mechanical enclosure(s).
462 /// For example, if a system included a separate enclosure for its peripheral devices,
463 /// two structures would be returned: one for the main, system enclosure and the second for
464 /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification
465 /// support the population of the CIM_Chassis class.
466 ///
467 typedef struct {
468 SMBIOS_STRUCTURE Hdr;
469 SMBIOS_TABLE_STRING Manufacturer;
470 UINT8 Type;
471 SMBIOS_TABLE_STRING Version;
472 SMBIOS_TABLE_STRING SerialNumber;
473 SMBIOS_TABLE_STRING AssetTag;
474 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.
475 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.
476 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.
477 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.
478 UINT8 OemDefined[4];
479 UINT8 Height;
480 UINT8 NumberofPowerCords;
481 UINT8 ContainedElementCount;
482 UINT8 ContainedElementRecordLength;
483 //
484 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements
485 //
486 CONTAINED_ELEMENT ContainedElements[1];
487 //
488 // Add for smbios 2.7
489 //
490 // Since ContainedElements has a variable number of entries, must not define SKUNumber in
491 // the structure. Need to reference it by starting at offset 0x15 and adding
492 // (ContainedElementCount * ContainedElementRecordLength) bytes.
493 //
494 // SMBIOS_TABLE_STRING SKUNumber;
495 } SMBIOS_TABLE_TYPE3;
496
497 ///
498 /// Processor Information - Processor Type.
499 ///
500 typedef enum {
501 ProcessorOther = 0x01,
502 ProcessorUnknown = 0x02,
503 CentralProcessor = 0x03,
504 MathProcessor = 0x04,
505 DspProcessor = 0x05,
506 VideoProcessor = 0x06
507 } PROCESSOR_TYPE_DATA;
508
509 ///
510 /// Processor Information - Processor Family.
511 ///
512 typedef enum {
513 ProcessorFamilyOther = 0x01,
514 ProcessorFamilyUnknown = 0x02,
515 ProcessorFamily8086 = 0x03,
516 ProcessorFamily80286 = 0x04,
517 ProcessorFamilyIntel386 = 0x05,
518 ProcessorFamilyIntel486 = 0x06,
519 ProcessorFamily8087 = 0x07,
520 ProcessorFamily80287 = 0x08,
521 ProcessorFamily80387 = 0x09,
522 ProcessorFamily80487 = 0x0A,
523 ProcessorFamilyPentium = 0x0B,
524 ProcessorFamilyPentiumPro = 0x0C,
525 ProcessorFamilyPentiumII = 0x0D,
526 ProcessorFamilyPentiumMMX = 0x0E,
527 ProcessorFamilyCeleron = 0x0F,
528 ProcessorFamilyPentiumIIXeon = 0x10,
529 ProcessorFamilyPentiumIII = 0x11,
530 ProcessorFamilyM1 = 0x12,
531 ProcessorFamilyM2 = 0x13,
532 ProcessorFamilyIntelCeleronM = 0x14,
533 ProcessorFamilyIntelPentium4Ht = 0x15,
534 ProcessorFamilyAmdDuron = 0x18,
535 ProcessorFamilyK5 = 0x19,
536 ProcessorFamilyK6 = 0x1A,
537 ProcessorFamilyK6_2 = 0x1B,
538 ProcessorFamilyK6_3 = 0x1C,
539 ProcessorFamilyAmdAthlon = 0x1D,
540 ProcessorFamilyAmd29000 = 0x1E,
541 ProcessorFamilyK6_2Plus = 0x1F,
542 ProcessorFamilyPowerPC = 0x20,
543 ProcessorFamilyPowerPC601 = 0x21,
544 ProcessorFamilyPowerPC603 = 0x22,
545 ProcessorFamilyPowerPC603Plus = 0x23,
546 ProcessorFamilyPowerPC604 = 0x24,
547 ProcessorFamilyPowerPC620 = 0x25,
548 ProcessorFamilyPowerPCx704 = 0x26,
549 ProcessorFamilyPowerPC750 = 0x27,
550 ProcessorFamilyIntelCoreDuo = 0x28,
551 ProcessorFamilyIntelCoreDuoMobile = 0x29,
552 ProcessorFamilyIntelCoreSoloMobile = 0x2A,
553 ProcessorFamilyIntelAtom = 0x2B,
554 ProcessorFamilyIntelCoreM = 0x2C,
555 ProcessorFamilyIntelCorem3 = 0x2D,
556 ProcessorFamilyIntelCorem5 = 0x2E,
557 ProcessorFamilyIntelCorem7 = 0x2F,
558 ProcessorFamilyAlpha = 0x30,
559 ProcessorFamilyAlpha21064 = 0x31,
560 ProcessorFamilyAlpha21066 = 0x32,
561 ProcessorFamilyAlpha21164 = 0x33,
562 ProcessorFamilyAlpha21164PC = 0x34,
563 ProcessorFamilyAlpha21164a = 0x35,
564 ProcessorFamilyAlpha21264 = 0x36,
565 ProcessorFamilyAlpha21364 = 0x37,
566 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
567 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
568 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
569 ProcessorFamilyAmdOpteron6100Series = 0x3B,
570 ProcessorFamilyAmdOpteron4100Series = 0x3C,
571 ProcessorFamilyAmdOpteron6200Series = 0x3D,
572 ProcessorFamilyAmdOpteron4200Series = 0x3E,
573 ProcessorFamilyAmdFxSeries = 0x3F,
574 ProcessorFamilyMips = 0x40,
575 ProcessorFamilyMIPSR4000 = 0x41,
576 ProcessorFamilyMIPSR4200 = 0x42,
577 ProcessorFamilyMIPSR4400 = 0x43,
578 ProcessorFamilyMIPSR4600 = 0x44,
579 ProcessorFamilyMIPSR10000 = 0x45,
580 ProcessorFamilyAmdCSeries = 0x46,
581 ProcessorFamilyAmdESeries = 0x47,
582 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
583 ProcessorFamilyAmdGSeries = 0x49,
584 ProcessorFamilyAmdZSeries = 0x4A,
585 ProcessorFamilyAmdRSeries = 0x4B,
586 ProcessorFamilyAmdOpteron4300 = 0x4C,
587 ProcessorFamilyAmdOpteron6300 = 0x4D,
588 ProcessorFamilyAmdOpteron3300 = 0x4E,
589 ProcessorFamilyAmdFireProSeries = 0x4F,
590 ProcessorFamilySparc = 0x50,
591 ProcessorFamilySuperSparc = 0x51,
592 ProcessorFamilymicroSparcII = 0x52,
593 ProcessorFamilymicroSparcIIep = 0x53,
594 ProcessorFamilyUltraSparc = 0x54,
595 ProcessorFamilyUltraSparcII = 0x55,
596 ProcessorFamilyUltraSparcIii = 0x56,
597 ProcessorFamilyUltraSparcIII = 0x57,
598 ProcessorFamilyUltraSparcIIIi = 0x58,
599 ProcessorFamily68040 = 0x60,
600 ProcessorFamily68xxx = 0x61,
601 ProcessorFamily68000 = 0x62,
602 ProcessorFamily68010 = 0x63,
603 ProcessorFamily68020 = 0x64,
604 ProcessorFamily68030 = 0x65,
605 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
606 ProcessorFamilyAmdOpteronX1000Series = 0x67,
607 ProcessorFamilyAmdOpteronX2000Series = 0x68,
608 ProcessorFamilyAmdOpteronASeries = 0x69,
609 ProcessorFamilyAmdOpteronX3000Series = 0x6A,
610 ProcessorFamilyAmdZen = 0x6B,
611 ProcessorFamilyHobbit = 0x70,
612 ProcessorFamilyCrusoeTM5000 = 0x78,
613 ProcessorFamilyCrusoeTM3000 = 0x79,
614 ProcessorFamilyEfficeonTM8000 = 0x7A,
615 ProcessorFamilyWeitek = 0x80,
616 ProcessorFamilyItanium = 0x82,
617 ProcessorFamilyAmdAthlon64 = 0x83,
618 ProcessorFamilyAmdOpteron = 0x84,
619 ProcessorFamilyAmdSempron = 0x85,
620 ProcessorFamilyAmdTurion64Mobile = 0x86,
621 ProcessorFamilyDualCoreAmdOpteron = 0x87,
622 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,
623 ProcessorFamilyAmdTurion64X2Mobile = 0x89,
624 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,
625 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,
626 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,
627 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,
628 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,
629 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,
630 ProcessorFamilyPARISC = 0x90,
631 ProcessorFamilyPaRisc8500 = 0x91,
632 ProcessorFamilyPaRisc8000 = 0x92,
633 ProcessorFamilyPaRisc7300LC = 0x93,
634 ProcessorFamilyPaRisc7200 = 0x94,
635 ProcessorFamilyPaRisc7100LC = 0x95,
636 ProcessorFamilyPaRisc7100 = 0x96,
637 ProcessorFamilyV30 = 0xA0,
638 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,
639 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,
640 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,
641 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,
642 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,
643 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,
644 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,
645 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,
646 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,
647 ProcessorFamilyQuadCoreIntelXeon = 0xAA,
648 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,
649 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,
650 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,
651 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,
652 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,
653 ProcessorFamilyPentiumIIIXeon = 0xB0,
654 ProcessorFamilyPentiumIIISpeedStep = 0xB1,
655 ProcessorFamilyPentium4 = 0xB2,
656 ProcessorFamilyIntelXeon = 0xB3,
657 ProcessorFamilyAS400 = 0xB4,
658 ProcessorFamilyIntelXeonMP = 0xB5,
659 ProcessorFamilyAMDAthlonXP = 0xB6,
660 ProcessorFamilyAMDAthlonMP = 0xB7,
661 ProcessorFamilyIntelItanium2 = 0xB8,
662 ProcessorFamilyIntelPentiumM = 0xB9,
663 ProcessorFamilyIntelCeleronD = 0xBA,
664 ProcessorFamilyIntelPentiumD = 0xBB,
665 ProcessorFamilyIntelPentiumEx = 0xBC,
666 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
667 ProcessorFamilyReserved = 0xBE,
668 ProcessorFamilyIntelCore2 = 0xBF,
669 ProcessorFamilyIntelCore2Solo = 0xC0,
670 ProcessorFamilyIntelCore2Extreme = 0xC1,
671 ProcessorFamilyIntelCore2Quad = 0xC2,
672 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,
673 ProcessorFamilyIntelCore2DuoMobile = 0xC4,
674 ProcessorFamilyIntelCore2SoloMobile = 0xC5,
675 ProcessorFamilyIntelCoreI7 = 0xC6,
676 ProcessorFamilyDualCoreIntelCeleron = 0xC7,
677 ProcessorFamilyIBM390 = 0xC8,
678 ProcessorFamilyG4 = 0xC9,
679 ProcessorFamilyG5 = 0xCA,
680 ProcessorFamilyG6 = 0xCB,
681 ProcessorFamilyzArchitecture = 0xCC,
682 ProcessorFamilyIntelCoreI5 = 0xCD,
683 ProcessorFamilyIntelCoreI3 = 0xCE,
684 ProcessorFamilyIntelCoreI9 = 0xCF,
685 ProcessorFamilyViaC7M = 0xD2,
686 ProcessorFamilyViaC7D = 0xD3,
687 ProcessorFamilyViaC7 = 0xD4,
688 ProcessorFamilyViaEden = 0xD5,
689 ProcessorFamilyMultiCoreIntelXeon = 0xD6,
690 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
691 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
692 ProcessorFamilyViaNano = 0xD9,
693 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
694 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
695 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
696 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
697 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
698 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
699 ProcessorFamilyAmdOpteron3000Series = 0xE4,
700 ProcessorFamilyAmdSempronII = 0xE5,
701 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
702 ProcessorFamilyAmdPhenomTripleCore = 0xE7,
703 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
704 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
705 ProcessorFamilyAmdAthlonDualCore = 0xEA,
706 ProcessorFamilyAmdSempronSI = 0xEB,
707 ProcessorFamilyAmdPhenomII = 0xEC,
708 ProcessorFamilyAmdAthlonII = 0xED,
709 ProcessorFamilySixCoreAmdOpteron = 0xEE,
710 ProcessorFamilyAmdSempronM = 0xEF,
711 ProcessorFamilyi860 = 0xFA,
712 ProcessorFamilyi960 = 0xFB,
713 ProcessorFamilyIndicatorFamily2 = 0xFE,
714 ProcessorFamilyReserved1 = 0xFF
715 } PROCESSOR_FAMILY_DATA;
716
717 ///
718 /// Processor Information2 - Processor Family2.
719 ///
720 typedef enum {
721 ProcessorFamilyARMv7 = 0x0100,
722 ProcessorFamilyARMv8 = 0x0101,
723 ProcessorFamilySH3 = 0x0104,
724 ProcessorFamilySH4 = 0x0105,
725 ProcessorFamilyARM = 0x0118,
726 ProcessorFamilyStrongARM = 0x0119,
727 ProcessorFamily6x86 = 0x012C,
728 ProcessorFamilyMediaGX = 0x012D,
729 ProcessorFamilyMII = 0x012E,
730 ProcessorFamilyWinChip = 0x0140,
731 ProcessorFamilyDSP = 0x015E,
732 ProcessorFamilyVideoProcessor = 0x01F4,
733 ProcessorFamilyRiscvRV32 = 0x0200,
734 ProcessorFamilyRiscVRV64 = 0x0201,
735 ProcessorFamilyRiscVRV128 = 0x0202
736 } PROCESSOR_FAMILY2_DATA;
737
738 ///
739 /// Processor Information - Voltage.
740 ///
741 typedef struct {
742 UINT8 ProcessorVoltageCapability5V :1;
743 UINT8 ProcessorVoltageCapability3_3V :1;
744 UINT8 ProcessorVoltageCapability2_9V :1;
745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.
747 UINT8 ProcessorVoltageIndicateLegacy :1;
748 } PROCESSOR_VOLTAGE;
749
750 ///
751 /// Processor Information - Processor Upgrade.
752 ///
753 typedef enum {
754 ProcessorUpgradeOther = 0x01,
755 ProcessorUpgradeUnknown = 0x02,
756 ProcessorUpgradeDaughterBoard = 0x03,
757 ProcessorUpgradeZIFSocket = 0x04,
758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.
759 ProcessorUpgradeNone = 0x06,
760 ProcessorUpgradeLIFSocket = 0x07,
761 ProcessorUpgradeSlot1 = 0x08,
762 ProcessorUpgradeSlot2 = 0x09,
763 ProcessorUpgrade370PinSocket = 0x0A,
764 ProcessorUpgradeSlotA = 0x0B,
765 ProcessorUpgradeSlotM = 0x0C,
766 ProcessorUpgradeSocket423 = 0x0D,
767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.
768 ProcessorUpgradeSocket478 = 0x0F,
769 ProcessorUpgradeSocket754 = 0x10,
770 ProcessorUpgradeSocket940 = 0x11,
771 ProcessorUpgradeSocket939 = 0x12,
772 ProcessorUpgradeSocketmPGA604 = 0x13,
773 ProcessorUpgradeSocketLGA771 = 0x14,
774 ProcessorUpgradeSocketLGA775 = 0x15,
775 ProcessorUpgradeSocketS1 = 0x16,
776 ProcessorUpgradeAM2 = 0x17,
777 ProcessorUpgradeF1207 = 0x18,
778 ProcessorSocketLGA1366 = 0x19,
779 ProcessorUpgradeSocketG34 = 0x1A,
780 ProcessorUpgradeSocketAM3 = 0x1B,
781 ProcessorUpgradeSocketC32 = 0x1C,
782 ProcessorUpgradeSocketLGA1156 = 0x1D,
783 ProcessorUpgradeSocketLGA1567 = 0x1E,
784 ProcessorUpgradeSocketPGA988A = 0x1F,
785 ProcessorUpgradeSocketBGA1288 = 0x20,
786 ProcessorUpgradeSocketrPGA988B = 0x21,
787 ProcessorUpgradeSocketBGA1023 = 0x22,
788 ProcessorUpgradeSocketBGA1224 = 0x23,
789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
790 ProcessorUpgradeSocketLGA1356 = 0x25,
791 ProcessorUpgradeSocketLGA2011 = 0x26,
792 ProcessorUpgradeSocketFS1 = 0x27,
793 ProcessorUpgradeSocketFS2 = 0x28,
794 ProcessorUpgradeSocketFM1 = 0x29,
795 ProcessorUpgradeSocketFM2 = 0x2A,
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,
797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,
798 ProcessorUpgradeSocketLGA1150 = 0x2D,
799 ProcessorUpgradeSocketBGA1168 = 0x2E,
800 ProcessorUpgradeSocketBGA1234 = 0x2F,
801 ProcessorUpgradeSocketBGA1364 = 0x30,
802 ProcessorUpgradeSocketAM4 = 0x31,
803 ProcessorUpgradeSocketLGA1151 = 0x32,
804 ProcessorUpgradeSocketBGA1356 = 0x33,
805 ProcessorUpgradeSocketBGA1440 = 0x34,
806 ProcessorUpgradeSocketBGA1515 = 0x35,
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,
808 ProcessorUpgradeSocketSP3 = 0x37,
809 ProcessorUpgradeSocketSP3r2 = 0x38,
810 ProcessorUpgradeSocketLGA2066 = 0x39,
811 ProcessorUpgradeSocketBGA1392 = 0x3A,
812 ProcessorUpgradeSocketBGA1510 = 0x3B,
813 ProcessorUpgradeSocketBGA1528 = 0x3C
814 } PROCESSOR_UPGRADE;
815
816 ///
817 /// Processor ID Field Description
818 ///
819 typedef struct {
820 UINT32 ProcessorSteppingId:4;
821 UINT32 ProcessorModel: 4;
822 UINT32 ProcessorFamily: 4;
823 UINT32 ProcessorType: 2;
824 UINT32 ProcessorReserved1: 2;
825 UINT32 ProcessorXModel: 4;
826 UINT32 ProcessorXFamily: 8;
827 UINT32 ProcessorReserved2: 4;
828 } PROCESSOR_SIGNATURE;
829
830 typedef struct {
831 UINT32 ProcessorFpu :1;
832 UINT32 ProcessorVme :1;
833 UINT32 ProcessorDe :1;
834 UINT32 ProcessorPse :1;
835 UINT32 ProcessorTsc :1;
836 UINT32 ProcessorMsr :1;
837 UINT32 ProcessorPae :1;
838 UINT32 ProcessorMce :1;
839 UINT32 ProcessorCx8 :1;
840 UINT32 ProcessorApic :1;
841 UINT32 ProcessorReserved1 :1;
842 UINT32 ProcessorSep :1;
843 UINT32 ProcessorMtrr :1;
844 UINT32 ProcessorPge :1;
845 UINT32 ProcessorMca :1;
846 UINT32 ProcessorCmov :1;
847 UINT32 ProcessorPat :1;
848 UINT32 ProcessorPse36 :1;
849 UINT32 ProcessorPsn :1;
850 UINT32 ProcessorClfsh :1;
851 UINT32 ProcessorReserved2 :1;
852 UINT32 ProcessorDs :1;
853 UINT32 ProcessorAcpi :1;
854 UINT32 ProcessorMmx :1;
855 UINT32 ProcessorFxsr :1;
856 UINT32 ProcessorSse :1;
857 UINT32 ProcessorSse2 :1;
858 UINT32 ProcessorSs :1;
859 UINT32 ProcessorReserved3 :1;
860 UINT32 ProcessorTm :1;
861 UINT32 ProcessorReserved4 :2;
862 } PROCESSOR_FEATURE_FLAGS;
863
864 typedef struct {
865 UINT16 ProcessorReserved1 :1;
866 UINT16 ProcessorUnknown :1;
867 UINT16 Processor64BitCapable :1;
868 UINT16 ProcessorMultiCore :1;
869 UINT16 ProcessorHardwareThread :1;
870 UINT16 ProcessorExecuteProtection :1;
871 UINT16 ProcessorEnhancedVirtualization :1;
872 UINT16 ProcessorPowerPerformanceCtrl :1;
873 UINT16 Processor128BitCapable :1;
874 UINT16 ProcessorArm64SocId :1;
875 UINT16 ProcessorReserved2 :6;
876 } PROCESSOR_CHARACTERISTIC_FLAGS;
877
878 typedef struct {
879 PROCESSOR_SIGNATURE Signature;
880 PROCESSOR_FEATURE_FLAGS FeatureFlags;
881 } PROCESSOR_ID_DATA;
882
883 ///
884 /// Processor Information (Type 4).
885 ///
886 /// The information in this structure defines the attributes of a single processor;
887 /// a separate structure instance is provided for each system processor socket/slot.
888 /// For example, a system with an IntelDX2 processor would have a single
889 /// structure instance, while a system with an IntelSX2 processor would have a structure
890 /// to describe the main CPU, and a second structure to describe the 80487 co-processor.
891 ///
892 typedef struct {
893 SMBIOS_STRUCTURE Hdr;
894 SMBIOS_TABLE_STRING Socket;
895 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.
896 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.
897 SMBIOS_TABLE_STRING ProcessorManufacture;
898 PROCESSOR_ID_DATA ProcessorId;
899 SMBIOS_TABLE_STRING ProcessorVersion;
900 PROCESSOR_VOLTAGE Voltage;
901 UINT16 ExternalClock;
902 UINT16 MaxSpeed;
903 UINT16 CurrentSpeed;
904 UINT8 Status;
905 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.
906 UINT16 L1CacheHandle;
907 UINT16 L2CacheHandle;
908 UINT16 L3CacheHandle;
909 SMBIOS_TABLE_STRING SerialNumber;
910 SMBIOS_TABLE_STRING AssetTag;
911 SMBIOS_TABLE_STRING PartNumber;
912 //
913 // Add for smbios 2.5
914 //
915 UINT8 CoreCount;
916 UINT8 EnabledCoreCount;
917 UINT8 ThreadCount;
918 UINT16 ProcessorCharacteristics;
919 //
920 // Add for smbios 2.6
921 //
922 UINT16 ProcessorFamily2;
923 //
924 // Add for smbios 3.0
925 //
926 UINT16 CoreCount2;
927 UINT16 EnabledCoreCount2;
928 UINT16 ThreadCount2;
929 } SMBIOS_TABLE_TYPE4;
930
931 ///
932 /// Memory Controller Error Detecting Method.
933 ///
934 typedef enum {
935 ErrorDetectingMethodOther = 0x01,
936 ErrorDetectingMethodUnknown = 0x02,
937 ErrorDetectingMethodNone = 0x03,
938 ErrorDetectingMethodParity = 0x04,
939 ErrorDetectingMethod32Ecc = 0x05,
940 ErrorDetectingMethod64Ecc = 0x06,
941 ErrorDetectingMethod128Ecc = 0x07,
942 ErrorDetectingMethodCrc = 0x08
943 } MEMORY_ERROR_DETECT_METHOD;
944
945 ///
946 /// Memory Controller Error Correcting Capability.
947 ///
948 typedef struct {
949 UINT8 Other :1;
950 UINT8 Unknown :1;
951 UINT8 None :1;
952 UINT8 SingleBitErrorCorrect :1;
953 UINT8 DoubleBitErrorCorrect :1;
954 UINT8 ErrorScrubbing :1;
955 UINT8 Reserved :2;
956 } MEMORY_ERROR_CORRECT_CAPABILITY;
957
958 ///
959 /// Memory Controller Information - Interleave Support.
960 ///
961 typedef enum {
962 MemoryInterleaveOther = 0x01,
963 MemoryInterleaveUnknown = 0x02,
964 MemoryInterleaveOneWay = 0x03,
965 MemoryInterleaveTwoWay = 0x04,
966 MemoryInterleaveFourWay = 0x05,
967 MemoryInterleaveEightWay = 0x06,
968 MemoryInterleaveSixteenWay = 0x07
969 } MEMORY_SUPPORT_INTERLEAVE_TYPE;
970
971 ///
972 /// Memory Controller Information - Memory Speeds.
973 ///
974 typedef struct {
975 UINT16 Other :1;
976 UINT16 Unknown :1;
977 UINT16 SeventyNs:1;
978 UINT16 SixtyNs :1;
979 UINT16 FiftyNs :1;
980 UINT16 Reserved :11;
981 } MEMORY_SPEED_TYPE;
982
983 ///
984 /// Memory Controller Information (Type 5, Obsolete).
985 ///
986 /// The information in this structure defines the attributes of the system's memory controller(s)
987 /// and the supported attributes of any memory-modules present in the sockets controlled by
988 /// this controller.
989 /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),
990 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
991 /// and Memory Device (Type 17) structures should be used instead. BIOS providers might
992 /// choose to implement both memory description types to allow existing DMI browsers
993 /// to properly display the system's memory attributes.
994 ///
995 typedef struct {
996 SMBIOS_STRUCTURE Hdr;
997 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.
998 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;
999 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.
1000 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .
1001 UINT8 MaxMemoryModuleSize;
1002 MEMORY_SPEED_TYPE SupportSpeed;
1003 UINT16 SupportMemoryType;
1004 UINT8 MemoryModuleVoltage;
1005 UINT8 AssociatedMemorySlotNum;
1006 UINT16 MemoryModuleConfigHandles[1];
1007 } SMBIOS_TABLE_TYPE5;
1008
1009 ///
1010 /// Memory Module Information - Memory Types
1011 ///
1012 typedef struct {
1013 UINT16 Other :1;
1014 UINT16 Unknown :1;
1015 UINT16 Standard :1;
1016 UINT16 FastPageMode:1;
1017 UINT16 Edo :1;
1018 UINT16 Parity :1;
1019 UINT16 Ecc :1;
1020 UINT16 Simm :1;
1021 UINT16 Dimm :1;
1022 UINT16 BurstEdo :1;
1023 UINT16 Sdram :1;
1024 UINT16 Reserved :5;
1025 } MEMORY_CURRENT_TYPE;
1026
1027 ///
1028 /// Memory Module Information - Memory Size.
1029 ///
1030 typedef struct {
1031 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.
1032 UINT8 SingleOrDoubleBank :1;
1033 } MEMORY_INSTALLED_ENABLED_SIZE;
1034
1035 ///
1036 /// Memory Module Information (Type 6, Obsolete)
1037 ///
1038 /// One Memory Module Information structure is included for each memory-module socket
1039 /// in the system. The structure describes the speed, type, size, and error status
1040 /// of each system memory module. The supported attributes of each module are described
1041 /// by the "owning" Memory Controller Information structure.
1042 /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),
1043 /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)
1044 /// and Memory Device (Type 17) structures should be used instead.
1045 ///
1046 typedef struct {
1047 SMBIOS_STRUCTURE Hdr;
1048 SMBIOS_TABLE_STRING SocketDesignation;
1049 UINT8 BankConnections;
1050 UINT8 CurrentSpeed;
1051 MEMORY_CURRENT_TYPE CurrentMemoryType;
1052 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;
1053 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;
1054 UINT8 ErrorStatus;
1055 } SMBIOS_TABLE_TYPE6;
1056
1057 ///
1058 /// Cache Information - SRAM Type.
1059 ///
1060 typedef struct {
1061 UINT16 Other :1;
1062 UINT16 Unknown :1;
1063 UINT16 NonBurst :1;
1064 UINT16 Burst :1;
1065 UINT16 PipelineBurst :1;
1066 UINT16 Synchronous :1;
1067 UINT16 Asynchronous :1;
1068 UINT16 Reserved :9;
1069 } CACHE_SRAM_TYPE_DATA;
1070
1071 ///
1072 /// Cache Information - Error Correction Type.
1073 ///
1074 typedef enum {
1075 CacheErrorOther = 0x01,
1076 CacheErrorUnknown = 0x02,
1077 CacheErrorNone = 0x03,
1078 CacheErrorParity = 0x04,
1079 CacheErrorSingleBit = 0x05, ///< ECC
1080 CacheErrorMultiBit = 0x06 ///< ECC
1081 } CACHE_ERROR_TYPE_DATA;
1082
1083 ///
1084 /// Cache Information - System Cache Type.
1085 ///
1086 typedef enum {
1087 CacheTypeOther = 0x01,
1088 CacheTypeUnknown = 0x02,
1089 CacheTypeInstruction = 0x03,
1090 CacheTypeData = 0x04,
1091 CacheTypeUnified = 0x05
1092 } CACHE_TYPE_DATA;
1093
1094 ///
1095 /// Cache Information - Associativity.
1096 ///
1097 typedef enum {
1098 CacheAssociativityOther = 0x01,
1099 CacheAssociativityUnknown = 0x02,
1100 CacheAssociativityDirectMapped = 0x03,
1101 CacheAssociativity2Way = 0x04,
1102 CacheAssociativity4Way = 0x05,
1103 CacheAssociativityFully = 0x06,
1104 CacheAssociativity8Way = 0x07,
1105 CacheAssociativity16Way = 0x08,
1106 CacheAssociativity12Way = 0x09,
1107 CacheAssociativity24Way = 0x0A,
1108 CacheAssociativity32Way = 0x0B,
1109 CacheAssociativity48Way = 0x0C,
1110 CacheAssociativity64Way = 0x0D,
1111 CacheAssociativity20Way = 0x0E
1112 } CACHE_ASSOCIATIVITY_DATA;
1113
1114 ///
1115 /// Cache Information (Type 7).
1116 ///
1117 /// The information in this structure defines the attributes of CPU cache device in the system.
1118 /// One structure is specified for each such device, whether the device is internal to
1119 /// or external to the CPU module. Cache modules can be associated with a processor structure
1120 /// in one or two ways, depending on the SMBIOS version.
1121 ///
1122 typedef struct {
1123 SMBIOS_STRUCTURE Hdr;
1124 SMBIOS_TABLE_STRING SocketDesignation;
1125 UINT16 CacheConfiguration;
1126 UINT16 MaximumCacheSize;
1127 UINT16 InstalledSize;
1128 CACHE_SRAM_TYPE_DATA SupportedSRAMType;
1129 CACHE_SRAM_TYPE_DATA CurrentSRAMType;
1130 UINT8 CacheSpeed;
1131 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.
1132 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.
1133 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.
1134 //
1135 // Add for smbios 3.1.0
1136 //
1137 UINT32 MaximumCacheSize2;
1138 UINT32 InstalledSize2;
1139 } SMBIOS_TABLE_TYPE7;
1140
1141 ///
1142 /// Port Connector Information - Connector Types.
1143 ///
1144 typedef enum {
1145 PortConnectorTypeNone = 0x00,
1146 PortConnectorTypeCentronics = 0x01,
1147 PortConnectorTypeMiniCentronics = 0x02,
1148 PortConnectorTypeProprietary = 0x03,
1149 PortConnectorTypeDB25Male = 0x04,
1150 PortConnectorTypeDB25Female = 0x05,
1151 PortConnectorTypeDB15Male = 0x06,
1152 PortConnectorTypeDB15Female = 0x07,
1153 PortConnectorTypeDB9Male = 0x08,
1154 PortConnectorTypeDB9Female = 0x09,
1155 PortConnectorTypeRJ11 = 0x0A,
1156 PortConnectorTypeRJ45 = 0x0B,
1157 PortConnectorType50PinMiniScsi = 0x0C,
1158 PortConnectorTypeMiniDin = 0x0D,
1159 PortConnectorTypeMicroDin = 0x0E,
1160 PortConnectorTypePS2 = 0x0F,
1161 PortConnectorTypeInfrared = 0x10,
1162 PortConnectorTypeHpHil = 0x11,
1163 PortConnectorTypeUsb = 0x12,
1164 PortConnectorTypeSsaScsi = 0x13,
1165 PortConnectorTypeCircularDin8Male = 0x14,
1166 PortConnectorTypeCircularDin8Female = 0x15,
1167 PortConnectorTypeOnboardIde = 0x16,
1168 PortConnectorTypeOnboardFloppy = 0x17,
1169 PortConnectorType9PinDualInline = 0x18,
1170 PortConnectorType25PinDualInline = 0x19,
1171 PortConnectorType50PinDualInline = 0x1A,
1172 PortConnectorType68PinDualInline = 0x1B,
1173 PortConnectorTypeOnboardSoundInput = 0x1C,
1174 PortConnectorTypeMiniCentronicsType14 = 0x1D,
1175 PortConnectorTypeMiniCentronicsType26 = 0x1E,
1176 PortConnectorTypeHeadPhoneMiniJack = 0x1F,
1177 PortConnectorTypeBNC = 0x20,
1178 PortConnectorType1394 = 0x21,
1179 PortConnectorTypeSasSata = 0x22,
1180 PortConnectorTypeUsbTypeC = 0x23,
1181 PortConnectorTypePC98 = 0xA0,
1182 PortConnectorTypePC98Hireso = 0xA1,
1183 PortConnectorTypePCH98 = 0xA2,
1184 PortConnectorTypePC98Note = 0xA3,
1185 PortConnectorTypePC98Full = 0xA4,
1186 PortConnectorTypeOther = 0xFF
1187 } MISC_PORT_CONNECTOR_TYPE;
1188
1189 ///
1190 /// Port Connector Information - Port Types
1191 ///
1192 typedef enum {
1193 PortTypeNone = 0x00,
1194 PortTypeParallelXtAtCompatible = 0x01,
1195 PortTypeParallelPortPs2 = 0x02,
1196 PortTypeParallelPortEcp = 0x03,
1197 PortTypeParallelPortEpp = 0x04,
1198 PortTypeParallelPortEcpEpp = 0x05,
1199 PortTypeSerialXtAtCompatible = 0x06,
1200 PortTypeSerial16450Compatible = 0x07,
1201 PortTypeSerial16550Compatible = 0x08,
1202 PortTypeSerial16550ACompatible = 0x09,
1203 PortTypeScsi = 0x0A,
1204 PortTypeMidi = 0x0B,
1205 PortTypeJoyStick = 0x0C,
1206 PortTypeKeyboard = 0x0D,
1207 PortTypeMouse = 0x0E,
1208 PortTypeSsaScsi = 0x0F,
1209 PortTypeUsb = 0x10,
1210 PortTypeFireWire = 0x11,
1211 PortTypePcmciaTypeI = 0x12,
1212 PortTypePcmciaTypeII = 0x13,
1213 PortTypePcmciaTypeIII = 0x14,
1214 PortTypeCardBus = 0x15,
1215 PortTypeAccessBusPort = 0x16,
1216 PortTypeScsiII = 0x17,
1217 PortTypeScsiWide = 0x18,
1218 PortTypePC98 = 0x19,
1219 PortTypePC98Hireso = 0x1A,
1220 PortTypePCH98 = 0x1B,
1221 PortTypeVideoPort = 0x1C,
1222 PortTypeAudioPort = 0x1D,
1223 PortTypeModemPort = 0x1E,
1224 PortTypeNetworkPort = 0x1F,
1225 PortTypeSata = 0x20,
1226 PortTypeSas = 0x21,
1227 PortTypeMfdp = 0x22, ///< Multi-Function Display Port
1228 PortTypeThunderbolt = 0x23,
1229 PortType8251Compatible = 0xA0,
1230 PortType8251FifoCompatible = 0xA1,
1231 PortTypeOther = 0xFF
1232 } MISC_PORT_TYPE;
1233
1234 ///
1235 /// Port Connector Information (Type 8).
1236 ///
1237 /// The information in this structure defines the attributes of a system port connector,
1238 /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information
1239 /// are provided. One structure is present for each port provided by the system.
1240 ///
1241 typedef struct {
1242 SMBIOS_STRUCTURE Hdr;
1243 SMBIOS_TABLE_STRING InternalReferenceDesignator;
1244 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1245 SMBIOS_TABLE_STRING ExternalReferenceDesignator;
1246 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.
1247 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.
1248 } SMBIOS_TABLE_TYPE8;
1249
1250 ///
1251 /// System Slots - Slot Type
1252 ///
1253 typedef enum {
1254 SlotTypeOther = 0x01,
1255 SlotTypeUnknown = 0x02,
1256 SlotTypeIsa = 0x03,
1257 SlotTypeMca = 0x04,
1258 SlotTypeEisa = 0x05,
1259 SlotTypePci = 0x06,
1260 SlotTypePcmcia = 0x07,
1261 SlotTypeVlVesa = 0x08,
1262 SlotTypeProprietary = 0x09,
1263 SlotTypeProcessorCardSlot = 0x0A,
1264 SlotTypeProprietaryMemoryCardSlot = 0x0B,
1265 SlotTypeIORiserCardSlot = 0x0C,
1266 SlotTypeNuBus = 0x0D,
1267 SlotTypePci66MhzCapable = 0x0E,
1268 SlotTypeAgp = 0x0F,
1269 SlotTypeApg2X = 0x10,
1270 SlotTypeAgp4X = 0x11,
1271 SlotTypePciX = 0x12,
1272 SlotTypeAgp8X = 0x13,
1273 SlotTypeM2Socket1_DP = 0x14,
1274 SlotTypeM2Socket1_SD = 0x15,
1275 SlotTypeM2Socket2 = 0x16,
1276 SlotTypeM2Socket3 = 0x17,
1277 SlotTypeMxmTypeI = 0x18,
1278 SlotTypeMxmTypeII = 0x19,
1279 SlotTypeMxmTypeIIIStandard = 0x1A,
1280 SlotTypeMxmTypeIIIHe = 0x1B,
1281 SlotTypeMxmTypeIV = 0x1C,
1282 SlotTypeMxm30TypeA = 0x1D,
1283 SlotTypeMxm30TypeB = 0x1E,
1284 SlotTypePciExpressGen2Sff_8639 = 0x1F,
1285 SlotTypePciExpressGen3Sff_8639 = 0x20,
1286 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
1287 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
1288 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
1289 SlotTypeCXLFlexbus10 = 0x30,
1290 SlotTypePC98C20 = 0xA0,
1291 SlotTypePC98C24 = 0xA1,
1292 SlotTypePC98E = 0xA2,
1293 SlotTypePC98LocalBus = 0xA3,
1294 SlotTypePC98Card = 0xA4,
1295 SlotTypePciExpress = 0xA5,
1296 SlotTypePciExpressX1 = 0xA6,
1297 SlotTypePciExpressX2 = 0xA7,
1298 SlotTypePciExpressX4 = 0xA8,
1299 SlotTypePciExpressX8 = 0xA9,
1300 SlotTypePciExpressX16 = 0xAA,
1301 SlotTypePciExpressGen2 = 0xAB,
1302 SlotTypePciExpressGen2X1 = 0xAC,
1303 SlotTypePciExpressGen2X2 = 0xAD,
1304 SlotTypePciExpressGen2X4 = 0xAE,
1305 SlotTypePciExpressGen2X8 = 0xAF,
1306 SlotTypePciExpressGen2X16 = 0xB0,
1307 SlotTypePciExpressGen3 = 0xB1,
1308 SlotTypePciExpressGen3X1 = 0xB2,
1309 SlotTypePciExpressGen3X2 = 0xB3,
1310 SlotTypePciExpressGen3X4 = 0xB4,
1311 SlotTypePciExpressGen3X8 = 0xB5,
1312 SlotTypePciExpressGen3X16 = 0xB6,
1313 SlotTypePciExpressGen4 = 0xB8,
1314 SlotTypePciExpressGen4X1 = 0xB9,
1315 SlotTypePciExpressGen4X2 = 0xBA,
1316 SlotTypePciExpressGen4X4 = 0xBB,
1317 SlotTypePciExpressGen4X8 = 0xBC,
1318 SlotTypePciExpressGen4X16 = 0xBD
1319 } MISC_SLOT_TYPE;
1320
1321 ///
1322 /// System Slots - Slot Data Bus Width.
1323 ///
1324 typedef enum {
1325 SlotDataBusWidthOther = 0x01,
1326 SlotDataBusWidthUnknown = 0x02,
1327 SlotDataBusWidth8Bit = 0x03,
1328 SlotDataBusWidth16Bit = 0x04,
1329 SlotDataBusWidth32Bit = 0x05,
1330 SlotDataBusWidth64Bit = 0x06,
1331 SlotDataBusWidth128Bit = 0x07,
1332 SlotDataBusWidth1X = 0x08, ///< Or X1
1333 SlotDataBusWidth2X = 0x09, ///< Or X2
1334 SlotDataBusWidth4X = 0x0A, ///< Or X4
1335 SlotDataBusWidth8X = 0x0B, ///< Or X8
1336 SlotDataBusWidth12X = 0x0C, ///< Or X12
1337 SlotDataBusWidth16X = 0x0D, ///< Or X16
1338 SlotDataBusWidth32X = 0x0E ///< Or X32
1339 } MISC_SLOT_DATA_BUS_WIDTH;
1340
1341 ///
1342 /// System Slots - Current Usage.
1343 ///
1344 typedef enum {
1345 SlotUsageOther = 0x01,
1346 SlotUsageUnknown = 0x02,
1347 SlotUsageAvailable = 0x03,
1348 SlotUsageInUse = 0x04,
1349 SlotUsageUnavailable = 0x05
1350 } MISC_SLOT_USAGE;
1351
1352 ///
1353 /// System Slots - Slot Length.
1354 ///
1355 typedef enum {
1356 SlotLengthOther = 0x01,
1357 SlotLengthUnknown = 0x02,
1358 SlotLengthShort = 0x03,
1359 SlotLengthLong = 0x04
1360 } MISC_SLOT_LENGTH;
1361
1362 ///
1363 /// System Slots - Slot Characteristics 1.
1364 ///
1365 typedef struct {
1366 UINT8 CharacteristicsUnknown :1;
1367 UINT8 Provides50Volts :1;
1368 UINT8 Provides33Volts :1;
1369 UINT8 SharedSlot :1;
1370 UINT8 PcCard16Supported :1;
1371 UINT8 CardBusSupported :1;
1372 UINT8 ZoomVideoSupported :1;
1373 UINT8 ModemRingResumeSupported:1;
1374 } MISC_SLOT_CHARACTERISTICS1;
1375 ///
1376 /// System Slots - Slot Characteristics 2.
1377 ///
1378 typedef struct {
1379 UINT8 PmeSignalSupported :1;
1380 UINT8 HotPlugDevicesSupported :1;
1381 UINT8 SmbusSignalSupported :1;
1382 UINT8 BifurcationSupported :1;
1383 UINT8 Reserved :4; ///< Set to 0.
1384 } MISC_SLOT_CHARACTERISTICS2;
1385
1386 ///
1387 /// System Slots - Peer Segment/Bus/Device/Function/Width Groups
1388 ///
1389 typedef struct {
1390 UINT16 SegmentGroupNum;
1391 UINT8 BusNum;
1392 UINT8 DevFuncNum;
1393 UINT8 DataBusWidth;
1394 } MISC_SLOT_PEER_GROUP;
1395
1396 ///
1397 /// System Slots (Type 9)
1398 ///
1399 /// The information in this structure defines the attributes of a system slot.
1400 /// One structure is provided for each slot in the system.
1401 ///
1402 ///
1403 typedef struct {
1404 SMBIOS_STRUCTURE Hdr;
1405 SMBIOS_TABLE_STRING SlotDesignation;
1406 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.
1407 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.
1408 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.
1409 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.
1410 UINT16 SlotID;
1411 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;
1412 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;
1413 //
1414 // Add for smbios 2.6
1415 //
1416 UINT16 SegmentGroupNum;
1417 UINT8 BusNum;
1418 UINT8 DevFuncNum;
1419 //
1420 // Add for smbios 3.2
1421 //
1422 UINT8 DataBusWidth;
1423 UINT8 PeerGroupingCount;
1424 MISC_SLOT_PEER_GROUP PeerGroups[1];
1425 } SMBIOS_TABLE_TYPE9;
1426
1427 ///
1428 /// On Board Devices Information - Device Types.
1429 ///
1430 typedef enum {
1431 OnBoardDeviceTypeOther = 0x01,
1432 OnBoardDeviceTypeUnknown = 0x02,
1433 OnBoardDeviceTypeVideo = 0x03,
1434 OnBoardDeviceTypeScsiController = 0x04,
1435 OnBoardDeviceTypeEthernet = 0x05,
1436 OnBoardDeviceTypeTokenRing = 0x06,
1437 OnBoardDeviceTypeSound = 0x07,
1438 OnBoardDeviceTypePATAController = 0x08,
1439 OnBoardDeviceTypeSATAController = 0x09,
1440 OnBoardDeviceTypeSASController = 0x0A
1441 } MISC_ONBOARD_DEVICE_TYPE;
1442
1443 ///
1444 /// Device Item Entry
1445 ///
1446 typedef struct {
1447 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.
1448 ///< Bit 7 - 1 : device enabled, 0 : device disabled.
1449 SMBIOS_TABLE_STRING DescriptionString;
1450 } DEVICE_STRUCT;
1451
1452 ///
1453 /// On Board Devices Information (Type 10, obsolete).
1454 ///
1455 /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended
1456 /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both
1457 /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.
1458 /// The information in this structure defines the attributes of devices that are onboard (soldered onto)
1459 /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS
1460 /// has some level of control over the enabling of the associated device for use by the system.
1461 ///
1462 typedef struct {
1463 SMBIOS_STRUCTURE Hdr;
1464 DEVICE_STRUCT Device[1];
1465 } SMBIOS_TABLE_TYPE10;
1466
1467 ///
1468 /// OEM Strings (Type 11).
1469 /// This structure contains free form strings defined by the OEM. Examples of this are:
1470 /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.
1471 ///
1472 typedef struct {
1473 SMBIOS_STRUCTURE Hdr;
1474 UINT8 StringCount;
1475 } SMBIOS_TABLE_TYPE11;
1476
1477 ///
1478 /// System Configuration Options (Type 12).
1479 ///
1480 /// This structure contains information required to configure the base board's Jumpers and Switches.
1481 ///
1482 typedef struct {
1483 SMBIOS_STRUCTURE Hdr;
1484 UINT8 StringCount;
1485 } SMBIOS_TABLE_TYPE12;
1486
1487
1488 ///
1489 /// BIOS Language Information (Type 13).
1490 ///
1491 /// The information in this structure defines the installable language attributes of the BIOS.
1492 ///
1493 typedef struct {
1494 SMBIOS_STRUCTURE Hdr;
1495 UINT8 InstallableLanguages;
1496 UINT8 Flags;
1497 UINT8 Reserved[15];
1498 SMBIOS_TABLE_STRING CurrentLanguages;
1499 } SMBIOS_TABLE_TYPE13;
1500
1501 ///
1502 /// Group Item Entry
1503 ///
1504 typedef struct {
1505 UINT8 ItemType;
1506 UINT16 ItemHandle;
1507 } GROUP_STRUCT;
1508
1509 ///
1510 /// Group Associations (Type 14).
1511 ///
1512 /// The Group Associations structure is provided for OEMs who want to specify
1513 /// the arrangement or hierarchy of certain components (including other Group Associations)
1514 /// within the system.
1515 ///
1516 typedef struct {
1517 SMBIOS_STRUCTURE Hdr;
1518 SMBIOS_TABLE_STRING GroupName;
1519 GROUP_STRUCT Group[1];
1520 } SMBIOS_TABLE_TYPE14;
1521
1522 ///
1523 /// System Event Log - Event Log Types.
1524 ///
1525 typedef enum {
1526 EventLogTypeReserved = 0x00,
1527 EventLogTypeSingleBitECC = 0x01,
1528 EventLogTypeMultiBitECC = 0x02,
1529 EventLogTypeParityMemErr = 0x03,
1530 EventLogTypeBusTimeOut = 0x04,
1531 EventLogTypeIOChannelCheck = 0x05,
1532 EventLogTypeSoftwareNMI = 0x06,
1533 EventLogTypePOSTMemResize = 0x07,
1534 EventLogTypePOSTErr = 0x08,
1535 EventLogTypePCIParityErr = 0x09,
1536 EventLogTypePCISystemErr = 0x0A,
1537 EventLogTypeCPUFailure = 0x0B,
1538 EventLogTypeEISATimeOut = 0x0C,
1539 EventLogTypeMemLogDisabled = 0x0D,
1540 EventLogTypeLoggingDisabled = 0x0E,
1541 EventLogTypeSysLimitExce = 0x10,
1542 EventLogTypeAsyncHWTimer = 0x11,
1543 EventLogTypeSysConfigInfo = 0x12,
1544 EventLogTypeHDInfo = 0x13,
1545 EventLogTypeSysReconfig = 0x14,
1546 EventLogTypeUncorrectCPUErr = 0x15,
1547 EventLogTypeAreaResetAndClr = 0x16,
1548 EventLogTypeSystemBoot = 0x17,
1549 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F
1550 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE
1551 EventLogTypeEndOfLog = 0xFF
1552 } EVENT_LOG_TYPE_DATA;
1553
1554 ///
1555 /// System Event Log - Variable Data Format Types.
1556 ///
1557 typedef enum {
1558 EventLogVariableNone = 0x00,
1559 EventLogVariableHandle = 0x01,
1560 EventLogVariableMutilEvent = 0x02,
1561 EventLogVariableMutilEventHandle = 0x03,
1562 EventLogVariablePOSTResultBitmap = 0x04,
1563 EventLogVariableSysManagementType = 0x05,
1564 EventLogVariableMutliEventSysManagmentType = 0x06,
1565 EventLogVariableUnused = 0x07,
1566 EventLogVariableOEMAssigned = 0x80
1567 } EVENT_LOG_VARIABLE_DATA;
1568
1569 ///
1570 /// Event Log Type Descriptors
1571 ///
1572 typedef struct {
1573 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.
1574 UINT8 DataFormatType;
1575 } EVENT_LOG_TYPE;
1576
1577 ///
1578 /// System Event Log (Type 15).
1579 ///
1580 /// The presence of this structure within the SMBIOS data returned for a system indicates
1581 /// that the system supports an event log. An event log is a fixed-length area within a
1582 /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header
1583 /// record, followed by one or more variable-length log records.
1584 ///
1585 typedef struct {
1586 SMBIOS_STRUCTURE Hdr;
1587 UINT16 LogAreaLength;
1588 UINT16 LogHeaderStartOffset;
1589 UINT16 LogDataStartOffset;
1590 UINT8 AccessMethod;
1591 UINT8 LogStatus;
1592 UINT32 LogChangeToken;
1593 UINT32 AccessMethodAddress;
1594 UINT8 LogHeaderFormat;
1595 UINT8 NumberOfSupportedLogTypeDescriptors;
1596 UINT8 LengthOfLogTypeDescriptor;
1597 EVENT_LOG_TYPE EventLogTypeDescriptors[1];
1598 } SMBIOS_TABLE_TYPE15;
1599
1600 ///
1601 /// Physical Memory Array - Location.
1602 ///
1603 typedef enum {
1604 MemoryArrayLocationOther = 0x01,
1605 MemoryArrayLocationUnknown = 0x02,
1606 MemoryArrayLocationSystemBoard = 0x03,
1607 MemoryArrayLocationIsaAddonCard = 0x04,
1608 MemoryArrayLocationEisaAddonCard = 0x05,
1609 MemoryArrayLocationPciAddonCard = 0x06,
1610 MemoryArrayLocationMcaAddonCard = 0x07,
1611 MemoryArrayLocationPcmciaAddonCard = 0x08,
1612 MemoryArrayLocationProprietaryAddonCard = 0x09,
1613 MemoryArrayLocationNuBus = 0x0A,
1614 MemoryArrayLocationPc98C20AddonCard = 0xA0,
1615 MemoryArrayLocationPc98C24AddonCard = 0xA1,
1616 MemoryArrayLocationPc98EAddonCard = 0xA2,
1617 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,
1618 MemoryArrayLocationCXLFlexbus10AddonCard = 0xA4
1619 } MEMORY_ARRAY_LOCATION;
1620
1621 ///
1622 /// Physical Memory Array - Use.
1623 ///
1624 typedef enum {
1625 MemoryArrayUseOther = 0x01,
1626 MemoryArrayUseUnknown = 0x02,
1627 MemoryArrayUseSystemMemory = 0x03,
1628 MemoryArrayUseVideoMemory = 0x04,
1629 MemoryArrayUseFlashMemory = 0x05,
1630 MemoryArrayUseNonVolatileRam = 0x06,
1631 MemoryArrayUseCacheMemory = 0x07
1632 } MEMORY_ARRAY_USE;
1633
1634 ///
1635 /// Physical Memory Array - Error Correction Types.
1636 ///
1637 typedef enum {
1638 MemoryErrorCorrectionOther = 0x01,
1639 MemoryErrorCorrectionUnknown = 0x02,
1640 MemoryErrorCorrectionNone = 0x03,
1641 MemoryErrorCorrectionParity = 0x04,
1642 MemoryErrorCorrectionSingleBitEcc = 0x05,
1643 MemoryErrorCorrectionMultiBitEcc = 0x06,
1644 MemoryErrorCorrectionCrc = 0x07
1645 } MEMORY_ERROR_CORRECTION;
1646
1647 ///
1648 /// Physical Memory Array (Type 16).
1649 ///
1650 /// This structure describes a collection of memory devices that operate
1651 /// together to form a memory address space.
1652 ///
1653 typedef struct {
1654 SMBIOS_STRUCTURE Hdr;
1655 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.
1656 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.
1657 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.
1658 UINT32 MaximumCapacity;
1659 UINT16 MemoryErrorInformationHandle;
1660 UINT16 NumberOfMemoryDevices;
1661 //
1662 // Add for smbios 2.7
1663 //
1664 UINT64 ExtendedMaximumCapacity;
1665 } SMBIOS_TABLE_TYPE16;
1666
1667 ///
1668 /// Memory Device - Form Factor.
1669 ///
1670 typedef enum {
1671 MemoryFormFactorOther = 0x01,
1672 MemoryFormFactorUnknown = 0x02,
1673 MemoryFormFactorSimm = 0x03,
1674 MemoryFormFactorSip = 0x04,
1675 MemoryFormFactorChip = 0x05,
1676 MemoryFormFactorDip = 0x06,
1677 MemoryFormFactorZip = 0x07,
1678 MemoryFormFactorProprietaryCard = 0x08,
1679 MemoryFormFactorDimm = 0x09,
1680 MemoryFormFactorTsop = 0x0A,
1681 MemoryFormFactorRowOfChips = 0x0B,
1682 MemoryFormFactorRimm = 0x0C,
1683 MemoryFormFactorSodimm = 0x0D,
1684 MemoryFormFactorSrimm = 0x0E,
1685 MemoryFormFactorFbDimm = 0x0F,
1686 MemoryFormFactorDie = 0x10
1687 } MEMORY_FORM_FACTOR;
1688
1689 ///
1690 /// Memory Device - Type
1691 ///
1692 typedef enum {
1693 MemoryTypeOther = 0x01,
1694 MemoryTypeUnknown = 0x02,
1695 MemoryTypeDram = 0x03,
1696 MemoryTypeEdram = 0x04,
1697 MemoryTypeVram = 0x05,
1698 MemoryTypeSram = 0x06,
1699 MemoryTypeRam = 0x07,
1700 MemoryTypeRom = 0x08,
1701 MemoryTypeFlash = 0x09,
1702 MemoryTypeEeprom = 0x0A,
1703 MemoryTypeFeprom = 0x0B,
1704 MemoryTypeEprom = 0x0C,
1705 MemoryTypeCdram = 0x0D,
1706 MemoryType3Dram = 0x0E,
1707 MemoryTypeSdram = 0x0F,
1708 MemoryTypeSgram = 0x10,
1709 MemoryTypeRdram = 0x11,
1710 MemoryTypeDdr = 0x12,
1711 MemoryTypeDdr2 = 0x13,
1712 MemoryTypeDdr2FbDimm = 0x14,
1713 MemoryTypeDdr3 = 0x18,
1714 MemoryTypeFbd2 = 0x19,
1715 MemoryTypeDdr4 = 0x1A,
1716 MemoryTypeLpddr = 0x1B,
1717 MemoryTypeLpddr2 = 0x1C,
1718 MemoryTypeLpddr3 = 0x1D,
1719 MemoryTypeLpddr4 = 0x1E,
1720 MemoryTypeLogicalNonVolatileDevice = 0x1F,
1721 MemoryTypeHBM = 0x20,
1722 MemoryTypeHBM2 = 0x21,
1723 MemoryTypeDdr5 = 0x22,
1724 MemoryTypeLpddr5 = 0x23
1725 } MEMORY_DEVICE_TYPE;
1726
1727 ///
1728 /// Memory Device - Type Detail
1729 ///
1730 typedef struct {
1731 UINT16 Reserved :1;
1732 UINT16 Other :1;
1733 UINT16 Unknown :1;
1734 UINT16 FastPaged :1;
1735 UINT16 StaticColumn :1;
1736 UINT16 PseudoStatic :1;
1737 UINT16 Rambus :1;
1738 UINT16 Synchronous :1;
1739 UINT16 Cmos :1;
1740 UINT16 Edo :1;
1741 UINT16 WindowDram :1;
1742 UINT16 CacheDram :1;
1743 UINT16 Nonvolatile :1;
1744 UINT16 Registered :1;
1745 UINT16 Unbuffered :1;
1746 UINT16 LrDimm :1;
1747 } MEMORY_DEVICE_TYPE_DETAIL;
1748
1749 ///
1750 /// Memory Device - Memory Technology
1751 ///
1752 typedef enum {
1753 MemoryTechnologyOther = 0x01,
1754 MemoryTechnologyUnknown = 0x02,
1755 MemoryTechnologyDram = 0x03,
1756 MemoryTechnologyNvdimmN = 0x04,
1757 MemoryTechnologyNvdimmF = 0x05,
1758 MemoryTechnologyNvdimmP = 0x06,
1759 //
1760 // This definition is updated to represent Intel
1761 // Optane DC Presistent Memory in SMBIOS spec 3.3.0
1762 //
1763 MemoryTechnologyIntelPersistentMemory = 0x07
1764 } MEMORY_DEVICE_TECHNOLOGY;
1765
1766 ///
1767 /// Memory Device - Memory Operating Mode Capability
1768 ///
1769 typedef union {
1770 ///
1771 /// Individual bit fields
1772 ///
1773 struct {
1774 UINT16 Reserved :1; ///< Set to 0.
1775 UINT16 Other :1;
1776 UINT16 Unknown :1;
1777 UINT16 VolatileMemory :1;
1778 UINT16 ByteAccessiblePersistentMemory :1;
1779 UINT16 BlockAccessiblePersistentMemory :1;
1780 UINT16 Reserved2 :10; ///< Set to 0.
1781 } Bits;
1782 ///
1783 /// All bit fields as a 16-bit value
1784 ///
1785 UINT16 Uint16;
1786 } MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
1787
1788 ///
1789 /// Memory Device (Type 17).
1790 ///
1791 /// This structure describes a single memory device that is part of
1792 /// a larger Physical Memory Array (Type 16).
1793 /// Note: If a system includes memory-device sockets, the SMBIOS implementation
1794 /// includes a Memory Device structure instance for each slot, whether or not the
1795 /// socket is currently populated.
1796 ///
1797 typedef struct {
1798 SMBIOS_STRUCTURE Hdr;
1799 UINT16 MemoryArrayHandle;
1800 UINT16 MemoryErrorInformationHandle;
1801 UINT16 TotalWidth;
1802 UINT16 DataWidth;
1803 UINT16 Size;
1804 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
1805 UINT8 DeviceSet;
1806 SMBIOS_TABLE_STRING DeviceLocator;
1807 SMBIOS_TABLE_STRING BankLocator;
1808 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
1809 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
1810 UINT16 Speed;
1811 SMBIOS_TABLE_STRING Manufacturer;
1812 SMBIOS_TABLE_STRING SerialNumber;
1813 SMBIOS_TABLE_STRING AssetTag;
1814 SMBIOS_TABLE_STRING PartNumber;
1815 //
1816 // Add for smbios 2.6
1817 //
1818 UINT8 Attributes;
1819 //
1820 // Add for smbios 2.7
1821 //
1822 UINT32 ExtendedSize;
1823 //
1824 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility
1825 // although this field is renamed from "Configured Memory Clock Speed"
1826 // to "Configured Memory Speed" in smbios 3.2.0.
1827 //
1828 UINT16 ConfiguredMemoryClockSpeed;
1829 //
1830 // Add for smbios 2.8.0
1831 //
1832 UINT16 MinimumVoltage;
1833 UINT16 MaximumVoltage;
1834 UINT16 ConfiguredVoltage;
1835 //
1836 // Add for smbios 3.2.0
1837 //
1838 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
1839 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;
1840 SMBIOS_TABLE_STRING FirwareVersion;
1841 UINT16 ModuleManufacturerID;
1842 UINT16 ModuleProductID;
1843 UINT16 MemorySubsystemControllerManufacturerID;
1844 UINT16 MemorySubsystemControllerProductID;
1845 UINT64 NonVolatileSize;
1846 UINT64 VolatileSize;
1847 UINT64 CacheSize;
1848 UINT64 LogicalSize;
1849 //
1850 // Add for smbios 3.3.0
1851 //
1852 UINT32 ExtendedSpeed;
1853 UINT32 ExtendedConfiguredMemorySpeed;
1854 } SMBIOS_TABLE_TYPE17;
1855
1856 ///
1857 /// 32-bit Memory Error Information - Error Type.
1858 ///
1859 typedef enum {
1860 MemoryErrorOther = 0x01,
1861 MemoryErrorUnknown = 0x02,
1862 MemoryErrorOk = 0x03,
1863 MemoryErrorBadRead = 0x04,
1864 MemoryErrorParity = 0x05,
1865 MemoryErrorSigleBit = 0x06,
1866 MemoryErrorDoubleBit = 0x07,
1867 MemoryErrorMultiBit = 0x08,
1868 MemoryErrorNibble = 0x09,
1869 MemoryErrorChecksum = 0x0A,
1870 MemoryErrorCrc = 0x0B,
1871 MemoryErrorCorrectSingleBit = 0x0C,
1872 MemoryErrorCorrected = 0x0D,
1873 MemoryErrorUnCorrectable = 0x0E
1874 } MEMORY_ERROR_TYPE;
1875
1876 ///
1877 /// 32-bit Memory Error Information - Error Granularity.
1878 ///
1879 typedef enum {
1880 MemoryGranularityOther = 0x01,
1881 MemoryGranularityOtherUnknown = 0x02,
1882 MemoryGranularityDeviceLevel = 0x03,
1883 MemoryGranularityMemPartitionLevel = 0x04
1884 } MEMORY_ERROR_GRANULARITY;
1885
1886 ///
1887 /// 32-bit Memory Error Information - Error Operation.
1888 ///
1889 typedef enum {
1890 MemoryErrorOperationOther = 0x01,
1891 MemoryErrorOperationUnknown = 0x02,
1892 MemoryErrorOperationRead = 0x03,
1893 MemoryErrorOperationWrite = 0x04,
1894 MemoryErrorOperationPartialWrite = 0x05
1895 } MEMORY_ERROR_OPERATION;
1896
1897 ///
1898 /// 32-bit Memory Error Information (Type 18).
1899 ///
1900 /// This structure identifies the specifics of an error that might be detected
1901 /// within a Physical Memory Array.
1902 ///
1903 typedef struct {
1904 SMBIOS_STRUCTURE Hdr;
1905 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
1906 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
1907 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
1908 UINT32 VendorSyndrome;
1909 UINT32 MemoryArrayErrorAddress;
1910 UINT32 DeviceErrorAddress;
1911 UINT32 ErrorResolution;
1912 } SMBIOS_TABLE_TYPE18;
1913
1914 ///
1915 /// Memory Array Mapped Address (Type 19).
1916 ///
1917 /// This structure provides the address mapping for a Physical Memory Array.
1918 /// One structure is present for each contiguous address range described.
1919 ///
1920 typedef struct {
1921 SMBIOS_STRUCTURE Hdr;
1922 UINT32 StartingAddress;
1923 UINT32 EndingAddress;
1924 UINT16 MemoryArrayHandle;
1925 UINT8 PartitionWidth;
1926 //
1927 // Add for smbios 2.7
1928 //
1929 UINT64 ExtendedStartingAddress;
1930 UINT64 ExtendedEndingAddress;
1931 } SMBIOS_TABLE_TYPE19;
1932
1933 ///
1934 /// Memory Device Mapped Address (Type 20).
1935 ///
1936 /// This structure maps memory address space usually to a device-level granularity.
1937 /// One structure is present for each contiguous address range described.
1938 ///
1939 typedef struct {
1940 SMBIOS_STRUCTURE Hdr;
1941 UINT32 StartingAddress;
1942 UINT32 EndingAddress;
1943 UINT16 MemoryDeviceHandle;
1944 UINT16 MemoryArrayMappedAddressHandle;
1945 UINT8 PartitionRowPosition;
1946 UINT8 InterleavePosition;
1947 UINT8 InterleavedDataDepth;
1948 //
1949 // Add for smbios 2.7
1950 //
1951 UINT64 ExtendedStartingAddress;
1952 UINT64 ExtendedEndingAddress;
1953 } SMBIOS_TABLE_TYPE20;
1954
1955 ///
1956 /// Built-in Pointing Device - Type
1957 ///
1958 typedef enum {
1959 PointingDeviceTypeOther = 0x01,
1960 PointingDeviceTypeUnknown = 0x02,
1961 PointingDeviceTypeMouse = 0x03,
1962 PointingDeviceTypeTrackBall = 0x04,
1963 PointingDeviceTypeTrackPoint = 0x05,
1964 PointingDeviceTypeGlidePoint = 0x06,
1965 PointingDeviceTouchPad = 0x07,
1966 PointingDeviceTouchScreen = 0x08,
1967 PointingDeviceOpticalSensor = 0x09
1968 } BUILTIN_POINTING_DEVICE_TYPE;
1969
1970 ///
1971 /// Built-in Pointing Device - Interface.
1972 ///
1973 typedef enum {
1974 PointingDeviceInterfaceOther = 0x01,
1975 PointingDeviceInterfaceUnknown = 0x02,
1976 PointingDeviceInterfaceSerial = 0x03,
1977 PointingDeviceInterfacePs2 = 0x04,
1978 PointingDeviceInterfaceInfrared = 0x05,
1979 PointingDeviceInterfaceHpHil = 0x06,
1980 PointingDeviceInterfaceBusMouse = 0x07,
1981 PointingDeviceInterfaceADB = 0x08,
1982 PointingDeviceInterfaceBusMouseDB9 = 0xA0,
1983 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,
1984 PointingDeviceInterfaceUsb = 0xA2
1985 } BUILTIN_POINTING_DEVICE_INTERFACE;
1986
1987 ///
1988 /// Built-in Pointing Device (Type 21).
1989 ///
1990 /// This structure describes the attributes of the built-in pointing device for the
1991 /// system. The presence of this structure does not imply that the built-in
1992 /// pointing device is active for the system's use!
1993 ///
1994 typedef struct {
1995 SMBIOS_STRUCTURE Hdr;
1996 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.
1997 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.
1998 UINT8 NumberOfButtons;
1999 } SMBIOS_TABLE_TYPE21;
2000
2001 ///
2002 /// Portable Battery - Device Chemistry
2003 ///
2004 typedef enum {
2005 PortableBatteryDeviceChemistryOther = 0x01,
2006 PortableBatteryDeviceChemistryUnknown = 0x02,
2007 PortableBatteryDeviceChemistryLeadAcid = 0x03,
2008 PortableBatteryDeviceChemistryNickelCadmium = 0x04,
2009 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,
2010 PortableBatteryDeviceChemistryLithiumIon = 0x06,
2011 PortableBatteryDeviceChemistryZincAir = 0x07,
2012 PortableBatteryDeviceChemistryLithiumPolymer = 0x08
2013 } PORTABLE_BATTERY_DEVICE_CHEMISTRY;
2014
2015 ///
2016 /// Portable Battery (Type 22).
2017 ///
2018 /// This structure describes the attributes of the portable battery(s) for the system.
2019 /// The structure contains the static attributes for the group. Each structure describes
2020 /// a single battery pack's attributes.
2021 ///
2022 typedef struct {
2023 SMBIOS_STRUCTURE Hdr;
2024 SMBIOS_TABLE_STRING Location;
2025 SMBIOS_TABLE_STRING Manufacturer;
2026 SMBIOS_TABLE_STRING ManufactureDate;
2027 SMBIOS_TABLE_STRING SerialNumber;
2028 SMBIOS_TABLE_STRING DeviceName;
2029 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.
2030 UINT16 DeviceCapacity;
2031 UINT16 DesignVoltage;
2032 SMBIOS_TABLE_STRING SBDSVersionNumber;
2033 UINT8 MaximumErrorInBatteryData;
2034 UINT16 SBDSSerialNumber;
2035 UINT16 SBDSManufactureDate;
2036 SMBIOS_TABLE_STRING SBDSDeviceChemistry;
2037 UINT8 DesignCapacityMultiplier;
2038 UINT32 OEMSpecific;
2039 } SMBIOS_TABLE_TYPE22;
2040
2041 ///
2042 /// System Reset (Type 23)
2043 ///
2044 /// This structure describes whether Automatic System Reset functions enabled (Status).
2045 /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)
2046 /// before the Interval elapses, an automatic system reset will occur. The system will re-boot
2047 /// according to the Boot Option. This function may repeat until the Limit is reached, at which time
2048 /// the system will re-boot according to the Boot Option at Limit.
2049 ///
2050 typedef struct {
2051 SMBIOS_STRUCTURE Hdr;
2052 UINT8 Capabilities;
2053 UINT16 ResetCount;
2054 UINT16 ResetLimit;
2055 UINT16 TimerInterval;
2056 UINT16 Timeout;
2057 } SMBIOS_TABLE_TYPE23;
2058
2059 ///
2060 /// Hardware Security (Type 24).
2061 ///
2062 /// This structure describes the system-wide hardware security settings.
2063 ///
2064 typedef struct {
2065 SMBIOS_STRUCTURE Hdr;
2066 UINT8 HardwareSecuritySettings;
2067 } SMBIOS_TABLE_TYPE24;
2068
2069 ///
2070 /// System Power Controls (Type 25).
2071 ///
2072 /// This structure describes the attributes for controlling the main power supply to the system.
2073 /// Software that interprets this structure uses the month, day, hour, minute, and second values
2074 /// to determine the number of seconds until the next power-on of the system. The presence of
2075 /// this structure implies that a timed power-on facility is available for the system.
2076 ///
2077 typedef struct {
2078 SMBIOS_STRUCTURE Hdr;
2079 UINT8 NextScheduledPowerOnMonth;
2080 UINT8 NextScheduledPowerOnDayOfMonth;
2081 UINT8 NextScheduledPowerOnHour;
2082 UINT8 NextScheduledPowerOnMinute;
2083 UINT8 NextScheduledPowerOnSecond;
2084 } SMBIOS_TABLE_TYPE25;
2085
2086 ///
2087 /// Voltage Probe - Location and Status.
2088 ///
2089 typedef struct {
2090 UINT8 VoltageProbeSite :5;
2091 UINT8 VoltageProbeStatus :3;
2092 } MISC_VOLTAGE_PROBE_LOCATION;
2093
2094 ///
2095 /// Voltage Probe (Type 26)
2096 ///
2097 /// This describes the attributes for a voltage probe in the system.
2098 /// Each structure describes a single voltage probe.
2099 ///
2100 typedef struct {
2101 SMBIOS_STRUCTURE Hdr;
2102 SMBIOS_TABLE_STRING Description;
2103 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;
2104 UINT16 MaximumValue;
2105 UINT16 MinimumValue;
2106 UINT16 Resolution;
2107 UINT16 Tolerance;
2108 UINT16 Accuracy;
2109 UINT32 OEMDefined;
2110 UINT16 NominalValue;
2111 } SMBIOS_TABLE_TYPE26;
2112
2113 ///
2114 /// Cooling Device - Device Type and Status.
2115 ///
2116 typedef struct {
2117 UINT8 CoolingDevice :5;
2118 UINT8 CoolingDeviceStatus :3;
2119 } MISC_COOLING_DEVICE_TYPE;
2120
2121 ///
2122 /// Cooling Device (Type 27)
2123 ///
2124 /// This structure describes the attributes for a cooling device in the system.
2125 /// Each structure describes a single cooling device.
2126 ///
2127 typedef struct {
2128 SMBIOS_STRUCTURE Hdr;
2129 UINT16 TemperatureProbeHandle;
2130 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;
2131 UINT8 CoolingUnitGroup;
2132 UINT32 OEMDefined;
2133 UINT16 NominalSpeed;
2134 //
2135 // Add for smbios 2.7
2136 //
2137 SMBIOS_TABLE_STRING Description;
2138 } SMBIOS_TABLE_TYPE27;
2139
2140 ///
2141 /// Temperature Probe - Location and Status.
2142 ///
2143 typedef struct {
2144 UINT8 TemperatureProbeSite :5;
2145 UINT8 TemperatureProbeStatus :3;
2146 } MISC_TEMPERATURE_PROBE_LOCATION;
2147
2148 ///
2149 /// Temperature Probe (Type 28).
2150 ///
2151 /// This structure describes the attributes for a temperature probe in the system.
2152 /// Each structure describes a single temperature probe.
2153 ///
2154 typedef struct {
2155 SMBIOS_STRUCTURE Hdr;
2156 SMBIOS_TABLE_STRING Description;
2157 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;
2158 UINT16 MaximumValue;
2159 UINT16 MinimumValue;
2160 UINT16 Resolution;
2161 UINT16 Tolerance;
2162 UINT16 Accuracy;
2163 UINT32 OEMDefined;
2164 UINT16 NominalValue;
2165 } SMBIOS_TABLE_TYPE28;
2166
2167 ///
2168 /// Electrical Current Probe - Location and Status.
2169 ///
2170 typedef struct {
2171 UINT8 ElectricalCurrentProbeSite :5;
2172 UINT8 ElectricalCurrentProbeStatus :3;
2173 } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
2174
2175 ///
2176 /// Electrical Current Probe (Type 29).
2177 ///
2178 /// This structure describes the attributes for an electrical current probe in the system.
2179 /// Each structure describes a single electrical current probe.
2180 ///
2181 typedef struct {
2182 SMBIOS_STRUCTURE Hdr;
2183 SMBIOS_TABLE_STRING Description;
2184 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;
2185 UINT16 MaximumValue;
2186 UINT16 MinimumValue;
2187 UINT16 Resolution;
2188 UINT16 Tolerance;
2189 UINT16 Accuracy;
2190 UINT32 OEMDefined;
2191 UINT16 NominalValue;
2192 } SMBIOS_TABLE_TYPE29;
2193
2194 ///
2195 /// Out-of-Band Remote Access (Type 30).
2196 ///
2197 /// This structure describes the attributes and policy settings of a hardware facility
2198 /// that may be used to gain remote access to a hardware system when the operating system
2199 /// is not available due to power-down status, hardware failures, or boot failures.
2200 ///
2201 typedef struct {
2202 SMBIOS_STRUCTURE Hdr;
2203 SMBIOS_TABLE_STRING ManufacturerName;
2204 UINT8 Connections;
2205 } SMBIOS_TABLE_TYPE30;
2206
2207 ///
2208 /// Boot Integrity Services (BIS) Entry Point (Type 31).
2209 ///
2210 /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).
2211 ///
2212 typedef struct {
2213 SMBIOS_STRUCTURE Hdr;
2214 UINT8 Checksum;
2215 UINT8 Reserved1;
2216 UINT16 Reserved2;
2217 UINT32 BisEntry16;
2218 UINT32 BisEntry32;
2219 UINT64 Reserved3;
2220 UINT32 Reserved4;
2221 } SMBIOS_TABLE_TYPE31;
2222
2223 ///
2224 /// System Boot Information - System Boot Status.
2225 ///
2226 typedef enum {
2227 BootInformationStatusNoError = 0x00,
2228 BootInformationStatusNoBootableMedia = 0x01,
2229 BootInformationStatusNormalOSFailedLoading = 0x02,
2230 BootInformationStatusFirmwareDetectedFailure = 0x03,
2231 BootInformationStatusOSDetectedFailure = 0x04,
2232 BootInformationStatusUserRequestedBoot = 0x05,
2233 BootInformationStatusSystemSecurityViolation = 0x06,
2234 BootInformationStatusPreviousRequestedImage = 0x07,
2235 BootInformationStatusWatchdogTimerExpired = 0x08,
2236 BootInformationStatusStartReserved = 0x09,
2237 BootInformationStatusStartOemSpecific = 0x80,
2238 BootInformationStatusStartProductSpecific = 0xC0
2239 } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
2240
2241 ///
2242 /// System Boot Information (Type 32).
2243 ///
2244 /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the
2245 /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management
2246 /// application via this structure. When used in the PXE environment, for example,
2247 /// this code identifies the reason the PXE was initiated and can be used by boot-image
2248 /// software to further automate an enterprise's PXE sessions. For example, an enterprise
2249 /// could choose to automatically download a hardware-diagnostic image to a client whose
2250 /// reason code indicated either a firmware- or operating system-detected hardware failure.
2251 ///
2252 typedef struct {
2253 SMBIOS_STRUCTURE Hdr;
2254 UINT8 Reserved[6];
2255 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.
2256 } SMBIOS_TABLE_TYPE32;
2257
2258 ///
2259 /// 64-bit Memory Error Information (Type 33).
2260 ///
2261 /// This structure describes an error within a Physical Memory Array,
2262 /// when the error address is above 4G (0xFFFFFFFF).
2263 ///
2264 typedef struct {
2265 SMBIOS_STRUCTURE Hdr;
2266 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.
2267 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.
2268 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.
2269 UINT32 VendorSyndrome;
2270 UINT64 MemoryArrayErrorAddress;
2271 UINT64 DeviceErrorAddress;
2272 UINT32 ErrorResolution;
2273 } SMBIOS_TABLE_TYPE33;
2274
2275 ///
2276 /// Management Device - Type.
2277 ///
2278 typedef enum {
2279 ManagementDeviceTypeOther = 0x01,
2280 ManagementDeviceTypeUnknown = 0x02,
2281 ManagementDeviceTypeLm75 = 0x03,
2282 ManagementDeviceTypeLm78 = 0x04,
2283 ManagementDeviceTypeLm79 = 0x05,
2284 ManagementDeviceTypeLm80 = 0x06,
2285 ManagementDeviceTypeLm81 = 0x07,
2286 ManagementDeviceTypeAdm9240 = 0x08,
2287 ManagementDeviceTypeDs1780 = 0x09,
2288 ManagementDeviceTypeMaxim1617 = 0x0A,
2289 ManagementDeviceTypeGl518Sm = 0x0B,
2290 ManagementDeviceTypeW83781D = 0x0C,
2291 ManagementDeviceTypeHt82H791 = 0x0D
2292 } MISC_MANAGEMENT_DEVICE_TYPE;
2293
2294 ///
2295 /// Management Device - Address Type.
2296 ///
2297 typedef enum {
2298 ManagementDeviceAddressTypeOther = 0x01,
2299 ManagementDeviceAddressTypeUnknown = 0x02,
2300 ManagementDeviceAddressTypeIOPort = 0x03,
2301 ManagementDeviceAddressTypeMemory = 0x04,
2302 ManagementDeviceAddressTypeSmbus = 0x05
2303 } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
2304
2305 ///
2306 /// Management Device (Type 34).
2307 ///
2308 /// The information in this structure defines the attributes of a Management Device.
2309 /// A Management Device might control one or more fans or voltage, current, or temperature
2310 /// probes as defined by one or more Management Device Component structures.
2311 ///
2312 typedef struct {
2313 SMBIOS_STRUCTURE Hdr;
2314 SMBIOS_TABLE_STRING Description;
2315 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.
2316 UINT32 Address;
2317 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.
2318 } SMBIOS_TABLE_TYPE34;
2319
2320 ///
2321 /// Management Device Component (Type 35)
2322 ///
2323 /// This structure associates a cooling device or environmental probe with structures
2324 /// that define the controlling hardware device and (optionally) the component's thresholds.
2325 ///
2326 typedef struct {
2327 SMBIOS_STRUCTURE Hdr;
2328 SMBIOS_TABLE_STRING Description;
2329 UINT16 ManagementDeviceHandle;
2330 UINT16 ComponentHandle;
2331 UINT16 ThresholdHandle;
2332 } SMBIOS_TABLE_TYPE35;
2333
2334 ///
2335 /// Management Device Threshold Data (Type 36).
2336 ///
2337 /// The information in this structure defines threshold information for
2338 /// a component (probe or cooling-unit) contained within a Management Device.
2339 ///
2340 typedef struct {
2341 SMBIOS_STRUCTURE Hdr;
2342 UINT16 LowerThresholdNonCritical;
2343 UINT16 UpperThresholdNonCritical;
2344 UINT16 LowerThresholdCritical;
2345 UINT16 UpperThresholdCritical;
2346 UINT16 LowerThresholdNonRecoverable;
2347 UINT16 UpperThresholdNonRecoverable;
2348 } SMBIOS_TABLE_TYPE36;
2349
2350 ///
2351 /// Memory Channel Entry.
2352 ///
2353 typedef struct {
2354 UINT8 DeviceLoad;
2355 UINT16 DeviceHandle;
2356 } MEMORY_DEVICE;
2357
2358 ///
2359 /// Memory Channel - Channel Type.
2360 ///
2361 typedef enum {
2362 MemoryChannelTypeOther = 0x01,
2363 MemoryChannelTypeUnknown = 0x02,
2364 MemoryChannelTypeRambus = 0x03,
2365 MemoryChannelTypeSyncLink = 0x04
2366 } MEMORY_CHANNEL_TYPE;
2367
2368 ///
2369 /// Memory Channel (Type 37)
2370 ///
2371 /// The information in this structure provides the correlation between a Memory Channel
2372 /// and its associated Memory Devices. Each device presents one or more loads to the channel.
2373 /// The sum of all device loads cannot exceed the channel's defined maximum.
2374 ///
2375 typedef struct {
2376 SMBIOS_STRUCTURE Hdr;
2377 UINT8 ChannelType;
2378 UINT8 MaximumChannelLoad;
2379 UINT8 MemoryDeviceCount;
2380 MEMORY_DEVICE MemoryDevice[1];
2381 } SMBIOS_TABLE_TYPE37;
2382
2383 ///
2384 /// IPMI Device Information - BMC Interface Type
2385 ///
2386 typedef enum {
2387 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,
2388 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
2389 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
2390 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
2391 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
2392 } BMC_INTERFACE_TYPE;
2393
2394 ///
2395 /// IPMI Device Information (Type 38).
2396 ///
2397 /// The information in this structure defines the attributes of an
2398 /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
2399 ///
2400 /// The Type 42 structure can also be used to describe a physical management controller
2401 /// host interface and one or more protocols that share that interface. If IPMI is not
2402 /// shared with other protocols, either the Type 38 or Type 42 structures can be used.
2403 /// Providing Type 38 is recommended for backward compatibility.
2404 ///
2405 typedef struct {
2406 SMBIOS_STRUCTURE Hdr;
2407 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
2408 UINT8 IPMISpecificationRevision;
2409 UINT8 I2CSlaveAddress;
2410 UINT8 NVStorageDeviceAddress;
2411 UINT64 BaseAddress;
2412 UINT8 BaseAddressModifier_InterruptInfo;
2413 UINT8 InterruptNumber;
2414 } SMBIOS_TABLE_TYPE38;
2415
2416 ///
2417 /// System Power Supply - Power Supply Characteristics.
2418 ///
2419 typedef struct {
2420 UINT16 PowerSupplyHotReplaceable:1;
2421 UINT16 PowerSupplyPresent :1;
2422 UINT16 PowerSupplyUnplugged :1;
2423 UINT16 InputVoltageRangeSwitch :4;
2424 UINT16 PowerSupplyStatus :3;
2425 UINT16 PowerSupplyType :4;
2426 UINT16 Reserved :2;
2427 } SYS_POWER_SUPPLY_CHARACTERISTICS;
2428
2429 ///
2430 /// System Power Supply (Type 39).
2431 ///
2432 /// This structure identifies attributes of a system power supply. One instance
2433 /// of this record is present for each possible power supply in a system.
2434 ///
2435 typedef struct {
2436 SMBIOS_STRUCTURE Hdr;
2437 UINT8 PowerUnitGroup;
2438 SMBIOS_TABLE_STRING Location;
2439 SMBIOS_TABLE_STRING DeviceName;
2440 SMBIOS_TABLE_STRING Manufacturer;
2441 SMBIOS_TABLE_STRING SerialNumber;
2442 SMBIOS_TABLE_STRING AssetTagNumber;
2443 SMBIOS_TABLE_STRING ModelPartNumber;
2444 SMBIOS_TABLE_STRING RevisionLevel;
2445 UINT16 MaxPowerCapacity;
2446 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
2447 UINT16 InputVoltageProbeHandle;
2448 UINT16 CoolingDeviceHandle;
2449 UINT16 InputCurrentProbeHandle;
2450 } SMBIOS_TABLE_TYPE39;
2451
2452 ///
2453 /// Additional Information Entry Format.
2454 ///
2455 typedef struct {
2456 UINT8 EntryLength;
2457 UINT16 ReferencedHandle;
2458 UINT8 ReferencedOffset;
2459 SMBIOS_TABLE_STRING EntryString;
2460 UINT8 Value[1];
2461 } ADDITIONAL_INFORMATION_ENTRY;
2462
2463 ///
2464 /// Additional Information (Type 40).
2465 ///
2466 /// This structure is intended to provide additional information for handling unspecified
2467 /// enumerated values and interim field updates in another structure.
2468 ///
2469 typedef struct {
2470 SMBIOS_STRUCTURE Hdr;
2471 UINT8 NumberOfAdditionalInformationEntries;
2472 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];
2473 } SMBIOS_TABLE_TYPE40;
2474
2475 ///
2476 /// Onboard Devices Extended Information - Onboard Device Types.
2477 ///
2478 typedef enum{
2479 OnBoardDeviceExtendedTypeOther = 0x01,
2480 OnBoardDeviceExtendedTypeUnknown = 0x02,
2481 OnBoardDeviceExtendedTypeVideo = 0x03,
2482 OnBoardDeviceExtendedTypeScsiController = 0x04,
2483 OnBoardDeviceExtendedTypeEthernet = 0x05,
2484 OnBoardDeviceExtendedTypeTokenRing = 0x06,
2485 OnBoardDeviceExtendedTypeSound = 0x07,
2486 OnBoardDeviceExtendedTypePATAController = 0x08,
2487 OnBoardDeviceExtendedTypeSATAController = 0x09,
2488 OnBoardDeviceExtendedTypeSASController = 0x0A
2489 } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;
2490
2491 ///
2492 /// Onboard Devices Extended Information (Type 41).
2493 ///
2494 /// The information in this structure defines the attributes of devices that
2495 /// are onboard (soldered onto) a system element, usually the baseboard.
2496 /// In general, an entry in this table implies that the BIOS has some level of
2497 /// control over the enabling of the associated device for use by the system.
2498 ///
2499 typedef struct {
2500 SMBIOS_STRUCTURE Hdr;
2501 SMBIOS_TABLE_STRING ReferenceDesignation;
2502 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE
2503 UINT8 DeviceTypeInstance;
2504 UINT16 SegmentGroupNum;
2505 UINT8 BusNum;
2506 UINT8 DevFuncNum;
2507 } SMBIOS_TABLE_TYPE41;
2508
2509 ///
2510 /// Management Controller Host Interface - Protocol Record Data Format.
2511 ///
2512 typedef struct {
2513 UINT8 ProtocolType;
2514 UINT8 ProtocolTypeDataLen;
2515 UINT8 ProtocolTypeData[1];
2516 } MC_HOST_INTERFACE_PROTOCOL_RECORD;
2517
2518 ///
2519 /// Management Controller Host Interface - Interface Types.
2520 /// 00h - 3Fh: MCTP Host Interfaces
2521 ///
2522 typedef enum{
2523 MCHostInterfaceTypeNetworkHostInterface = 0x40,
2524 MCHostInterfaceTypeOemDefined = 0xF0
2525 } MC_HOST_INTERFACE_TYPE;
2526
2527 ///
2528 /// Management Controller Host Interface - Protocol Types.
2529 ///
2530 typedef enum{
2531 MCHostInterfaceProtocolTypeIPMI = 0x02,
2532 MCHostInterfaceProtocolTypeMCTP = 0x03,
2533 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,
2534 MCHostInterfaceProtocolTypeOemDefined = 0xF0
2535 } MC_HOST_INTERFACE_PROTOCOL_TYPE;
2536
2537 ///
2538 /// Management Controller Host Interface (Type 42).
2539 ///
2540 /// The information in this structure defines the attributes of a Management
2541 /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
2542 ///
2543 /// Type 42 should be used for management controller host interfaces that use protocols
2544 /// other than IPMI or that use multiple protocols on a single host interface type.
2545 ///
2546 /// This structure should also be provided if IPMI is shared with other protocols
2547 /// over the same interface hardware. If IPMI is not shared with other protocols,
2548 /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
2549 /// recommended for backward compatibility. The structures are not required to
2550 /// be mutually exclusive. Type 38 and Type 42 structures may be implemented
2551 /// simultaneously to provide backward compatibility with IPMI applications or drivers
2552 /// that do not yet recognize the Type 42 structure.
2553 ///
2554 typedef struct {
2555 SMBIOS_STRUCTURE Hdr;
2556 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
2557 UINT8 InterfaceTypeSpecificDataLength;
2558 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
2559 } SMBIOS_TABLE_TYPE42;
2560
2561
2562 ///
2563 /// Processor Specific Block - Processor Architecture Type
2564 ///
2565 typedef enum{
2566 ProcessorSpecificBlockArchTypeReserved = 0x00,
2567 ProcessorSpecificBlockArchTypeIa32 = 0x01,
2568 ProcessorSpecificBlockArchTypeX64 = 0x02,
2569 ProcessorSpecificBlockArchTypeItanium = 0x03,
2570 ProcessorSpecificBlockArchTypeAarch32 = 0x04,
2571 ProcessorSpecificBlockArchTypeAarch64 = 0x05,
2572 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,
2573 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,
2574 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08
2575 } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;
2576
2577 ///
2578 /// Processor Specific Block is the standard container of processor-specific data.
2579 ///
2580 typedef struct {
2581 UINT8 Length;
2582 UINT8 ProcessorArchType;
2583 ///
2584 /// Below followed by Processor-specific data
2585 ///
2586 ///
2587 } PROCESSOR_SPECIFIC_BLOCK;
2588
2589 ///
2590 /// Processor Additional Information(Type 44).
2591 ///
2592 /// The information in this structure defines the processor additional information in case
2593 /// SMBIOS type 4 is not sufficient to describe processor characteristics.
2594 /// The SMBIOS type 44 structure has a reference handle field to link back to the related
2595 /// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the
2596 /// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,
2597 /// SMBIOS type 44 structures describe different core-specific information.
2598 ///
2599 /// SMBIOS type 44 defines the standard header for the processor-specific block, while the
2600 /// contents of processor-specific data are maintained by processor
2601 /// architecture workgroups or vendors in separate documents.
2602 ///
2603 typedef struct {
2604 SMBIOS_STRUCTURE Hdr;
2605 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4
2606 ///
2607 /// Below followed by Processor-specific block
2608 ///
2609 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;
2610 } SMBIOS_TABLE_TYPE44;
2611
2612 ///
2613 /// TPM Device (Type 43).
2614 ///
2615 typedef struct {
2616 SMBIOS_STRUCTURE Hdr;
2617 UINT8 VendorID[4];
2618 UINT8 MajorSpecVersion;
2619 UINT8 MinorSpecVersion;
2620 UINT32 FirmwareVersion1;
2621 UINT32 FirmwareVersion2;
2622 SMBIOS_TABLE_STRING Description;
2623 UINT64 Characteristics;
2624 UINT32 OemDefined;
2625 } SMBIOS_TABLE_TYPE43;
2626
2627 ///
2628 /// Inactive (Type 126)
2629 ///
2630 typedef struct {
2631 SMBIOS_STRUCTURE Hdr;
2632 } SMBIOS_TABLE_TYPE126;
2633
2634 ///
2635 /// End-of-Table (Type 127)
2636 ///
2637 typedef struct {
2638 SMBIOS_STRUCTURE Hdr;
2639 } SMBIOS_TABLE_TYPE127;
2640
2641 ///
2642 /// Union of all the possible SMBIOS record types.
2643 ///
2644 typedef union {
2645 SMBIOS_STRUCTURE *Hdr;
2646 SMBIOS_TABLE_TYPE0 *Type0;
2647 SMBIOS_TABLE_TYPE1 *Type1;
2648 SMBIOS_TABLE_TYPE2 *Type2;
2649 SMBIOS_TABLE_TYPE3 *Type3;
2650 SMBIOS_TABLE_TYPE4 *Type4;
2651 SMBIOS_TABLE_TYPE5 *Type5;
2652 SMBIOS_TABLE_TYPE6 *Type6;
2653 SMBIOS_TABLE_TYPE7 *Type7;
2654 SMBIOS_TABLE_TYPE8 *Type8;
2655 SMBIOS_TABLE_TYPE9 *Type9;
2656 SMBIOS_TABLE_TYPE10 *Type10;
2657 SMBIOS_TABLE_TYPE11 *Type11;
2658 SMBIOS_TABLE_TYPE12 *Type12;
2659 SMBIOS_TABLE_TYPE13 *Type13;
2660 SMBIOS_TABLE_TYPE14 *Type14;
2661 SMBIOS_TABLE_TYPE15 *Type15;
2662 SMBIOS_TABLE_TYPE16 *Type16;
2663 SMBIOS_TABLE_TYPE17 *Type17;
2664 SMBIOS_TABLE_TYPE18 *Type18;
2665 SMBIOS_TABLE_TYPE19 *Type19;
2666 SMBIOS_TABLE_TYPE20 *Type20;
2667 SMBIOS_TABLE_TYPE21 *Type21;
2668 SMBIOS_TABLE_TYPE22 *Type22;
2669 SMBIOS_TABLE_TYPE23 *Type23;
2670 SMBIOS_TABLE_TYPE24 *Type24;
2671 SMBIOS_TABLE_TYPE25 *Type25;
2672 SMBIOS_TABLE_TYPE26 *Type26;
2673 SMBIOS_TABLE_TYPE27 *Type27;
2674 SMBIOS_TABLE_TYPE28 *Type28;
2675 SMBIOS_TABLE_TYPE29 *Type29;
2676 SMBIOS_TABLE_TYPE30 *Type30;
2677 SMBIOS_TABLE_TYPE31 *Type31;
2678 SMBIOS_TABLE_TYPE32 *Type32;
2679 SMBIOS_TABLE_TYPE33 *Type33;
2680 SMBIOS_TABLE_TYPE34 *Type34;
2681 SMBIOS_TABLE_TYPE35 *Type35;
2682 SMBIOS_TABLE_TYPE36 *Type36;
2683 SMBIOS_TABLE_TYPE37 *Type37;
2684 SMBIOS_TABLE_TYPE38 *Type38;
2685 SMBIOS_TABLE_TYPE39 *Type39;
2686 SMBIOS_TABLE_TYPE40 *Type40;
2687 SMBIOS_TABLE_TYPE41 *Type41;
2688 SMBIOS_TABLE_TYPE42 *Type42;
2689 SMBIOS_TABLE_TYPE43 *Type43;
2690 SMBIOS_TABLE_TYPE44 *Type44;
2691 SMBIOS_TABLE_TYPE126 *Type126;
2692 SMBIOS_TABLE_TYPE127 *Type127;
2693 UINT8 *Raw;
2694 } SMBIOS_STRUCTURE_POINTER;
2695
2696 #pragma pack()
2697
2698 #endif
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