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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture-specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 //
20 // Definitions for architecture-specific types
21 //
22 #if defined (MDE_CPU_IA32)
23 ///
24 /// IA-32 architecture context buffer used by SetJump() and LongJump()
25 ///
26 typedef struct {
27 UINT32 Ebx;
28 UINT32 Esi;
29 UINT32 Edi;
30 UINT32 Ebp;
31 UINT32 Esp;
32 UINT32 Eip;
33 } BASE_LIBRARY_JUMP_BUFFER;
34
35 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
36
37 #endif // defined (MDE_CPU_IA32)
38
39 #if defined (MDE_CPU_IPF)
40
41 ///
42 /// Itanium architecture context buffer used by SetJump() and LongJump()
43 ///
44 typedef struct {
45 UINT64 F2[2];
46 UINT64 F3[2];
47 UINT64 F4[2];
48 UINT64 F5[2];
49 UINT64 F16[2];
50 UINT64 F17[2];
51 UINT64 F18[2];
52 UINT64 F19[2];
53 UINT64 F20[2];
54 UINT64 F21[2];
55 UINT64 F22[2];
56 UINT64 F23[2];
57 UINT64 F24[2];
58 UINT64 F25[2];
59 UINT64 F26[2];
60 UINT64 F27[2];
61 UINT64 F28[2];
62 UINT64 F29[2];
63 UINT64 F30[2];
64 UINT64 F31[2];
65 UINT64 R4;
66 UINT64 R5;
67 UINT64 R6;
68 UINT64 R7;
69 UINT64 SP;
70 UINT64 BR0;
71 UINT64 BR1;
72 UINT64 BR2;
73 UINT64 BR3;
74 UINT64 BR4;
75 UINT64 BR5;
76 UINT64 InitialUNAT;
77 UINT64 AfterSpillUNAT;
78 UINT64 PFS;
79 UINT64 BSP;
80 UINT64 Predicates;
81 UINT64 LoopCount;
82 UINT64 FPSR;
83 } BASE_LIBRARY_JUMP_BUFFER;
84
85 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
86
87 #endif // defined (MDE_CPU_IPF)
88
89 #if defined (MDE_CPU_X64)
90 ///
91 /// x64 architecture context buffer used by SetJump() and LongJump()
92 ///
93 typedef struct {
94 UINT64 Rbx;
95 UINT64 Rsp;
96 UINT64 Rbp;
97 UINT64 Rdi;
98 UINT64 Rsi;
99 UINT64 R12;
100 UINT64 R13;
101 UINT64 R14;
102 UINT64 R15;
103 UINT64 Rip;
104 UINT64 MxCsr;
105 UINT8 XmmBuffer[160]; ///< XMM6-XMM15
106 } BASE_LIBRARY_JUMP_BUFFER;
107
108 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
109
110 #endif // defined (MDE_CPU_X64)
111
112 #if defined (MDE_CPU_EBC)
113 ///
114 /// EBC context buffer used by SetJump() and LongJump()
115 ///
116 typedef struct {
117 UINT64 R0;
118 UINT64 R1;
119 UINT64 R2;
120 UINT64 R3;
121 UINT64 IP;
122 } BASE_LIBRARY_JUMP_BUFFER;
123
124 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
125
126 #endif // defined (MDE_CPU_EBC)
127
128 //
129 // String Services
130 //
131
132 /**
133 Copies one Null-terminated Unicode string to another Null-terminated Unicode
134 string and returns the new Unicode string.
135
136 This function copies the contents of the Unicode string Source to the Unicode
137 string Destination, and returns Destination. If Source and Destination
138 overlap, then the results are undefined.
139
140 If Destination is NULL, then ASSERT().
141 If Destination is not aligned on a 16-bit boundary, then ASSERT().
142 If Source is NULL, then ASSERT().
143 If Source is not aligned on a 16-bit boundary, then ASSERT().
144 If Source and Destination overlap, then ASSERT().
145 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
146 PcdMaximumUnicodeStringLength Unicode characters not including the
147 Null-terminator, then ASSERT().
148
149 @param Destination Pointer to a Null-terminated Unicode string.
150 @param Source Pointer to a Null-terminated Unicode string.
151
152 @return Destination.
153
154 **/
155 CHAR16 *
156 EFIAPI
157 StrCpy (
158 OUT CHAR16 *Destination,
159 IN CONST CHAR16 *Source
160 );
161
162
163 /**
164 Copies up to a specified length from one Null-terminated Unicode string to
165 another Null-terminated Unicode string and returns the new Unicode string.
166
167 This function copies the contents of the Unicode string Source to the Unicode
168 string Destination, and returns Destination. At most, Length Unicode
169 characters are copied from Source to Destination. If Length is 0, then
170 Destination is returned unmodified. If Length is greater that the number of
171 Unicode characters in Source, then Destination is padded with Null Unicode
172 characters. If Source and Destination overlap, then the results are
173 undefined.
174
175 If Length > 0 and Destination is NULL, then ASSERT().
176 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
177 If Length > 0 and Source is NULL, then ASSERT().
178 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
179 If Source and Destination overlap, then ASSERT().
180 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
181 PcdMaximumUnicodeStringLength, then ASSERT().
182 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
183 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
184 then ASSERT().
185
186 @param Destination Pointer to a Null-terminated Unicode string.
187 @param Source Pointer to a Null-terminated Unicode string.
188 @param Length Maximum number of Unicode characters to copy.
189
190 @return Destination.
191
192 **/
193 CHAR16 *
194 EFIAPI
195 StrnCpy (
196 OUT CHAR16 *Destination,
197 IN CONST CHAR16 *Source,
198 IN UINTN Length
199 );
200
201
202 /**
203 Returns the length of a Null-terminated Unicode string.
204
205 This function returns the number of Unicode characters in the Null-terminated
206 Unicode string specified by String.
207
208 If String is NULL, then ASSERT().
209 If String is not aligned on a 16-bit boundary, then ASSERT().
210 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
211 PcdMaximumUnicodeStringLength Unicode characters not including the
212 Null-terminator, then ASSERT().
213
214 @param String Pointer to a Null-terminated Unicode string.
215
216 @return The length of String.
217
218 **/
219 UINTN
220 EFIAPI
221 StrLen (
222 IN CONST CHAR16 *String
223 );
224
225
226 /**
227 Returns the size of a Null-terminated Unicode string in bytes, including the
228 Null terminator.
229
230 This function returns the size, in bytes, of the Null-terminated Unicode string
231 specified by String.
232
233 If String is NULL, then ASSERT().
234 If String is not aligned on a 16-bit boundary, then ASSERT().
235 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
236 PcdMaximumUnicodeStringLength Unicode characters not including the
237 Null-terminator, then ASSERT().
238
239 @param String Pointer to a Null-terminated Unicode string.
240
241 @return The size of String.
242
243 **/
244 UINTN
245 EFIAPI
246 StrSize (
247 IN CONST CHAR16 *String
248 );
249
250
251 /**
252 Compares two Null-terminated Unicode strings, and returns the difference
253 between the first mismatched Unicode characters.
254
255 This function compares the Null-terminated Unicode string FirstString to the
256 Null-terminated Unicode string SecondString. If FirstString is identical to
257 SecondString, then 0 is returned. Otherwise, the value returned is the first
258 mismatched Unicode character in SecondString subtracted from the first
259 mismatched Unicode character in FirstString.
260
261 If FirstString is NULL, then ASSERT().
262 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
263 If SecondString is NULL, then ASSERT().
264 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
265 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
266 than PcdMaximumUnicodeStringLength Unicode characters not including the
267 Null-terminator, then ASSERT().
268 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
269 than PcdMaximumUnicodeStringLength Unicode characters not including the
270 Null-terminator, then ASSERT().
271
272 @param FirstString Pointer to a Null-terminated Unicode string.
273 @param SecondString Pointer to a Null-terminated Unicode string.
274
275 @retval 0 FirstString is identical to SecondString.
276 @return others FirstString is not identical to SecondString.
277
278 **/
279 INTN
280 EFIAPI
281 StrCmp (
282 IN CONST CHAR16 *FirstString,
283 IN CONST CHAR16 *SecondString
284 );
285
286
287 /**
288 Compares up to a specified length the contents of two Null-terminated Unicode strings,
289 and returns the difference between the first mismatched Unicode characters.
290
291 This function compares the Null-terminated Unicode string FirstString to the
292 Null-terminated Unicode string SecondString. At most, Length Unicode
293 characters will be compared. If Length is 0, then 0 is returned. If
294 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
295 value returned is the first mismatched Unicode character in SecondString
296 subtracted from the first mismatched Unicode character in FirstString.
297
298 If Length > 0 and FirstString is NULL, then ASSERT().
299 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
300 If Length > 0 and SecondString is NULL, then ASSERT().
301 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
302 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
303 PcdMaximumUnicodeStringLength, then ASSERT().
304 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
305 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
306 then ASSERT().
307 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
308 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
309 then ASSERT().
310
311 @param FirstString Pointer to a Null-terminated Unicode string.
312 @param SecondString Pointer to a Null-terminated Unicode string.
313 @param Length Maximum number of Unicode characters to compare.
314
315 @retval 0 FirstString is identical to SecondString.
316 @return others FirstString is not identical to SecondString.
317
318 **/
319 INTN
320 EFIAPI
321 StrnCmp (
322 IN CONST CHAR16 *FirstString,
323 IN CONST CHAR16 *SecondString,
324 IN UINTN Length
325 );
326
327
328 /**
329 Concatenates one Null-terminated Unicode string to another Null-terminated
330 Unicode string, and returns the concatenated Unicode string.
331
332 This function concatenates two Null-terminated Unicode strings. The contents
333 of Null-terminated Unicode string Source are concatenated to the end of
334 Null-terminated Unicode string Destination. The Null-terminated concatenated
335 Unicode String is returned. If Source and Destination overlap, then the
336 results are undefined.
337
338 If Destination is NULL, then ASSERT().
339 If Destination is not aligned on a 16-bit boundary, then ASSERT().
340 If Source is NULL, then ASSERT().
341 If Source is not aligned on a 16-bit boundary, then ASSERT().
342 If Source and Destination overlap, then ASSERT().
343 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
344 than PcdMaximumUnicodeStringLength Unicode characters not including the
345 Null-terminator, then ASSERT().
346 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
347 PcdMaximumUnicodeStringLength Unicode characters not including the
348 Null-terminator, then ASSERT().
349 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
350 and Source results in a Unicode string with more than
351 PcdMaximumUnicodeStringLength Unicode characters not including the
352 Null-terminator, then ASSERT().
353
354 @param Destination Pointer to a Null-terminated Unicode string.
355 @param Source Pointer to a Null-terminated Unicode string.
356
357 @return Destination.
358
359 **/
360 CHAR16 *
361 EFIAPI
362 StrCat (
363 IN OUT CHAR16 *Destination,
364 IN CONST CHAR16 *Source
365 );
366
367
368 /**
369 Concatenates up to a specified length one Null-terminated Unicode to the end
370 of another Null-terminated Unicode string, and returns the concatenated
371 Unicode string.
372
373 This function concatenates two Null-terminated Unicode strings. The contents
374 of Null-terminated Unicode string Source are concatenated to the end of
375 Null-terminated Unicode string Destination, and Destination is returned. At
376 most, Length Unicode characters are concatenated from Source to the end of
377 Destination, and Destination is always Null-terminated. If Length is 0, then
378 Destination is returned unmodified. If Source and Destination overlap, then
379 the results are undefined.
380
381 If Destination is NULL, then ASSERT().
382 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
383 If Length > 0 and Source is NULL, then ASSERT().
384 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
385 If Source and Destination overlap, then ASSERT().
386 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
387 PcdMaximumUnicodeStringLength, then ASSERT().
388 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
389 than PcdMaximumUnicodeStringLength Unicode characters, not including the
390 Null-terminator, then ASSERT().
391 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
392 PcdMaximumUnicodeStringLength Unicode characters, not including the
393 Null-terminator, then ASSERT().
394 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
395 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
396 Unicode characters, not including the Null-terminator, then ASSERT().
397
398 @param Destination Pointer to a Null-terminated Unicode string.
399 @param Source Pointer to a Null-terminated Unicode string.
400 @param Length Maximum number of Unicode characters to concatenate from
401 Source.
402
403 @return Destination.
404
405 **/
406 CHAR16 *
407 EFIAPI
408 StrnCat (
409 IN OUT CHAR16 *Destination,
410 IN CONST CHAR16 *Source,
411 IN UINTN Length
412 );
413
414 /**
415 Returns the first occurrence of a Null-terminated Unicode sub-string
416 in a Null-terminated Unicode string.
417
418 This function scans the contents of the Null-terminated Unicode string
419 specified by String and returns the first occurrence of SearchString.
420 If SearchString is not found in String, then NULL is returned. If
421 the length of SearchString is zero, then String is
422 returned.
423
424 If String is NULL, then ASSERT().
425 If String is not aligned on a 16-bit boundary, then ASSERT().
426 If SearchString is NULL, then ASSERT().
427 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
428
429 If PcdMaximumUnicodeStringLength is not zero, and SearchString
430 or String contains more than PcdMaximumUnicodeStringLength Unicode
431 characters not including the Null-terminator, then ASSERT().
432
433 @param String Pointer to a Null-terminated Unicode string.
434 @param SearchString Pointer to a Null-terminated Unicode string to search for.
435
436 @retval NULL If the SearchString does not appear in String.
437 @return others If there is a match.
438
439 **/
440 CHAR16 *
441 EFIAPI
442 StrStr (
443 IN CONST CHAR16 *String,
444 IN CONST CHAR16 *SearchString
445 );
446
447 /**
448 Convert a Null-terminated Unicode decimal string to a value of
449 type UINTN.
450
451 This function returns a value of type UINTN by interpreting the contents
452 of the Unicode string specified by String as a decimal number. The format
453 of the input Unicode string String is:
454
455 [spaces] [decimal digits].
456
457 The valid decimal digit character is in the range [0-9]. The
458 function will ignore the pad space, which includes spaces or
459 tab characters, before [decimal digits]. The running zero in the
460 beginning of [decimal digits] will be ignored. Then, the function
461 stops at the first character that is a not a valid decimal character
462 or a Null-terminator, whichever one comes first.
463
464 If String is NULL, then ASSERT().
465 If String is not aligned in a 16-bit boundary, then ASSERT().
466 If String has only pad spaces, then 0 is returned.
467 If String has no pad spaces or valid decimal digits,
468 then 0 is returned.
469 If the number represented by String overflows according
470 to the range defined by UINTN, then ASSERT().
471
472 If PcdMaximumUnicodeStringLength is not zero, and String contains
473 more than PcdMaximumUnicodeStringLength Unicode characters not including
474 the Null-terminator, then ASSERT().
475
476 @param String Pointer to a Null-terminated Unicode string.
477
478 @retval Value translated from String.
479
480 **/
481 UINTN
482 EFIAPI
483 StrDecimalToUintn (
484 IN CONST CHAR16 *String
485 );
486
487 /**
488 Convert a Null-terminated Unicode decimal string to a value of
489 type UINT64.
490
491 This function returns a value of type UINT64 by interpreting the contents
492 of the Unicode string specified by String as a decimal number. The format
493 of the input Unicode string String is:
494
495 [spaces] [decimal digits].
496
497 The valid decimal digit character is in the range [0-9]. The
498 function will ignore the pad space, which includes spaces or
499 tab characters, before [decimal digits]. The running zero in the
500 beginning of [decimal digits] will be ignored. Then, the function
501 stops at the first character that is a not a valid decimal character
502 or a Null-terminator, whichever one comes first.
503
504 If String is NULL, then ASSERT().
505 If String is not aligned in a 16-bit boundary, then ASSERT().
506 If String has only pad spaces, then 0 is returned.
507 If String has no pad spaces or valid decimal digits,
508 then 0 is returned.
509 If the number represented by String overflows according
510 to the range defined by UINT64, then ASSERT().
511
512 If PcdMaximumUnicodeStringLength is not zero, and String contains
513 more than PcdMaximumUnicodeStringLength Unicode characters not including
514 the Null-terminator, then ASSERT().
515
516 @param String Pointer to a Null-terminated Unicode string.
517
518 @retval Value translated from String.
519
520 **/
521 UINT64
522 EFIAPI
523 StrDecimalToUint64 (
524 IN CONST CHAR16 *String
525 );
526
527
528 /**
529 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
530
531 This function returns a value of type UINTN by interpreting the contents
532 of the Unicode string specified by String as a hexadecimal number.
533 The format of the input Unicode string String is:
534
535 [spaces][zeros][x][hexadecimal digits].
536
537 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
538 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
539 If "x" appears in the input string, it must be prefixed with at least one 0.
540 The function will ignore the pad space, which includes spaces or tab characters,
541 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
542 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
543 first valid hexadecimal digit. Then, the function stops at the first character that is
544 a not a valid hexadecimal character or NULL, whichever one comes first.
545
546 If String is NULL, then ASSERT().
547 If String is not aligned in a 16-bit boundary, then ASSERT().
548 If String has only pad spaces, then zero is returned.
549 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
550 then zero is returned.
551 If the number represented by String overflows according to the range defined by
552 UINTN, then ASSERT().
553
554 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
555 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
556 then ASSERT().
557
558 @param String Pointer to a Null-terminated Unicode string.
559
560 @retval Value translated from String.
561
562 **/
563 UINTN
564 EFIAPI
565 StrHexToUintn (
566 IN CONST CHAR16 *String
567 );
568
569
570 /**
571 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
572
573 This function returns a value of type UINT64 by interpreting the contents
574 of the Unicode string specified by String as a hexadecimal number.
575 The format of the input Unicode string String is
576
577 [spaces][zeros][x][hexadecimal digits].
578
579 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
580 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
581 If "x" appears in the input string, it must be prefixed with at least one 0.
582 The function will ignore the pad space, which includes spaces or tab characters,
583 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
584 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
585 first valid hexadecimal digit. Then, the function stops at the first character that is
586 a not a valid hexadecimal character or NULL, whichever one comes first.
587
588 If String is NULL, then ASSERT().
589 If String is not aligned in a 16-bit boundary, then ASSERT().
590 If String has only pad spaces, then zero is returned.
591 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
592 then zero is returned.
593 If the number represented by String overflows according to the range defined by
594 UINT64, then ASSERT().
595
596 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
597 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
598 then ASSERT().
599
600 @param String Pointer to a Null-terminated Unicode string.
601
602 @retval Value translated from String.
603
604 **/
605 UINT64
606 EFIAPI
607 StrHexToUint64 (
608 IN CONST CHAR16 *String
609 );
610
611 /**
612 Convert a Null-terminated Unicode string to a Null-terminated
613 ASCII string and returns the ASCII string.
614
615 This function converts the content of the Unicode string Source
616 to the ASCII string Destination by copying the lower 8 bits of
617 each Unicode character. It returns Destination.
618
619 If any Unicode characters in Source contain non-zero value in
620 the upper 8 bits, then ASSERT().
621
622 If Destination is NULL, then ASSERT().
623 If Source is NULL, then ASSERT().
624 If Source is not aligned on a 16-bit boundary, then ASSERT().
625 If Source and Destination overlap, then ASSERT().
626
627 If PcdMaximumUnicodeStringLength is not zero, and Source contains
628 more than PcdMaximumUnicodeStringLength Unicode characters not including
629 the Null-terminator, then ASSERT().
630
631 If PcdMaximumAsciiStringLength is not zero, and Source contains more
632 than PcdMaximumAsciiStringLength Unicode characters not including the
633 Null-terminator, then ASSERT().
634
635 @param Source Pointer to a Null-terminated Unicode string.
636 @param Destination Pointer to a Null-terminated ASCII string.
637
638 @return Destination.
639
640 **/
641 CHAR8 *
642 EFIAPI
643 UnicodeStrToAsciiStr (
644 IN CONST CHAR16 *Source,
645 OUT CHAR8 *Destination
646 );
647
648
649 /**
650 Copies one Null-terminated ASCII string to another Null-terminated ASCII
651 string and returns the new ASCII string.
652
653 This function copies the contents of the ASCII string Source to the ASCII
654 string Destination, and returns Destination. If Source and Destination
655 overlap, then the results are undefined.
656
657 If Destination is NULL, then ASSERT().
658 If Source is NULL, then ASSERT().
659 If Source and Destination overlap, then ASSERT().
660 If PcdMaximumAsciiStringLength is not zero and Source contains more than
661 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
662 then ASSERT().
663
664 @param Destination Pointer to a Null-terminated ASCII string.
665 @param Source Pointer to a Null-terminated ASCII string.
666
667 @return Destination
668
669 **/
670 CHAR8 *
671 EFIAPI
672 AsciiStrCpy (
673 OUT CHAR8 *Destination,
674 IN CONST CHAR8 *Source
675 );
676
677
678 /**
679 Copies up to a specified length one Null-terminated ASCII string to another
680 Null-terminated ASCII string and returns the new ASCII string.
681
682 This function copies the contents of the ASCII string Source to the ASCII
683 string Destination, and returns Destination. At most, Length ASCII characters
684 are copied from Source to Destination. If Length is 0, then Destination is
685 returned unmodified. If Length is greater that the number of ASCII characters
686 in Source, then Destination is padded with Null ASCII characters. If Source
687 and Destination overlap, then the results are undefined.
688
689 If Destination is NULL, then ASSERT().
690 If Source is NULL, then ASSERT().
691 If Source and Destination overlap, then ASSERT().
692 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
693 PcdMaximumAsciiStringLength, then ASSERT().
694 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
695 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
696 then ASSERT().
697
698 @param Destination Pointer to a Null-terminated ASCII string.
699 @param Source Pointer to a Null-terminated ASCII string.
700 @param Length Maximum number of ASCII characters to copy.
701
702 @return Destination
703
704 **/
705 CHAR8 *
706 EFIAPI
707 AsciiStrnCpy (
708 OUT CHAR8 *Destination,
709 IN CONST CHAR8 *Source,
710 IN UINTN Length
711 );
712
713
714 /**
715 Returns the length of a Null-terminated ASCII string.
716
717 This function returns the number of ASCII characters in the Null-terminated
718 ASCII string specified by String.
719
720 If Length > 0 and Destination is NULL, then ASSERT().
721 If Length > 0 and Source is NULL, then ASSERT().
722 If PcdMaximumAsciiStringLength is not zero and String contains more than
723 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
724 then ASSERT().
725
726 @param String Pointer to a Null-terminated ASCII string.
727
728 @return The length of String.
729
730 **/
731 UINTN
732 EFIAPI
733 AsciiStrLen (
734 IN CONST CHAR8 *String
735 );
736
737
738 /**
739 Returns the size of a Null-terminated ASCII string in bytes, including the
740 Null terminator.
741
742 This function returns the size, in bytes, of the Null-terminated ASCII string
743 specified by String.
744
745 If String is NULL, then ASSERT().
746 If PcdMaximumAsciiStringLength is not zero and String contains more than
747 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
748 then ASSERT().
749
750 @param String Pointer to a Null-terminated ASCII string.
751
752 @return The size of String.
753
754 **/
755 UINTN
756 EFIAPI
757 AsciiStrSize (
758 IN CONST CHAR8 *String
759 );
760
761
762 /**
763 Compares two Null-terminated ASCII strings, and returns the difference
764 between the first mismatched ASCII characters.
765
766 This function compares the Null-terminated ASCII string FirstString to the
767 Null-terminated ASCII string SecondString. If FirstString is identical to
768 SecondString, then 0 is returned. Otherwise, the value returned is the first
769 mismatched ASCII character in SecondString subtracted from the first
770 mismatched ASCII character in FirstString.
771
772 If FirstString is NULL, then ASSERT().
773 If SecondString is NULL, then ASSERT().
774 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
775 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
776 then ASSERT().
777 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
778 than PcdMaximumAsciiStringLength ASCII characters not including the
779 Null-terminator, then ASSERT().
780
781 @param FirstString Pointer to a Null-terminated ASCII string.
782 @param SecondString Pointer to a Null-terminated ASCII string.
783
784 @retval ==0 FirstString is identical to SecondString.
785 @retval !=0 FirstString is not identical to SecondString.
786
787 **/
788 INTN
789 EFIAPI
790 AsciiStrCmp (
791 IN CONST CHAR8 *FirstString,
792 IN CONST CHAR8 *SecondString
793 );
794
795
796 /**
797 Performs a case insensitive comparison of two Null-terminated ASCII strings,
798 and returns the difference between the first mismatched ASCII characters.
799
800 This function performs a case insensitive comparison of the Null-terminated
801 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
802 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
803 value returned is the first mismatched lower case ASCII character in
804 SecondString subtracted from the first mismatched lower case ASCII character
805 in FirstString.
806
807 If FirstString is NULL, then ASSERT().
808 If SecondString is NULL, then ASSERT().
809 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
810 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
811 then ASSERT().
812 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
813 than PcdMaximumAsciiStringLength ASCII characters not including the
814 Null-terminator, then ASSERT().
815
816 @param FirstString Pointer to a Null-terminated ASCII string.
817 @param SecondString Pointer to a Null-terminated ASCII string.
818
819 @retval ==0 FirstString is identical to SecondString using case insensitive
820 comparisons.
821 @retval !=0 FirstString is not identical to SecondString using case
822 insensitive comparisons.
823
824 **/
825 INTN
826 EFIAPI
827 AsciiStriCmp (
828 IN CONST CHAR8 *FirstString,
829 IN CONST CHAR8 *SecondString
830 );
831
832
833 /**
834 Compares two Null-terminated ASCII strings with maximum lengths, and returns
835 the difference between the first mismatched ASCII characters.
836
837 This function compares the Null-terminated ASCII string FirstString to the
838 Null-terminated ASCII string SecondString. At most, Length ASCII characters
839 will be compared. If Length is 0, then 0 is returned. If FirstString is
840 identical to SecondString, then 0 is returned. Otherwise, the value returned
841 is the first mismatched ASCII character in SecondString subtracted from the
842 first mismatched ASCII character in FirstString.
843
844 If Length > 0 and FirstString is NULL, then ASSERT().
845 If Length > 0 and SecondString is NULL, then ASSERT().
846 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
847 PcdMaximumAsciiStringLength, then ASSERT().
848 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
849 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
850 then ASSERT().
851 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
852 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
853 then ASSERT().
854
855 @param FirstString Pointer to a Null-terminated ASCII string.
856 @param SecondString Pointer to a Null-terminated ASCII string.
857 @param Length Maximum number of ASCII characters for compare.
858
859 @retval ==0 FirstString is identical to SecondString.
860 @retval !=0 FirstString is not identical to SecondString.
861
862 **/
863 INTN
864 EFIAPI
865 AsciiStrnCmp (
866 IN CONST CHAR8 *FirstString,
867 IN CONST CHAR8 *SecondString,
868 IN UINTN Length
869 );
870
871
872 /**
873 Concatenates one Null-terminated ASCII string to another Null-terminated
874 ASCII string, and returns the concatenated ASCII string.
875
876 This function concatenates two Null-terminated ASCII strings. The contents of
877 Null-terminated ASCII string Source are concatenated to the end of Null-
878 terminated ASCII string Destination. The Null-terminated concatenated ASCII
879 String is returned.
880
881 If Destination is NULL, then ASSERT().
882 If Source is NULL, then ASSERT().
883 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
884 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
885 then ASSERT().
886 If PcdMaximumAsciiStringLength is not zero and Source contains more than
887 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
888 then ASSERT().
889 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
890 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
891 ASCII characters, then ASSERT().
892
893 @param Destination Pointer to a Null-terminated ASCII string.
894 @param Source Pointer to a Null-terminated ASCII string.
895
896 @return Destination
897
898 **/
899 CHAR8 *
900 EFIAPI
901 AsciiStrCat (
902 IN OUT CHAR8 *Destination,
903 IN CONST CHAR8 *Source
904 );
905
906
907 /**
908 Concatenates up to a specified length one Null-terminated ASCII string to
909 the end of another Null-terminated ASCII string, and returns the
910 concatenated ASCII string.
911
912 This function concatenates two Null-terminated ASCII strings. The contents
913 of Null-terminated ASCII string Source are concatenated to the end of Null-
914 terminated ASCII string Destination, and Destination is returned. At most,
915 Length ASCII characters are concatenated from Source to the end of
916 Destination, and Destination is always Null-terminated. If Length is 0, then
917 Destination is returned unmodified. If Source and Destination overlap, then
918 the results are undefined.
919
920 If Length > 0 and Destination is NULL, then ASSERT().
921 If Length > 0 and Source is NULL, then ASSERT().
922 If Source and Destination overlap, then ASSERT().
923 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
924 PcdMaximumAsciiStringLength, then ASSERT().
925 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
926 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
927 then ASSERT().
928 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
929 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
930 then ASSERT().
931 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
932 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
933 ASCII characters, not including the Null-terminator, then ASSERT().
934
935 @param Destination Pointer to a Null-terminated ASCII string.
936 @param Source Pointer to a Null-terminated ASCII string.
937 @param Length Maximum number of ASCII characters to concatenate from
938 Source.
939
940 @return Destination
941
942 **/
943 CHAR8 *
944 EFIAPI
945 AsciiStrnCat (
946 IN OUT CHAR8 *Destination,
947 IN CONST CHAR8 *Source,
948 IN UINTN Length
949 );
950
951
952 /**
953 Returns the first occurrence of a Null-terminated ASCII sub-string
954 in a Null-terminated ASCII string.
955
956 This function scans the contents of the ASCII string specified by String
957 and returns the first occurrence of SearchString. If SearchString is not
958 found in String, then NULL is returned. If the length of SearchString is zero,
959 then String is returned.
960
961 If String is NULL, then ASSERT().
962 If SearchString is NULL, then ASSERT().
963
964 If PcdMaximumAsciiStringLength is not zero, and SearchString or
965 String contains more than PcdMaximumAsciiStringLength Unicode characters
966 not including the Null-terminator, then ASSERT().
967
968 @param String Pointer to a Null-terminated ASCII string.
969 @param SearchString Pointer to a Null-terminated ASCII string to search for.
970
971 @retval NULL If the SearchString does not appear in String.
972 @retval others If there is a match return the first occurrence of SearchingString.
973 If the length of SearchString is zero,return String.
974
975 **/
976 CHAR8 *
977 EFIAPI
978 AsciiStrStr (
979 IN CONST CHAR8 *String,
980 IN CONST CHAR8 *SearchString
981 );
982
983
984 /**
985 Convert a Null-terminated ASCII decimal string to a value of type
986 UINTN.
987
988 This function returns a value of type UINTN by interpreting the contents
989 of the ASCII string String as a decimal number. The format of the input
990 ASCII string String is:
991
992 [spaces] [decimal digits].
993
994 The valid decimal digit character is in the range [0-9]. The function will
995 ignore the pad space, which includes spaces or tab characters, before the digits.
996 The running zero in the beginning of [decimal digits] will be ignored. Then, the
997 function stops at the first character that is a not a valid decimal character or
998 Null-terminator, whichever on comes first.
999
1000 If String has only pad spaces, then 0 is returned.
1001 If String has no pad spaces or valid decimal digits, then 0 is returned.
1002 If the number represented by String overflows according to the range defined by
1003 UINTN, then ASSERT().
1004 If String is NULL, then ASSERT().
1005 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1006 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1007 then ASSERT().
1008
1009 @param String Pointer to a Null-terminated ASCII string.
1010
1011 @retval Value translated from String.
1012
1013 **/
1014 UINTN
1015 EFIAPI
1016 AsciiStrDecimalToUintn (
1017 IN CONST CHAR8 *String
1018 );
1019
1020
1021 /**
1022 Convert a Null-terminated ASCII decimal string to a value of type
1023 UINT64.
1024
1025 This function returns a value of type UINT64 by interpreting the contents
1026 of the ASCII string String as a decimal number. The format of the input
1027 ASCII string String is:
1028
1029 [spaces] [decimal digits].
1030
1031 The valid decimal digit character is in the range [0-9]. The function will
1032 ignore the pad space, which includes spaces or tab characters, before the digits.
1033 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1034 function stops at the first character that is a not a valid decimal character or
1035 Null-terminator, whichever on comes first.
1036
1037 If String has only pad spaces, then 0 is returned.
1038 If String has no pad spaces or valid decimal digits, then 0 is returned.
1039 If the number represented by String overflows according to the range defined by
1040 UINT64, then ASSERT().
1041 If String is NULL, then ASSERT().
1042 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1043 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1044 then ASSERT().
1045
1046 @param String Pointer to a Null-terminated ASCII string.
1047
1048 @retval Value translated from String.
1049
1050 **/
1051 UINT64
1052 EFIAPI
1053 AsciiStrDecimalToUint64 (
1054 IN CONST CHAR8 *String
1055 );
1056
1057
1058 /**
1059 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1060
1061 This function returns a value of type UINTN by interpreting the contents of
1062 the ASCII string String as a hexadecimal number. The format of the input ASCII
1063 string String is:
1064
1065 [spaces][zeros][x][hexadecimal digits].
1066
1067 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1068 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1069 appears in the input string, it must be prefixed with at least one 0. The function
1070 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1071 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1072 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1073 digit. Then, the function stops at the first character that is a not a valid
1074 hexadecimal character or Null-terminator, whichever on comes first.
1075
1076 If String has only pad spaces, then 0 is returned.
1077 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1078 0 is returned.
1079
1080 If the number represented by String overflows according to the range defined by UINTN,
1081 then ASSERT().
1082 If String is NULL, then ASSERT().
1083 If PcdMaximumAsciiStringLength is not zero,
1084 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1085 the Null-terminator, then ASSERT().
1086
1087 @param String Pointer to a Null-terminated ASCII string.
1088
1089 @retval Value translated from String.
1090
1091 **/
1092 UINTN
1093 EFIAPI
1094 AsciiStrHexToUintn (
1095 IN CONST CHAR8 *String
1096 );
1097
1098
1099 /**
1100 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1101
1102 This function returns a value of type UINT64 by interpreting the contents of
1103 the ASCII string String as a hexadecimal number. The format of the input ASCII
1104 string String is:
1105
1106 [spaces][zeros][x][hexadecimal digits].
1107
1108 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1109 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1110 appears in the input string, it must be prefixed with at least one 0. The function
1111 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1112 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1113 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1114 digit. Then, the function stops at the first character that is a not a valid
1115 hexadecimal character or Null-terminator, whichever on comes first.
1116
1117 If String has only pad spaces, then 0 is returned.
1118 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1119 0 is returned.
1120
1121 If the number represented by String overflows according to the range defined by UINT64,
1122 then ASSERT().
1123 If String is NULL, then ASSERT().
1124 If PcdMaximumAsciiStringLength is not zero,
1125 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1126 the Null-terminator, then ASSERT().
1127
1128 @param String Pointer to a Null-terminated ASCII string.
1129
1130 @retval Value translated from String.
1131
1132 **/
1133 UINT64
1134 EFIAPI
1135 AsciiStrHexToUint64 (
1136 IN CONST CHAR8 *String
1137 );
1138
1139
1140 /**
1141 Convert one Null-terminated ASCII string to a Null-terminated
1142 Unicode string and returns the Unicode string.
1143
1144 This function converts the contents of the ASCII string Source to the Unicode
1145 string Destination, and returns Destination. The function terminates the
1146 Unicode string Destination by appending a Null-terminator character at the end.
1147 The caller is responsible to make sure Destination points to a buffer with size
1148 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1149
1150 If Destination is NULL, then ASSERT().
1151 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1152 If Source is NULL, then ASSERT().
1153 If Source and Destination overlap, then ASSERT().
1154 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1155 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1156 then ASSERT().
1157 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1158 PcdMaximumUnicodeStringLength ASCII characters not including the
1159 Null-terminator, then ASSERT().
1160
1161 @param Source Pointer to a Null-terminated ASCII string.
1162 @param Destination Pointer to a Null-terminated Unicode string.
1163
1164 @return Destination.
1165
1166 **/
1167 CHAR16 *
1168 EFIAPI
1169 AsciiStrToUnicodeStr (
1170 IN CONST CHAR8 *Source,
1171 OUT CHAR16 *Destination
1172 );
1173
1174
1175 /**
1176 Converts an 8-bit value to an 8-bit BCD value.
1177
1178 Converts the 8-bit value specified by Value to BCD. The BCD value is
1179 returned.
1180
1181 If Value >= 100, then ASSERT().
1182
1183 @param Value The 8-bit value to convert to BCD. Range 0..99.
1184
1185 @return The BCD value.
1186
1187 **/
1188 UINT8
1189 EFIAPI
1190 DecimalToBcd8 (
1191 IN UINT8 Value
1192 );
1193
1194
1195 /**
1196 Converts an 8-bit BCD value to an 8-bit value.
1197
1198 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1199 value is returned.
1200
1201 If Value >= 0xA0, then ASSERT().
1202 If (Value & 0x0F) >= 0x0A, then ASSERT().
1203
1204 @param Value The 8-bit BCD value to convert to an 8-bit value.
1205
1206 @return The 8-bit value is returned.
1207
1208 **/
1209 UINT8
1210 EFIAPI
1211 BcdToDecimal8 (
1212 IN UINT8 Value
1213 );
1214
1215
1216 //
1217 // Linked List Functions and Macros
1218 //
1219
1220 /**
1221 Initializes the head node of a doubly linked list that is declared as a
1222 global variable in a module.
1223
1224 Initializes the forward and backward links of a new linked list. After
1225 initializing a linked list with this macro, the other linked list functions
1226 may be used to add and remove nodes from the linked list. This macro results
1227 in smaller executables by initializing the linked list in the data section,
1228 instead if calling the InitializeListHead() function to perform the
1229 equivalent operation.
1230
1231 @param ListHead The head note of a list to initialize.
1232
1233 **/
1234 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1235
1236
1237 /**
1238 Initializes the head node of a doubly linked list, and returns the pointer to
1239 the head node of the doubly linked list.
1240
1241 Initializes the forward and backward links of a new linked list. After
1242 initializing a linked list with this function, the other linked list
1243 functions may be used to add and remove nodes from the linked list. It is up
1244 to the caller of this function to allocate the memory for ListHead.
1245
1246 If ListHead is NULL, then ASSERT().
1247
1248 @param ListHead A pointer to the head node of a new doubly linked list.
1249
1250 @return ListHead
1251
1252 **/
1253 LIST_ENTRY *
1254 EFIAPI
1255 InitializeListHead (
1256 IN OUT LIST_ENTRY *ListHead
1257 );
1258
1259
1260 /**
1261 Adds a node to the beginning of a doubly linked list, and returns the pointer
1262 to the head node of the doubly linked list.
1263
1264 Adds the node Entry at the beginning of the doubly linked list denoted by
1265 ListHead, and returns ListHead.
1266
1267 If ListHead is NULL, then ASSERT().
1268 If Entry is NULL, then ASSERT().
1269 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1270 InitializeListHead(), then ASSERT().
1271 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1272 of nodes in ListHead, including the ListHead node, is greater than or
1273 equal to PcdMaximumLinkedListLength, then ASSERT().
1274
1275 @param ListHead A pointer to the head node of a doubly linked list.
1276 @param Entry A pointer to a node that is to be inserted at the beginning
1277 of a doubly linked list.
1278
1279 @return ListHead
1280
1281 **/
1282 LIST_ENTRY *
1283 EFIAPI
1284 InsertHeadList (
1285 IN OUT LIST_ENTRY *ListHead,
1286 IN OUT LIST_ENTRY *Entry
1287 );
1288
1289
1290 /**
1291 Adds a node to the end of a doubly linked list, and returns the pointer to
1292 the head node of the doubly linked list.
1293
1294 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1295 and returns ListHead.
1296
1297 If ListHead is NULL, then ASSERT().
1298 If Entry is NULL, then ASSERT().
1299 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1300 InitializeListHead(), then ASSERT().
1301 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1302 of nodes in ListHead, including the ListHead node, is greater than or
1303 equal to PcdMaximumLinkedListLength, then ASSERT().
1304
1305 @param ListHead A pointer to the head node of a doubly linked list.
1306 @param Entry A pointer to a node that is to be added at the end of the
1307 doubly linked list.
1308
1309 @return ListHead
1310
1311 **/
1312 LIST_ENTRY *
1313 EFIAPI
1314 InsertTailList (
1315 IN OUT LIST_ENTRY *ListHead,
1316 IN OUT LIST_ENTRY *Entry
1317 );
1318
1319
1320 /**
1321 Retrieves the first node of a doubly linked list.
1322
1323 Returns the first node of a doubly linked list. List must have been
1324 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1325 If List is empty, then List is returned.
1326
1327 If List is NULL, then ASSERT().
1328 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1329 InitializeListHead(), then ASSERT().
1330 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1331 in List, including the List node, is greater than or equal to
1332 PcdMaximumLinkedListLength, then ASSERT().
1333
1334 @param List A pointer to the head node of a doubly linked list.
1335
1336 @return The first node of a doubly linked list.
1337 @retval NULL The list is empty.
1338
1339 **/
1340 LIST_ENTRY *
1341 EFIAPI
1342 GetFirstNode (
1343 IN CONST LIST_ENTRY *List
1344 );
1345
1346
1347 /**
1348 Retrieves the next node of a doubly linked list.
1349
1350 Returns the node of a doubly linked list that follows Node.
1351 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1352 or InitializeListHead(). If List is empty, then List is returned.
1353
1354 If List is NULL, then ASSERT().
1355 If Node is NULL, then ASSERT().
1356 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1357 InitializeListHead(), then ASSERT().
1358 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1359 PcdMaximumLinkedListLenth nodes, then ASSERT().
1360 If Node is not a node in List, then ASSERT().
1361
1362 @param List A pointer to the head node of a doubly linked list.
1363 @param Node A pointer to a node in the doubly linked list.
1364
1365 @return Pointer to the next node if one exists. Otherwise a null value which
1366 is actually List is returned.
1367
1368 **/
1369 LIST_ENTRY *
1370 EFIAPI
1371 GetNextNode (
1372 IN CONST LIST_ENTRY *List,
1373 IN CONST LIST_ENTRY *Node
1374 );
1375
1376
1377 /**
1378 Checks to see if a doubly linked list is empty or not.
1379
1380 Checks to see if the doubly linked list is empty. If the linked list contains
1381 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1382
1383 If ListHead is NULL, then ASSERT().
1384 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1385 InitializeListHead(), then ASSERT().
1386 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1387 in List, including the List node, is greater than or equal to
1388 PcdMaximumLinkedListLength, then ASSERT().
1389
1390 @param ListHead A pointer to the head node of a doubly linked list.
1391
1392 @retval TRUE The linked list is empty.
1393 @retval FALSE The linked list is not empty.
1394
1395 **/
1396 BOOLEAN
1397 EFIAPI
1398 IsListEmpty (
1399 IN CONST LIST_ENTRY *ListHead
1400 );
1401
1402
1403 /**
1404 Determines if a node in a doubly linked list is the head node of a the same
1405 doubly linked list. This function is typically used to terminate a loop that
1406 traverses all the nodes in a doubly linked list starting with the head node.
1407
1408 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1409 nodes in the doubly linked list specified by List. List must have been
1410 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1411
1412 If List is NULL, then ASSERT().
1413 If Node is NULL, then ASSERT().
1414 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1415 then ASSERT().
1416 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1417 in List, including the List node, is greater than or equal to
1418 PcdMaximumLinkedListLength, then ASSERT().
1419 If Node is not a node in List and Node is not equal to List, then ASSERT().
1420
1421 @param List A pointer to the head node of a doubly linked list.
1422 @param Node A pointer to a node in the doubly linked list.
1423
1424 @retval TRUE Node is one of the nodes in the doubly linked list.
1425 @retval FALSE Node is not one of the nodes in the doubly linked list.
1426
1427 **/
1428 BOOLEAN
1429 EFIAPI
1430 IsNull (
1431 IN CONST LIST_ENTRY *List,
1432 IN CONST LIST_ENTRY *Node
1433 );
1434
1435
1436 /**
1437 Determines if a node the last node in a doubly linked list.
1438
1439 Returns TRUE if Node is the last node in the doubly linked list specified by
1440 List. Otherwise, FALSE is returned. List must have been initialized with
1441 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1442
1443 If List is NULL, then ASSERT().
1444 If Node is NULL, then ASSERT().
1445 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1446 InitializeListHead(), then ASSERT().
1447 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1448 in List, including the List node, is greater than or equal to
1449 PcdMaximumLinkedListLength, then ASSERT().
1450 If Node is not a node in List, then ASSERT().
1451
1452 @param List A pointer to the head node of a doubly linked list.
1453 @param Node A pointer to a node in the doubly linked list.
1454
1455 @retval TRUE Node is the last node in the linked list.
1456 @retval FALSE Node is not the last node in the linked list.
1457
1458 **/
1459 BOOLEAN
1460 EFIAPI
1461 IsNodeAtEnd (
1462 IN CONST LIST_ENTRY *List,
1463 IN CONST LIST_ENTRY *Node
1464 );
1465
1466
1467 /**
1468 Swaps the location of two nodes in a doubly linked list, and returns the
1469 first node after the swap.
1470
1471 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1472 Otherwise, the location of the FirstEntry node is swapped with the location
1473 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1474 same double linked list as FirstEntry and that double linked list must have
1475 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1476 SecondEntry is returned after the nodes are swapped.
1477
1478 If FirstEntry is NULL, then ASSERT().
1479 If SecondEntry is NULL, then ASSERT().
1480 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
1481 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1482 linked list containing the FirstEntry and SecondEntry nodes, including
1483 the FirstEntry and SecondEntry nodes, is greater than or equal to
1484 PcdMaximumLinkedListLength, then ASSERT().
1485
1486 @param FirstEntry A pointer to a node in a linked list.
1487 @param SecondEntry A pointer to another node in the same linked list.
1488
1489 @return SecondEntry.
1490
1491 **/
1492 LIST_ENTRY *
1493 EFIAPI
1494 SwapListEntries (
1495 IN OUT LIST_ENTRY *FirstEntry,
1496 IN OUT LIST_ENTRY *SecondEntry
1497 );
1498
1499
1500 /**
1501 Removes a node from a doubly linked list, and returns the node that follows
1502 the removed node.
1503
1504 Removes the node Entry from a doubly linked list. It is up to the caller of
1505 this function to release the memory used by this node if that is required. On
1506 exit, the node following Entry in the doubly linked list is returned. If
1507 Entry is the only node in the linked list, then the head node of the linked
1508 list is returned.
1509
1510 If Entry is NULL, then ASSERT().
1511 If Entry is the head node of an empty list, then ASSERT().
1512 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1513 linked list containing Entry, including the Entry node, is greater than
1514 or equal to PcdMaximumLinkedListLength, then ASSERT().
1515
1516 @param Entry A pointer to a node in a linked list.
1517
1518 @return Entry.
1519
1520 **/
1521 LIST_ENTRY *
1522 EFIAPI
1523 RemoveEntryList (
1524 IN CONST LIST_ENTRY *Entry
1525 );
1526
1527 //
1528 // Math Services
1529 //
1530
1531 /**
1532 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1533 with zeros. The shifted value is returned.
1534
1535 This function shifts the 64-bit value Operand to the left by Count bits. The
1536 low Count bits are set to zero. The shifted value is returned.
1537
1538 If Count is greater than 63, then ASSERT().
1539
1540 @param Operand The 64-bit operand to shift left.
1541 @param Count The number of bits to shift left.
1542
1543 @return Operand << Count.
1544
1545 **/
1546 UINT64
1547 EFIAPI
1548 LShiftU64 (
1549 IN UINT64 Operand,
1550 IN UINTN Count
1551 );
1552
1553
1554 /**
1555 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1556 filled with zeros. The shifted value is returned.
1557
1558 This function shifts the 64-bit value Operand to the right by Count bits. The
1559 high Count bits are set to zero. The shifted value is returned.
1560
1561 If Count is greater than 63, then ASSERT().
1562
1563 @param Operand The 64-bit operand to shift right.
1564 @param Count The number of bits to shift right.
1565
1566 @return Operand >> Count
1567
1568 **/
1569 UINT64
1570 EFIAPI
1571 RShiftU64 (
1572 IN UINT64 Operand,
1573 IN UINTN Count
1574 );
1575
1576
1577 /**
1578 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1579 with original integer's bit 63. The shifted value is returned.
1580
1581 This function shifts the 64-bit value Operand to the right by Count bits. The
1582 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1583
1584 If Count is greater than 63, then ASSERT().
1585
1586 @param Operand The 64-bit operand to shift right.
1587 @param Count The number of bits to shift right.
1588
1589 @return Operand >> Count
1590
1591 **/
1592 UINT64
1593 EFIAPI
1594 ARShiftU64 (
1595 IN UINT64 Operand,
1596 IN UINTN Count
1597 );
1598
1599
1600 /**
1601 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1602 with the high bits that were rotated.
1603
1604 This function rotates the 32-bit value Operand to the left by Count bits. The
1605 low Count bits are fill with the high Count bits of Operand. The rotated
1606 value is returned.
1607
1608 If Count is greater than 31, then ASSERT().
1609
1610 @param Operand The 32-bit operand to rotate left.
1611 @param Count The number of bits to rotate left.
1612
1613 @return Operand << Count
1614
1615 **/
1616 UINT32
1617 EFIAPI
1618 LRotU32 (
1619 IN UINT32 Operand,
1620 IN UINTN Count
1621 );
1622
1623
1624 /**
1625 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1626 with the low bits that were rotated.
1627
1628 This function rotates the 32-bit value Operand to the right by Count bits.
1629 The high Count bits are fill with the low Count bits of Operand. The rotated
1630 value is returned.
1631
1632 If Count is greater than 31, then ASSERT().
1633
1634 @param Operand The 32-bit operand to rotate right.
1635 @param Count The number of bits to rotate right.
1636
1637 @return Operand >> Count
1638
1639 **/
1640 UINT32
1641 EFIAPI
1642 RRotU32 (
1643 IN UINT32 Operand,
1644 IN UINTN Count
1645 );
1646
1647
1648 /**
1649 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1650 with the high bits that were rotated.
1651
1652 This function rotates the 64-bit value Operand to the left by Count bits. The
1653 low Count bits are fill with the high Count bits of Operand. The rotated
1654 value is returned.
1655
1656 If Count is greater than 63, then ASSERT().
1657
1658 @param Operand The 64-bit operand to rotate left.
1659 @param Count The number of bits to rotate left.
1660
1661 @return Operand << Count
1662
1663 **/
1664 UINT64
1665 EFIAPI
1666 LRotU64 (
1667 IN UINT64 Operand,
1668 IN UINTN Count
1669 );
1670
1671
1672 /**
1673 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1674 with the high low bits that were rotated.
1675
1676 This function rotates the 64-bit value Operand to the right by Count bits.
1677 The high Count bits are fill with the low Count bits of Operand. The rotated
1678 value is returned.
1679
1680 If Count is greater than 63, then ASSERT().
1681
1682 @param Operand The 64-bit operand to rotate right.
1683 @param Count The number of bits to rotate right.
1684
1685 @return Operand >> Count
1686
1687 **/
1688 UINT64
1689 EFIAPI
1690 RRotU64 (
1691 IN UINT64 Operand,
1692 IN UINTN Count
1693 );
1694
1695
1696 /**
1697 Returns the bit position of the lowest bit set in a 32-bit value.
1698
1699 This function computes the bit position of the lowest bit set in the 32-bit
1700 value specified by Operand. If Operand is zero, then -1 is returned.
1701 Otherwise, a value between 0 and 31 is returned.
1702
1703 @param Operand The 32-bit operand to evaluate.
1704
1705 @retval 0..31 The lowest bit set in Operand was found.
1706 @retval -1 Operand is zero.
1707
1708 **/
1709 INTN
1710 EFIAPI
1711 LowBitSet32 (
1712 IN UINT32 Operand
1713 );
1714
1715
1716 /**
1717 Returns the bit position of the lowest bit set in a 64-bit value.
1718
1719 This function computes the bit position of the lowest bit set in the 64-bit
1720 value specified by Operand. If Operand is zero, then -1 is returned.
1721 Otherwise, a value between 0 and 63 is returned.
1722
1723 @param Operand The 64-bit operand to evaluate.
1724
1725 @retval 0..63 The lowest bit set in Operand was found.
1726 @retval -1 Operand is zero.
1727
1728
1729 **/
1730 INTN
1731 EFIAPI
1732 LowBitSet64 (
1733 IN UINT64 Operand
1734 );
1735
1736
1737 /**
1738 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1739 to log2(x).
1740
1741 This function computes the bit position of the highest bit set in the 32-bit
1742 value specified by Operand. If Operand is zero, then -1 is returned.
1743 Otherwise, a value between 0 and 31 is returned.
1744
1745 @param Operand The 32-bit operand to evaluate.
1746
1747 @retval 0..31 Position of the highest bit set in Operand if found.
1748 @retval -1 Operand is zero.
1749
1750 **/
1751 INTN
1752 EFIAPI
1753 HighBitSet32 (
1754 IN UINT32 Operand
1755 );
1756
1757
1758 /**
1759 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1760 to log2(x).
1761
1762 This function computes the bit position of the highest bit set in the 64-bit
1763 value specified by Operand. If Operand is zero, then -1 is returned.
1764 Otherwise, a value between 0 and 63 is returned.
1765
1766 @param Operand The 64-bit operand to evaluate.
1767
1768 @retval 0..63 Position of the highest bit set in Operand if found.
1769 @retval -1 Operand is zero.
1770
1771 **/
1772 INTN
1773 EFIAPI
1774 HighBitSet64 (
1775 IN UINT64 Operand
1776 );
1777
1778
1779 /**
1780 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1781 1 << log2(x).
1782
1783 This function computes the value of the highest bit set in the 32-bit value
1784 specified by Operand. If Operand is zero, then zero is returned.
1785
1786 @param Operand The 32-bit operand to evaluate.
1787
1788 @return 1 << HighBitSet32(Operand)
1789 @retval 0 Operand is zero.
1790
1791 **/
1792 UINT32
1793 EFIAPI
1794 GetPowerOfTwo32 (
1795 IN UINT32 Operand
1796 );
1797
1798
1799 /**
1800 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1801 1 << log2(x).
1802
1803 This function computes the value of the highest bit set in the 64-bit value
1804 specified by Operand. If Operand is zero, then zero is returned.
1805
1806 @param Operand The 64-bit operand to evaluate.
1807
1808 @return 1 << HighBitSet64(Operand)
1809 @retval 0 Operand is zero.
1810
1811 **/
1812 UINT64
1813 EFIAPI
1814 GetPowerOfTwo64 (
1815 IN UINT64 Operand
1816 );
1817
1818
1819 /**
1820 Switches the endianess of a 16-bit integer.
1821
1822 This function swaps the bytes in a 16-bit unsigned value to switch the value
1823 from little endian to big endian or vice versa. The byte swapped value is
1824 returned.
1825
1826 @param Value A 16-bit unsigned value.
1827
1828 @return The byte swapped Value.
1829
1830 **/
1831 UINT16
1832 EFIAPI
1833 SwapBytes16 (
1834 IN UINT16 Value
1835 );
1836
1837
1838 /**
1839 Switches the endianess of a 32-bit integer.
1840
1841 This function swaps the bytes in a 32-bit unsigned value to switch the value
1842 from little endian to big endian or vice versa. The byte swapped value is
1843 returned.
1844
1845 @param Value A 32-bit unsigned value.
1846
1847 @return The byte swapped Value.
1848
1849 **/
1850 UINT32
1851 EFIAPI
1852 SwapBytes32 (
1853 IN UINT32 Value
1854 );
1855
1856
1857 /**
1858 Switches the endianess of a 64-bit integer.
1859
1860 This function swaps the bytes in a 64-bit unsigned value to switch the value
1861 from little endian to big endian or vice versa. The byte swapped value is
1862 returned.
1863
1864 @param Value A 64-bit unsigned value.
1865
1866 @return The byte swapped Value.
1867
1868 **/
1869 UINT64
1870 EFIAPI
1871 SwapBytes64 (
1872 IN UINT64 Value
1873 );
1874
1875
1876 /**
1877 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1878 generates a 64-bit unsigned result.
1879
1880 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1881 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1882 bit unsigned result is returned.
1883
1884 @param Multiplicand A 64-bit unsigned value.
1885 @param Multiplier A 32-bit unsigned value.
1886
1887 @return Multiplicand * Multiplier
1888
1889 **/
1890 UINT64
1891 EFIAPI
1892 MultU64x32 (
1893 IN UINT64 Multiplicand,
1894 IN UINT32 Multiplier
1895 );
1896
1897
1898 /**
1899 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1900 generates a 64-bit unsigned result.
1901
1902 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1903 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1904 bit unsigned result is returned.
1905
1906 @param Multiplicand A 64-bit unsigned value.
1907 @param Multiplier A 64-bit unsigned value.
1908
1909 @return Multiplicand * Multiplier
1910
1911 **/
1912 UINT64
1913 EFIAPI
1914 MultU64x64 (
1915 IN UINT64 Multiplicand,
1916 IN UINT64 Multiplier
1917 );
1918
1919
1920 /**
1921 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1922 64-bit signed result.
1923
1924 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1925 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1926 signed result is returned.
1927
1928 @param Multiplicand A 64-bit signed value.
1929 @param Multiplier A 64-bit signed value.
1930
1931 @return Multiplicand * Multiplier
1932
1933 **/
1934 INT64
1935 EFIAPI
1936 MultS64x64 (
1937 IN INT64 Multiplicand,
1938 IN INT64 Multiplier
1939 );
1940
1941
1942 /**
1943 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1944 a 64-bit unsigned result.
1945
1946 This function divides the 64-bit unsigned value Dividend by the 32-bit
1947 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1948 function returns the 64-bit unsigned quotient.
1949
1950 If Divisor is 0, then ASSERT().
1951
1952 @param Dividend A 64-bit unsigned value.
1953 @param Divisor A 32-bit unsigned value.
1954
1955 @return Dividend / Divisor
1956
1957 **/
1958 UINT64
1959 EFIAPI
1960 DivU64x32 (
1961 IN UINT64 Dividend,
1962 IN UINT32 Divisor
1963 );
1964
1965
1966 /**
1967 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1968 a 32-bit unsigned remainder.
1969
1970 This function divides the 64-bit unsigned value Dividend by the 32-bit
1971 unsigned value Divisor and generates a 32-bit remainder. This function
1972 returns the 32-bit unsigned remainder.
1973
1974 If Divisor is 0, then ASSERT().
1975
1976 @param Dividend A 64-bit unsigned value.
1977 @param Divisor A 32-bit unsigned value.
1978
1979 @return Dividend % Divisor
1980
1981 **/
1982 UINT32
1983 EFIAPI
1984 ModU64x32 (
1985 IN UINT64 Dividend,
1986 IN UINT32 Divisor
1987 );
1988
1989
1990 /**
1991 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1992 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1993
1994 This function divides the 64-bit unsigned value Dividend by the 32-bit
1995 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1996 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1997 This function returns the 64-bit unsigned quotient.
1998
1999 If Divisor is 0, then ASSERT().
2000
2001 @param Dividend A 64-bit unsigned value.
2002 @param Divisor A 32-bit unsigned value.
2003 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
2004 optional and may be NULL.
2005
2006 @return Dividend / Divisor
2007
2008 **/
2009 UINT64
2010 EFIAPI
2011 DivU64x32Remainder (
2012 IN UINT64 Dividend,
2013 IN UINT32 Divisor,
2014 OUT UINT32 *Remainder OPTIONAL
2015 );
2016
2017
2018 /**
2019 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2020 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2021
2022 This function divides the 64-bit unsigned value Dividend by the 64-bit
2023 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2024 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2025 This function returns the 64-bit unsigned quotient.
2026
2027 If Divisor is 0, then ASSERT().
2028
2029 @param Dividend A 64-bit unsigned value.
2030 @param Divisor A 64-bit unsigned value.
2031 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2032 optional and may be NULL.
2033
2034 @return Dividend / Divisor
2035
2036 **/
2037 UINT64
2038 EFIAPI
2039 DivU64x64Remainder (
2040 IN UINT64 Dividend,
2041 IN UINT64 Divisor,
2042 OUT UINT64 *Remainder OPTIONAL
2043 );
2044
2045
2046 /**
2047 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2048 64-bit signed result and a optional 64-bit signed remainder.
2049
2050 This function divides the 64-bit signed value Dividend by the 64-bit signed
2051 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2052 NULL, then the 64-bit signed remainder is returned in Remainder. This
2053 function returns the 64-bit signed quotient.
2054
2055 It is the caller's responsibility to not call this function with a Divisor of 0.
2056 If Divisor is 0, then the quotient and remainder should be assumed to be
2057 the largest negative integer.
2058
2059 If Divisor is 0, then ASSERT().
2060
2061 @param Dividend A 64-bit signed value.
2062 @param Divisor A 64-bit signed value.
2063 @param Remainder A pointer to a 64-bit signed value. This parameter is
2064 optional and may be NULL.
2065
2066 @return Dividend / Divisor
2067
2068 **/
2069 INT64
2070 EFIAPI
2071 DivS64x64Remainder (
2072 IN INT64 Dividend,
2073 IN INT64 Divisor,
2074 OUT INT64 *Remainder OPTIONAL
2075 );
2076
2077
2078 /**
2079 Reads a 16-bit value from memory that may be unaligned.
2080
2081 This function returns the 16-bit value pointed to by Buffer. The function
2082 guarantees that the read operation does not produce an alignment fault.
2083
2084 If the Buffer is NULL, then ASSERT().
2085
2086 @param Buffer Pointer to a 16-bit value that may be unaligned.
2087
2088 @return The 16-bit value read from Buffer.
2089
2090 **/
2091 UINT16
2092 EFIAPI
2093 ReadUnaligned16 (
2094 IN CONST UINT16 *Buffer
2095 );
2096
2097
2098 /**
2099 Writes a 16-bit value to memory that may be unaligned.
2100
2101 This function writes the 16-bit value specified by Value to Buffer. Value is
2102 returned. The function guarantees that the write operation does not produce
2103 an alignment fault.
2104
2105 If the Buffer is NULL, then ASSERT().
2106
2107 @param Buffer Pointer to a 16-bit value that may be unaligned.
2108 @param Value 16-bit value to write to Buffer.
2109
2110 @return The 16-bit value to write to Buffer.
2111
2112 **/
2113 UINT16
2114 EFIAPI
2115 WriteUnaligned16 (
2116 OUT UINT16 *Buffer,
2117 IN UINT16 Value
2118 );
2119
2120
2121 /**
2122 Reads a 24-bit value from memory that may be unaligned.
2123
2124 This function returns the 24-bit value pointed to by Buffer. The function
2125 guarantees that the read operation does not produce an alignment fault.
2126
2127 If the Buffer is NULL, then ASSERT().
2128
2129 @param Buffer Pointer to a 24-bit value that may be unaligned.
2130
2131 @return The 24-bit value read from Buffer.
2132
2133 **/
2134 UINT32
2135 EFIAPI
2136 ReadUnaligned24 (
2137 IN CONST UINT32 *Buffer
2138 );
2139
2140
2141 /**
2142 Writes a 24-bit value to memory that may be unaligned.
2143
2144 This function writes the 24-bit value specified by Value to Buffer. Value is
2145 returned. The function guarantees that the write operation does not produce
2146 an alignment fault.
2147
2148 If the Buffer is NULL, then ASSERT().
2149
2150 @param Buffer Pointer to a 24-bit value that may be unaligned.
2151 @param Value 24-bit value to write to Buffer.
2152
2153 @return The 24-bit value to write to Buffer.
2154
2155 **/
2156 UINT32
2157 EFIAPI
2158 WriteUnaligned24 (
2159 OUT UINT32 *Buffer,
2160 IN UINT32 Value
2161 );
2162
2163
2164 /**
2165 Reads a 32-bit value from memory that may be unaligned.
2166
2167 This function returns the 32-bit value pointed to by Buffer. The function
2168 guarantees that the read operation does not produce an alignment fault.
2169
2170 If the Buffer is NULL, then ASSERT().
2171
2172 @param Buffer Pointer to a 32-bit value that may be unaligned.
2173
2174 @return The 32-bit value read from Buffer.
2175
2176 **/
2177 UINT32
2178 EFIAPI
2179 ReadUnaligned32 (
2180 IN CONST UINT32 *Buffer
2181 );
2182
2183
2184 /**
2185 Writes a 32-bit value to memory that may be unaligned.
2186
2187 This function writes the 32-bit value specified by Value to Buffer. Value is
2188 returned. The function guarantees that the write operation does not produce
2189 an alignment fault.
2190
2191 If the Buffer is NULL, then ASSERT().
2192
2193 @param Buffer Pointer to a 32-bit value that may be unaligned.
2194 @param Value 32-bit value to write to Buffer.
2195
2196 @return The 32-bit value to write to Buffer.
2197
2198 **/
2199 UINT32
2200 EFIAPI
2201 WriteUnaligned32 (
2202 OUT UINT32 *Buffer,
2203 IN UINT32 Value
2204 );
2205
2206
2207 /**
2208 Reads a 64-bit value from memory that may be unaligned.
2209
2210 This function returns the 64-bit value pointed to by Buffer. The function
2211 guarantees that the read operation does not produce an alignment fault.
2212
2213 If the Buffer is NULL, then ASSERT().
2214
2215 @param Buffer Pointer to a 64-bit value that may be unaligned.
2216
2217 @return The 64-bit value read from Buffer.
2218
2219 **/
2220 UINT64
2221 EFIAPI
2222 ReadUnaligned64 (
2223 IN CONST UINT64 *Buffer
2224 );
2225
2226
2227 /**
2228 Writes a 64-bit value to memory that may be unaligned.
2229
2230 This function writes the 64-bit value specified by Value to Buffer. Value is
2231 returned. The function guarantees that the write operation does not produce
2232 an alignment fault.
2233
2234 If the Buffer is NULL, then ASSERT().
2235
2236 @param Buffer Pointer to a 64-bit value that may be unaligned.
2237 @param Value 64-bit value to write to Buffer.
2238
2239 @return The 64-bit value to write to Buffer.
2240
2241 **/
2242 UINT64
2243 EFIAPI
2244 WriteUnaligned64 (
2245 OUT UINT64 *Buffer,
2246 IN UINT64 Value
2247 );
2248
2249
2250 //
2251 // Bit Field Functions
2252 //
2253
2254 /**
2255 Returns a bit field from an 8-bit value.
2256
2257 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2258
2259 If 8-bit operations are not supported, then ASSERT().
2260 If StartBit is greater than 7, then ASSERT().
2261 If EndBit is greater than 7, then ASSERT().
2262 If EndBit is less than StartBit, then ASSERT().
2263
2264 @param Operand Operand on which to perform the bitfield operation.
2265 @param StartBit The ordinal of the least significant bit in the bit field.
2266 Range 0..7.
2267 @param EndBit The ordinal of the most significant bit in the bit field.
2268 Range 0..7.
2269
2270 @return The bit field read.
2271
2272 **/
2273 UINT8
2274 EFIAPI
2275 BitFieldRead8 (
2276 IN UINT8 Operand,
2277 IN UINTN StartBit,
2278 IN UINTN EndBit
2279 );
2280
2281
2282 /**
2283 Writes a bit field to an 8-bit value, and returns the result.
2284
2285 Writes Value to the bit field specified by the StartBit and the EndBit in
2286 Operand. All other bits in Operand are preserved. The new 8-bit value is
2287 returned.
2288
2289 If 8-bit operations are not supported, then ASSERT().
2290 If StartBit is greater than 7, then ASSERT().
2291 If EndBit is greater than 7, then ASSERT().
2292 If EndBit is less than StartBit, then ASSERT().
2293
2294 @param Operand Operand on which to perform the bitfield operation.
2295 @param StartBit The ordinal of the least significant bit in the bit field.
2296 Range 0..7.
2297 @param EndBit The ordinal of the most significant bit in the bit field.
2298 Range 0..7.
2299 @param Value New value of the bit field.
2300
2301 @return The new 8-bit value.
2302
2303 **/
2304 UINT8
2305 EFIAPI
2306 BitFieldWrite8 (
2307 IN UINT8 Operand,
2308 IN UINTN StartBit,
2309 IN UINTN EndBit,
2310 IN UINT8 Value
2311 );
2312
2313
2314 /**
2315 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2316 result.
2317
2318 Performs a bitwise OR between the bit field specified by StartBit
2319 and EndBit in Operand and the value specified by OrData. All other bits in
2320 Operand are preserved. The new 8-bit value is returned.
2321
2322 If 8-bit operations are not supported, then ASSERT().
2323 If StartBit is greater than 7, then ASSERT().
2324 If EndBit is greater than 7, then ASSERT().
2325 If EndBit is less than StartBit, then ASSERT().
2326
2327 @param Operand Operand on which to perform the bitfield operation.
2328 @param StartBit The ordinal of the least significant bit in the bit field.
2329 Range 0..7.
2330 @param EndBit The ordinal of the most significant bit in the bit field.
2331 Range 0..7.
2332 @param OrData The value to OR with the read value from the value
2333
2334 @return The new 8-bit value.
2335
2336 **/
2337 UINT8
2338 EFIAPI
2339 BitFieldOr8 (
2340 IN UINT8 Operand,
2341 IN UINTN StartBit,
2342 IN UINTN EndBit,
2343 IN UINT8 OrData
2344 );
2345
2346
2347 /**
2348 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2349 the result.
2350
2351 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2352 in Operand and the value specified by AndData. All other bits in Operand are
2353 preserved. The new 8-bit value is returned.
2354
2355 If 8-bit operations are not supported, then ASSERT().
2356 If StartBit is greater than 7, then ASSERT().
2357 If EndBit is greater than 7, then ASSERT().
2358 If EndBit is less than StartBit, then ASSERT().
2359
2360 @param Operand Operand on which to perform the bitfield operation.
2361 @param StartBit The ordinal of the least significant bit in the bit field.
2362 Range 0..7.
2363 @param EndBit The ordinal of the most significant bit in the bit field.
2364 Range 0..7.
2365 @param AndData The value to AND with the read value from the value.
2366
2367 @return The new 8-bit value.
2368
2369 **/
2370 UINT8
2371 EFIAPI
2372 BitFieldAnd8 (
2373 IN UINT8 Operand,
2374 IN UINTN StartBit,
2375 IN UINTN EndBit,
2376 IN UINT8 AndData
2377 );
2378
2379
2380 /**
2381 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2382 bitwise OR, and returns the result.
2383
2384 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2385 in Operand and the value specified by AndData, followed by a bitwise
2386 OR with value specified by OrData. All other bits in Operand are
2387 preserved. The new 8-bit value is returned.
2388
2389 If 8-bit operations are not supported, then ASSERT().
2390 If StartBit is greater than 7, then ASSERT().
2391 If EndBit is greater than 7, then ASSERT().
2392 If EndBit is less than StartBit, then ASSERT().
2393
2394 @param Operand Operand on which to perform the bitfield operation.
2395 @param StartBit The ordinal of the least significant bit in the bit field.
2396 Range 0..7.
2397 @param EndBit The ordinal of the most significant bit in the bit field.
2398 Range 0..7.
2399 @param AndData The value to AND with the read value from the value.
2400 @param OrData The value to OR with the result of the AND operation.
2401
2402 @return The new 8-bit value.
2403
2404 **/
2405 UINT8
2406 EFIAPI
2407 BitFieldAndThenOr8 (
2408 IN UINT8 Operand,
2409 IN UINTN StartBit,
2410 IN UINTN EndBit,
2411 IN UINT8 AndData,
2412 IN UINT8 OrData
2413 );
2414
2415
2416 /**
2417 Returns a bit field from a 16-bit value.
2418
2419 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2420
2421 If 16-bit operations are not supported, then ASSERT().
2422 If StartBit is greater than 15, then ASSERT().
2423 If EndBit is greater than 15, then ASSERT().
2424 If EndBit is less than StartBit, then ASSERT().
2425
2426 @param Operand Operand on which to perform the bitfield operation.
2427 @param StartBit The ordinal of the least significant bit in the bit field.
2428 Range 0..15.
2429 @param EndBit The ordinal of the most significant bit in the bit field.
2430 Range 0..15.
2431
2432 @return The bit field read.
2433
2434 **/
2435 UINT16
2436 EFIAPI
2437 BitFieldRead16 (
2438 IN UINT16 Operand,
2439 IN UINTN StartBit,
2440 IN UINTN EndBit
2441 );
2442
2443
2444 /**
2445 Writes a bit field to a 16-bit value, and returns the result.
2446
2447 Writes Value to the bit field specified by the StartBit and the EndBit in
2448 Operand. All other bits in Operand are preserved. The new 16-bit value is
2449 returned.
2450
2451 If 16-bit operations are not supported, then ASSERT().
2452 If StartBit is greater than 15, then ASSERT().
2453 If EndBit is greater than 15, then ASSERT().
2454 If EndBit is less than StartBit, then ASSERT().
2455
2456 @param Operand Operand on which to perform the bitfield operation.
2457 @param StartBit The ordinal of the least significant bit in the bit field.
2458 Range 0..15.
2459 @param EndBit The ordinal of the most significant bit in the bit field.
2460 Range 0..15.
2461 @param Value New value of the bit field.
2462
2463 @return The new 16-bit value.
2464
2465 **/
2466 UINT16
2467 EFIAPI
2468 BitFieldWrite16 (
2469 IN UINT16 Operand,
2470 IN UINTN StartBit,
2471 IN UINTN EndBit,
2472 IN UINT16 Value
2473 );
2474
2475
2476 /**
2477 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2478 result.
2479
2480 Performs a bitwise OR between the bit field specified by StartBit
2481 and EndBit in Operand and the value specified by OrData. All other bits in
2482 Operand are preserved. The new 16-bit value is returned.
2483
2484 If 16-bit operations are not supported, then ASSERT().
2485 If StartBit is greater than 15, then ASSERT().
2486 If EndBit is greater than 15, then ASSERT().
2487 If EndBit is less than StartBit, then ASSERT().
2488
2489 @param Operand Operand on which to perform the bitfield operation.
2490 @param StartBit The ordinal of the least significant bit in the bit field.
2491 Range 0..15.
2492 @param EndBit The ordinal of the most significant bit in the bit field.
2493 Range 0..15.
2494 @param OrData The value to OR with the read value from the value
2495
2496 @return The new 16-bit value.
2497
2498 **/
2499 UINT16
2500 EFIAPI
2501 BitFieldOr16 (
2502 IN UINT16 Operand,
2503 IN UINTN StartBit,
2504 IN UINTN EndBit,
2505 IN UINT16 OrData
2506 );
2507
2508
2509 /**
2510 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2511 the result.
2512
2513 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2514 in Operand and the value specified by AndData. All other bits in Operand are
2515 preserved. The new 16-bit value is returned.
2516
2517 If 16-bit operations are not supported, then ASSERT().
2518 If StartBit is greater than 15, then ASSERT().
2519 If EndBit is greater than 15, then ASSERT().
2520 If EndBit is less than StartBit, then ASSERT().
2521
2522 @param Operand Operand on which to perform the bitfield operation.
2523 @param StartBit The ordinal of the least significant bit in the bit field.
2524 Range 0..15.
2525 @param EndBit The ordinal of the most significant bit in the bit field.
2526 Range 0..15.
2527 @param AndData The value to AND with the read value from the value
2528
2529 @return The new 16-bit value.
2530
2531 **/
2532 UINT16
2533 EFIAPI
2534 BitFieldAnd16 (
2535 IN UINT16 Operand,
2536 IN UINTN StartBit,
2537 IN UINTN EndBit,
2538 IN UINT16 AndData
2539 );
2540
2541
2542 /**
2543 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2544 bitwise OR, and returns the result.
2545
2546 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2547 in Operand and the value specified by AndData, followed by a bitwise
2548 OR with value specified by OrData. All other bits in Operand are
2549 preserved. The new 16-bit value is returned.
2550
2551 If 16-bit operations are not supported, then ASSERT().
2552 If StartBit is greater than 15, then ASSERT().
2553 If EndBit is greater than 15, then ASSERT().
2554 If EndBit is less than StartBit, then ASSERT().
2555
2556 @param Operand Operand on which to perform the bitfield operation.
2557 @param StartBit The ordinal of the least significant bit in the bit field.
2558 Range 0..15.
2559 @param EndBit The ordinal of the most significant bit in the bit field.
2560 Range 0..15.
2561 @param AndData The value to AND with the read value from the value.
2562 @param OrData The value to OR with the result of the AND operation.
2563
2564 @return The new 16-bit value.
2565
2566 **/
2567 UINT16
2568 EFIAPI
2569 BitFieldAndThenOr16 (
2570 IN UINT16 Operand,
2571 IN UINTN StartBit,
2572 IN UINTN EndBit,
2573 IN UINT16 AndData,
2574 IN UINT16 OrData
2575 );
2576
2577
2578 /**
2579 Returns a bit field from a 32-bit value.
2580
2581 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2582
2583 If 32-bit operations are not supported, then ASSERT().
2584 If StartBit is greater than 31, then ASSERT().
2585 If EndBit is greater than 31, then ASSERT().
2586 If EndBit is less than StartBit, then ASSERT().
2587
2588 @param Operand Operand on which to perform the bitfield operation.
2589 @param StartBit The ordinal of the least significant bit in the bit field.
2590 Range 0..31.
2591 @param EndBit The ordinal of the most significant bit in the bit field.
2592 Range 0..31.
2593
2594 @return The bit field read.
2595
2596 **/
2597 UINT32
2598 EFIAPI
2599 BitFieldRead32 (
2600 IN UINT32 Operand,
2601 IN UINTN StartBit,
2602 IN UINTN EndBit
2603 );
2604
2605
2606 /**
2607 Writes a bit field to a 32-bit value, and returns the result.
2608
2609 Writes Value to the bit field specified by the StartBit and the EndBit in
2610 Operand. All other bits in Operand are preserved. The new 32-bit value is
2611 returned.
2612
2613 If 32-bit operations are not supported, then ASSERT().
2614 If StartBit is greater than 31, then ASSERT().
2615 If EndBit is greater than 31, then ASSERT().
2616 If EndBit is less than StartBit, then ASSERT().
2617
2618 @param Operand Operand on which to perform the bitfield operation.
2619 @param StartBit The ordinal of the least significant bit in the bit field.
2620 Range 0..31.
2621 @param EndBit The ordinal of the most significant bit in the bit field.
2622 Range 0..31.
2623 @param Value New value of the bit field.
2624
2625 @return The new 32-bit value.
2626
2627 **/
2628 UINT32
2629 EFIAPI
2630 BitFieldWrite32 (
2631 IN UINT32 Operand,
2632 IN UINTN StartBit,
2633 IN UINTN EndBit,
2634 IN UINT32 Value
2635 );
2636
2637
2638 /**
2639 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2640 result.
2641
2642 Performs a bitwise OR between the bit field specified by StartBit
2643 and EndBit in Operand and the value specified by OrData. All other bits in
2644 Operand are preserved. The new 32-bit value is returned.
2645
2646 If 32-bit operations are not supported, then ASSERT().
2647 If StartBit is greater than 31, then ASSERT().
2648 If EndBit is greater than 31, then ASSERT().
2649 If EndBit is less than StartBit, then ASSERT().
2650
2651 @param Operand Operand on which to perform the bitfield operation.
2652 @param StartBit The ordinal of the least significant bit in the bit field.
2653 Range 0..31.
2654 @param EndBit The ordinal of the most significant bit in the bit field.
2655 Range 0..31.
2656 @param OrData The value to OR with the read value from the value
2657
2658 @return The new 32-bit value.
2659
2660 **/
2661 UINT32
2662 EFIAPI
2663 BitFieldOr32 (
2664 IN UINT32 Operand,
2665 IN UINTN StartBit,
2666 IN UINTN EndBit,
2667 IN UINT32 OrData
2668 );
2669
2670
2671 /**
2672 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2673 the result.
2674
2675 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2676 in Operand and the value specified by AndData. All other bits in Operand are
2677 preserved. The new 32-bit value is returned.
2678
2679 If 32-bit operations are not supported, then ASSERT().
2680 If StartBit is greater than 31, then ASSERT().
2681 If EndBit is greater than 31, then ASSERT().
2682 If EndBit is less than StartBit, then ASSERT().
2683
2684 @param Operand Operand on which to perform the bitfield operation.
2685 @param StartBit The ordinal of the least significant bit in the bit field.
2686 Range 0..31.
2687 @param EndBit The ordinal of the most significant bit in the bit field.
2688 Range 0..31.
2689 @param AndData The value to AND with the read value from the value
2690
2691 @return The new 32-bit value.
2692
2693 **/
2694 UINT32
2695 EFIAPI
2696 BitFieldAnd32 (
2697 IN UINT32 Operand,
2698 IN UINTN StartBit,
2699 IN UINTN EndBit,
2700 IN UINT32 AndData
2701 );
2702
2703
2704 /**
2705 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2706 bitwise OR, and returns the result.
2707
2708 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2709 in Operand and the value specified by AndData, followed by a bitwise
2710 OR with value specified by OrData. All other bits in Operand are
2711 preserved. The new 32-bit value is returned.
2712
2713 If 32-bit operations are not supported, then ASSERT().
2714 If StartBit is greater than 31, then ASSERT().
2715 If EndBit is greater than 31, then ASSERT().
2716 If EndBit is less than StartBit, then ASSERT().
2717
2718 @param Operand Operand on which to perform the bitfield operation.
2719 @param StartBit The ordinal of the least significant bit in the bit field.
2720 Range 0..31.
2721 @param EndBit The ordinal of the most significant bit in the bit field.
2722 Range 0..31.
2723 @param AndData The value to AND with the read value from the value.
2724 @param OrData The value to OR with the result of the AND operation.
2725
2726 @return The new 32-bit value.
2727
2728 **/
2729 UINT32
2730 EFIAPI
2731 BitFieldAndThenOr32 (
2732 IN UINT32 Operand,
2733 IN UINTN StartBit,
2734 IN UINTN EndBit,
2735 IN UINT32 AndData,
2736 IN UINT32 OrData
2737 );
2738
2739
2740 /**
2741 Returns a bit field from a 64-bit value.
2742
2743 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2744
2745 If 64-bit operations are not supported, then ASSERT().
2746 If StartBit is greater than 63, then ASSERT().
2747 If EndBit is greater than 63, then ASSERT().
2748 If EndBit is less than StartBit, then ASSERT().
2749
2750 @param Operand Operand on which to perform the bitfield operation.
2751 @param StartBit The ordinal of the least significant bit in the bit field.
2752 Range 0..63.
2753 @param EndBit The ordinal of the most significant bit in the bit field.
2754 Range 0..63.
2755
2756 @return The bit field read.
2757
2758 **/
2759 UINT64
2760 EFIAPI
2761 BitFieldRead64 (
2762 IN UINT64 Operand,
2763 IN UINTN StartBit,
2764 IN UINTN EndBit
2765 );
2766
2767
2768 /**
2769 Writes a bit field to a 64-bit value, and returns the result.
2770
2771 Writes Value to the bit field specified by the StartBit and the EndBit in
2772 Operand. All other bits in Operand are preserved. The new 64-bit value is
2773 returned.
2774
2775 If 64-bit operations are not supported, then ASSERT().
2776 If StartBit is greater than 63, then ASSERT().
2777 If EndBit is greater than 63, then ASSERT().
2778 If EndBit is less than StartBit, then ASSERT().
2779
2780 @param Operand Operand on which to perform the bitfield operation.
2781 @param StartBit The ordinal of the least significant bit in the bit field.
2782 Range 0..63.
2783 @param EndBit The ordinal of the most significant bit in the bit field.
2784 Range 0..63.
2785 @param Value New value of the bit field.
2786
2787 @return The new 64-bit value.
2788
2789 **/
2790 UINT64
2791 EFIAPI
2792 BitFieldWrite64 (
2793 IN UINT64 Operand,
2794 IN UINTN StartBit,
2795 IN UINTN EndBit,
2796 IN UINT64 Value
2797 );
2798
2799
2800 /**
2801 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2802 result.
2803
2804 Performs a bitwise OR between the bit field specified by StartBit
2805 and EndBit in Operand and the value specified by OrData. All other bits in
2806 Operand are preserved. The new 64-bit value is returned.
2807
2808 If 64-bit operations are not supported, then ASSERT().
2809 If StartBit is greater than 63, then ASSERT().
2810 If EndBit is greater than 63, then ASSERT().
2811 If EndBit is less than StartBit, then ASSERT().
2812
2813 @param Operand Operand on which to perform the bitfield operation.
2814 @param StartBit The ordinal of the least significant bit in the bit field.
2815 Range 0..63.
2816 @param EndBit The ordinal of the most significant bit in the bit field.
2817 Range 0..63.
2818 @param OrData The value to OR with the read value from the value
2819
2820 @return The new 64-bit value.
2821
2822 **/
2823 UINT64
2824 EFIAPI
2825 BitFieldOr64 (
2826 IN UINT64 Operand,
2827 IN UINTN StartBit,
2828 IN UINTN EndBit,
2829 IN UINT64 OrData
2830 );
2831
2832
2833 /**
2834 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2835 the result.
2836
2837 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2838 in Operand and the value specified by AndData. All other bits in Operand are
2839 preserved. The new 64-bit value is returned.
2840
2841 If 64-bit operations are not supported, then ASSERT().
2842 If StartBit is greater than 63, then ASSERT().
2843 If EndBit is greater than 63, then ASSERT().
2844 If EndBit is less than StartBit, then ASSERT().
2845
2846 @param Operand Operand on which to perform the bitfield operation.
2847 @param StartBit The ordinal of the least significant bit in the bit field.
2848 Range 0..63.
2849 @param EndBit The ordinal of the most significant bit in the bit field.
2850 Range 0..63.
2851 @param AndData The value to AND with the read value from the value
2852
2853 @return The new 64-bit value.
2854
2855 **/
2856 UINT64
2857 EFIAPI
2858 BitFieldAnd64 (
2859 IN UINT64 Operand,
2860 IN UINTN StartBit,
2861 IN UINTN EndBit,
2862 IN UINT64 AndData
2863 );
2864
2865
2866 /**
2867 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2868 bitwise OR, and returns the result.
2869
2870 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2871 in Operand and the value specified by AndData, followed by a bitwise
2872 OR with value specified by OrData. All other bits in Operand are
2873 preserved. The new 64-bit value is returned.
2874
2875 If 64-bit operations are not supported, then ASSERT().
2876 If StartBit is greater than 63, then ASSERT().
2877 If EndBit is greater than 63, then ASSERT().
2878 If EndBit is less than StartBit, then ASSERT().
2879
2880 @param Operand Operand on which to perform the bitfield operation.
2881 @param StartBit The ordinal of the least significant bit in the bit field.
2882 Range 0..63.
2883 @param EndBit The ordinal of the most significant bit in the bit field.
2884 Range 0..63.
2885 @param AndData The value to AND with the read value from the value.
2886 @param OrData The value to OR with the result of the AND operation.
2887
2888 @return The new 64-bit value.
2889
2890 **/
2891 UINT64
2892 EFIAPI
2893 BitFieldAndThenOr64 (
2894 IN UINT64 Operand,
2895 IN UINTN StartBit,
2896 IN UINTN EndBit,
2897 IN UINT64 AndData,
2898 IN UINT64 OrData
2899 );
2900
2901 //
2902 // Base Library Checksum Functions
2903 //
2904
2905 /**
2906 Returns the sum of all elements in a buffer in unit of UINT8.
2907 During calculation, the carry bits are dropped.
2908
2909 This function calculates the sum of all elements in a buffer
2910 in unit of UINT8. The carry bits in result of addition are dropped.
2911 The result is returned as UINT8. If Length is Zero, then Zero is
2912 returned.
2913
2914 If Buffer is NULL, then ASSERT().
2915 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2916
2917 @param Buffer Pointer to the buffer to carry out the sum operation.
2918 @param Length The size, in bytes, of Buffer.
2919
2920 @return Sum The sum of Buffer with carry bits dropped during additions.
2921
2922 **/
2923 UINT8
2924 EFIAPI
2925 CalculateSum8 (
2926 IN CONST UINT8 *Buffer,
2927 IN UINTN Length
2928 );
2929
2930
2931 /**
2932 Returns the two's complement checksum of all elements in a buffer
2933 of 8-bit values.
2934
2935 This function first calculates the sum of the 8-bit values in the
2936 buffer specified by Buffer and Length. The carry bits in the result
2937 of addition are dropped. Then, the two's complement of the sum is
2938 returned. If Length is 0, then 0 is returned.
2939
2940 If Buffer is NULL, then ASSERT().
2941 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2942
2943 @param Buffer Pointer to the buffer to carry out the checksum operation.
2944 @param Length The size, in bytes, of Buffer.
2945
2946 @return Checksum The 2's complement checksum of Buffer.
2947
2948 **/
2949 UINT8
2950 EFIAPI
2951 CalculateCheckSum8 (
2952 IN CONST UINT8 *Buffer,
2953 IN UINTN Length
2954 );
2955
2956
2957 /**
2958 Returns the sum of all elements in a buffer of 16-bit values. During
2959 calculation, the carry bits are dropped.
2960
2961 This function calculates the sum of the 16-bit values in the buffer
2962 specified by Buffer and Length. The carry bits in result of addition are dropped.
2963 The 16-bit result is returned. If Length is 0, then 0 is returned.
2964
2965 If Buffer is NULL, then ASSERT().
2966 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
2967 If Length is not aligned on a 16-bit boundary, then ASSERT().
2968 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2969
2970 @param Buffer Pointer to the buffer to carry out the sum operation.
2971 @param Length The size, in bytes, of Buffer.
2972
2973 @return Sum The sum of Buffer with carry bits dropped during additions.
2974
2975 **/
2976 UINT16
2977 EFIAPI
2978 CalculateSum16 (
2979 IN CONST UINT16 *Buffer,
2980 IN UINTN Length
2981 );
2982
2983
2984 /**
2985 Returns the two's complement checksum of all elements in a buffer of
2986 16-bit values.
2987
2988 This function first calculates the sum of the 16-bit values in the buffer
2989 specified by Buffer and Length. The carry bits in the result of addition
2990 are dropped. Then, the two's complement of the sum is returned. If Length
2991 is 0, then 0 is returned.
2992
2993 If Buffer is NULL, then ASSERT().
2994 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
2995 If Length is not aligned on a 16-bit boundary, then ASSERT().
2996 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2997
2998 @param Buffer Pointer to the buffer to carry out the checksum operation.
2999 @param Length The size, in bytes, of Buffer.
3000
3001 @return Checksum The 2's complement checksum of Buffer.
3002
3003 **/
3004 UINT16
3005 EFIAPI
3006 CalculateCheckSum16 (
3007 IN CONST UINT16 *Buffer,
3008 IN UINTN Length
3009 );
3010
3011
3012 /**
3013 Returns the sum of all elements in a buffer of 32-bit values. During
3014 calculation, the carry bits are dropped.
3015
3016 This function calculates the sum of the 32-bit values in the buffer
3017 specified by Buffer and Length. The carry bits in result of addition are dropped.
3018 The 32-bit result is returned. If Length is 0, then 0 is returned.
3019
3020 If Buffer is NULL, then ASSERT().
3021 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3022 If Length is not aligned on a 32-bit boundary, then ASSERT().
3023 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3024
3025 @param Buffer Pointer to the buffer to carry out the sum operation.
3026 @param Length The size, in bytes, of Buffer.
3027
3028 @return Sum The sum of Buffer with carry bits dropped during additions.
3029
3030 **/
3031 UINT32
3032 EFIAPI
3033 CalculateSum32 (
3034 IN CONST UINT32 *Buffer,
3035 IN UINTN Length
3036 );
3037
3038
3039 /**
3040 Returns the two's complement checksum of all elements in a buffer of
3041 32-bit values.
3042
3043 This function first calculates the sum of the 32-bit values in the buffer
3044 specified by Buffer and Length. The carry bits in the result of addition
3045 are dropped. Then, the two's complement of the sum is returned. If Length
3046 is 0, then 0 is returned.
3047
3048 If Buffer is NULL, then ASSERT().
3049 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3050 If Length is not aligned on a 32-bit boundary, then ASSERT().
3051 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3052
3053 @param Buffer Pointer to the buffer to carry out the checksum operation.
3054 @param Length The size, in bytes, of Buffer.
3055
3056 @return Checksum The 2's complement checksum of Buffer.
3057
3058 **/
3059 UINT32
3060 EFIAPI
3061 CalculateCheckSum32 (
3062 IN CONST UINT32 *Buffer,
3063 IN UINTN Length
3064 );
3065
3066
3067 /**
3068 Returns the sum of all elements in a buffer of 64-bit values. During
3069 calculation, the carry bits are dropped.
3070
3071 This function calculates the sum of the 64-bit values in the buffer
3072 specified by Buffer and Length. The carry bits in result of addition are dropped.
3073 The 64-bit result is returned. If Length is 0, then 0 is returned.
3074
3075 If Buffer is NULL, then ASSERT().
3076 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3077 If Length is not aligned on a 64-bit boundary, then ASSERT().
3078 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3079
3080 @param Buffer Pointer to the buffer to carry out the sum operation.
3081 @param Length The size, in bytes, of Buffer.
3082
3083 @return Sum The sum of Buffer with carry bits dropped during additions.
3084
3085 **/
3086 UINT64
3087 EFIAPI
3088 CalculateSum64 (
3089 IN CONST UINT64 *Buffer,
3090 IN UINTN Length
3091 );
3092
3093
3094 /**
3095 Returns the two's complement checksum of all elements in a buffer of
3096 64-bit values.
3097
3098 This function first calculates the sum of the 64-bit values in the buffer
3099 specified by Buffer and Length. The carry bits in the result of addition
3100 are dropped. Then, the two's complement of the sum is returned. If Length
3101 is 0, then 0 is returned.
3102
3103 If Buffer is NULL, then ASSERT().
3104 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3105 If Length is not aligned on a 64-bit boundary, then ASSERT().
3106 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3107
3108 @param Buffer Pointer to the buffer to carry out the checksum operation.
3109 @param Length The size, in bytes, of Buffer.
3110
3111 @return Checksum The 2's complement checksum of Buffer.
3112
3113 **/
3114 UINT64
3115 EFIAPI
3116 CalculateCheckSum64 (
3117 IN CONST UINT64 *Buffer,
3118 IN UINTN Length
3119 );
3120
3121
3122 //
3123 // Base Library CPU Functions
3124 //
3125
3126 /**
3127 Function entry point used when a stack switch is requested with SwitchStack()
3128
3129 @param Context1 Context1 parameter passed into SwitchStack().
3130 @param Context2 Context2 parameter passed into SwitchStack().
3131
3132 **/
3133 typedef
3134 VOID
3135 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3136 IN VOID *Context1, OPTIONAL
3137 IN VOID *Context2 OPTIONAL
3138 );
3139
3140
3141 /**
3142 Used to serialize load and store operations.
3143
3144 All loads and stores that proceed calls to this function are guaranteed to be
3145 globally visible when this function returns.
3146
3147 **/
3148 VOID
3149 EFIAPI
3150 MemoryFence (
3151 VOID
3152 );
3153
3154
3155 /**
3156 Saves the current CPU context that can be restored with a call to LongJump()
3157 and returns 0.
3158
3159 Saves the current CPU context in the buffer specified by JumpBuffer and
3160 returns 0. The initial call to SetJump() must always return 0. Subsequent
3161 calls to LongJump() cause a non-zero value to be returned by SetJump().
3162
3163 If JumpBuffer is NULL, then ASSERT().
3164 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3165
3166 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3167 The same structure must never be used for more than one CPU architecture context.
3168 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3169 SetJump()/LongJump() is not currently supported for the EBC processor type.
3170
3171 @param JumpBuffer A pointer to CPU context buffer.
3172
3173 @retval 0 Indicates a return from SetJump().
3174
3175 **/
3176 UINTN
3177 EFIAPI
3178 SetJump (
3179 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3180 );
3181
3182
3183 /**
3184 Restores the CPU context that was saved with SetJump().
3185
3186 Restores the CPU context from the buffer specified by JumpBuffer. This
3187 function never returns to the caller. Instead is resumes execution based on
3188 the state of JumpBuffer.
3189
3190 If JumpBuffer is NULL, then ASSERT().
3191 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3192 If Value is 0, then ASSERT().
3193
3194 @param JumpBuffer A pointer to CPU context buffer.
3195 @param Value The value to return when the SetJump() context is
3196 restored and must be non-zero.
3197
3198 **/
3199 VOID
3200 EFIAPI
3201 LongJump (
3202 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3203 IN UINTN Value
3204 );
3205
3206
3207 /**
3208 Enables CPU interrupts.
3209
3210 **/
3211 VOID
3212 EFIAPI
3213 EnableInterrupts (
3214 VOID
3215 );
3216
3217
3218 /**
3219 Disables CPU interrupts.
3220
3221 **/
3222 VOID
3223 EFIAPI
3224 DisableInterrupts (
3225 VOID
3226 );
3227
3228
3229 /**
3230 Disables CPU interrupts and returns the interrupt state prior to the disable
3231 operation.
3232
3233 @retval TRUE CPU interrupts were enabled on entry to this call.
3234 @retval FALSE CPU interrupts were disabled on entry to this call.
3235
3236 **/
3237 BOOLEAN
3238 EFIAPI
3239 SaveAndDisableInterrupts (
3240 VOID
3241 );
3242
3243
3244 /**
3245 Enables CPU interrupts for the smallest window required to capture any
3246 pending interrupts.
3247
3248 **/
3249 VOID
3250 EFIAPI
3251 EnableDisableInterrupts (
3252 VOID
3253 );
3254
3255
3256 /**
3257 Retrieves the current CPU interrupt state.
3258
3259 Returns TRUE is interrupts are currently enabled. Otherwise
3260 returns FALSE.
3261
3262 @retval TRUE CPU interrupts are enabled.
3263 @retval FALSE CPU interrupts are disabled.
3264
3265 **/
3266 BOOLEAN
3267 EFIAPI
3268 GetInterruptState (
3269 VOID
3270 );
3271
3272
3273 /**
3274 Set the current CPU interrupt state.
3275
3276 Sets the current CPU interrupt state to the state specified by
3277 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3278 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3279 returned.
3280
3281 @param InterruptState TRUE if interrupts should enabled. FALSE if
3282 interrupts should be disabled.
3283
3284 @return InterruptState
3285
3286 **/
3287 BOOLEAN
3288 EFIAPI
3289 SetInterruptState (
3290 IN BOOLEAN InterruptState
3291 );
3292
3293
3294 /**
3295 Requests CPU to pause for a short period of time.
3296
3297 Requests CPU to pause for a short period of time. Typically used in MP
3298 systems to prevent memory starvation while waiting for a spin lock.
3299
3300 **/
3301 VOID
3302 EFIAPI
3303 CpuPause (
3304 VOID
3305 );
3306
3307
3308 /**
3309 Transfers control to a function starting with a new stack.
3310
3311 Transfers control to the function specified by EntryPoint using the
3312 new stack specified by NewStack and passing in the parameters specified
3313 by Context1 and Context2. Context1 and Context2 are optional and may
3314 be NULL. The function EntryPoint must never return. This function
3315 supports a variable number of arguments following the NewStack parameter.
3316 These additional arguments are ignored on IA-32, x64, and EBC architectures.
3317 Itanium processors expect one additional parameter of type VOID * that specifies
3318 the new backing store pointer.
3319
3320 If EntryPoint is NULL, then ASSERT().
3321 If NewStack is NULL, then ASSERT().
3322
3323 @param EntryPoint A pointer to function to call with the new stack.
3324 @param Context1 A pointer to the context to pass into the EntryPoint
3325 function.
3326 @param Context2 A pointer to the context to pass into the EntryPoint
3327 function.
3328 @param NewStack A pointer to the new stack to use for the EntryPoint
3329 function.
3330 @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures.
3331 For Itanium processors, this variable argument list is expected to contain
3332 a single parameter of type VOID * that specifies the new backing
3333 store pointer.
3334
3335
3336 **/
3337 VOID
3338 EFIAPI
3339 SwitchStack (
3340 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3341 IN VOID *Context1, OPTIONAL
3342 IN VOID *Context2, OPTIONAL
3343 IN VOID *NewStack,
3344 ...
3345 );
3346
3347
3348 /**
3349 Generates a breakpoint on the CPU.
3350
3351 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3352 that code can resume normal execution after the breakpoint.
3353
3354 **/
3355 VOID
3356 EFIAPI
3357 CpuBreakpoint (
3358 VOID
3359 );
3360
3361
3362 /**
3363 Executes an infinite loop.
3364
3365 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3366 past the loop and the code that follows the loop must execute properly. This
3367 implies that the infinite loop must not cause the code that follow it to be
3368 optimized away.
3369
3370 **/
3371 VOID
3372 EFIAPI
3373 CpuDeadLoop (
3374 VOID
3375 );
3376
3377 #if defined (MDE_CPU_IPF)
3378
3379 /**
3380 Flush a range of cache lines in the cache coherency domain of the calling
3381 CPU.
3382
3383 Flushes the cache lines specified by Address and Length. If Address is not aligned
3384 on a cache line boundary, then entire cache line containing Address is flushed.
3385 If Address + Length is not aligned on a cache line boundary, then the entire cache
3386 line containing Address + Length - 1 is flushed. This function may choose to flush
3387 the entire cache if that is more efficient than flushing the specified range. If
3388 Length is 0, the no cache lines are flushed. Address is returned.
3389 This function is only available on Itanium processors.
3390
3391 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3392
3393 @param Address The base address of the instruction lines to invalidate. If
3394 the CPU is in a physical addressing mode, then Address is a
3395 physical address. If the CPU is in a virtual addressing mode,
3396 then Address is a virtual address.
3397
3398 @param Length The number of bytes to invalidate from the instruction cache.
3399
3400 @return Address.
3401
3402 **/
3403 VOID *
3404 EFIAPI
3405 AsmFlushCacheRange (
3406 IN VOID *Address,
3407 IN UINTN Length
3408 );
3409
3410
3411 /**
3412 Executes a FC instruction
3413 Executes a FC instruction on the cache line specified by Address.
3414 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3415 An implementation may flush a larger region. This function is only available on Itanium processors.
3416
3417 @param Address The Address of cache line to be flushed.
3418
3419 @return The address of FC instruction executed.
3420
3421 **/
3422 UINT64
3423 EFIAPI
3424 AsmFc (
3425 IN UINT64 Address
3426 );
3427
3428
3429 /**
3430 Executes a FC.I instruction.
3431 Executes a FC.I instruction on the cache line specified by Address.
3432 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3433 An implementation may flush a larger region. This function is only available on Itanium processors.
3434
3435 @param Address The Address of cache line to be flushed.
3436
3437 @return The address of FC.I instruction executed.
3438
3439 **/
3440 UINT64
3441 EFIAPI
3442 AsmFci (
3443 IN UINT64 Address
3444 );
3445
3446
3447 /**
3448 Reads the current value of a Processor Identifier Register (CPUID).
3449
3450 Reads and returns the current value of Processor Identifier Register specified by Index.
3451 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3452 registers) is determined by CPUID [3] bits {7:0}.
3453 No parameter checking is performed on Index. If the Index value is beyond the
3454 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3455 must either guarantee that Index is valid, or the caller must set up fault handlers to
3456 catch the faults. This function is only available on Itanium processors.
3457
3458 @param Index The 8-bit Processor Identifier Register index to read.
3459
3460 @return The current value of Processor Identifier Register specified by Index.
3461
3462 **/
3463 UINT64
3464 EFIAPI
3465 AsmReadCpuid (
3466 IN UINT8 Index
3467 );
3468
3469
3470 /**
3471 Reads the current value of 64-bit Processor Status Register (PSR).
3472 This function is only available on Itanium processors.
3473
3474 @return The current value of PSR.
3475
3476 **/
3477 UINT64
3478 EFIAPI
3479 AsmReadPsr (
3480 VOID
3481 );
3482
3483
3484 /**
3485 Writes the current value of 64-bit Processor Status Register (PSR).
3486
3487 No parameter checking is performed on Value. All bits of Value corresponding to
3488 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3489 The caller must either guarantee that Value is valid, or the caller must set up
3490 fault handlers to catch the faults. This function is only available on Itanium processors.
3491
3492 @param Value The 64-bit value to write to PSR.
3493
3494 @return The 64-bit value written to the PSR.
3495
3496 **/
3497 UINT64
3498 EFIAPI
3499 AsmWritePsr (
3500 IN UINT64 Value
3501 );
3502
3503
3504 /**
3505 Reads the current value of 64-bit Kernel Register #0 (KR0).
3506
3507 Reads and returns the current value of KR0.
3508 This function is only available on Itanium processors.
3509
3510 @return The current value of KR0.
3511
3512 **/
3513 UINT64
3514 EFIAPI
3515 AsmReadKr0 (
3516 VOID
3517 );
3518
3519
3520 /**
3521 Reads the current value of 64-bit Kernel Register #1 (KR1).
3522
3523 Reads and returns the current value of KR1.
3524 This function is only available on Itanium processors.
3525
3526 @return The current value of KR1.
3527
3528 **/
3529 UINT64
3530 EFIAPI
3531 AsmReadKr1 (
3532 VOID
3533 );
3534
3535
3536 /**
3537 Reads the current value of 64-bit Kernel Register #2 (KR2).
3538
3539 Reads and returns the current value of KR2.
3540 This function is only available on Itanium processors.
3541
3542 @return The current value of KR2.
3543
3544 **/
3545 UINT64
3546 EFIAPI
3547 AsmReadKr2 (
3548 VOID
3549 );
3550
3551
3552 /**
3553 Reads the current value of 64-bit Kernel Register #3 (KR3).
3554
3555 Reads and returns the current value of KR3.
3556 This function is only available on Itanium processors.
3557
3558 @return The current value of KR3.
3559
3560 **/
3561 UINT64
3562 EFIAPI
3563 AsmReadKr3 (
3564 VOID
3565 );
3566
3567
3568 /**
3569 Reads the current value of 64-bit Kernel Register #4 (KR4).
3570
3571 Reads and returns the current value of KR4.
3572 This function is only available on Itanium processors.
3573
3574 @return The current value of KR4.
3575
3576 **/
3577 UINT64
3578 EFIAPI
3579 AsmReadKr4 (
3580 VOID
3581 );
3582
3583
3584 /**
3585 Reads the current value of 64-bit Kernel Register #5 (KR5).
3586
3587 Reads and returns the current value of KR5.
3588 This function is only available on Itanium processors.
3589
3590 @return The current value of KR5.
3591
3592 **/
3593 UINT64
3594 EFIAPI
3595 AsmReadKr5 (
3596 VOID
3597 );
3598
3599
3600 /**
3601 Reads the current value of 64-bit Kernel Register #6 (KR6).
3602
3603 Reads and returns the current value of KR6.
3604 This function is only available on Itanium processors.
3605
3606 @return The current value of KR6.
3607
3608 **/
3609 UINT64
3610 EFIAPI
3611 AsmReadKr6 (
3612 VOID
3613 );
3614
3615
3616 /**
3617 Reads the current value of 64-bit Kernel Register #7 (KR7).
3618
3619 Reads and returns the current value of KR7.
3620 This function is only available on Itanium processors.
3621
3622 @return The current value of KR7.
3623
3624 **/
3625 UINT64
3626 EFIAPI
3627 AsmReadKr7 (
3628 VOID
3629 );
3630
3631
3632 /**
3633 Write the current value of 64-bit Kernel Register #0 (KR0).
3634
3635 Writes the current value of KR0. The 64-bit value written to
3636 the KR0 is returned. This function is only available on Itanium processors.
3637
3638 @param Value The 64-bit value to write to KR0.
3639
3640 @return The 64-bit value written to the KR0.
3641
3642 **/
3643 UINT64
3644 EFIAPI
3645 AsmWriteKr0 (
3646 IN UINT64 Value
3647 );
3648
3649
3650 /**
3651 Write the current value of 64-bit Kernel Register #1 (KR1).
3652
3653 Writes the current value of KR1. The 64-bit value written to
3654 the KR1 is returned. This function is only available on Itanium processors.
3655
3656 @param Value The 64-bit value to write to KR1.
3657
3658 @return The 64-bit value written to the KR1.
3659
3660 **/
3661 UINT64
3662 EFIAPI
3663 AsmWriteKr1 (
3664 IN UINT64 Value
3665 );
3666
3667
3668 /**
3669 Write the current value of 64-bit Kernel Register #2 (KR2).
3670
3671 Writes the current value of KR2. The 64-bit value written to
3672 the KR2 is returned. This function is only available on Itanium processors.
3673
3674 @param Value The 64-bit value to write to KR2.
3675
3676 @return The 64-bit value written to the KR2.
3677
3678 **/
3679 UINT64
3680 EFIAPI
3681 AsmWriteKr2 (
3682 IN UINT64 Value
3683 );
3684
3685
3686 /**
3687 Write the current value of 64-bit Kernel Register #3 (KR3).
3688
3689 Writes the current value of KR3. The 64-bit value written to
3690 the KR3 is returned. This function is only available on Itanium processors.
3691
3692 @param Value The 64-bit value to write to KR3.
3693
3694 @return The 64-bit value written to the KR3.
3695
3696 **/
3697 UINT64
3698 EFIAPI
3699 AsmWriteKr3 (
3700 IN UINT64 Value
3701 );
3702
3703
3704 /**
3705 Write the current value of 64-bit Kernel Register #4 (KR4).
3706
3707 Writes the current value of KR4. The 64-bit value written to
3708 the KR4 is returned. This function is only available on Itanium processors.
3709
3710 @param Value The 64-bit value to write to KR4.
3711
3712 @return The 64-bit value written to the KR4.
3713
3714 **/
3715 UINT64
3716 EFIAPI
3717 AsmWriteKr4 (
3718 IN UINT64 Value
3719 );
3720
3721
3722 /**
3723 Write the current value of 64-bit Kernel Register #5 (KR5).
3724
3725 Writes the current value of KR5. The 64-bit value written to
3726 the KR5 is returned. This function is only available on Itanium processors.
3727
3728 @param Value The 64-bit value to write to KR5.
3729
3730 @return The 64-bit value written to the KR5.
3731
3732 **/
3733 UINT64
3734 EFIAPI
3735 AsmWriteKr5 (
3736 IN UINT64 Value
3737 );
3738
3739
3740 /**
3741 Write the current value of 64-bit Kernel Register #6 (KR6).
3742
3743 Writes the current value of KR6. The 64-bit value written to
3744 the KR6 is returned. This function is only available on Itanium processors.
3745
3746 @param Value The 64-bit value to write to KR6.
3747
3748 @return The 64-bit value written to the KR6.
3749
3750 **/
3751 UINT64
3752 EFIAPI
3753 AsmWriteKr6 (
3754 IN UINT64 Value
3755 );
3756
3757
3758 /**
3759 Write the current value of 64-bit Kernel Register #7 (KR7).
3760
3761 Writes the current value of KR7. The 64-bit value written to
3762 the KR7 is returned. This function is only available on Itanium processors.
3763
3764 @param Value The 64-bit value to write to KR7.
3765
3766 @return The 64-bit value written to the KR7.
3767
3768 **/
3769 UINT64
3770 EFIAPI
3771 AsmWriteKr7 (
3772 IN UINT64 Value
3773 );
3774
3775
3776 /**
3777 Reads the current value of Interval Timer Counter Register (ITC).
3778
3779 Reads and returns the current value of ITC.
3780 This function is only available on Itanium processors.
3781
3782 @return The current value of ITC.
3783
3784 **/
3785 UINT64
3786 EFIAPI
3787 AsmReadItc (
3788 VOID
3789 );
3790
3791
3792 /**
3793 Reads the current value of Interval Timer Vector Register (ITV).
3794
3795 Reads and returns the current value of ITV.
3796 This function is only available on Itanium processors.
3797
3798 @return The current value of ITV.
3799
3800 **/
3801 UINT64
3802 EFIAPI
3803 AsmReadItv (
3804 VOID
3805 );
3806
3807
3808 /**
3809 Reads the current value of Interval Timer Match Register (ITM).
3810
3811 Reads and returns the current value of ITM.
3812 This function is only available on Itanium processors.
3813
3814 @return The current value of ITM.
3815 **/
3816 UINT64
3817 EFIAPI
3818 AsmReadItm (
3819 VOID
3820 );
3821
3822
3823 /**
3824 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3825
3826 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
3827 This function is only available on Itanium processors.
3828
3829 @param Value The 64-bit value to write to ITC.
3830
3831 @return The 64-bit value written to the ITC.
3832
3833 **/
3834 UINT64
3835 EFIAPI
3836 AsmWriteItc (
3837 IN UINT64 Value
3838 );
3839
3840
3841 /**
3842 Writes the current value of 64-bit Interval Timer Match Register (ITM).
3843
3844 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
3845 This function is only available on Itanium processors.
3846
3847 @param Value The 64-bit value to write to ITM.
3848
3849 @return The 64-bit value written to the ITM.
3850
3851 **/
3852 UINT64
3853 EFIAPI
3854 AsmWriteItm (
3855 IN UINT64 Value
3856 );
3857
3858
3859 /**
3860 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3861
3862 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
3863 No parameter checking is performed on Value. All bits of Value corresponding to
3864 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3865 The caller must either guarantee that Value is valid, or the caller must set up
3866 fault handlers to catch the faults.
3867 This function is only available on Itanium processors.
3868
3869 @param Value The 64-bit value to write to ITV.
3870
3871 @return The 64-bit value written to the ITV.
3872
3873 **/
3874 UINT64
3875 EFIAPI
3876 AsmWriteItv (
3877 IN UINT64 Value
3878 );
3879
3880
3881 /**
3882 Reads the current value of Default Control Register (DCR).
3883
3884 Reads and returns the current value of DCR. This function is only available on Itanium processors.
3885
3886 @return The current value of DCR.
3887
3888 **/
3889 UINT64
3890 EFIAPI
3891 AsmReadDcr (
3892 VOID
3893 );
3894
3895
3896 /**
3897 Reads the current value of Interruption Vector Address Register (IVA).
3898
3899 Reads and returns the current value of IVA. This function is only available on Itanium processors.
3900
3901 @return The current value of IVA.
3902 **/
3903 UINT64
3904 EFIAPI
3905 AsmReadIva (
3906 VOID
3907 );
3908
3909
3910 /**
3911 Reads the current value of Page Table Address Register (PTA).
3912
3913 Reads and returns the current value of PTA. This function is only available on Itanium processors.
3914
3915 @return The current value of PTA.
3916
3917 **/
3918 UINT64
3919 EFIAPI
3920 AsmReadPta (
3921 VOID
3922 );
3923
3924
3925 /**
3926 Writes the current value of 64-bit Default Control Register (DCR).
3927
3928 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
3929 No parameter checking is performed on Value. All bits of Value corresponding to
3930 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3931 The caller must either guarantee that Value is valid, or the caller must set up
3932 fault handlers to catch the faults.
3933 This function is only available on Itanium processors.
3934
3935 @param Value The 64-bit value to write to DCR.
3936
3937 @return The 64-bit value written to the DCR.
3938
3939 **/
3940 UINT64
3941 EFIAPI
3942 AsmWriteDcr (
3943 IN UINT64 Value
3944 );
3945
3946
3947 /**
3948 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
3949
3950 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
3951 The size of vector table is 32 K bytes and is 32 K bytes aligned
3952 the low 15 bits of Value is ignored when written.
3953 This function is only available on Itanium processors.
3954
3955 @param Value The 64-bit value to write to IVA.
3956
3957 @return The 64-bit value written to the IVA.
3958
3959 **/
3960 UINT64
3961 EFIAPI
3962 AsmWriteIva (
3963 IN UINT64 Value
3964 );
3965
3966
3967 /**
3968 Writes the current value of 64-bit Page Table Address Register (PTA).
3969
3970 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
3971 No parameter checking is performed on Value. All bits of Value corresponding to
3972 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3973 The caller must either guarantee that Value is valid, or the caller must set up
3974 fault handlers to catch the faults.
3975 This function is only available on Itanium processors.
3976
3977 @param Value The 64-bit value to write to PTA.
3978
3979 @return The 64-bit value written to the PTA.
3980 **/
3981 UINT64
3982 EFIAPI
3983 AsmWritePta (
3984 IN UINT64 Value
3985 );
3986
3987
3988 /**
3989 Reads the current value of Local Interrupt ID Register (LID).
3990
3991 Reads and returns the current value of LID. This function is only available on Itanium processors.
3992
3993 @return The current value of LID.
3994
3995 **/
3996 UINT64
3997 EFIAPI
3998 AsmReadLid (
3999 VOID
4000 );
4001
4002
4003 /**
4004 Reads the current value of External Interrupt Vector Register (IVR).
4005
4006 Reads and returns the current value of IVR. This function is only available on Itanium processors.
4007
4008 @return The current value of IVR.
4009
4010 **/
4011 UINT64
4012 EFIAPI
4013 AsmReadIvr (
4014 VOID
4015 );
4016
4017
4018 /**
4019 Reads the current value of Task Priority Register (TPR).
4020
4021 Reads and returns the current value of TPR. This function is only available on Itanium processors.
4022
4023 @return The current value of TPR.
4024
4025 **/
4026 UINT64
4027 EFIAPI
4028 AsmReadTpr (
4029 VOID
4030 );
4031
4032
4033 /**
4034 Reads the current value of External Interrupt Request Register #0 (IRR0).
4035
4036 Reads and returns the current value of IRR0. This function is only available on Itanium processors.
4037
4038 @return The current value of IRR0.
4039
4040 **/
4041 UINT64
4042 EFIAPI
4043 AsmReadIrr0 (
4044 VOID
4045 );
4046
4047
4048 /**
4049 Reads the current value of External Interrupt Request Register #1 (IRR1).
4050
4051 Reads and returns the current value of IRR1. This function is only available on Itanium processors.
4052
4053 @return The current value of IRR1.
4054
4055 **/
4056 UINT64
4057 EFIAPI
4058 AsmReadIrr1 (
4059 VOID
4060 );
4061
4062
4063 /**
4064 Reads the current value of External Interrupt Request Register #2 (IRR2).
4065
4066 Reads and returns the current value of IRR2. This function is only available on Itanium processors.
4067
4068 @return The current value of IRR2.
4069
4070 **/
4071 UINT64
4072 EFIAPI
4073 AsmReadIrr2 (
4074 VOID
4075 );
4076
4077
4078 /**
4079 Reads the current value of External Interrupt Request Register #3 (IRR3).
4080
4081 Reads and returns the current value of IRR3. This function is only available on Itanium processors.
4082
4083 @return The current value of IRR3.
4084
4085 **/
4086 UINT64
4087 EFIAPI
4088 AsmReadIrr3 (
4089 VOID
4090 );
4091
4092
4093 /**
4094 Reads the current value of Performance Monitor Vector Register (PMV).
4095
4096 Reads and returns the current value of PMV. This function is only available on Itanium processors.
4097
4098 @return The current value of PMV.
4099
4100 **/
4101 UINT64
4102 EFIAPI
4103 AsmReadPmv (
4104 VOID
4105 );
4106
4107
4108 /**
4109 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4110
4111 Reads and returns the current value of CMCV. This function is only available on Itanium processors.
4112
4113 @return The current value of CMCV.
4114
4115 **/
4116 UINT64
4117 EFIAPI
4118 AsmReadCmcv (
4119 VOID
4120 );
4121
4122
4123 /**
4124 Reads the current value of Local Redirection Register #0 (LRR0).
4125
4126 Reads and returns the current value of LRR0. This function is only available on Itanium processors.
4127
4128 @return The current value of LRR0.
4129
4130 **/
4131 UINT64
4132 EFIAPI
4133 AsmReadLrr0 (
4134 VOID
4135 );
4136
4137
4138 /**
4139 Reads the current value of Local Redirection Register #1 (LRR1).
4140
4141 Reads and returns the current value of LRR1. This function is only available on Itanium processors.
4142
4143 @return The current value of LRR1.
4144
4145 **/
4146 UINT64
4147 EFIAPI
4148 AsmReadLrr1 (
4149 VOID
4150 );
4151
4152
4153 /**
4154 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4155
4156 Writes the current value of LID. The 64-bit value written to the LID is returned.
4157 No parameter checking is performed on Value. All bits of Value corresponding to
4158 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4159 The caller must either guarantee that Value is valid, or the caller must set up
4160 fault handlers to catch the faults.
4161 This function is only available on Itanium processors.
4162
4163 @param Value The 64-bit value to write to LID.
4164
4165 @return The 64-bit value written to the LID.
4166
4167 **/
4168 UINT64
4169 EFIAPI
4170 AsmWriteLid (
4171 IN UINT64 Value
4172 );
4173
4174
4175 /**
4176 Writes the current value of 64-bit Task Priority Register (TPR).
4177
4178 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4179 No parameter checking is performed on Value. All bits of Value corresponding to
4180 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4181 The caller must either guarantee that Value is valid, or the caller must set up
4182 fault handlers to catch the faults.
4183 This function is only available on Itanium processors.
4184
4185 @param Value The 64-bit value to write to TPR.
4186
4187 @return The 64-bit value written to the TPR.
4188
4189 **/
4190 UINT64
4191 EFIAPI
4192 AsmWriteTpr (
4193 IN UINT64 Value
4194 );
4195
4196
4197 /**
4198 Performs a write operation on End OF External Interrupt Register (EOI).
4199
4200 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
4201
4202 **/
4203 VOID
4204 EFIAPI
4205 AsmWriteEoi (
4206 VOID
4207 );
4208
4209
4210 /**
4211 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4212
4213 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4214 No parameter checking is performed on Value. All bits of Value corresponding
4215 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4216 The caller must either guarantee that Value is valid, or the caller must set up
4217 fault handlers to catch the faults.
4218 This function is only available on Itanium processors.
4219
4220 @param Value The 64-bit value to write to PMV.
4221
4222 @return The 64-bit value written to the PMV.
4223
4224 **/
4225 UINT64
4226 EFIAPI
4227 AsmWritePmv (
4228 IN UINT64 Value
4229 );
4230
4231
4232 /**
4233 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4234
4235 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4236 No parameter checking is performed on Value. All bits of Value corresponding
4237 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4238 The caller must either guarantee that Value is valid, or the caller must set up
4239 fault handlers to catch the faults.
4240 This function is only available on Itanium processors.
4241
4242 @param Value The 64-bit value to write to CMCV.
4243
4244 @return The 64-bit value written to the CMCV.
4245
4246 **/
4247 UINT64
4248 EFIAPI
4249 AsmWriteCmcv (
4250 IN UINT64 Value
4251 );
4252
4253
4254 /**
4255 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4256
4257 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4258 No parameter checking is performed on Value. All bits of Value corresponding
4259 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4260 The caller must either guarantee that Value is valid, or the caller must set up
4261 fault handlers to catch the faults.
4262 This function is only available on Itanium processors.
4263
4264 @param Value The 64-bit value to write to LRR0.
4265
4266 @return The 64-bit value written to the LRR0.
4267
4268 **/
4269 UINT64
4270 EFIAPI
4271 AsmWriteLrr0 (
4272 IN UINT64 Value
4273 );
4274
4275
4276 /**
4277 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4278
4279 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4280 No parameter checking is performed on Value. All bits of Value corresponding
4281 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4282 The caller must either guarantee that Value is valid, or the caller must
4283 set up fault handlers to catch the faults.
4284 This function is only available on Itanium processors.
4285
4286 @param Value The 64-bit value to write to LRR1.
4287
4288 @return The 64-bit value written to the LRR1.
4289
4290 **/
4291 UINT64
4292 EFIAPI
4293 AsmWriteLrr1 (
4294 IN UINT64 Value
4295 );
4296
4297
4298 /**
4299 Reads the current value of Instruction Breakpoint Register (IBR).
4300
4301 The Instruction Breakpoint Registers are used in pairs. The even numbered
4302 registers contain breakpoint addresses, and the odd numbered registers contain
4303 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4304 on all processor models. Implemented registers are contiguous starting with
4305 register 0. No parameter checking is performed on Index, and if the Index value
4306 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4307 occur. The caller must either guarantee that Index is valid, or the caller must
4308 set up fault handlers to catch the faults.
4309 This function is only available on Itanium processors.
4310
4311 @param Index The 8-bit Instruction Breakpoint Register index to read.
4312
4313 @return The current value of Instruction Breakpoint Register specified by Index.
4314
4315 **/
4316 UINT64
4317 EFIAPI
4318 AsmReadIbr (
4319 IN UINT8 Index
4320 );
4321
4322
4323 /**
4324 Reads the current value of Data Breakpoint Register (DBR).
4325
4326 The Data Breakpoint Registers are used in pairs. The even numbered registers
4327 contain breakpoint addresses, and odd numbered registers contain breakpoint
4328 mask conditions. At least 4 data registers pairs are implemented on all processor
4329 models. Implemented registers are contiguous starting with register 0.
4330 No parameter checking is performed on Index. If the Index value is beyond
4331 the implemented DBR register range, a Reserved Register/Field fault may occur.
4332 The caller must either guarantee that Index is valid, or the caller must set up
4333 fault handlers to catch the faults.
4334 This function is only available on Itanium processors.
4335
4336 @param Index The 8-bit Data Breakpoint Register index to read.
4337
4338 @return The current value of Data Breakpoint Register specified by Index.
4339
4340 **/
4341 UINT64
4342 EFIAPI
4343 AsmReadDbr (
4344 IN UINT8 Index
4345 );
4346
4347
4348 /**
4349 Reads the current value of Performance Monitor Configuration Register (PMC).
4350
4351 All processor implementations provide at least 4 performance counters
4352 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4353 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4354 additional implementation-dependent PMC and PMD to increase the number of
4355 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4356 register set is implementation dependent. No parameter checking is performed
4357 on Index. If the Index value is beyond the implemented PMC register range,
4358 zero value will be returned.
4359 This function is only available on Itanium processors.
4360
4361 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4362
4363 @return The current value of Performance Monitor Configuration Register
4364 specified by Index.
4365
4366 **/
4367 UINT64
4368 EFIAPI
4369 AsmReadPmc (
4370 IN UINT8 Index
4371 );
4372
4373
4374 /**
4375 Reads the current value of Performance Monitor Data Register (PMD).
4376
4377 All processor implementations provide at least 4 performance counters
4378 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4379 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4380 provide additional implementation-dependent PMC and PMD to increase the number
4381 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4382 register set is implementation dependent. No parameter checking is performed
4383 on Index. If the Index value is beyond the implemented PMD register range,
4384 zero value will be returned.
4385 This function is only available on Itanium processors.
4386
4387 @param Index The 8-bit Performance Monitor Data Register index to read.
4388
4389 @return The current value of Performance Monitor Data Register specified by Index.
4390
4391 **/
4392 UINT64
4393 EFIAPI
4394 AsmReadPmd (
4395 IN UINT8 Index
4396 );
4397
4398
4399 /**
4400 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4401
4402 Writes current value of Instruction Breakpoint Register specified by Index.
4403 The Instruction Breakpoint Registers are used in pairs. The even numbered
4404 registers contain breakpoint addresses, and odd numbered registers contain
4405 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4406 on all processor models. Implemented registers are contiguous starting with
4407 register 0. No parameter checking is performed on Index. If the Index value
4408 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4409 occur. The caller must either guarantee that Index is valid, or the caller must
4410 set up fault handlers to catch the faults.
4411 This function is only available on Itanium processors.
4412
4413 @param Index The 8-bit Instruction Breakpoint Register index to write.
4414 @param Value The 64-bit value to write to IBR.
4415
4416 @return The 64-bit value written to the IBR.
4417
4418 **/
4419 UINT64
4420 EFIAPI
4421 AsmWriteIbr (
4422 IN UINT8 Index,
4423 IN UINT64 Value
4424 );
4425
4426
4427 /**
4428 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4429
4430 Writes current value of Data Breakpoint Register specified by Index.
4431 The Data Breakpoint Registers are used in pairs. The even numbered registers
4432 contain breakpoint addresses, and odd numbered registers contain breakpoint
4433 mask conditions. At least 4 data registers pairs are implemented on all processor
4434 models. Implemented registers are contiguous starting with register 0. No parameter
4435 checking is performed on Index. If the Index value is beyond the implemented
4436 DBR register range, a Reserved Register/Field fault may occur. The caller must
4437 either guarantee that Index is valid, or the caller must set up fault handlers to
4438 catch the faults.
4439 This function is only available on Itanium processors.
4440
4441 @param Index The 8-bit Data Breakpoint Register index to write.
4442 @param Value The 64-bit value to write to DBR.
4443
4444 @return The 64-bit value written to the DBR.
4445
4446 **/
4447 UINT64
4448 EFIAPI
4449 AsmWriteDbr (
4450 IN UINT8 Index,
4451 IN UINT64 Value
4452 );
4453
4454
4455 /**
4456 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4457
4458 Writes current value of Performance Monitor Configuration Register specified by Index.
4459 All processor implementations provide at least 4 performance counters
4460 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4461 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4462 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4463 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4464 dependent. No parameter checking is performed on Index. If the Index value is
4465 beyond the implemented PMC register range, the write is ignored.
4466 This function is only available on Itanium processors.
4467
4468 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4469 @param Value The 64-bit value to write to PMC.
4470
4471 @return The 64-bit value written to the PMC.
4472
4473 **/
4474 UINT64
4475 EFIAPI
4476 AsmWritePmc (
4477 IN UINT8 Index,
4478 IN UINT64 Value
4479 );
4480
4481
4482 /**
4483 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4484
4485 Writes current value of Performance Monitor Data Register specified by Index.
4486 All processor implementations provide at least 4 performance counters
4487 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4488 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4489 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4490 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4491 is implementation dependent. No parameter checking is performed on Index. If the
4492 Index value is beyond the implemented PMD register range, the write is ignored.
4493 This function is only available on Itanium processors.
4494
4495 @param Index The 8-bit Performance Monitor Data Register index to write.
4496 @param Value The 64-bit value to write to PMD.
4497
4498 @return The 64-bit value written to the PMD.
4499
4500 **/
4501 UINT64
4502 EFIAPI
4503 AsmWritePmd (
4504 IN UINT8 Index,
4505 IN UINT64 Value
4506 );
4507
4508
4509 /**
4510 Reads the current value of 64-bit Global Pointer (GP).
4511
4512 Reads and returns the current value of GP.
4513 This function is only available on Itanium processors.
4514
4515 @return The current value of GP.
4516
4517 **/
4518 UINT64
4519 EFIAPI
4520 AsmReadGp (
4521 VOID
4522 );
4523
4524
4525 /**
4526 Write the current value of 64-bit Global Pointer (GP).
4527
4528 Writes the current value of GP. The 64-bit value written to the GP is returned.
4529 No parameter checking is performed on Value.
4530 This function is only available on Itanium processors.
4531
4532 @param Value The 64-bit value to write to GP.
4533
4534 @return The 64-bit value written to the GP.
4535
4536 **/
4537 UINT64
4538 EFIAPI
4539 AsmWriteGp (
4540 IN UINT64 Value
4541 );
4542
4543
4544 /**
4545 Reads the current value of 64-bit Stack Pointer (SP).
4546
4547 Reads and returns the current value of SP.
4548 This function is only available on Itanium processors.
4549
4550 @return The current value of SP.
4551
4552 **/
4553 UINT64
4554 EFIAPI
4555 AsmReadSp (
4556 VOID
4557 );
4558
4559
4560 ///
4561 /// Valid Index value for AsmReadControlRegister()
4562 ///
4563 #define IPF_CONTROL_REGISTER_DCR 0
4564 #define IPF_CONTROL_REGISTER_ITM 1
4565 #define IPF_CONTROL_REGISTER_IVA 2
4566 #define IPF_CONTROL_REGISTER_PTA 8
4567 #define IPF_CONTROL_REGISTER_IPSR 16
4568 #define IPF_CONTROL_REGISTER_ISR 17
4569 #define IPF_CONTROL_REGISTER_IIP 19
4570 #define IPF_CONTROL_REGISTER_IFA 20
4571 #define IPF_CONTROL_REGISTER_ITIR 21
4572 #define IPF_CONTROL_REGISTER_IIPA 22
4573 #define IPF_CONTROL_REGISTER_IFS 23
4574 #define IPF_CONTROL_REGISTER_IIM 24
4575 #define IPF_CONTROL_REGISTER_IHA 25
4576 #define IPF_CONTROL_REGISTER_LID 64
4577 #define IPF_CONTROL_REGISTER_IVR 65
4578 #define IPF_CONTROL_REGISTER_TPR 66
4579 #define IPF_CONTROL_REGISTER_EOI 67
4580 #define IPF_CONTROL_REGISTER_IRR0 68
4581 #define IPF_CONTROL_REGISTER_IRR1 69
4582 #define IPF_CONTROL_REGISTER_IRR2 70
4583 #define IPF_CONTROL_REGISTER_IRR3 71
4584 #define IPF_CONTROL_REGISTER_ITV 72
4585 #define IPF_CONTROL_REGISTER_PMV 73
4586 #define IPF_CONTROL_REGISTER_CMCV 74
4587 #define IPF_CONTROL_REGISTER_LRR0 80
4588 #define IPF_CONTROL_REGISTER_LRR1 81
4589
4590 /**
4591 Reads a 64-bit control register.
4592
4593 Reads and returns the control register specified by Index. The valid Index valued are defined
4594 above in "Related Definitions".
4595 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4596
4597 @param Index The index of the control register to read.
4598
4599 @return The control register specified by Index.
4600
4601 **/
4602 UINT64
4603 EFIAPI
4604 AsmReadControlRegister (
4605 IN UINT64 Index
4606 );
4607
4608
4609 ///
4610 /// Valid Index value for AsmReadApplicationRegister()
4611 ///
4612 #define IPF_APPLICATION_REGISTER_K0 0
4613 #define IPF_APPLICATION_REGISTER_K1 1
4614 #define IPF_APPLICATION_REGISTER_K2 2
4615 #define IPF_APPLICATION_REGISTER_K3 3
4616 #define IPF_APPLICATION_REGISTER_K4 4
4617 #define IPF_APPLICATION_REGISTER_K5 5
4618 #define IPF_APPLICATION_REGISTER_K6 6
4619 #define IPF_APPLICATION_REGISTER_K7 7
4620 #define IPF_APPLICATION_REGISTER_RSC 16
4621 #define IPF_APPLICATION_REGISTER_BSP 17
4622 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4623 #define IPF_APPLICATION_REGISTER_RNAT 19
4624 #define IPF_APPLICATION_REGISTER_FCR 21
4625 #define IPF_APPLICATION_REGISTER_EFLAG 24
4626 #define IPF_APPLICATION_REGISTER_CSD 25
4627 #define IPF_APPLICATION_REGISTER_SSD 26
4628 #define IPF_APPLICATION_REGISTER_CFLG 27
4629 #define IPF_APPLICATION_REGISTER_FSR 28
4630 #define IPF_APPLICATION_REGISTER_FIR 29
4631 #define IPF_APPLICATION_REGISTER_FDR 30
4632 #define IPF_APPLICATION_REGISTER_CCV 32
4633 #define IPF_APPLICATION_REGISTER_UNAT 36
4634 #define IPF_APPLICATION_REGISTER_FPSR 40
4635 #define IPF_APPLICATION_REGISTER_ITC 44
4636 #define IPF_APPLICATION_REGISTER_PFS 64
4637 #define IPF_APPLICATION_REGISTER_LC 65
4638 #define IPF_APPLICATION_REGISTER_EC 66
4639
4640 /**
4641 Reads a 64-bit application register.
4642
4643 Reads and returns the application register specified by Index. The valid Index valued are defined
4644 above in "Related Definitions".
4645 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4646
4647 @param Index The index of the application register to read.
4648
4649 @return The application register specified by Index.
4650
4651 **/
4652 UINT64
4653 EFIAPI
4654 AsmReadApplicationRegister (
4655 IN UINT64 Index
4656 );
4657
4658
4659 /**
4660 Reads the current value of a Machine Specific Register (MSR).
4661
4662 Reads and returns the current value of the Machine Specific Register specified by Index. No
4663 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4664 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4665 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4666 only available on Itanium processors.
4667
4668 @param Index The 8-bit Machine Specific Register index to read.
4669
4670 @return The current value of the Machine Specific Register specified by Index.
4671
4672 **/
4673 UINT64
4674 EFIAPI
4675 AsmReadMsr (
4676 IN UINT8 Index
4677 );
4678
4679
4680 /**
4681 Writes the current value of a Machine Specific Register (MSR).
4682
4683 Writes Value to the Machine Specific Register specified by Index. Value is returned. No
4684 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4685 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4686 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4687 only available on Itanium processors.
4688
4689 @param Index The 8-bit Machine Specific Register index to write.
4690 @param Value The 64-bit value to write to the Machine Specific Register.
4691
4692 @return The 64-bit value to write to the Machine Specific Register.
4693
4694 **/
4695 UINT64
4696 EFIAPI
4697 AsmWriteMsr (
4698 IN UINT8 Index,
4699 IN UINT64 Value
4700 );
4701
4702
4703 /**
4704 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4705
4706 Determines the current execution mode of the CPU.
4707 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4708 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4709 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4710 and -1 is returned.
4711 This function is only available on Itanium processors.
4712
4713 @retval 1 The CPU is in virtual mode.
4714 @retval 0 The CPU is in physical mode.
4715 @retval -1 The CPU is in mixed mode.
4716
4717 **/
4718 INT64
4719 EFIAPI
4720 AsmCpuVirtual (
4721 VOID
4722 );
4723
4724
4725 /**
4726 Makes a PAL procedure call.
4727
4728 This is a wrapper function to make a PAL procedure call. Based on the Index
4729 value this API will make static or stacked PAL call. The following table
4730 describes the usage of PAL Procedure Index Assignment. Architected procedures
4731 may be designated as required or optional. If a PAL procedure is specified
4732 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4733 Status field of the PAL_CALL_RETURN structure.
4734 This indicates that the procedure is not present in this PAL implementation.
4735 It is the caller's responsibility to check for this return code after calling
4736 any optional PAL procedure.
4737 No parameter checking is performed on the 5 input parameters, but there are
4738 some common rules that the caller should follow when making a PAL call. Any
4739 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4740 Unaligned addresses may cause undefined results. For those parameters defined
4741 as reserved or some fields defined as reserved must be zero filled or the invalid
4742 argument return value may be returned or undefined result may occur during the
4743 execution of the procedure. If the PalEntryPoint does not point to a valid
4744 PAL entry point then the system behavior is undefined. This function is only
4745 available on Itanium processors.
4746
4747 @param PalEntryPoint The PAL procedure calls entry point.
4748 @param Index The PAL procedure Index number.
4749 @param Arg2 The 2nd parameter for PAL procedure calls.
4750 @param Arg3 The 3rd parameter for PAL procedure calls.
4751 @param Arg4 The 4th parameter for PAL procedure calls.
4752
4753 @return structure returned from the PAL Call procedure, including the status and return value.
4754
4755 **/
4756 PAL_CALL_RETURN
4757 EFIAPI
4758 AsmPalCall (
4759 IN UINT64 PalEntryPoint,
4760 IN UINT64 Index,
4761 IN UINT64 Arg2,
4762 IN UINT64 Arg3,
4763 IN UINT64 Arg4
4764 );
4765 #endif
4766
4767 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4768 ///
4769 /// IA32 and x64 Specific Functions
4770 /// Byte packed structure for 16-bit Real Mode EFLAGS
4771 ///
4772 typedef union {
4773 struct {
4774 UINT32 CF:1; ///< Carry Flag
4775 UINT32 Reserved_0:1; ///< Reserved
4776 UINT32 PF:1; ///< Parity Flag
4777 UINT32 Reserved_1:1; ///< Reserved
4778 UINT32 AF:1; ///< Auxiliary Carry Flag
4779 UINT32 Reserved_2:1; ///< Reserved
4780 UINT32 ZF:1; ///< Zero Flag
4781 UINT32 SF:1; ///< Sign Flag
4782 UINT32 TF:1; ///< Trap Flag
4783 UINT32 IF:1; ///< Interrupt Enable Flag
4784 UINT32 DF:1; ///< Direction Flag
4785 UINT32 OF:1; ///< Overflow Flag
4786 UINT32 IOPL:2; ///< I/O Privilege Level
4787 UINT32 NT:1; ///< Nested Task
4788 UINT32 Reserved_3:1; ///< Reserved
4789 } Bits;
4790 UINT16 Uint16;
4791 } IA32_FLAGS16;
4792
4793 ///
4794 /// Byte packed structure for EFLAGS/RFLAGS
4795 /// 32-bits on IA-32
4796 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4797 ///
4798 typedef union {
4799 struct {
4800 UINT32 CF:1; ///< Carry Flag
4801 UINT32 Reserved_0:1; ///< Reserved
4802 UINT32 PF:1; ///< Parity Flag
4803 UINT32 Reserved_1:1; ///< Reserved
4804 UINT32 AF:1; ///< Auxiliary Carry Flag
4805 UINT32 Reserved_2:1; ///< Reserved
4806 UINT32 ZF:1; ///< Zero Flag
4807 UINT32 SF:1; ///< Sign Flag
4808 UINT32 TF:1; ///< Trap Flag
4809 UINT32 IF:1; ///< Interrupt Enable Flag
4810 UINT32 DF:1; ///< Direction Flag
4811 UINT32 OF:1; ///< Overflow Flag
4812 UINT32 IOPL:2; ///< I/O Privilege Level
4813 UINT32 NT:1; ///< Nested Task
4814 UINT32 Reserved_3:1; ///< Reserved
4815 UINT32 RF:1; ///< Resume Flag
4816 UINT32 VM:1; ///< Virtual 8086 Mode
4817 UINT32 AC:1; ///< Alignment Check
4818 UINT32 VIF:1; ///< Virtual Interrupt Flag
4819 UINT32 VIP:1; ///< Virtual Interrupt Pending
4820 UINT32 ID:1; ///< ID Flag
4821 UINT32 Reserved_4:10; ///< Reserved
4822 } Bits;
4823 UINTN UintN;
4824 } IA32_EFLAGS32;
4825
4826 ///
4827 /// Byte packed structure for Control Register 0 (CR0)
4828 /// 32-bits on IA-32
4829 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4830 ///
4831 typedef union {
4832 struct {
4833 UINT32 PE:1; ///< Protection Enable
4834 UINT32 MP:1; ///< Monitor Coprocessor
4835 UINT32 EM:1; ///< Emulation
4836 UINT32 TS:1; ///< Task Switched
4837 UINT32 ET:1; ///< Extension Type
4838 UINT32 NE:1; ///< Numeric Error
4839 UINT32 Reserved_0:10; ///< Reserved
4840 UINT32 WP:1; ///< Write Protect
4841 UINT32 Reserved_1:1; ///< Reserved
4842 UINT32 AM:1; ///< Alignment Mask
4843 UINT32 Reserved_2:10; ///< Reserved
4844 UINT32 NW:1; ///< Mot Write-through
4845 UINT32 CD:1; ///< Cache Disable
4846 UINT32 PG:1; ///< Paging
4847 } Bits;
4848 UINTN UintN;
4849 } IA32_CR0;
4850
4851 ///
4852 /// Byte packed structure for Control Register 4 (CR4)
4853 /// 32-bits on IA-32
4854 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4855 ///
4856 typedef union {
4857 struct {
4858 UINT32 VME:1; ///< Virtual-8086 Mode Extensions
4859 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts
4860 UINT32 TSD:1; ///< Time Stamp Disable
4861 UINT32 DE:1; ///< Debugging Extensions
4862 UINT32 PSE:1; ///< Page Size Extensions
4863 UINT32 PAE:1; ///< Physical Address Extension
4864 UINT32 MCE:1; ///< Machine Check Enable
4865 UINT32 PGE:1; ///< Page Global Enable
4866 UINT32 PCE:1; ///< Performance Monitoring Counter
4867 ///< Enable
4868 UINT32 OSFXSR:1; ///< Operating System Support for
4869 ///< FXSAVE and FXRSTOR instructions
4870 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
4871 ///< Unmasked SIMD Floating Point
4872 ///< Exceptions
4873 UINT32 Reserved_0:2; ///< Reserved
4874 UINT32 VMXE:1; ///< VMX Enable
4875 UINT32 Reserved_1:18; ///< Reserved
4876 } Bits;
4877 UINTN UintN;
4878 } IA32_CR4;
4879
4880 ///
4881 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4882 ///
4883 #pragma pack (1)
4884 typedef struct {
4885 UINT16 Limit;
4886 UINTN Base;
4887 } IA32_DESCRIPTOR;
4888 #pragma pack ()
4889
4890 #define IA32_IDT_GATE_TYPE_TASK 0x85
4891 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
4892 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
4893 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
4894 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
4895
4896
4897 #if defined (MDE_CPU_IA32)
4898 ///
4899 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor
4900 ///
4901 typedef union {
4902 struct {
4903 UINT32 OffsetLow:16; ///< Offset bits 15..0
4904 UINT32 Selector:16; ///< Selector
4905 UINT32 Reserved_0:8; ///< Reserved
4906 UINT32 GateType:8; ///< Gate Type. See #defines above
4907 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4908 } Bits;
4909 UINT64 Uint64;
4910 } IA32_IDT_GATE_DESCRIPTOR;
4911
4912 #endif
4913
4914 #if defined (MDE_CPU_X64)
4915 ///
4916 /// Byte packed structure for an x64 Interrupt Gate Descriptor
4917 ///
4918 typedef union {
4919 struct {
4920 UINT32 OffsetLow:16; ///< Offset bits 15..0
4921 UINT32 Selector:16; ///< Selector
4922 UINT32 Reserved_0:8; ///< Reserved
4923 UINT32 GateType:8; ///< Gate Type. See #defines above
4924 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4925 UINT32 OffsetUpper:32; ///< Offset bits 63..32
4926 UINT32 Reserved_1:32; ///< Reserved
4927 } Bits;
4928 struct {
4929 UINT64 Uint64;
4930 UINT64 Uint64_1;
4931 } Uint128;
4932 } IA32_IDT_GATE_DESCRIPTOR;
4933
4934 #endif
4935
4936 ///
4937 /// Byte packed structure for an FP/SSE/SSE2 context
4938 ///
4939 typedef struct {
4940 UINT8 Buffer[512];
4941 } IA32_FX_BUFFER;
4942
4943 ///
4944 /// Structures for the 16-bit real mode thunks
4945 ///
4946 typedef struct {
4947 UINT32 Reserved1;
4948 UINT32 Reserved2;
4949 UINT32 Reserved3;
4950 UINT32 Reserved4;
4951 UINT8 BL;
4952 UINT8 BH;
4953 UINT16 Reserved5;
4954 UINT8 DL;
4955 UINT8 DH;
4956 UINT16 Reserved6;
4957 UINT8 CL;
4958 UINT8 CH;
4959 UINT16 Reserved7;
4960 UINT8 AL;
4961 UINT8 AH;
4962 UINT16 Reserved8;
4963 } IA32_BYTE_REGS;
4964
4965 typedef struct {
4966 UINT16 DI;
4967 UINT16 Reserved1;
4968 UINT16 SI;
4969 UINT16 Reserved2;
4970 UINT16 BP;
4971 UINT16 Reserved3;
4972 UINT16 SP;
4973 UINT16 Reserved4;
4974 UINT16 BX;
4975 UINT16 Reserved5;
4976 UINT16 DX;
4977 UINT16 Reserved6;
4978 UINT16 CX;
4979 UINT16 Reserved7;
4980 UINT16 AX;
4981 UINT16 Reserved8;
4982 } IA32_WORD_REGS;
4983
4984 typedef struct {
4985 UINT32 EDI;
4986 UINT32 ESI;
4987 UINT32 EBP;
4988 UINT32 ESP;
4989 UINT32 EBX;
4990 UINT32 EDX;
4991 UINT32 ECX;
4992 UINT32 EAX;
4993 UINT16 DS;
4994 UINT16 ES;
4995 UINT16 FS;
4996 UINT16 GS;
4997 IA32_EFLAGS32 EFLAGS;
4998 UINT32 Eip;
4999 UINT16 CS;
5000 UINT16 SS;
5001 } IA32_DWORD_REGS;
5002
5003 typedef union {
5004 IA32_DWORD_REGS E;
5005 IA32_WORD_REGS X;
5006 IA32_BYTE_REGS H;
5007 } IA32_REGISTER_SET;
5008
5009 ///
5010 /// Byte packed structure for an 16-bit real mode thunks
5011 ///
5012 typedef struct {
5013 IA32_REGISTER_SET *RealModeState;
5014 VOID *RealModeBuffer;
5015 UINT32 RealModeBufferSize;
5016 UINT32 ThunkAttributes;
5017 } THUNK_CONTEXT;
5018
5019 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5020 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5021 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5022
5023 /**
5024 Retrieves CPUID information.
5025
5026 Executes the CPUID instruction with EAX set to the value specified by Index.
5027 This function always returns Index.
5028 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5029 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5030 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5031 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5032 This function is only available on IA-32 and x64.
5033
5034 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5035 instruction.
5036 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5037 instruction. This is an optional parameter that may be NULL.
5038 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5039 instruction. This is an optional parameter that may be NULL.
5040 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5041 instruction. This is an optional parameter that may be NULL.
5042 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5043 instruction. This is an optional parameter that may be NULL.
5044
5045 @return Index.
5046
5047 **/
5048 UINT32
5049 EFIAPI
5050 AsmCpuid (
5051 IN UINT32 Index,
5052 OUT UINT32 *Eax, OPTIONAL
5053 OUT UINT32 *Ebx, OPTIONAL
5054 OUT UINT32 *Ecx, OPTIONAL
5055 OUT UINT32 *Edx OPTIONAL
5056 );
5057
5058
5059 /**
5060 Retrieves CPUID information using an extended leaf identifier.
5061
5062 Executes the CPUID instruction with EAX set to the value specified by Index
5063 and ECX set to the value specified by SubIndex. This function always returns
5064 Index. This function is only available on IA-32 and x64.
5065
5066 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5067 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5068 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5069 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5070
5071 @param Index The 32-bit value to load into EAX prior to invoking the
5072 CPUID instruction.
5073 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5074 CPUID instruction.
5075 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5076 instruction. This is an optional parameter that may be
5077 NULL.
5078 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5079 instruction. This is an optional parameter that may be
5080 NULL.
5081 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5082 instruction. This is an optional parameter that may be
5083 NULL.
5084 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5085 instruction. This is an optional parameter that may be
5086 NULL.
5087
5088 @return Index.
5089
5090 **/
5091 UINT32
5092 EFIAPI
5093 AsmCpuidEx (
5094 IN UINT32 Index,
5095 IN UINT32 SubIndex,
5096 OUT UINT32 *Eax, OPTIONAL
5097 OUT UINT32 *Ebx, OPTIONAL
5098 OUT UINT32 *Ecx, OPTIONAL
5099 OUT UINT32 *Edx OPTIONAL
5100 );
5101
5102
5103 /**
5104 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5105
5106 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5107 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5108
5109 **/
5110 VOID
5111 EFIAPI
5112 AsmDisableCache (
5113 VOID
5114 );
5115
5116
5117 /**
5118 Perform a WBINVD and clear both the CD and NW bits of CR0.
5119
5120 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5121 bits of CR0 to 0. This function is only available on IA-32 and x64.
5122
5123 **/
5124 VOID
5125 EFIAPI
5126 AsmEnableCache (
5127 VOID
5128 );
5129
5130
5131 /**
5132 Returns the lower 32-bits of a Machine Specific Register(MSR).
5133
5134 Reads and returns the lower 32-bits of the MSR specified by Index.
5135 No parameter checking is performed on Index, and some Index values may cause
5136 CPU exceptions. The caller must either guarantee that Index is valid, or the
5137 caller must set up exception handlers to catch the exceptions. This function
5138 is only available on IA-32 and x64.
5139
5140 @param Index The 32-bit MSR index to read.
5141
5142 @return The lower 32 bits of the MSR identified by Index.
5143
5144 **/
5145 UINT32
5146 EFIAPI
5147 AsmReadMsr32 (
5148 IN UINT32 Index
5149 );
5150
5151
5152 /**
5153 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5154 The upper 32-bits of the MSR are set to zero.
5155
5156 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5157 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5158 the MSR is returned. No parameter checking is performed on Index or Value,
5159 and some of these may cause CPU exceptions. The caller must either guarantee
5160 that Index and Value are valid, or the caller must establish proper exception
5161 handlers. This function is only available on IA-32 and x64.
5162
5163 @param Index The 32-bit MSR index to write.
5164 @param Value The 32-bit value to write to the MSR.
5165
5166 @return Value
5167
5168 **/
5169 UINT32
5170 EFIAPI
5171 AsmWriteMsr32 (
5172 IN UINT32 Index,
5173 IN UINT32 Value
5174 );
5175
5176
5177 /**
5178 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5179 writes the result back to the 64-bit MSR.
5180
5181 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5182 between the lower 32-bits of the read result and the value specified by
5183 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5184 32-bits of the value written to the MSR is returned. No parameter checking is
5185 performed on Index or OrData, and some of these may cause CPU exceptions. The
5186 caller must either guarantee that Index and OrData are valid, or the caller
5187 must establish proper exception handlers. This function is only available on
5188 IA-32 and x64.
5189
5190 @param Index The 32-bit MSR index to write.
5191 @param OrData The value to OR with the read value from the MSR.
5192
5193 @return The lower 32-bit value written to the MSR.
5194
5195 **/
5196 UINT32
5197 EFIAPI
5198 AsmMsrOr32 (
5199 IN UINT32 Index,
5200 IN UINT32 OrData
5201 );
5202
5203
5204 /**
5205 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5206 the result back to the 64-bit MSR.
5207
5208 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5209 lower 32-bits of the read result and the value specified by AndData, and
5210 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5211 the value written to the MSR is returned. No parameter checking is performed
5212 on Index or AndData, and some of these may cause CPU exceptions. The caller
5213 must either guarantee that Index and AndData are valid, or the caller must
5214 establish proper exception handlers. This function is only available on IA-32
5215 and x64.
5216
5217 @param Index The 32-bit MSR index to write.
5218 @param AndData The value to AND with the read value from the MSR.
5219
5220 @return The lower 32-bit value written to the MSR.
5221
5222 **/
5223 UINT32
5224 EFIAPI
5225 AsmMsrAnd32 (
5226 IN UINT32 Index,
5227 IN UINT32 AndData
5228 );
5229
5230
5231 /**
5232 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5233 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5234
5235 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5236 lower 32-bits of the read result and the value specified by AndData
5237 preserving the upper 32-bits, performs a bitwise OR between the
5238 result of the AND operation and the value specified by OrData, and writes the
5239 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5240 written to the MSR is returned. No parameter checking is performed on Index,
5241 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5242 must either guarantee that Index, AndData, and OrData are valid, or the
5243 caller must establish proper exception handlers. This function is only
5244 available on IA-32 and x64.
5245
5246 @param Index The 32-bit MSR index to write.
5247 @param AndData The value to AND with the read value from the MSR.
5248 @param OrData The value to OR with the result of the AND operation.
5249
5250 @return The lower 32-bit value written to the MSR.
5251
5252 **/
5253 UINT32
5254 EFIAPI
5255 AsmMsrAndThenOr32 (
5256 IN UINT32 Index,
5257 IN UINT32 AndData,
5258 IN UINT32 OrData
5259 );
5260
5261
5262 /**
5263 Reads a bit field of an MSR.
5264
5265 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5266 specified by the StartBit and the EndBit. The value of the bit field is
5267 returned. The caller must either guarantee that Index is valid, or the caller
5268 must set up exception handlers to catch the exceptions. This function is only
5269 available on IA-32 and x64.
5270
5271 If StartBit is greater than 31, then ASSERT().
5272 If EndBit is greater than 31, then ASSERT().
5273 If EndBit is less than StartBit, then ASSERT().
5274
5275 @param Index The 32-bit MSR index to read.
5276 @param StartBit The ordinal of the least significant bit in the bit field.
5277 Range 0..31.
5278 @param EndBit The ordinal of the most significant bit in the bit field.
5279 Range 0..31.
5280
5281 @return The bit field read from the MSR.
5282
5283 **/
5284 UINT32
5285 EFIAPI
5286 AsmMsrBitFieldRead32 (
5287 IN UINT32 Index,
5288 IN UINTN StartBit,
5289 IN UINTN EndBit
5290 );
5291
5292
5293 /**
5294 Writes a bit field to an MSR.
5295
5296 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5297 field is specified by the StartBit and the EndBit. All other bits in the
5298 destination MSR are preserved. The lower 32-bits of the MSR written is
5299 returned. The caller must either guarantee that Index and the data written
5300 is valid, or the caller must set up exception handlers to catch the exceptions.
5301 This function is only available on IA-32 and x64.
5302
5303 If StartBit is greater than 31, then ASSERT().
5304 If EndBit is greater than 31, then ASSERT().
5305 If EndBit is less than StartBit, then ASSERT().
5306
5307 @param Index The 32-bit MSR index to write.
5308 @param StartBit The ordinal of the least significant bit in the bit field.
5309 Range 0..31.
5310 @param EndBit The ordinal of the most significant bit in the bit field.
5311 Range 0..31.
5312 @param Value New value of the bit field.
5313
5314 @return The lower 32-bit of the value written to the MSR.
5315
5316 **/
5317 UINT32
5318 EFIAPI
5319 AsmMsrBitFieldWrite32 (
5320 IN UINT32 Index,
5321 IN UINTN StartBit,
5322 IN UINTN EndBit,
5323 IN UINT32 Value
5324 );
5325
5326
5327 /**
5328 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5329 result back to the bit field in the 64-bit MSR.
5330
5331 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5332 between the read result and the value specified by OrData, and writes the
5333 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5334 written to the MSR are returned. Extra left bits in OrData are stripped. The
5335 caller must either guarantee that Index and the data written is valid, or
5336 the caller must set up exception handlers to catch the exceptions. This
5337 function is only available on IA-32 and x64.
5338
5339 If StartBit is greater than 31, then ASSERT().
5340 If EndBit is greater than 31, then ASSERT().
5341 If EndBit is less than StartBit, then ASSERT().
5342
5343 @param Index The 32-bit MSR index to write.
5344 @param StartBit The ordinal of the least significant bit in the bit field.
5345 Range 0..31.
5346 @param EndBit The ordinal of the most significant bit in the bit field.
5347 Range 0..31.
5348 @param OrData The value to OR with the read value from the MSR.
5349
5350 @return The lower 32-bit of the value written to the MSR.
5351
5352 **/
5353 UINT32
5354 EFIAPI
5355 AsmMsrBitFieldOr32 (
5356 IN UINT32 Index,
5357 IN UINTN StartBit,
5358 IN UINTN EndBit,
5359 IN UINT32 OrData
5360 );
5361
5362
5363 /**
5364 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5365 result back to the bit field in the 64-bit MSR.
5366
5367 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5368 read result and the value specified by AndData, and writes the result to the
5369 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5370 MSR are returned. Extra left bits in AndData are stripped. The caller must
5371 either guarantee that Index and the data written is valid, or the caller must
5372 set up exception handlers to catch the exceptions. This function is only
5373 available on IA-32 and x64.
5374
5375 If StartBit is greater than 31, then ASSERT().
5376 If EndBit is greater than 31, then ASSERT().
5377 If EndBit is less than StartBit, then ASSERT().
5378
5379 @param Index The 32-bit MSR index to write.
5380 @param StartBit The ordinal of the least significant bit in the bit field.
5381 Range 0..31.
5382 @param EndBit The ordinal of the most significant bit in the bit field.
5383 Range 0..31.
5384 @param AndData The value to AND with the read value from the MSR.
5385
5386 @return The lower 32-bit of the value written to the MSR.
5387
5388 **/
5389 UINT32
5390 EFIAPI
5391 AsmMsrBitFieldAnd32 (
5392 IN UINT32 Index,
5393 IN UINTN StartBit,
5394 IN UINTN EndBit,
5395 IN UINT32 AndData
5396 );
5397
5398
5399 /**
5400 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5401 bitwise OR, and writes the result back to the bit field in the
5402 64-bit MSR.
5403
5404 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5405 bitwise OR between the read result and the value specified by
5406 AndData, and writes the result to the 64-bit MSR specified by Index. The
5407 lower 32-bits of the value written to the MSR are returned. Extra left bits
5408 in both AndData and OrData are stripped. The caller must either guarantee
5409 that Index and the data written is valid, or the caller must set up exception
5410 handlers to catch the exceptions. This function is only available on IA-32
5411 and x64.
5412
5413 If StartBit is greater than 31, then ASSERT().
5414 If EndBit is greater than 31, then ASSERT().
5415 If EndBit is less than StartBit, then ASSERT().
5416
5417 @param Index The 32-bit MSR index to write.
5418 @param StartBit The ordinal of the least significant bit in the bit field.
5419 Range 0..31.
5420 @param EndBit The ordinal of the most significant bit in the bit field.
5421 Range 0..31.
5422 @param AndData The value to AND with the read value from the MSR.
5423 @param OrData The value to OR with the result of the AND operation.
5424
5425 @return The lower 32-bit of the value written to the MSR.
5426
5427 **/
5428 UINT32
5429 EFIAPI
5430 AsmMsrBitFieldAndThenOr32 (
5431 IN UINT32 Index,
5432 IN UINTN StartBit,
5433 IN UINTN EndBit,
5434 IN UINT32 AndData,
5435 IN UINT32 OrData
5436 );
5437
5438
5439 /**
5440 Returns a 64-bit Machine Specific Register(MSR).
5441
5442 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5443 performed on Index, and some Index values may cause CPU exceptions. The
5444 caller must either guarantee that Index is valid, or the caller must set up
5445 exception handlers to catch the exceptions. This function is only available
5446 on IA-32 and x64.
5447
5448 @param Index The 32-bit MSR index to read.
5449
5450 @return The value of the MSR identified by Index.
5451
5452 **/
5453 UINT64
5454 EFIAPI
5455 AsmReadMsr64 (
5456 IN UINT32 Index
5457 );
5458
5459
5460 /**
5461 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5462 value.
5463
5464 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5465 64-bit value written to the MSR is returned. No parameter checking is
5466 performed on Index or Value, and some of these may cause CPU exceptions. The
5467 caller must either guarantee that Index and Value are valid, or the caller
5468 must establish proper exception handlers. This function is only available on
5469 IA-32 and x64.
5470
5471 @param Index The 32-bit MSR index to write.
5472 @param Value The 64-bit value to write to the MSR.
5473
5474 @return Value
5475
5476 **/
5477 UINT64
5478 EFIAPI
5479 AsmWriteMsr64 (
5480 IN UINT32 Index,
5481 IN UINT64 Value
5482 );
5483
5484
5485 /**
5486 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5487 back to the 64-bit MSR.
5488
5489 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5490 between the read result and the value specified by OrData, and writes the
5491 result to the 64-bit MSR specified by Index. The value written to the MSR is
5492 returned. No parameter checking is performed on Index or OrData, and some of
5493 these may cause CPU exceptions. The caller must either guarantee that Index
5494 and OrData are valid, or the caller must establish proper exception handlers.
5495 This function is only available on IA-32 and x64.
5496
5497 @param Index The 32-bit MSR index to write.
5498 @param OrData The value to OR with the read value from the MSR.
5499
5500 @return The value written back to the MSR.
5501
5502 **/
5503 UINT64
5504 EFIAPI
5505 AsmMsrOr64 (
5506 IN UINT32 Index,
5507 IN UINT64 OrData
5508 );
5509
5510
5511 /**
5512 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5513 64-bit MSR.
5514
5515 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5516 read result and the value specified by OrData, and writes the result to the
5517 64-bit MSR specified by Index. The value written to the MSR is returned. No
5518 parameter checking is performed on Index or OrData, and some of these may
5519 cause CPU exceptions. The caller must either guarantee that Index and OrData
5520 are valid, or the caller must establish proper exception handlers. This
5521 function is only available on IA-32 and x64.
5522
5523 @param Index The 32-bit MSR index to write.
5524 @param AndData The value to AND with the read value from the MSR.
5525
5526 @return The value written back to the MSR.
5527
5528 **/
5529 UINT64
5530 EFIAPI
5531 AsmMsrAnd64 (
5532 IN UINT32 Index,
5533 IN UINT64 AndData
5534 );
5535
5536
5537 /**
5538 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5539 OR, and writes the result back to the 64-bit MSR.
5540
5541 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5542 result and the value specified by AndData, performs a bitwise OR
5543 between the result of the AND operation and the value specified by OrData,
5544 and writes the result to the 64-bit MSR specified by Index. The value written
5545 to the MSR is returned. No parameter checking is performed on Index, AndData,
5546 or OrData, and some of these may cause CPU exceptions. The caller must either
5547 guarantee that Index, AndData, and OrData are valid, or the caller must
5548 establish proper exception handlers. This function is only available on IA-32
5549 and x64.
5550
5551 @param Index The 32-bit MSR index to write.
5552 @param AndData The value to AND with the read value from the MSR.
5553 @param OrData The value to OR with the result of the AND operation.
5554
5555 @return The value written back to the MSR.
5556
5557 **/
5558 UINT64
5559 EFIAPI
5560 AsmMsrAndThenOr64 (
5561 IN UINT32 Index,
5562 IN UINT64 AndData,
5563 IN UINT64 OrData
5564 );
5565
5566
5567 /**
5568 Reads a bit field of an MSR.
5569
5570 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5571 StartBit and the EndBit. The value of the bit field is returned. The caller
5572 must either guarantee that Index is valid, or the caller must set up
5573 exception handlers to catch the exceptions. This function is only available
5574 on IA-32 and x64.
5575
5576 If StartBit is greater than 63, then ASSERT().
5577 If EndBit is greater than 63, then ASSERT().
5578 If EndBit is less than StartBit, then ASSERT().
5579
5580 @param Index The 32-bit MSR index to read.
5581 @param StartBit The ordinal of the least significant bit in the bit field.
5582 Range 0..63.
5583 @param EndBit The ordinal of the most significant bit in the bit field.
5584 Range 0..63.
5585
5586 @return The value read from the MSR.
5587
5588 **/
5589 UINT64
5590 EFIAPI
5591 AsmMsrBitFieldRead64 (
5592 IN UINT32 Index,
5593 IN UINTN StartBit,
5594 IN UINTN EndBit
5595 );
5596
5597
5598 /**
5599 Writes a bit field to an MSR.
5600
5601 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5602 the StartBit and the EndBit. All other bits in the destination MSR are
5603 preserved. The MSR written is returned. The caller must either guarantee
5604 that Index and the data written is valid, or the caller must set up exception
5605 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5606
5607 If StartBit is greater than 63, then ASSERT().
5608 If EndBit is greater than 63, then ASSERT().
5609 If EndBit is less than StartBit, then ASSERT().
5610
5611 @param Index The 32-bit MSR index to write.
5612 @param StartBit The ordinal of the least significant bit in the bit field.
5613 Range 0..63.
5614 @param EndBit The ordinal of the most significant bit in the bit field.
5615 Range 0..63.
5616 @param Value New value of the bit field.
5617
5618 @return The value written back to the MSR.
5619
5620 **/
5621 UINT64
5622 EFIAPI
5623 AsmMsrBitFieldWrite64 (
5624 IN UINT32 Index,
5625 IN UINTN StartBit,
5626 IN UINTN EndBit,
5627 IN UINT64 Value
5628 );
5629
5630
5631 /**
5632 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5633 writes the result back to the bit field in the 64-bit MSR.
5634
5635 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5636 between the read result and the value specified by OrData, and writes the
5637 result to the 64-bit MSR specified by Index. The value written to the MSR is
5638 returned. Extra left bits in OrData are stripped. The caller must either
5639 guarantee that Index and the data written is valid, or the caller must set up
5640 exception handlers to catch the exceptions. This function is only available
5641 on IA-32 and x64.
5642
5643 If StartBit is greater than 63, then ASSERT().
5644 If EndBit is greater than 63, then ASSERT().
5645 If EndBit is less than StartBit, then ASSERT().
5646
5647 @param Index The 32-bit MSR index to write.
5648 @param StartBit The ordinal of the least significant bit in the bit field.
5649 Range 0..63.
5650 @param EndBit The ordinal of the most significant bit in the bit field.
5651 Range 0..63.
5652 @param OrData The value to OR with the read value from the bit field.
5653
5654 @return The value written back to the MSR.
5655
5656 **/
5657 UINT64
5658 EFIAPI
5659 AsmMsrBitFieldOr64 (
5660 IN UINT32 Index,
5661 IN UINTN StartBit,
5662 IN UINTN EndBit,
5663 IN UINT64 OrData
5664 );
5665
5666
5667 /**
5668 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5669 result back to the bit field in the 64-bit MSR.
5670
5671 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5672 read result and the value specified by AndData, and writes the result to the
5673 64-bit MSR specified by Index. The value written to the MSR is returned.
5674 Extra left bits in AndData are stripped. The caller must either guarantee
5675 that Index and the data written is valid, or the caller must set up exception
5676 handlers to catch the exceptions. This function is only available on IA-32
5677 and x64.
5678
5679 If StartBit is greater than 63, then ASSERT().
5680 If EndBit is greater than 63, then ASSERT().
5681 If EndBit is less than StartBit, then ASSERT().
5682
5683 @param Index The 32-bit MSR index to write.
5684 @param StartBit The ordinal of the least significant bit in the bit field.
5685 Range 0..63.
5686 @param EndBit The ordinal of the most significant bit in the bit field.
5687 Range 0..63.
5688 @param AndData The value to AND with the read value from the bit field.
5689
5690 @return The value written back to the MSR.
5691
5692 **/
5693 UINT64
5694 EFIAPI
5695 AsmMsrBitFieldAnd64 (
5696 IN UINT32 Index,
5697 IN UINTN StartBit,
5698 IN UINTN EndBit,
5699 IN UINT64 AndData
5700 );
5701
5702
5703 /**
5704 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5705 bitwise OR, and writes the result back to the bit field in the
5706 64-bit MSR.
5707
5708 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5709 a bitwise OR between the read result and the value specified by
5710 AndData, and writes the result to the 64-bit MSR specified by Index. The
5711 value written to the MSR is returned. Extra left bits in both AndData and
5712 OrData are stripped. The caller must either guarantee that Index and the data
5713 written is valid, or the caller must set up exception handlers to catch the
5714 exceptions. This function is only available on IA-32 and x64.
5715
5716 If StartBit is greater than 63, then ASSERT().
5717 If EndBit is greater than 63, then ASSERT().
5718 If EndBit is less than StartBit, then ASSERT().
5719
5720 @param Index The 32-bit MSR index to write.
5721 @param StartBit The ordinal of the least significant bit in the bit field.
5722 Range 0..63.
5723 @param EndBit The ordinal of the most significant bit in the bit field.
5724 Range 0..63.
5725 @param AndData The value to AND with the read value from the bit field.
5726 @param OrData The value to OR with the result of the AND operation.
5727
5728 @return The value written back to the MSR.
5729
5730 **/
5731 UINT64
5732 EFIAPI
5733 AsmMsrBitFieldAndThenOr64 (
5734 IN UINT32 Index,
5735 IN UINTN StartBit,
5736 IN UINTN EndBit,
5737 IN UINT64 AndData,
5738 IN UINT64 OrData
5739 );
5740
5741
5742 /**
5743 Reads the current value of the EFLAGS register.
5744
5745 Reads and returns the current value of the EFLAGS register. This function is
5746 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5747 64-bit value on x64.
5748
5749 @return EFLAGS on IA-32 or RFLAGS on x64.
5750
5751 **/
5752 UINTN
5753 EFIAPI
5754 AsmReadEflags (
5755 VOID
5756 );
5757
5758
5759 /**
5760 Reads the current value of the Control Register 0 (CR0).
5761
5762 Reads and returns the current value of CR0. This function is only available
5763 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5764 x64.
5765
5766 @return The value of the Control Register 0 (CR0).
5767
5768 **/
5769 UINTN
5770 EFIAPI
5771 AsmReadCr0 (
5772 VOID
5773 );
5774
5775
5776 /**
5777 Reads the current value of the Control Register 2 (CR2).
5778
5779 Reads and returns the current value of CR2. This function is only available
5780 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5781 x64.
5782
5783 @return The value of the Control Register 2 (CR2).
5784
5785 **/
5786 UINTN
5787 EFIAPI
5788 AsmReadCr2 (
5789 VOID
5790 );
5791
5792
5793 /**
5794 Reads the current value of the Control Register 3 (CR3).
5795
5796 Reads and returns the current value of CR3. This function is only available
5797 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5798 x64.
5799
5800 @return The value of the Control Register 3 (CR3).
5801
5802 **/
5803 UINTN
5804 EFIAPI
5805 AsmReadCr3 (
5806 VOID
5807 );
5808
5809
5810 /**
5811 Reads the current value of the Control Register 4 (CR4).
5812
5813 Reads and returns the current value of CR4. This function is only available
5814 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5815 x64.
5816
5817 @return The value of the Control Register 4 (CR4).
5818
5819 **/
5820 UINTN
5821 EFIAPI
5822 AsmReadCr4 (
5823 VOID
5824 );
5825
5826
5827 /**
5828 Writes a value to Control Register 0 (CR0).
5829
5830 Writes and returns a new value to CR0. This function is only available on
5831 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5832
5833 @param Cr0 The value to write to CR0.
5834
5835 @return The value written to CR0.
5836
5837 **/
5838 UINTN
5839 EFIAPI
5840 AsmWriteCr0 (
5841 UINTN Cr0
5842 );
5843
5844
5845 /**
5846 Writes a value to Control Register 2 (CR2).
5847
5848 Writes and returns a new value to CR2. This function is only available on
5849 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5850
5851 @param Cr2 The value to write to CR2.
5852
5853 @return The value written to CR2.
5854
5855 **/
5856 UINTN
5857 EFIAPI
5858 AsmWriteCr2 (
5859 UINTN Cr2
5860 );
5861
5862
5863 /**
5864 Writes a value to Control Register 3 (CR3).
5865
5866 Writes and returns a new value to CR3. This function is only available on
5867 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5868
5869 @param Cr3 The value to write to CR3.
5870
5871 @return The value written to CR3.
5872
5873 **/
5874 UINTN
5875 EFIAPI
5876 AsmWriteCr3 (
5877 UINTN Cr3
5878 );
5879
5880
5881 /**
5882 Writes a value to Control Register 4 (CR4).
5883
5884 Writes and returns a new value to CR4. This function is only available on
5885 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5886
5887 @param Cr4 The value to write to CR4.
5888
5889 @return The value written to CR4.
5890
5891 **/
5892 UINTN
5893 EFIAPI
5894 AsmWriteCr4 (
5895 UINTN Cr4
5896 );
5897
5898
5899 /**
5900 Reads the current value of Debug Register 0 (DR0).
5901
5902 Reads and returns the current value of DR0. This function is only available
5903 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5904 x64.
5905
5906 @return The value of Debug Register 0 (DR0).
5907
5908 **/
5909 UINTN
5910 EFIAPI
5911 AsmReadDr0 (
5912 VOID
5913 );
5914
5915
5916 /**
5917 Reads the current value of Debug Register 1 (DR1).
5918
5919 Reads and returns the current value of DR1. This function is only available
5920 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5921 x64.
5922
5923 @return The value of Debug Register 1 (DR1).
5924
5925 **/
5926 UINTN
5927 EFIAPI
5928 AsmReadDr1 (
5929 VOID
5930 );
5931
5932
5933 /**
5934 Reads the current value of Debug Register 2 (DR2).
5935
5936 Reads and returns the current value of DR2. This function is only available
5937 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5938 x64.
5939
5940 @return The value of Debug Register 2 (DR2).
5941
5942 **/
5943 UINTN
5944 EFIAPI
5945 AsmReadDr2 (
5946 VOID
5947 );
5948
5949
5950 /**
5951 Reads the current value of Debug Register 3 (DR3).
5952
5953 Reads and returns the current value of DR3. This function is only available
5954 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5955 x64.
5956
5957 @return The value of Debug Register 3 (DR3).
5958
5959 **/
5960 UINTN
5961 EFIAPI
5962 AsmReadDr3 (
5963 VOID
5964 );
5965
5966
5967 /**
5968 Reads the current value of Debug Register 4 (DR4).
5969
5970 Reads and returns the current value of DR4. This function is only available
5971 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5972 x64.
5973
5974 @return The value of Debug Register 4 (DR4).
5975
5976 **/
5977 UINTN
5978 EFIAPI
5979 AsmReadDr4 (
5980 VOID
5981 );
5982
5983
5984 /**
5985 Reads the current value of Debug Register 5 (DR5).
5986
5987 Reads and returns the current value of DR5. This function is only available
5988 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5989 x64.
5990
5991 @return The value of Debug Register 5 (DR5).
5992
5993 **/
5994 UINTN
5995 EFIAPI
5996 AsmReadDr5 (
5997 VOID
5998 );
5999
6000
6001 /**
6002 Reads the current value of Debug Register 6 (DR6).
6003
6004 Reads and returns the current value of DR6. This function is only available
6005 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6006 x64.
6007
6008 @return The value of Debug Register 6 (DR6).
6009
6010 **/
6011 UINTN
6012 EFIAPI
6013 AsmReadDr6 (
6014 VOID
6015 );
6016
6017
6018 /**
6019 Reads the current value of Debug Register 7 (DR7).
6020
6021 Reads and returns the current value of DR7. This function is only available
6022 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6023 x64.
6024
6025 @return The value of Debug Register 7 (DR7).
6026
6027 **/
6028 UINTN
6029 EFIAPI
6030 AsmReadDr7 (
6031 VOID
6032 );
6033
6034
6035 /**
6036 Writes a value to Debug Register 0 (DR0).
6037
6038 Writes and returns a new value to DR0. This function is only available on
6039 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6040
6041 @param Dr0 The value to write to Dr0.
6042
6043 @return The value written to Debug Register 0 (DR0).
6044
6045 **/
6046 UINTN
6047 EFIAPI
6048 AsmWriteDr0 (
6049 UINTN Dr0
6050 );
6051
6052
6053 /**
6054 Writes a value to Debug Register 1 (DR1).
6055
6056 Writes and returns a new value to DR1. This function is only available on
6057 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6058
6059 @param Dr1 The value to write to Dr1.
6060
6061 @return The value written to Debug Register 1 (DR1).
6062
6063 **/
6064 UINTN
6065 EFIAPI
6066 AsmWriteDr1 (
6067 UINTN Dr1
6068 );
6069
6070
6071 /**
6072 Writes a value to Debug Register 2 (DR2).
6073
6074 Writes and returns a new value to DR2. This function is only available on
6075 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6076
6077 @param Dr2 The value to write to Dr2.
6078
6079 @return The value written to Debug Register 2 (DR2).
6080
6081 **/
6082 UINTN
6083 EFIAPI
6084 AsmWriteDr2 (
6085 UINTN Dr2
6086 );
6087
6088
6089 /**
6090 Writes a value to Debug Register 3 (DR3).
6091
6092 Writes and returns a new value to DR3. This function is only available on
6093 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6094
6095 @param Dr3 The value to write to Dr3.
6096
6097 @return The value written to Debug Register 3 (DR3).
6098
6099 **/
6100 UINTN
6101 EFIAPI
6102 AsmWriteDr3 (
6103 UINTN Dr3
6104 );
6105
6106
6107 /**
6108 Writes a value to Debug Register 4 (DR4).
6109
6110 Writes and returns a new value to DR4. This function is only available on
6111 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6112
6113 @param Dr4 The value to write to Dr4.
6114
6115 @return The value written to Debug Register 4 (DR4).
6116
6117 **/
6118 UINTN
6119 EFIAPI
6120 AsmWriteDr4 (
6121 UINTN Dr4
6122 );
6123
6124
6125 /**
6126 Writes a value to Debug Register 5 (DR5).
6127
6128 Writes and returns a new value to DR5. This function is only available on
6129 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6130
6131 @param Dr5 The value to write to Dr5.
6132
6133 @return The value written to Debug Register 5 (DR5).
6134
6135 **/
6136 UINTN
6137 EFIAPI
6138 AsmWriteDr5 (
6139 UINTN Dr5
6140 );
6141
6142
6143 /**
6144 Writes a value to Debug Register 6 (DR6).
6145
6146 Writes and returns a new value to DR6. This function is only available on
6147 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6148
6149 @param Dr6 The value to write to Dr6.
6150
6151 @return The value written to Debug Register 6 (DR6).
6152
6153 **/
6154 UINTN
6155 EFIAPI
6156 AsmWriteDr6 (
6157 UINTN Dr6
6158 );
6159
6160
6161 /**
6162 Writes a value to Debug Register 7 (DR7).
6163
6164 Writes and returns a new value to DR7. This function is only available on
6165 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6166
6167 @param Dr7 The value to write to Dr7.
6168
6169 @return The value written to Debug Register 7 (DR7).
6170
6171 **/
6172 UINTN
6173 EFIAPI
6174 AsmWriteDr7 (
6175 UINTN Dr7
6176 );
6177
6178
6179 /**
6180 Reads the current value of Code Segment Register (CS).
6181
6182 Reads and returns the current value of CS. This function is only available on
6183 IA-32 and x64.
6184
6185 @return The current value of CS.
6186
6187 **/
6188 UINT16
6189 EFIAPI
6190 AsmReadCs (
6191 VOID
6192 );
6193
6194
6195 /**
6196 Reads the current value of Data Segment Register (DS).
6197
6198 Reads and returns the current value of DS. This function is only available on
6199 IA-32 and x64.
6200
6201 @return The current value of DS.
6202
6203 **/
6204 UINT16
6205 EFIAPI
6206 AsmReadDs (
6207 VOID
6208 );
6209
6210
6211 /**
6212 Reads the current value of Extra Segment Register (ES).
6213
6214 Reads and returns the current value of ES. This function is only available on
6215 IA-32 and x64.
6216
6217 @return The current value of ES.
6218
6219 **/
6220 UINT16
6221 EFIAPI
6222 AsmReadEs (
6223 VOID
6224 );
6225
6226
6227 /**
6228 Reads the current value of FS Data Segment Register (FS).
6229
6230 Reads and returns the current value of FS. This function is only available on
6231 IA-32 and x64.
6232
6233 @return The current value of FS.
6234
6235 **/
6236 UINT16
6237 EFIAPI
6238 AsmReadFs (
6239 VOID
6240 );
6241
6242
6243 /**
6244 Reads the current value of GS Data Segment Register (GS).
6245
6246 Reads and returns the current value of GS. This function is only available on
6247 IA-32 and x64.
6248
6249 @return The current value of GS.
6250
6251 **/
6252 UINT16
6253 EFIAPI
6254 AsmReadGs (
6255 VOID
6256 );
6257
6258
6259 /**
6260 Reads the current value of Stack Segment Register (SS).
6261
6262 Reads and returns the current value of SS. This function is only available on
6263 IA-32 and x64.
6264
6265 @return The current value of SS.
6266
6267 **/
6268 UINT16
6269 EFIAPI
6270 AsmReadSs (
6271 VOID
6272 );
6273
6274
6275 /**
6276 Reads the current value of Task Register (TR).
6277
6278 Reads and returns the current value of TR. This function is only available on
6279 IA-32 and x64.
6280
6281 @return The current value of TR.
6282
6283 **/
6284 UINT16
6285 EFIAPI
6286 AsmReadTr (
6287 VOID
6288 );
6289
6290
6291 /**
6292 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6293
6294 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6295 function is only available on IA-32 and x64.
6296
6297 If Gdtr is NULL, then ASSERT().
6298
6299 @param Gdtr Pointer to a GDTR descriptor.
6300
6301 **/
6302 VOID
6303 EFIAPI
6304 AsmReadGdtr (
6305 OUT IA32_DESCRIPTOR *Gdtr
6306 );
6307
6308
6309 /**
6310 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6311
6312 Writes and the current GDTR descriptor specified by Gdtr. This function is
6313 only available on IA-32 and x64.
6314
6315 If Gdtr is NULL, then ASSERT().
6316
6317 @param Gdtr Pointer to a GDTR descriptor.
6318
6319 **/
6320 VOID
6321 EFIAPI
6322 AsmWriteGdtr (
6323 IN CONST IA32_DESCRIPTOR *Gdtr
6324 );
6325
6326
6327 /**
6328 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6329
6330 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6331 function is only available on IA-32 and x64.
6332
6333 If Idtr is NULL, then ASSERT().
6334
6335 @param Idtr Pointer to a IDTR descriptor.
6336
6337 **/
6338 VOID
6339 EFIAPI
6340 AsmReadIdtr (
6341 OUT IA32_DESCRIPTOR *Idtr
6342 );
6343
6344
6345 /**
6346 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6347
6348 Writes the current IDTR descriptor and returns it in Idtr. This function is
6349 only available on IA-32 and x64.
6350
6351 If Idtr is NULL, then ASSERT().
6352
6353 @param Idtr Pointer to a IDTR descriptor.
6354
6355 **/
6356 VOID
6357 EFIAPI
6358 AsmWriteIdtr (
6359 IN CONST IA32_DESCRIPTOR *Idtr
6360 );
6361
6362
6363 /**
6364 Reads the current Local Descriptor Table Register(LDTR) selector.
6365
6366 Reads and returns the current 16-bit LDTR descriptor value. This function is
6367 only available on IA-32 and x64.
6368
6369 @return The current selector of LDT.
6370
6371 **/
6372 UINT16
6373 EFIAPI
6374 AsmReadLdtr (
6375 VOID
6376 );
6377
6378
6379 /**
6380 Writes the current Local Descriptor Table Register (LDTR) selector.
6381
6382 Writes and the current LDTR descriptor specified by Ldtr. This function is
6383 only available on IA-32 and x64.
6384
6385 @param Ldtr 16-bit LDTR selector value.
6386
6387 **/
6388 VOID
6389 EFIAPI
6390 AsmWriteLdtr (
6391 IN UINT16 Ldtr
6392 );
6393
6394
6395 /**
6396 Save the current floating point/SSE/SSE2 context to a buffer.
6397
6398 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6399 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6400 available on IA-32 and x64.
6401
6402 If Buffer is NULL, then ASSERT().
6403 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6404
6405 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6406
6407 **/
6408 VOID
6409 EFIAPI
6410 AsmFxSave (
6411 OUT IA32_FX_BUFFER *Buffer
6412 );
6413
6414
6415 /**
6416 Restores the current floating point/SSE/SSE2 context from a buffer.
6417
6418 Restores the current floating point/SSE/SSE2 state from the buffer specified
6419 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6420 only available on IA-32 and x64.
6421
6422 If Buffer is NULL, then ASSERT().
6423 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6424 If Buffer was not saved with AsmFxSave(), then ASSERT().
6425
6426 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6427
6428 **/
6429 VOID
6430 EFIAPI
6431 AsmFxRestore (
6432 IN CONST IA32_FX_BUFFER *Buffer
6433 );
6434
6435
6436 /**
6437 Reads the current value of 64-bit MMX Register #0 (MM0).
6438
6439 Reads and returns the current value of MM0. This function is only available
6440 on IA-32 and x64.
6441
6442 @return The current value of MM0.
6443
6444 **/
6445 UINT64
6446 EFIAPI
6447 AsmReadMm0 (
6448 VOID
6449 );
6450
6451
6452 /**
6453 Reads the current value of 64-bit MMX Register #1 (MM1).
6454
6455 Reads and returns the current value of MM1. This function is only available
6456 on IA-32 and x64.
6457
6458 @return The current value of MM1.
6459
6460 **/
6461 UINT64
6462 EFIAPI
6463 AsmReadMm1 (
6464 VOID
6465 );
6466
6467
6468 /**
6469 Reads the current value of 64-bit MMX Register #2 (MM2).
6470
6471 Reads and returns the current value of MM2. This function is only available
6472 on IA-32 and x64.
6473
6474 @return The current value of MM2.
6475
6476 **/
6477 UINT64
6478 EFIAPI
6479 AsmReadMm2 (
6480 VOID
6481 );
6482
6483
6484 /**
6485 Reads the current value of 64-bit MMX Register #3 (MM3).
6486
6487 Reads and returns the current value of MM3. This function is only available
6488 on IA-32 and x64.
6489
6490 @return The current value of MM3.
6491
6492 **/
6493 UINT64
6494 EFIAPI
6495 AsmReadMm3 (
6496 VOID
6497 );
6498
6499
6500 /**
6501 Reads the current value of 64-bit MMX Register #4 (MM4).
6502
6503 Reads and returns the current value of MM4. This function is only available
6504 on IA-32 and x64.
6505
6506 @return The current value of MM4.
6507
6508 **/
6509 UINT64
6510 EFIAPI
6511 AsmReadMm4 (
6512 VOID
6513 );
6514
6515
6516 /**
6517 Reads the current value of 64-bit MMX Register #5 (MM5).
6518
6519 Reads and returns the current value of MM5. This function is only available
6520 on IA-32 and x64.
6521
6522 @return The current value of MM5.
6523
6524 **/
6525 UINT64
6526 EFIAPI
6527 AsmReadMm5 (
6528 VOID
6529 );
6530
6531
6532 /**
6533 Reads the current value of 64-bit MMX Register #6 (MM6).
6534
6535 Reads and returns the current value of MM6. This function is only available
6536 on IA-32 and x64.
6537
6538 @return The current value of MM6.
6539
6540 **/
6541 UINT64
6542 EFIAPI
6543 AsmReadMm6 (
6544 VOID
6545 );
6546
6547
6548 /**
6549 Reads the current value of 64-bit MMX Register #7 (MM7).
6550
6551 Reads and returns the current value of MM7. This function is only available
6552 on IA-32 and x64.
6553
6554 @return The current value of MM7.
6555
6556 **/
6557 UINT64
6558 EFIAPI
6559 AsmReadMm7 (
6560 VOID
6561 );
6562
6563
6564 /**
6565 Writes the current value of 64-bit MMX Register #0 (MM0).
6566
6567 Writes the current value of MM0. This function is only available on IA32 and
6568 x64.
6569
6570 @param Value The 64-bit value to write to MM0.
6571
6572 **/
6573 VOID
6574 EFIAPI
6575 AsmWriteMm0 (
6576 IN UINT64 Value
6577 );
6578
6579
6580 /**
6581 Writes the current value of 64-bit MMX Register #1 (MM1).
6582
6583 Writes the current value of MM1. This function is only available on IA32 and
6584 x64.
6585
6586 @param Value The 64-bit value to write to MM1.
6587
6588 **/
6589 VOID
6590 EFIAPI
6591 AsmWriteMm1 (
6592 IN UINT64 Value
6593 );
6594
6595
6596 /**
6597 Writes the current value of 64-bit MMX Register #2 (MM2).
6598
6599 Writes the current value of MM2. This function is only available on IA32 and
6600 x64.
6601
6602 @param Value The 64-bit value to write to MM2.
6603
6604 **/
6605 VOID
6606 EFIAPI
6607 AsmWriteMm2 (
6608 IN UINT64 Value
6609 );
6610
6611
6612 /**
6613 Writes the current value of 64-bit MMX Register #3 (MM3).
6614
6615 Writes the current value of MM3. This function is only available on IA32 and
6616 x64.
6617
6618 @param Value The 64-bit value to write to MM3.
6619
6620 **/
6621 VOID
6622 EFIAPI
6623 AsmWriteMm3 (
6624 IN UINT64 Value
6625 );
6626
6627
6628 /**
6629 Writes the current value of 64-bit MMX Register #4 (MM4).
6630
6631 Writes the current value of MM4. This function is only available on IA32 and
6632 x64.
6633
6634 @param Value The 64-bit value to write to MM4.
6635
6636 **/
6637 VOID
6638 EFIAPI
6639 AsmWriteMm4 (
6640 IN UINT64 Value
6641 );
6642
6643
6644 /**
6645 Writes the current value of 64-bit MMX Register #5 (MM5).
6646
6647 Writes the current value of MM5. This function is only available on IA32 and
6648 x64.
6649
6650 @param Value The 64-bit value to write to MM5.
6651
6652 **/
6653 VOID
6654 EFIAPI
6655 AsmWriteMm5 (
6656 IN UINT64 Value
6657 );
6658
6659
6660 /**
6661 Writes the current value of 64-bit MMX Register #6 (MM6).
6662
6663 Writes the current value of MM6. This function is only available on IA32 and
6664 x64.
6665
6666 @param Value The 64-bit value to write to MM6.
6667
6668 **/
6669 VOID
6670 EFIAPI
6671 AsmWriteMm6 (
6672 IN UINT64 Value
6673 );
6674
6675
6676 /**
6677 Writes the current value of 64-bit MMX Register #7 (MM7).
6678
6679 Writes the current value of MM7. This function is only available on IA32 and
6680 x64.
6681
6682 @param Value The 64-bit value to write to MM7.
6683
6684 **/
6685 VOID
6686 EFIAPI
6687 AsmWriteMm7 (
6688 IN UINT64 Value
6689 );
6690
6691
6692 /**
6693 Reads the current value of Time Stamp Counter (TSC).
6694
6695 Reads and returns the current value of TSC. This function is only available
6696 on IA-32 and x64.
6697
6698 @return The current value of TSC
6699
6700 **/
6701 UINT64
6702 EFIAPI
6703 AsmReadTsc (
6704 VOID
6705 );
6706
6707
6708 /**
6709 Reads the current value of a Performance Counter (PMC).
6710
6711 Reads and returns the current value of performance counter specified by
6712 Index. This function is only available on IA-32 and x64.
6713
6714 @param Index The 32-bit Performance Counter index to read.
6715
6716 @return The value of the PMC specified by Index.
6717
6718 **/
6719 UINT64
6720 EFIAPI
6721 AsmReadPmc (
6722 IN UINT32 Index
6723 );
6724
6725
6726 /**
6727 Sets up a monitor buffer that is used by AsmMwait().
6728
6729 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6730 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6731
6732 @param Eax The value to load into EAX or RAX before executing the MONITOR
6733 instruction.
6734 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6735 instruction.
6736 @param Edx The value to load into EDX or RDX before executing the MONITOR
6737 instruction.
6738
6739 @return Eax
6740
6741 **/
6742 UINTN
6743 EFIAPI
6744 AsmMonitor (
6745 IN UINTN Eax,
6746 IN UINTN Ecx,
6747 IN UINTN Edx
6748 );
6749
6750
6751 /**
6752 Executes an MWAIT instruction.
6753
6754 Executes an MWAIT instruction with the register state specified by Eax and
6755 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6756
6757 @param Eax The value to load into EAX or RAX before executing the MONITOR
6758 instruction.
6759 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6760 instruction.
6761
6762 @return Eax
6763
6764 **/
6765 UINTN
6766 EFIAPI
6767 AsmMwait (
6768 IN UINTN Eax,
6769 IN UINTN Ecx
6770 );
6771
6772
6773 /**
6774 Executes a WBINVD instruction.
6775
6776 Executes a WBINVD instruction. This function is only available on IA-32 and
6777 x64.
6778
6779 **/
6780 VOID
6781 EFIAPI
6782 AsmWbinvd (
6783 VOID
6784 );
6785
6786
6787 /**
6788 Executes a INVD instruction.
6789
6790 Executes a INVD instruction. This function is only available on IA-32 and
6791 x64.
6792
6793 **/
6794 VOID
6795 EFIAPI
6796 AsmInvd (
6797 VOID
6798 );
6799
6800
6801 /**
6802 Flushes a cache line from all the instruction and data caches within the
6803 coherency domain of the CPU.
6804
6805 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6806 This function is only available on IA-32 and x64.
6807
6808 @param LinearAddress The address of the cache line to flush. If the CPU is
6809 in a physical addressing mode, then LinearAddress is a
6810 physical address. If the CPU is in a virtual
6811 addressing mode, then LinearAddress is a virtual
6812 address.
6813
6814 @return LinearAddress
6815 **/
6816 VOID *
6817 EFIAPI
6818 AsmFlushCacheLine (
6819 IN VOID *LinearAddress
6820 );
6821
6822
6823 /**
6824 Enables the 32-bit paging mode on the CPU.
6825
6826 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6827 must be properly initialized prior to calling this service. This function
6828 assumes the current execution mode is 32-bit protected mode. This function is
6829 only available on IA-32. After the 32-bit paging mode is enabled, control is
6830 transferred to the function specified by EntryPoint using the new stack
6831 specified by NewStack and passing in the parameters specified by Context1 and
6832 Context2. Context1 and Context2 are optional and may be NULL. The function
6833 EntryPoint must never return.
6834
6835 If the current execution mode is not 32-bit protected mode, then ASSERT().
6836 If EntryPoint is NULL, then ASSERT().
6837 If NewStack is NULL, then ASSERT().
6838
6839 There are a number of constraints that must be followed before calling this
6840 function:
6841 1) Interrupts must be disabled.
6842 2) The caller must be in 32-bit protected mode with flat descriptors. This
6843 means all descriptors must have a base of 0 and a limit of 4GB.
6844 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6845 descriptors.
6846 4) CR3 must point to valid page tables that will be used once the transition
6847 is complete, and those page tables must guarantee that the pages for this
6848 function and the stack are identity mapped.
6849
6850 @param EntryPoint A pointer to function to call with the new stack after
6851 paging is enabled.
6852 @param Context1 A pointer to the context to pass into the EntryPoint
6853 function as the first parameter after paging is enabled.
6854 @param Context2 A pointer to the context to pass into the EntryPoint
6855 function as the second parameter after paging is enabled.
6856 @param NewStack A pointer to the new stack to use for the EntryPoint
6857 function after paging is enabled.
6858
6859 **/
6860 VOID
6861 EFIAPI
6862 AsmEnablePaging32 (
6863 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6864 IN VOID *Context1, OPTIONAL
6865 IN VOID *Context2, OPTIONAL
6866 IN VOID *NewStack
6867 );
6868
6869
6870 /**
6871 Disables the 32-bit paging mode on the CPU.
6872
6873 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6874 mode. This function assumes the current execution mode is 32-paged protected
6875 mode. This function is only available on IA-32. After the 32-bit paging mode
6876 is disabled, control is transferred to the function specified by EntryPoint
6877 using the new stack specified by NewStack and passing in the parameters
6878 specified by Context1 and Context2. Context1 and Context2 are optional and
6879 may be NULL. The function EntryPoint must never return.
6880
6881 If the current execution mode is not 32-bit paged mode, then ASSERT().
6882 If EntryPoint is NULL, then ASSERT().
6883 If NewStack is NULL, then ASSERT().
6884
6885 There are a number of constraints that must be followed before calling this
6886 function:
6887 1) Interrupts must be disabled.
6888 2) The caller must be in 32-bit paged mode.
6889 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6890 4) CR3 must point to valid page tables that guarantee that the pages for
6891 this function and the stack are identity mapped.
6892
6893 @param EntryPoint A pointer to function to call with the new stack after
6894 paging is disabled.
6895 @param Context1 A pointer to the context to pass into the EntryPoint
6896 function as the first parameter after paging is disabled.
6897 @param Context2 A pointer to the context to pass into the EntryPoint
6898 function as the second parameter after paging is
6899 disabled.
6900 @param NewStack A pointer to the new stack to use for the EntryPoint
6901 function after paging is disabled.
6902
6903 **/
6904 VOID
6905 EFIAPI
6906 AsmDisablePaging32 (
6907 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6908 IN VOID *Context1, OPTIONAL
6909 IN VOID *Context2, OPTIONAL
6910 IN VOID *NewStack
6911 );
6912
6913
6914 /**
6915 Enables the 64-bit paging mode on the CPU.
6916
6917 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6918 must be properly initialized prior to calling this service. This function
6919 assumes the current execution mode is 32-bit protected mode with flat
6920 descriptors. This function is only available on IA-32. After the 64-bit
6921 paging mode is enabled, control is transferred to the function specified by
6922 EntryPoint using the new stack specified by NewStack and passing in the
6923 parameters specified by Context1 and Context2. Context1 and Context2 are
6924 optional and may be 0. The function EntryPoint must never return.
6925
6926 If the current execution mode is not 32-bit protected mode with flat
6927 descriptors, then ASSERT().
6928 If EntryPoint is 0, then ASSERT().
6929 If NewStack is 0, then ASSERT().
6930
6931 @param Cs The 16-bit selector to load in the CS before EntryPoint
6932 is called. The descriptor in the GDT that this selector
6933 references must be setup for long mode.
6934 @param EntryPoint The 64-bit virtual address of the function to call with
6935 the new stack after paging is enabled.
6936 @param Context1 The 64-bit virtual address of the context to pass into
6937 the EntryPoint function as the first parameter after
6938 paging is enabled.
6939 @param Context2 The 64-bit virtual address of the context to pass into
6940 the EntryPoint function as the second parameter after
6941 paging is enabled.
6942 @param NewStack The 64-bit virtual address of the new stack to use for
6943 the EntryPoint function after paging is enabled.
6944
6945 **/
6946 VOID
6947 EFIAPI
6948 AsmEnablePaging64 (
6949 IN UINT16 Cs,
6950 IN UINT64 EntryPoint,
6951 IN UINT64 Context1, OPTIONAL
6952 IN UINT64 Context2, OPTIONAL
6953 IN UINT64 NewStack
6954 );
6955
6956
6957 /**
6958 Disables the 64-bit paging mode on the CPU.
6959
6960 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
6961 mode. This function assumes the current execution mode is 64-paging mode.
6962 This function is only available on x64. After the 64-bit paging mode is
6963 disabled, control is transferred to the function specified by EntryPoint
6964 using the new stack specified by NewStack and passing in the parameters
6965 specified by Context1 and Context2. Context1 and Context2 are optional and
6966 may be 0. The function EntryPoint must never return.
6967
6968 If the current execution mode is not 64-bit paged mode, then ASSERT().
6969 If EntryPoint is 0, then ASSERT().
6970 If NewStack is 0, then ASSERT().
6971
6972 @param Cs The 16-bit selector to load in the CS before EntryPoint
6973 is called. The descriptor in the GDT that this selector
6974 references must be setup for 32-bit protected mode.
6975 @param EntryPoint The 64-bit virtual address of the function to call with
6976 the new stack after paging is disabled.
6977 @param Context1 The 64-bit virtual address of the context to pass into
6978 the EntryPoint function as the first parameter after
6979 paging is disabled.
6980 @param Context2 The 64-bit virtual address of the context to pass into
6981 the EntryPoint function as the second parameter after
6982 paging is disabled.
6983 @param NewStack The 64-bit virtual address of the new stack to use for
6984 the EntryPoint function after paging is disabled.
6985
6986 **/
6987 VOID
6988 EFIAPI
6989 AsmDisablePaging64 (
6990 IN UINT16 Cs,
6991 IN UINT32 EntryPoint,
6992 IN UINT32 Context1, OPTIONAL
6993 IN UINT32 Context2, OPTIONAL
6994 IN UINT32 NewStack
6995 );
6996
6997
6998 //
6999 // 16-bit thunking services
7000 //
7001
7002 /**
7003 Retrieves the properties for 16-bit thunk functions.
7004
7005 Computes the size of the buffer and stack below 1MB required to use the
7006 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7007 buffer size is returned in RealModeBufferSize, and the stack size is returned
7008 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7009 then the actual minimum stack size is ExtraStackSize plus the maximum number
7010 of bytes that need to be passed to the 16-bit real mode code.
7011
7012 If RealModeBufferSize is NULL, then ASSERT().
7013 If ExtraStackSize is NULL, then ASSERT().
7014
7015 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7016 required to use the 16-bit thunk functions.
7017 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7018 that the 16-bit thunk functions require for
7019 temporary storage in the transition to and from
7020 16-bit real mode.
7021
7022 **/
7023 VOID
7024 EFIAPI
7025 AsmGetThunk16Properties (
7026 OUT UINT32 *RealModeBufferSize,
7027 OUT UINT32 *ExtraStackSize
7028 );
7029
7030
7031 /**
7032 Prepares all structures a code required to use AsmThunk16().
7033
7034 Prepares all structures and code required to use AsmThunk16().
7035
7036 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7037 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7038
7039 If ThunkContext is NULL, then ASSERT().
7040
7041 @param ThunkContext A pointer to the context structure that describes the
7042 16-bit real mode code to call.
7043
7044 **/
7045 VOID
7046 EFIAPI
7047 AsmPrepareThunk16 (
7048 OUT THUNK_CONTEXT *ThunkContext
7049 );
7050
7051
7052 /**
7053 Transfers control to a 16-bit real mode entry point and returns the results.
7054
7055 Transfers control to a 16-bit real mode entry point and returns the results.
7056 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7057 This function must be called with interrupts disabled.
7058
7059 The register state from the RealModeState field of ThunkContext is restored just prior
7060 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7061 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7062 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7063 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7064 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7065 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7066 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7067 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7068 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7069 after the RETF instruction is executed.
7070
7071 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7072 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7073 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7074
7075 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7076 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7077 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7078
7079 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7080 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7081
7082 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7083 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7084 disable the A20 mask.
7085
7086 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7087 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7088 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7089
7090 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7091 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7092
7093 If ThunkContext is NULL, then ASSERT().
7094 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7095 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7096 ThunkAttributes, then ASSERT().
7097
7098 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7099 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7100
7101 @param ThunkContext A pointer to the context structure that describes the
7102 16-bit real mode code to call.
7103
7104 **/
7105 VOID
7106 EFIAPI
7107 AsmThunk16 (
7108 IN OUT THUNK_CONTEXT *ThunkContext
7109 );
7110
7111
7112 /**
7113 Prepares all structures and code for a 16-bit real mode thunk, transfers
7114 control to a 16-bit real mode entry point, and returns the results.
7115
7116 Prepares all structures and code for a 16-bit real mode thunk, transfers
7117 control to a 16-bit real mode entry point, and returns the results. If the
7118 caller only need to perform a single 16-bit real mode thunk, then this
7119 service should be used. If the caller intends to make more than one 16-bit
7120 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7121 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7122
7123 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7124 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7125
7126 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7127
7128 @param ThunkContext A pointer to the context structure that describes the
7129 16-bit real mode code to call.
7130
7131 **/
7132 VOID
7133 EFIAPI
7134 AsmPrepareAndThunk16 (
7135 IN OUT THUNK_CONTEXT *ThunkContext
7136 );
7137
7138 #endif
7139 #endif
7140
7141