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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture-specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 //
20 // Definitions for architecture-specific types
21 //
22 #if defined (MDE_CPU_IA32)
23 ///
24 /// IA-32 architecture context buffer used by SetJump() and LongJump()
25 ///
26 typedef struct {
27 UINT32 Ebx;
28 UINT32 Esi;
29 UINT32 Edi;
30 UINT32 Ebp;
31 UINT32 Esp;
32 UINT32 Eip;
33 } BASE_LIBRARY_JUMP_BUFFER;
34
35 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
36
37 #endif // defined (MDE_CPU_IA32)
38
39 #if defined (MDE_CPU_IPF)
40
41 ///
42 /// Itanium architecture context buffer used by SetJump() and LongJump()
43 ///
44 typedef struct {
45 UINT64 F2[2];
46 UINT64 F3[2];
47 UINT64 F4[2];
48 UINT64 F5[2];
49 UINT64 F16[2];
50 UINT64 F17[2];
51 UINT64 F18[2];
52 UINT64 F19[2];
53 UINT64 F20[2];
54 UINT64 F21[2];
55 UINT64 F22[2];
56 UINT64 F23[2];
57 UINT64 F24[2];
58 UINT64 F25[2];
59 UINT64 F26[2];
60 UINT64 F27[2];
61 UINT64 F28[2];
62 UINT64 F29[2];
63 UINT64 F30[2];
64 UINT64 F31[2];
65 UINT64 R4;
66 UINT64 R5;
67 UINT64 R6;
68 UINT64 R7;
69 UINT64 SP;
70 UINT64 BR0;
71 UINT64 BR1;
72 UINT64 BR2;
73 UINT64 BR3;
74 UINT64 BR4;
75 UINT64 BR5;
76 UINT64 InitialUNAT;
77 UINT64 AfterSpillUNAT;
78 UINT64 PFS;
79 UINT64 BSP;
80 UINT64 Predicates;
81 UINT64 LoopCount;
82 UINT64 FPSR;
83 } BASE_LIBRARY_JUMP_BUFFER;
84
85 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
86
87 #endif // defined (MDE_CPU_IPF)
88
89 #if defined (MDE_CPU_X64)
90 ///
91 /// x64 architecture context buffer used by SetJump() and LongJump()
92 ///
93 typedef struct {
94 UINT64 Rbx;
95 UINT64 Rsp;
96 UINT64 Rbp;
97 UINT64 Rdi;
98 UINT64 Rsi;
99 UINT64 R12;
100 UINT64 R13;
101 UINT64 R14;
102 UINT64 R15;
103 UINT64 Rip;
104 UINT64 MxCsr;
105 UINT8 XmmBuffer[160]; ///< XMM6-XMM15
106 } BASE_LIBRARY_JUMP_BUFFER;
107
108 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
109
110 #endif // defined (MDE_CPU_X64)
111
112 #if defined (MDE_CPU_EBC)
113 ///
114 /// EBC context buffer used by SetJump() and LongJump()
115 ///
116 typedef struct {
117 UINT64 R0;
118 UINT64 R1;
119 UINT64 R2;
120 UINT64 R3;
121 UINT64 IP;
122 } BASE_LIBRARY_JUMP_BUFFER;
123
124 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
125
126 #endif // defined (MDE_CPU_EBC)
127
128 //
129 // String Services
130 //
131
132 /**
133 Copies one Null-terminated Unicode string to another Null-terminated Unicode
134 string and returns the new Unicode string.
135
136 This function copies the contents of the Unicode string Source to the Unicode
137 string Destination, and returns Destination. If Source and Destination
138 overlap, then the results are undefined.
139
140 If Destination is NULL, then ASSERT().
141 If Destination is not aligned on a 16-bit boundary, then ASSERT().
142 If Source is NULL, then ASSERT().
143 If Source is not aligned on a 16-bit boundary, then ASSERT().
144 If Source and Destination overlap, then ASSERT().
145 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
146 PcdMaximumUnicodeStringLength Unicode characters not including the
147 Null-terminator, then ASSERT().
148
149 @param Destination Pointer to a Null-terminated Unicode string.
150 @param Source Pointer to a Null-terminated Unicode string.
151
152 @return Destination.
153
154 **/
155 CHAR16 *
156 EFIAPI
157 StrCpy (
158 OUT CHAR16 *Destination,
159 IN CONST CHAR16 *Source
160 );
161
162
163 /**
164 Copies up to a specified length from one Null-terminated Unicode string to
165 another Null-terminated Unicode string and returns the new Unicode string.
166
167 This function copies the contents of the Unicode string Source to the Unicode
168 string Destination, and returns Destination. At most, Length Unicode
169 characters are copied from Source to Destination. If Length is 0, then
170 Destination is returned unmodified. If Length is greater that the number of
171 Unicode characters in Source, then Destination is padded with Null Unicode
172 characters. If Source and Destination overlap, then the results are
173 undefined.
174
175 If Length > 0 and Destination is NULL, then ASSERT().
176 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
177 If Length > 0 and Source is NULL, then ASSERT().
178 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
179 If Source and Destination overlap, then ASSERT().
180 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
181 PcdMaximumUnicodeStringLength, then ASSERT().
182 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
183 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
184 then ASSERT().
185
186 @param Destination Pointer to a Null-terminated Unicode string.
187 @param Source Pointer to a Null-terminated Unicode string.
188 @param Length Maximum number of Unicode characters to copy.
189
190 @return Destination.
191
192 **/
193 CHAR16 *
194 EFIAPI
195 StrnCpy (
196 OUT CHAR16 *Destination,
197 IN CONST CHAR16 *Source,
198 IN UINTN Length
199 );
200
201
202 /**
203 Returns the length of a Null-terminated Unicode string.
204
205 This function returns the number of Unicode characters in the Null-terminated
206 Unicode string specified by String.
207
208 If String is NULL, then ASSERT().
209 If String is not aligned on a 16-bit boundary, then ASSERT().
210 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
211 PcdMaximumUnicodeStringLength Unicode characters not including the
212 Null-terminator, then ASSERT().
213
214 @param String Pointer to a Null-terminated Unicode string.
215
216 @return The length of String.
217
218 **/
219 UINTN
220 EFIAPI
221 StrLen (
222 IN CONST CHAR16 *String
223 );
224
225
226 /**
227 Returns the size of a Null-terminated Unicode string in bytes, including the
228 Null terminator.
229
230 This function returns the size, in bytes, of the Null-terminated Unicode string
231 specified by String.
232
233 If String is NULL, then ASSERT().
234 If String is not aligned on a 16-bit boundary, then ASSERT().
235 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
236 PcdMaximumUnicodeStringLength Unicode characters not including the
237 Null-terminator, then ASSERT().
238
239 @param String Pointer to a Null-terminated Unicode string.
240
241 @return The size of String.
242
243 **/
244 UINTN
245 EFIAPI
246 StrSize (
247 IN CONST CHAR16 *String
248 );
249
250
251 /**
252 Compares two Null-terminated Unicode strings, and returns the difference
253 between the first mismatched Unicode characters.
254
255 This function compares the Null-terminated Unicode string FirstString to the
256 Null-terminated Unicode string SecondString. If FirstString is identical to
257 SecondString, then 0 is returned. Otherwise, the value returned is the first
258 mismatched Unicode character in SecondString subtracted from the first
259 mismatched Unicode character in FirstString.
260
261 If FirstString is NULL, then ASSERT().
262 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
263 If SecondString is NULL, then ASSERT().
264 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
265 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
266 than PcdMaximumUnicodeStringLength Unicode characters not including the
267 Null-terminator, then ASSERT().
268 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
269 than PcdMaximumUnicodeStringLength Unicode characters not including the
270 Null-terminator, then ASSERT().
271
272 @param FirstString Pointer to a Null-terminated Unicode string.
273 @param SecondString Pointer to a Null-terminated Unicode string.
274
275 @retval 0 FirstString is identical to SecondString.
276 @return others FirstString is not identical to SecondString.
277
278 **/
279 INTN
280 EFIAPI
281 StrCmp (
282 IN CONST CHAR16 *FirstString,
283 IN CONST CHAR16 *SecondString
284 );
285
286
287 /**
288 Compares up to a specified length the contents of two Null-terminated Unicode strings,
289 and returns the difference between the first mismatched Unicode characters.
290
291 This function compares the Null-terminated Unicode string FirstString to the
292 Null-terminated Unicode string SecondString. At most, Length Unicode
293 characters will be compared. If Length is 0, then 0 is returned. If
294 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
295 value returned is the first mismatched Unicode character in SecondString
296 subtracted from the first mismatched Unicode character in FirstString.
297
298 If Length > 0 and FirstString is NULL, then ASSERT().
299 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
300 If Length > 0 and SecondString is NULL, then ASSERT().
301 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
302 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
303 PcdMaximumUnicodeStringLength, then ASSERT().
304 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
305 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
306 then ASSERT().
307 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
308 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
309 then ASSERT().
310
311 @param FirstString Pointer to a Null-terminated Unicode string.
312 @param SecondString Pointer to a Null-terminated Unicode string.
313 @param Length Maximum number of Unicode characters to compare.
314
315 @retval 0 FirstString is identical to SecondString.
316 @return others FirstString is not identical to SecondString.
317
318 **/
319 INTN
320 EFIAPI
321 StrnCmp (
322 IN CONST CHAR16 *FirstString,
323 IN CONST CHAR16 *SecondString,
324 IN UINTN Length
325 );
326
327
328 /**
329 Concatenates one Null-terminated Unicode string to another Null-terminated
330 Unicode string, and returns the concatenated Unicode string.
331
332 This function concatenates two Null-terminated Unicode strings. The contents
333 of Null-terminated Unicode string Source are concatenated to the end of
334 Null-terminated Unicode string Destination. The Null-terminated concatenated
335 Unicode String is returned. If Source and Destination overlap, then the
336 results are undefined.
337
338 If Destination is NULL, then ASSERT().
339 If Destination is not aligned on a 16-bit boundary, then ASSERT().
340 If Source is NULL, then ASSERT().
341 If Source is not aligned on a 16-bit boundary, then ASSERT().
342 If Source and Destination overlap, then ASSERT().
343 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
344 than PcdMaximumUnicodeStringLength Unicode characters not including the
345 Null-terminator, then ASSERT().
346 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
347 PcdMaximumUnicodeStringLength Unicode characters not including the
348 Null-terminator, then ASSERT().
349 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
350 and Source results in a Unicode string with more than
351 PcdMaximumUnicodeStringLength Unicode characters not including the
352 Null-terminator, then ASSERT().
353
354 @param Destination Pointer to a Null-terminated Unicode string.
355 @param Source Pointer to a Null-terminated Unicode string.
356
357 @return Destination.
358
359 **/
360 CHAR16 *
361 EFIAPI
362 StrCat (
363 IN OUT CHAR16 *Destination,
364 IN CONST CHAR16 *Source
365 );
366
367
368 /**
369 Concatenates up to a specified length one Null-terminated Unicode to the end
370 of another Null-terminated Unicode string, and returns the concatenated
371 Unicode string.
372
373 This function concatenates two Null-terminated Unicode strings. The contents
374 of Null-terminated Unicode string Source are concatenated to the end of
375 Null-terminated Unicode string Destination, and Destination is returned. At
376 most, Length Unicode characters are concatenated from Source to the end of
377 Destination, and Destination is always Null-terminated. If Length is 0, then
378 Destination is returned unmodified. If Source and Destination overlap, then
379 the results are undefined.
380
381 If Destination is NULL, then ASSERT().
382 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
383 If Length > 0 and Source is NULL, then ASSERT().
384 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
385 If Source and Destination overlap, then ASSERT().
386 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
387 PcdMaximumUnicodeStringLength, then ASSERT().
388 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
389 than PcdMaximumUnicodeStringLength Unicode characters, not including the
390 Null-terminator, then ASSERT().
391 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
392 PcdMaximumUnicodeStringLength Unicode characters, not including the
393 Null-terminator, then ASSERT().
394 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
395 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
396 Unicode characters, not including the Null-terminator, then ASSERT().
397
398 @param Destination Pointer to a Null-terminated Unicode string.
399 @param Source Pointer to a Null-terminated Unicode string.
400 @param Length Maximum number of Unicode characters to concatenate from
401 Source.
402
403 @return Destination.
404
405 **/
406 CHAR16 *
407 EFIAPI
408 StrnCat (
409 IN OUT CHAR16 *Destination,
410 IN CONST CHAR16 *Source,
411 IN UINTN Length
412 );
413
414 /**
415 Returns the first occurrence of a Null-terminated Unicode sub-string
416 in a Null-terminated Unicode string.
417
418 This function scans the contents of the Null-terminated Unicode string
419 specified by String and returns the first occurrence of SearchString.
420 If SearchString is not found in String, then NULL is returned. If
421 the length of SearchString is zero, then String is
422 returned.
423
424 If String is NULL, then ASSERT().
425 If String is not aligned on a 16-bit boundary, then ASSERT().
426 If SearchString is NULL, then ASSERT().
427 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
428
429 If PcdMaximumUnicodeStringLength is not zero, and SearchString
430 or String contains more than PcdMaximumUnicodeStringLength Unicode
431 characters not including the Null-terminator, then ASSERT().
432
433 @param String Pointer to a Null-terminated Unicode string.
434 @param SearchString Pointer to a Null-terminated Unicode string to search for.
435
436 @retval NULL If the SearchString does not appear in String.
437 @return others If there is a match.
438
439 **/
440 CHAR16 *
441 EFIAPI
442 StrStr (
443 IN CONST CHAR16 *String,
444 IN CONST CHAR16 *SearchString
445 );
446
447 /**
448 Convert a Null-terminated Unicode decimal string to a value of
449 type UINTN.
450
451 This function returns a value of type UINTN by interpreting the contents
452 of the Unicode string specified by String as a decimal number. The format
453 of the input Unicode string String is:
454
455 [spaces] [decimal digits].
456
457 The valid decimal digit character is in the range [0-9]. The
458 function will ignore the pad space, which includes spaces or
459 tab characters, before [decimal digits]. The running zero in the
460 beginning of [decimal digits] will be ignored. Then, the function
461 stops at the first character that is a not a valid decimal character
462 or a Null-terminator, whichever one comes first.
463
464 If String is NULL, then ASSERT().
465 If String is not aligned in a 16-bit boundary, then ASSERT().
466 If String has only pad spaces, then 0 is returned.
467 If String has no pad spaces or valid decimal digits,
468 then 0 is returned.
469 If the number represented by String overflows according
470 to the range defined by UINTN, then ASSERT().
471
472 If PcdMaximumUnicodeStringLength is not zero, and String contains
473 more than PcdMaximumUnicodeStringLength Unicode characters not including
474 the Null-terminator, then ASSERT().
475
476 @param String Pointer to a Null-terminated Unicode string.
477
478 @retval Value translated from String.
479
480 **/
481 UINTN
482 EFIAPI
483 StrDecimalToUintn (
484 IN CONST CHAR16 *String
485 );
486
487 /**
488 Convert a Null-terminated Unicode decimal string to a value of
489 type UINT64.
490
491 This function returns a value of type UINT64 by interpreting the contents
492 of the Unicode string specified by String as a decimal number. The format
493 of the input Unicode string String is:
494
495 [spaces] [decimal digits].
496
497 The valid decimal digit character is in the range [0-9]. The
498 function will ignore the pad space, which includes spaces or
499 tab characters, before [decimal digits]. The running zero in the
500 beginning of [decimal digits] will be ignored. Then, the function
501 stops at the first character that is a not a valid decimal character
502 or a Null-terminator, whichever one comes first.
503
504 If String is NULL, then ASSERT().
505 If String is not aligned in a 16-bit boundary, then ASSERT().
506 If String has only pad spaces, then 0 is returned.
507 If String has no pad spaces or valid decimal digits,
508 then 0 is returned.
509 If the number represented by String overflows according
510 to the range defined by UINT64, then ASSERT().
511
512 If PcdMaximumUnicodeStringLength is not zero, and String contains
513 more than PcdMaximumUnicodeStringLength Unicode characters not including
514 the Null-terminator, then ASSERT().
515
516 @param String Pointer to a Null-terminated Unicode string.
517
518 @retval Value translated from String.
519
520 **/
521 UINT64
522 EFIAPI
523 StrDecimalToUint64 (
524 IN CONST CHAR16 *String
525 );
526
527
528 /**
529 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
530
531 This function returns a value of type UINTN by interpreting the contents
532 of the Unicode string specified by String as a hexadecimal number.
533 The format of the input Unicode string String is:
534
535 [spaces][zeros][x][hexadecimal digits].
536
537 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
538 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
539 If "x" appears in the input string, it must be prefixed with at least one 0.
540 The function will ignore the pad space, which includes spaces or tab characters,
541 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
542 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
543 first valid hexadecimal digit. Then, the function stops at the first character that is
544 a not a valid hexadecimal character or NULL, whichever one comes first.
545
546 If String is NULL, then ASSERT().
547 If String is not aligned in a 16-bit boundary, then ASSERT().
548 If String has only pad spaces, then zero is returned.
549 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
550 then zero is returned.
551 If the number represented by String overflows according to the range defined by
552 UINTN, then ASSERT().
553
554 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
555 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
556 then ASSERT().
557
558 @param String Pointer to a Null-terminated Unicode string.
559
560 @retval Value translated from String.
561
562 **/
563 UINTN
564 EFIAPI
565 StrHexToUintn (
566 IN CONST CHAR16 *String
567 );
568
569
570 /**
571 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
572
573 This function returns a value of type UINT64 by interpreting the contents
574 of the Unicode string specified by String as a hexadecimal number.
575 The format of the input Unicode string String is
576
577 [spaces][zeros][x][hexadecimal digits].
578
579 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
580 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
581 If "x" appears in the input string, it must be prefixed with at least one 0.
582 The function will ignore the pad space, which includes spaces or tab characters,
583 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
584 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
585 first valid hexadecimal digit. Then, the function stops at the first character that is
586 a not a valid hexadecimal character or NULL, whichever one comes first.
587
588 If String is NULL, then ASSERT().
589 If String is not aligned in a 16-bit boundary, then ASSERT().
590 If String has only pad spaces, then zero is returned.
591 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
592 then zero is returned.
593 If the number represented by String overflows according to the range defined by
594 UINT64, then ASSERT().
595
596 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
597 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
598 then ASSERT().
599
600 @param String Pointer to a Null-terminated Unicode string.
601
602 @retval Value translated from String.
603
604 **/
605 UINT64
606 EFIAPI
607 StrHexToUint64 (
608 IN CONST CHAR16 *String
609 );
610
611 /**
612 Convert a Null-terminated Unicode string to a Null-terminated
613 ASCII string and returns the ASCII string.
614
615 This function converts the content of the Unicode string Source
616 to the ASCII string Destination by copying the lower 8 bits of
617 each Unicode character. It returns Destination.
618
619 If any Unicode characters in Source contain non-zero value in
620 the upper 8 bits, then ASSERT().
621
622 If Destination is NULL, then ASSERT().
623 If Source is NULL, then ASSERT().
624 If Source is not aligned on a 16-bit boundary, then ASSERT().
625 If Source and Destination overlap, then ASSERT().
626
627 If PcdMaximumUnicodeStringLength is not zero, and Source contains
628 more than PcdMaximumUnicodeStringLength Unicode characters not including
629 the Null-terminator, then ASSERT().
630
631 If PcdMaximumAsciiStringLength is not zero, and Source contains more
632 than PcdMaximumAsciiStringLength Unicode characters not including the
633 Null-terminator, then ASSERT().
634
635 @param Source Pointer to a Null-terminated Unicode string.
636 @param Destination Pointer to a Null-terminated ASCII string.
637
638 @return Destination.
639
640 **/
641 CHAR8 *
642 EFIAPI
643 UnicodeStrToAsciiStr (
644 IN CONST CHAR16 *Source,
645 OUT CHAR8 *Destination
646 );
647
648
649 /**
650 Copies one Null-terminated ASCII string to another Null-terminated ASCII
651 string and returns the new ASCII string.
652
653 This function copies the contents of the ASCII string Source to the ASCII
654 string Destination, and returns Destination. If Source and Destination
655 overlap, then the results are undefined.
656
657 If Destination is NULL, then ASSERT().
658 If Source is NULL, then ASSERT().
659 If Source and Destination overlap, then ASSERT().
660 If PcdMaximumAsciiStringLength is not zero and Source contains more than
661 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
662 then ASSERT().
663
664 @param Destination Pointer to a Null-terminated ASCII string.
665 @param Source Pointer to a Null-terminated ASCII string.
666
667 @return Destination
668
669 **/
670 CHAR8 *
671 EFIAPI
672 AsciiStrCpy (
673 OUT CHAR8 *Destination,
674 IN CONST CHAR8 *Source
675 );
676
677
678 /**
679 Copies up to a specified length one Null-terminated ASCII string to another
680 Null-terminated ASCII string and returns the new ASCII string.
681
682 This function copies the contents of the ASCII string Source to the ASCII
683 string Destination, and returns Destination. At most, Length ASCII characters
684 are copied from Source to Destination. If Length is 0, then Destination is
685 returned unmodified. If Length is greater that the number of ASCII characters
686 in Source, then Destination is padded with Null ASCII characters. If Source
687 and Destination overlap, then the results are undefined.
688
689 If Destination is NULL, then ASSERT().
690 If Source is NULL, then ASSERT().
691 If Source and Destination overlap, then ASSERT().
692 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
693 PcdMaximumAsciiStringLength, then ASSERT().
694 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
695 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
696 then ASSERT().
697
698 @param Destination Pointer to a Null-terminated ASCII string.
699 @param Source Pointer to a Null-terminated ASCII string.
700 @param Length Maximum number of ASCII characters to copy.
701
702 @return Destination
703
704 **/
705 CHAR8 *
706 EFIAPI
707 AsciiStrnCpy (
708 OUT CHAR8 *Destination,
709 IN CONST CHAR8 *Source,
710 IN UINTN Length
711 );
712
713
714 /**
715 Returns the length of a Null-terminated ASCII string.
716
717 This function returns the number of ASCII characters in the Null-terminated
718 ASCII string specified by String.
719
720 If Length > 0 and Destination is NULL, then ASSERT().
721 If Length > 0 and Source is NULL, then ASSERT().
722 If PcdMaximumAsciiStringLength is not zero and String contains more than
723 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
724 then ASSERT().
725
726 @param String Pointer to a Null-terminated ASCII string.
727
728 @return The length of String.
729
730 **/
731 UINTN
732 EFIAPI
733 AsciiStrLen (
734 IN CONST CHAR8 *String
735 );
736
737
738 /**
739 Returns the size of a Null-terminated ASCII string in bytes, including the
740 Null terminator.
741
742 This function returns the size, in bytes, of the Null-terminated ASCII string
743 specified by String.
744
745 If String is NULL, then ASSERT().
746 If PcdMaximumAsciiStringLength is not zero and String contains more than
747 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
748 then ASSERT().
749
750 @param String Pointer to a Null-terminated ASCII string.
751
752 @return The size of String.
753
754 **/
755 UINTN
756 EFIAPI
757 AsciiStrSize (
758 IN CONST CHAR8 *String
759 );
760
761
762 /**
763 Compares two Null-terminated ASCII strings, and returns the difference
764 between the first mismatched ASCII characters.
765
766 This function compares the Null-terminated ASCII string FirstString to the
767 Null-terminated ASCII string SecondString. If FirstString is identical to
768 SecondString, then 0 is returned. Otherwise, the value returned is the first
769 mismatched ASCII character in SecondString subtracted from the first
770 mismatched ASCII character in FirstString.
771
772 If FirstString is NULL, then ASSERT().
773 If SecondString is NULL, then ASSERT().
774 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
775 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
776 then ASSERT().
777 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
778 than PcdMaximumAsciiStringLength ASCII characters not including the
779 Null-terminator, then ASSERT().
780
781 @param FirstString Pointer to a Null-terminated ASCII string.
782 @param SecondString Pointer to a Null-terminated ASCII string.
783
784 @retval ==0 FirstString is identical to SecondString.
785 @retval !=0 FirstString is not identical to SecondString.
786
787 **/
788 INTN
789 EFIAPI
790 AsciiStrCmp (
791 IN CONST CHAR8 *FirstString,
792 IN CONST CHAR8 *SecondString
793 );
794
795
796 /**
797 Performs a case insensitive comparison of two Null-terminated ASCII strings,
798 and returns the difference between the first mismatched ASCII characters.
799
800 This function performs a case insensitive comparison of the Null-terminated
801 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
802 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
803 value returned is the first mismatched lower case ASCII character in
804 SecondString subtracted from the first mismatched lower case ASCII character
805 in FirstString.
806
807 If FirstString is NULL, then ASSERT().
808 If SecondString is NULL, then ASSERT().
809 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
810 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
811 then ASSERT().
812 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
813 than PcdMaximumAsciiStringLength ASCII characters not including the
814 Null-terminator, then ASSERT().
815
816 @param FirstString Pointer to a Null-terminated ASCII string.
817 @param SecondString Pointer to a Null-terminated ASCII string.
818
819 @retval ==0 FirstString is identical to SecondString using case insensitive
820 comparisons.
821 @retval !=0 FirstString is not identical to SecondString using case
822 insensitive comparisons.
823
824 **/
825 INTN
826 EFIAPI
827 AsciiStriCmp (
828 IN CONST CHAR8 *FirstString,
829 IN CONST CHAR8 *SecondString
830 );
831
832
833 /**
834 Compares two Null-terminated ASCII strings with maximum lengths, and returns
835 the difference between the first mismatched ASCII characters.
836
837 This function compares the Null-terminated ASCII string FirstString to the
838 Null-terminated ASCII string SecondString. At most, Length ASCII characters
839 will be compared. If Length is 0, then 0 is returned. If FirstString is
840 identical to SecondString, then 0 is returned. Otherwise, the value returned
841 is the first mismatched ASCII character in SecondString subtracted from the
842 first mismatched ASCII character in FirstString.
843
844 If Length > 0 and FirstString is NULL, then ASSERT().
845 If Length > 0 and SecondString is NULL, then ASSERT().
846 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
847 PcdMaximumAsciiStringLength, then ASSERT().
848 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
849 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
850 then ASSERT().
851 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
852 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
853 then ASSERT().
854
855 @param FirstString Pointer to a Null-terminated ASCII string.
856 @param SecondString Pointer to a Null-terminated ASCII string.
857 @param Length Maximum number of ASCII characters for compare.
858
859 @retval ==0 FirstString is identical to SecondString.
860 @retval !=0 FirstString is not identical to SecondString.
861
862 **/
863 INTN
864 EFIAPI
865 AsciiStrnCmp (
866 IN CONST CHAR8 *FirstString,
867 IN CONST CHAR8 *SecondString,
868 IN UINTN Length
869 );
870
871
872 /**
873 Concatenates one Null-terminated ASCII string to another Null-terminated
874 ASCII string, and returns the concatenated ASCII string.
875
876 This function concatenates two Null-terminated ASCII strings. The contents of
877 Null-terminated ASCII string Source are concatenated to the end of Null-
878 terminated ASCII string Destination. The Null-terminated concatenated ASCII
879 String is returned.
880
881 If Destination is NULL, then ASSERT().
882 If Source is NULL, then ASSERT().
883 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
884 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
885 then ASSERT().
886 If PcdMaximumAsciiStringLength is not zero and Source contains more than
887 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
888 then ASSERT().
889 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
890 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
891 ASCII characters, then ASSERT().
892
893 @param Destination Pointer to a Null-terminated ASCII string.
894 @param Source Pointer to a Null-terminated ASCII string.
895
896 @return Destination
897
898 **/
899 CHAR8 *
900 EFIAPI
901 AsciiStrCat (
902 IN OUT CHAR8 *Destination,
903 IN CONST CHAR8 *Source
904 );
905
906
907 /**
908 Concatenates up to a specified length one Null-terminated ASCII string to
909 the end of another Null-terminated ASCII string, and returns the
910 concatenated ASCII string.
911
912 This function concatenates two Null-terminated ASCII strings. The contents
913 of Null-terminated ASCII string Source are concatenated to the end of Null-
914 terminated ASCII string Destination, and Destination is returned. At most,
915 Length ASCII characters are concatenated from Source to the end of
916 Destination, and Destination is always Null-terminated. If Length is 0, then
917 Destination is returned unmodified. If Source and Destination overlap, then
918 the results are undefined.
919
920 If Length > 0 and Destination is NULL, then ASSERT().
921 If Length > 0 and Source is NULL, then ASSERT().
922 If Source and Destination overlap, then ASSERT().
923 If PcdMaximumAsciiStringLength is not zero, and Length is greater than
924 PcdMaximumAsciiStringLength, then ASSERT().
925 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
926 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
927 then ASSERT().
928 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
929 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
930 then ASSERT().
931 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
932 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
933 ASCII characters, not including the Null-terminator, then ASSERT().
934
935 @param Destination Pointer to a Null-terminated ASCII string.
936 @param Source Pointer to a Null-terminated ASCII string.
937 @param Length Maximum number of ASCII characters to concatenate from
938 Source.
939
940 @return Destination
941
942 **/
943 CHAR8 *
944 EFIAPI
945 AsciiStrnCat (
946 IN OUT CHAR8 *Destination,
947 IN CONST CHAR8 *Source,
948 IN UINTN Length
949 );
950
951
952 /**
953 Returns the first occurrence of a Null-terminated ASCII sub-string
954 in a Null-terminated ASCII string.
955
956 This function scans the contents of the ASCII string specified by String
957 and returns the first occurrence of SearchString. If SearchString is not
958 found in String, then NULL is returned. If the length of SearchString is zero,
959 then String is returned.
960
961 If String is NULL, then ASSERT().
962 If SearchString is NULL, then ASSERT().
963
964 If PcdMaximumAsciiStringLength is not zero, and SearchString or
965 String contains more than PcdMaximumAsciiStringLength Unicode characters
966 not including the Null-terminator, then ASSERT().
967
968 @param String Pointer to a Null-terminated ASCII string.
969 @param SearchString Pointer to a Null-terminated ASCII string to search for.
970
971 @retval NULL If the SearchString does not appear in String.
972 @retval others If there is a match return the first occurrence of SearchingString.
973 If the length of SearchString is zero,return String.
974
975 **/
976 CHAR8 *
977 EFIAPI
978 AsciiStrStr (
979 IN CONST CHAR8 *String,
980 IN CONST CHAR8 *SearchString
981 );
982
983
984 /**
985 Convert a Null-terminated ASCII decimal string to a value of type
986 UINTN.
987
988 This function returns a value of type UINTN by interpreting the contents
989 of the ASCII string String as a decimal number. The format of the input
990 ASCII string String is:
991
992 [spaces] [decimal digits].
993
994 The valid decimal digit character is in the range [0-9]. The function will
995 ignore the pad space, which includes spaces or tab characters, before the digits.
996 The running zero in the beginning of [decimal digits] will be ignored. Then, the
997 function stops at the first character that is a not a valid decimal character or
998 Null-terminator, whichever on comes first.
999
1000 If String has only pad spaces, then 0 is returned.
1001 If String has no pad spaces or valid decimal digits, then 0 is returned.
1002 If the number represented by String overflows according to the range defined by
1003 UINTN, then ASSERT().
1004 If String is NULL, then ASSERT().
1005 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1006 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1007 then ASSERT().
1008
1009 @param String Pointer to a Null-terminated ASCII string.
1010
1011 @retval Value translated from String.
1012
1013 **/
1014 UINTN
1015 EFIAPI
1016 AsciiStrDecimalToUintn (
1017 IN CONST CHAR8 *String
1018 );
1019
1020
1021 /**
1022 Convert a Null-terminated ASCII decimal string to a value of type
1023 UINT64.
1024
1025 This function returns a value of type UINT64 by interpreting the contents
1026 of the ASCII string String as a decimal number. The format of the input
1027 ASCII string String is:
1028
1029 [spaces] [decimal digits].
1030
1031 The valid decimal digit character is in the range [0-9]. The function will
1032 ignore the pad space, which includes spaces or tab characters, before the digits.
1033 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1034 function stops at the first character that is a not a valid decimal character or
1035 Null-terminator, whichever on comes first.
1036
1037 If String has only pad spaces, then 0 is returned.
1038 If String has no pad spaces or valid decimal digits, then 0 is returned.
1039 If the number represented by String overflows according to the range defined by
1040 UINT64, then ASSERT().
1041 If String is NULL, then ASSERT().
1042 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1043 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1044 then ASSERT().
1045
1046 @param String Pointer to a Null-terminated ASCII string.
1047
1048 @retval Value translated from String.
1049
1050 **/
1051 UINT64
1052 EFIAPI
1053 AsciiStrDecimalToUint64 (
1054 IN CONST CHAR8 *String
1055 );
1056
1057
1058 /**
1059 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1060
1061 This function returns a value of type UINTN by interpreting the contents of
1062 the ASCII string String as a hexadecimal number. The format of the input ASCII
1063 string String is:
1064
1065 [spaces][zeros][x][hexadecimal digits].
1066
1067 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1068 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1069 appears in the input string, it must be prefixed with at least one 0. The function
1070 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1071 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1072 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1073 digit. Then, the function stops at the first character that is a not a valid
1074 hexadecimal character or Null-terminator, whichever on comes first.
1075
1076 If String has only pad spaces, then 0 is returned.
1077 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1078 0 is returned.
1079
1080 If the number represented by String overflows according to the range defined by UINTN,
1081 then ASSERT().
1082 If String is NULL, then ASSERT().
1083 If PcdMaximumAsciiStringLength is not zero,
1084 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1085 the Null-terminator, then ASSERT().
1086
1087 @param String Pointer to a Null-terminated ASCII string.
1088
1089 @retval Value translated from String.
1090
1091 **/
1092 UINTN
1093 EFIAPI
1094 AsciiStrHexToUintn (
1095 IN CONST CHAR8 *String
1096 );
1097
1098
1099 /**
1100 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1101
1102 This function returns a value of type UINT64 by interpreting the contents of
1103 the ASCII string String as a hexadecimal number. The format of the input ASCII
1104 string String is:
1105
1106 [spaces][zeros][x][hexadecimal digits].
1107
1108 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1109 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1110 appears in the input string, it must be prefixed with at least one 0. The function
1111 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1112 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1113 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1114 digit. Then, the function stops at the first character that is a not a valid
1115 hexadecimal character or Null-terminator, whichever on comes first.
1116
1117 If String has only pad spaces, then 0 is returned.
1118 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1119 0 is returned.
1120
1121 If the number represented by String overflows according to the range defined by UINT64,
1122 then ASSERT().
1123 If String is NULL, then ASSERT().
1124 If PcdMaximumAsciiStringLength is not zero,
1125 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1126 the Null-terminator, then ASSERT().
1127
1128 @param String Pointer to a Null-terminated ASCII string.
1129
1130 @retval Value translated from String.
1131
1132 **/
1133 UINT64
1134 EFIAPI
1135 AsciiStrHexToUint64 (
1136 IN CONST CHAR8 *String
1137 );
1138
1139
1140 /**
1141 Convert one Null-terminated ASCII string to a Null-terminated
1142 Unicode string and returns the Unicode string.
1143
1144 This function converts the contents of the ASCII string Source to the Unicode
1145 string Destination, and returns Destination. The function terminates the
1146 Unicode string Destination by appending a Null-terminator character at the end.
1147 The caller is responsible to make sure Destination points to a buffer with size
1148 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1149
1150 If Destination is NULL, then ASSERT().
1151 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1152 If Source is NULL, then ASSERT().
1153 If Source and Destination overlap, then ASSERT().
1154 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1155 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1156 then ASSERT().
1157 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1158 PcdMaximumUnicodeStringLength ASCII characters not including the
1159 Null-terminator, then ASSERT().
1160
1161 @param Source Pointer to a Null-terminated ASCII string.
1162 @param Destination Pointer to a Null-terminated Unicode string.
1163
1164 @return Destination.
1165
1166 **/
1167 CHAR16 *
1168 EFIAPI
1169 AsciiStrToUnicodeStr (
1170 IN CONST CHAR8 *Source,
1171 OUT CHAR16 *Destination
1172 );
1173
1174
1175 /**
1176 Converts an 8-bit value to an 8-bit BCD value.
1177
1178 Converts the 8-bit value specified by Value to BCD. The BCD value is
1179 returned.
1180
1181 If Value >= 100, then ASSERT().
1182
1183 @param Value The 8-bit value to convert to BCD. Range 0..99.
1184
1185 @return The BCD value.
1186
1187 **/
1188 UINT8
1189 EFIAPI
1190 DecimalToBcd8 (
1191 IN UINT8 Value
1192 );
1193
1194
1195 /**
1196 Converts an 8-bit BCD value to an 8-bit value.
1197
1198 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1199 value is returned.
1200
1201 If Value >= 0xA0, then ASSERT().
1202 If (Value & 0x0F) >= 0x0A, then ASSERT().
1203
1204 @param Value The 8-bit BCD value to convert to an 8-bit value.
1205
1206 @return The 8-bit value is returned.
1207
1208 **/
1209 UINT8
1210 EFIAPI
1211 BcdToDecimal8 (
1212 IN UINT8 Value
1213 );
1214
1215
1216 //
1217 // Linked List Functions and Macros
1218 //
1219
1220 /**
1221 Initializes the head node of a doubly linked list that is declared as a
1222 global variable in a module.
1223
1224 Initializes the forward and backward links of a new linked list. After
1225 initializing a linked list with this macro, the other linked list functions
1226 may be used to add and remove nodes from the linked list. This macro results
1227 in smaller executables by initializing the linked list in the data section,
1228 instead if calling the InitializeListHead() function to perform the
1229 equivalent operation.
1230
1231 @param ListHead The head note of a list to initialize.
1232
1233 **/
1234 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1235
1236
1237 /**
1238 Initializes the head node of a doubly linked list, and returns the pointer to
1239 the head node of the doubly linked list.
1240
1241 Initializes the forward and backward links of a new linked list. After
1242 initializing a linked list with this function, the other linked list
1243 functions may be used to add and remove nodes from the linked list. It is up
1244 to the caller of this function to allocate the memory for ListHead.
1245
1246 If ListHead is NULL, then ASSERT().
1247
1248 @param ListHead A pointer to the head node of a new doubly linked list.
1249
1250 @return ListHead
1251
1252 **/
1253 LIST_ENTRY *
1254 EFIAPI
1255 InitializeListHead (
1256 IN OUT LIST_ENTRY *ListHead
1257 );
1258
1259
1260 /**
1261 Adds a node to the beginning of a doubly linked list, and returns the pointer
1262 to the head node of the doubly linked list.
1263
1264 Adds the node Entry at the beginning of the doubly linked list denoted by
1265 ListHead, and returns ListHead.
1266
1267 If ListHead is NULL, then ASSERT().
1268 If Entry is NULL, then ASSERT().
1269 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1270 InitializeListHead(), then ASSERT().
1271 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1272 of nodes in ListHead, including the ListHead node, is greater than or
1273 equal to PcdMaximumLinkedListLength, then ASSERT().
1274
1275 @param ListHead A pointer to the head node of a doubly linked list.
1276 @param Entry A pointer to a node that is to be inserted at the beginning
1277 of a doubly linked list.
1278
1279 @return ListHead
1280
1281 **/
1282 LIST_ENTRY *
1283 EFIAPI
1284 InsertHeadList (
1285 IN OUT LIST_ENTRY *ListHead,
1286 IN OUT LIST_ENTRY *Entry
1287 );
1288
1289
1290 /**
1291 Adds a node to the end of a doubly linked list, and returns the pointer to
1292 the head node of the doubly linked list.
1293
1294 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1295 and returns ListHead.
1296
1297 If ListHead is NULL, then ASSERT().
1298 If Entry is NULL, then ASSERT().
1299 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1300 InitializeListHead(), then ASSERT().
1301 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1302 of nodes in ListHead, including the ListHead node, is greater than or
1303 equal to PcdMaximumLinkedListLength, then ASSERT().
1304
1305 @param ListHead A pointer to the head node of a doubly linked list.
1306 @param Entry A pointer to a node that is to be added at the end of the
1307 doubly linked list.
1308
1309 @return ListHead
1310
1311 **/
1312 LIST_ENTRY *
1313 EFIAPI
1314 InsertTailList (
1315 IN OUT LIST_ENTRY *ListHead,
1316 IN OUT LIST_ENTRY *Entry
1317 );
1318
1319
1320 /**
1321 Retrieves the first node of a doubly linked list.
1322
1323 Returns the first node of a doubly linked list. List must have been
1324 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1325 If List is empty, then List is returned.
1326
1327 If List is NULL, then ASSERT().
1328 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1329 InitializeListHead(), then ASSERT().
1330 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1331 in List, including the List node, is greater than or equal to
1332 PcdMaximumLinkedListLength, then ASSERT().
1333
1334 @param List A pointer to the head node of a doubly linked list.
1335
1336 @return The first node of a doubly linked list.
1337 @retval NULL The list is empty.
1338
1339 **/
1340 LIST_ENTRY *
1341 EFIAPI
1342 GetFirstNode (
1343 IN CONST LIST_ENTRY *List
1344 );
1345
1346
1347 /**
1348 Retrieves the next node of a doubly linked list.
1349
1350 Returns the node of a doubly linked list that follows Node.
1351 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1352 or InitializeListHead(). If List is empty, then List is returned.
1353
1354 If List is NULL, then ASSERT().
1355 If Node is NULL, then ASSERT().
1356 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1357 InitializeListHead(), then ASSERT().
1358 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1359 PcdMaximumLinkedListLenth nodes, then ASSERT().
1360 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1361
1362 @param List A pointer to the head node of a doubly linked list.
1363 @param Node A pointer to a node in the doubly linked list.
1364
1365 @return Pointer to the next node if one exists. Otherwise a null value which
1366 is actually List is returned.
1367
1368 **/
1369 LIST_ENTRY *
1370 EFIAPI
1371 GetNextNode (
1372 IN CONST LIST_ENTRY *List,
1373 IN CONST LIST_ENTRY *Node
1374 );
1375
1376
1377 /**
1378 Checks to see if a doubly linked list is empty or not.
1379
1380 Checks to see if the doubly linked list is empty. If the linked list contains
1381 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1382
1383 If ListHead is NULL, then ASSERT().
1384 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1385 InitializeListHead(), then ASSERT().
1386 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1387 in List, including the List node, is greater than or equal to
1388 PcdMaximumLinkedListLength, then ASSERT().
1389
1390 @param ListHead A pointer to the head node of a doubly linked list.
1391
1392 @retval TRUE The linked list is empty.
1393 @retval FALSE The linked list is not empty.
1394
1395 **/
1396 BOOLEAN
1397 EFIAPI
1398 IsListEmpty (
1399 IN CONST LIST_ENTRY *ListHead
1400 );
1401
1402
1403 /**
1404 Determines if a node in a doubly linked list is the head node of a the same
1405 doubly linked list. This function is typically used to terminate a loop that
1406 traverses all the nodes in a doubly linked list starting with the head node.
1407
1408 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1409 nodes in the doubly linked list specified by List. List must have been
1410 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1411
1412 If List is NULL, then ASSERT().
1413 If Node is NULL, then ASSERT().
1414 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1415 then ASSERT().
1416 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1417 in List, including the List node, is greater than or equal to
1418 PcdMaximumLinkedListLength, then ASSERT().
1419 If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
1420 to List, then ASSERT().
1421
1422 @param List A pointer to the head node of a doubly linked list.
1423 @param Node A pointer to a node in the doubly linked list.
1424
1425 @retval TRUE Node is one of the nodes in the doubly linked list.
1426 @retval FALSE Node is not one of the nodes in the doubly linked list.
1427
1428 **/
1429 BOOLEAN
1430 EFIAPI
1431 IsNull (
1432 IN CONST LIST_ENTRY *List,
1433 IN CONST LIST_ENTRY *Node
1434 );
1435
1436
1437 /**
1438 Determines if a node the last node in a doubly linked list.
1439
1440 Returns TRUE if Node is the last node in the doubly linked list specified by
1441 List. Otherwise, FALSE is returned. List must have been initialized with
1442 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1443
1444 If List is NULL, then ASSERT().
1445 If Node is NULL, then ASSERT().
1446 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1447 InitializeListHead(), then ASSERT().
1448 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1449 in List, including the List node, is greater than or equal to
1450 PcdMaximumLinkedListLength, then ASSERT().
1451 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1452
1453 @param List A pointer to the head node of a doubly linked list.
1454 @param Node A pointer to a node in the doubly linked list.
1455
1456 @retval TRUE Node is the last node in the linked list.
1457 @retval FALSE Node is not the last node in the linked list.
1458
1459 **/
1460 BOOLEAN
1461 EFIAPI
1462 IsNodeAtEnd (
1463 IN CONST LIST_ENTRY *List,
1464 IN CONST LIST_ENTRY *Node
1465 );
1466
1467
1468 /**
1469 Swaps the location of two nodes in a doubly linked list, and returns the
1470 first node after the swap.
1471
1472 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1473 Otherwise, the location of the FirstEntry node is swapped with the location
1474 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1475 same double linked list as FirstEntry and that double linked list must have
1476 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1477 SecondEntry is returned after the nodes are swapped.
1478
1479 If FirstEntry is NULL, then ASSERT().
1480 If SecondEntry is NULL, then ASSERT().
1481 If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
1482 same linked list, then ASSERT().
1483 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1484 linked list containing the FirstEntry and SecondEntry nodes, including
1485 the FirstEntry and SecondEntry nodes, is greater than or equal to
1486 PcdMaximumLinkedListLength, then ASSERT().
1487
1488 @param FirstEntry A pointer to a node in a linked list.
1489 @param SecondEntry A pointer to another node in the same linked list.
1490
1491 @return SecondEntry.
1492
1493 **/
1494 LIST_ENTRY *
1495 EFIAPI
1496 SwapListEntries (
1497 IN OUT LIST_ENTRY *FirstEntry,
1498 IN OUT LIST_ENTRY *SecondEntry
1499 );
1500
1501
1502 /**
1503 Removes a node from a doubly linked list, and returns the node that follows
1504 the removed node.
1505
1506 Removes the node Entry from a doubly linked list. It is up to the caller of
1507 this function to release the memory used by this node if that is required. On
1508 exit, the node following Entry in the doubly linked list is returned. If
1509 Entry is the only node in the linked list, then the head node of the linked
1510 list is returned.
1511
1512 If Entry is NULL, then ASSERT().
1513 If Entry is the head node of an empty list, then ASSERT().
1514 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1515 linked list containing Entry, including the Entry node, is greater than
1516 or equal to PcdMaximumLinkedListLength, then ASSERT().
1517
1518 @param Entry A pointer to a node in a linked list.
1519
1520 @return Entry.
1521
1522 **/
1523 LIST_ENTRY *
1524 EFIAPI
1525 RemoveEntryList (
1526 IN CONST LIST_ENTRY *Entry
1527 );
1528
1529 //
1530 // Math Services
1531 //
1532
1533 /**
1534 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1535 with zeros. The shifted value is returned.
1536
1537 This function shifts the 64-bit value Operand to the left by Count bits. The
1538 low Count bits are set to zero. The shifted value is returned.
1539
1540 If Count is greater than 63, then ASSERT().
1541
1542 @param Operand The 64-bit operand to shift left.
1543 @param Count The number of bits to shift left.
1544
1545 @return Operand << Count.
1546
1547 **/
1548 UINT64
1549 EFIAPI
1550 LShiftU64 (
1551 IN UINT64 Operand,
1552 IN UINTN Count
1553 );
1554
1555
1556 /**
1557 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1558 filled with zeros. The shifted value is returned.
1559
1560 This function shifts the 64-bit value Operand to the right by Count bits. The
1561 high Count bits are set to zero. The shifted value is returned.
1562
1563 If Count is greater than 63, then ASSERT().
1564
1565 @param Operand The 64-bit operand to shift right.
1566 @param Count The number of bits to shift right.
1567
1568 @return Operand >> Count
1569
1570 **/
1571 UINT64
1572 EFIAPI
1573 RShiftU64 (
1574 IN UINT64 Operand,
1575 IN UINTN Count
1576 );
1577
1578
1579 /**
1580 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1581 with original integer's bit 63. The shifted value is returned.
1582
1583 This function shifts the 64-bit value Operand to the right by Count bits. The
1584 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1585
1586 If Count is greater than 63, then ASSERT().
1587
1588 @param Operand The 64-bit operand to shift right.
1589 @param Count The number of bits to shift right.
1590
1591 @return Operand >> Count
1592
1593 **/
1594 UINT64
1595 EFIAPI
1596 ARShiftU64 (
1597 IN UINT64 Operand,
1598 IN UINTN Count
1599 );
1600
1601
1602 /**
1603 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1604 with the high bits that were rotated.
1605
1606 This function rotates the 32-bit value Operand to the left by Count bits. The
1607 low Count bits are fill with the high Count bits of Operand. The rotated
1608 value is returned.
1609
1610 If Count is greater than 31, then ASSERT().
1611
1612 @param Operand The 32-bit operand to rotate left.
1613 @param Count The number of bits to rotate left.
1614
1615 @return Operand << Count
1616
1617 **/
1618 UINT32
1619 EFIAPI
1620 LRotU32 (
1621 IN UINT32 Operand,
1622 IN UINTN Count
1623 );
1624
1625
1626 /**
1627 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1628 with the low bits that were rotated.
1629
1630 This function rotates the 32-bit value Operand to the right by Count bits.
1631 The high Count bits are fill with the low Count bits of Operand. The rotated
1632 value is returned.
1633
1634 If Count is greater than 31, then ASSERT().
1635
1636 @param Operand The 32-bit operand to rotate right.
1637 @param Count The number of bits to rotate right.
1638
1639 @return Operand >> Count
1640
1641 **/
1642 UINT32
1643 EFIAPI
1644 RRotU32 (
1645 IN UINT32 Operand,
1646 IN UINTN Count
1647 );
1648
1649
1650 /**
1651 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1652 with the high bits that were rotated.
1653
1654 This function rotates the 64-bit value Operand to the left by Count bits. The
1655 low Count bits are fill with the high Count bits of Operand. The rotated
1656 value is returned.
1657
1658 If Count is greater than 63, then ASSERT().
1659
1660 @param Operand The 64-bit operand to rotate left.
1661 @param Count The number of bits to rotate left.
1662
1663 @return Operand << Count
1664
1665 **/
1666 UINT64
1667 EFIAPI
1668 LRotU64 (
1669 IN UINT64 Operand,
1670 IN UINTN Count
1671 );
1672
1673
1674 /**
1675 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1676 with the high low bits that were rotated.
1677
1678 This function rotates the 64-bit value Operand to the right by Count bits.
1679 The high Count bits are fill with the low Count bits of Operand. The rotated
1680 value is returned.
1681
1682 If Count is greater than 63, then ASSERT().
1683
1684 @param Operand The 64-bit operand to rotate right.
1685 @param Count The number of bits to rotate right.
1686
1687 @return Operand >> Count
1688
1689 **/
1690 UINT64
1691 EFIAPI
1692 RRotU64 (
1693 IN UINT64 Operand,
1694 IN UINTN Count
1695 );
1696
1697
1698 /**
1699 Returns the bit position of the lowest bit set in a 32-bit value.
1700
1701 This function computes the bit position of the lowest bit set in the 32-bit
1702 value specified by Operand. If Operand is zero, then -1 is returned.
1703 Otherwise, a value between 0 and 31 is returned.
1704
1705 @param Operand The 32-bit operand to evaluate.
1706
1707 @retval 0..31 The lowest bit set in Operand was found.
1708 @retval -1 Operand is zero.
1709
1710 **/
1711 INTN
1712 EFIAPI
1713 LowBitSet32 (
1714 IN UINT32 Operand
1715 );
1716
1717
1718 /**
1719 Returns the bit position of the lowest bit set in a 64-bit value.
1720
1721 This function computes the bit position of the lowest bit set in the 64-bit
1722 value specified by Operand. If Operand is zero, then -1 is returned.
1723 Otherwise, a value between 0 and 63 is returned.
1724
1725 @param Operand The 64-bit operand to evaluate.
1726
1727 @retval 0..63 The lowest bit set in Operand was found.
1728 @retval -1 Operand is zero.
1729
1730
1731 **/
1732 INTN
1733 EFIAPI
1734 LowBitSet64 (
1735 IN UINT64 Operand
1736 );
1737
1738
1739 /**
1740 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1741 to log2(x).
1742
1743 This function computes the bit position of the highest bit set in the 32-bit
1744 value specified by Operand. If Operand is zero, then -1 is returned.
1745 Otherwise, a value between 0 and 31 is returned.
1746
1747 @param Operand The 32-bit operand to evaluate.
1748
1749 @retval 0..31 Position of the highest bit set in Operand if found.
1750 @retval -1 Operand is zero.
1751
1752 **/
1753 INTN
1754 EFIAPI
1755 HighBitSet32 (
1756 IN UINT32 Operand
1757 );
1758
1759
1760 /**
1761 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1762 to log2(x).
1763
1764 This function computes the bit position of the highest bit set in the 64-bit
1765 value specified by Operand. If Operand is zero, then -1 is returned.
1766 Otherwise, a value between 0 and 63 is returned.
1767
1768 @param Operand The 64-bit operand to evaluate.
1769
1770 @retval 0..63 Position of the highest bit set in Operand if found.
1771 @retval -1 Operand is zero.
1772
1773 **/
1774 INTN
1775 EFIAPI
1776 HighBitSet64 (
1777 IN UINT64 Operand
1778 );
1779
1780
1781 /**
1782 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1783 1 << log2(x).
1784
1785 This function computes the value of the highest bit set in the 32-bit value
1786 specified by Operand. If Operand is zero, then zero is returned.
1787
1788 @param Operand The 32-bit operand to evaluate.
1789
1790 @return 1 << HighBitSet32(Operand)
1791 @retval 0 Operand is zero.
1792
1793 **/
1794 UINT32
1795 EFIAPI
1796 GetPowerOfTwo32 (
1797 IN UINT32 Operand
1798 );
1799
1800
1801 /**
1802 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1803 1 << log2(x).
1804
1805 This function computes the value of the highest bit set in the 64-bit value
1806 specified by Operand. If Operand is zero, then zero is returned.
1807
1808 @param Operand The 64-bit operand to evaluate.
1809
1810 @return 1 << HighBitSet64(Operand)
1811 @retval 0 Operand is zero.
1812
1813 **/
1814 UINT64
1815 EFIAPI
1816 GetPowerOfTwo64 (
1817 IN UINT64 Operand
1818 );
1819
1820
1821 /**
1822 Switches the endianess of a 16-bit integer.
1823
1824 This function swaps the bytes in a 16-bit unsigned value to switch the value
1825 from little endian to big endian or vice versa. The byte swapped value is
1826 returned.
1827
1828 @param Value A 16-bit unsigned value.
1829
1830 @return The byte swapped Value.
1831
1832 **/
1833 UINT16
1834 EFIAPI
1835 SwapBytes16 (
1836 IN UINT16 Value
1837 );
1838
1839
1840 /**
1841 Switches the endianess of a 32-bit integer.
1842
1843 This function swaps the bytes in a 32-bit unsigned value to switch the value
1844 from little endian to big endian or vice versa. The byte swapped value is
1845 returned.
1846
1847 @param Value A 32-bit unsigned value.
1848
1849 @return The byte swapped Value.
1850
1851 **/
1852 UINT32
1853 EFIAPI
1854 SwapBytes32 (
1855 IN UINT32 Value
1856 );
1857
1858
1859 /**
1860 Switches the endianess of a 64-bit integer.
1861
1862 This function swaps the bytes in a 64-bit unsigned value to switch the value
1863 from little endian to big endian or vice versa. The byte swapped value is
1864 returned.
1865
1866 @param Value A 64-bit unsigned value.
1867
1868 @return The byte swapped Value.
1869
1870 **/
1871 UINT64
1872 EFIAPI
1873 SwapBytes64 (
1874 IN UINT64 Value
1875 );
1876
1877
1878 /**
1879 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1880 generates a 64-bit unsigned result.
1881
1882 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1883 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1884 bit unsigned result is returned.
1885
1886 @param Multiplicand A 64-bit unsigned value.
1887 @param Multiplier A 32-bit unsigned value.
1888
1889 @return Multiplicand * Multiplier
1890
1891 **/
1892 UINT64
1893 EFIAPI
1894 MultU64x32 (
1895 IN UINT64 Multiplicand,
1896 IN UINT32 Multiplier
1897 );
1898
1899
1900 /**
1901 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1902 generates a 64-bit unsigned result.
1903
1904 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1905 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1906 bit unsigned result is returned.
1907
1908 @param Multiplicand A 64-bit unsigned value.
1909 @param Multiplier A 64-bit unsigned value.
1910
1911 @return Multiplicand * Multiplier
1912
1913 **/
1914 UINT64
1915 EFIAPI
1916 MultU64x64 (
1917 IN UINT64 Multiplicand,
1918 IN UINT64 Multiplier
1919 );
1920
1921
1922 /**
1923 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1924 64-bit signed result.
1925
1926 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1927 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1928 signed result is returned.
1929
1930 @param Multiplicand A 64-bit signed value.
1931 @param Multiplier A 64-bit signed value.
1932
1933 @return Multiplicand * Multiplier
1934
1935 **/
1936 INT64
1937 EFIAPI
1938 MultS64x64 (
1939 IN INT64 Multiplicand,
1940 IN INT64 Multiplier
1941 );
1942
1943
1944 /**
1945 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1946 a 64-bit unsigned result.
1947
1948 This function divides the 64-bit unsigned value Dividend by the 32-bit
1949 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1950 function returns the 64-bit unsigned quotient.
1951
1952 If Divisor is 0, then ASSERT().
1953
1954 @param Dividend A 64-bit unsigned value.
1955 @param Divisor A 32-bit unsigned value.
1956
1957 @return Dividend / Divisor
1958
1959 **/
1960 UINT64
1961 EFIAPI
1962 DivU64x32 (
1963 IN UINT64 Dividend,
1964 IN UINT32 Divisor
1965 );
1966
1967
1968 /**
1969 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1970 a 32-bit unsigned remainder.
1971
1972 This function divides the 64-bit unsigned value Dividend by the 32-bit
1973 unsigned value Divisor and generates a 32-bit remainder. This function
1974 returns the 32-bit unsigned remainder.
1975
1976 If Divisor is 0, then ASSERT().
1977
1978 @param Dividend A 64-bit unsigned value.
1979 @param Divisor A 32-bit unsigned value.
1980
1981 @return Dividend % Divisor
1982
1983 **/
1984 UINT32
1985 EFIAPI
1986 ModU64x32 (
1987 IN UINT64 Dividend,
1988 IN UINT32 Divisor
1989 );
1990
1991
1992 /**
1993 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1994 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1995
1996 This function divides the 64-bit unsigned value Dividend by the 32-bit
1997 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1998 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1999 This function returns the 64-bit unsigned quotient.
2000
2001 If Divisor is 0, then ASSERT().
2002
2003 @param Dividend A 64-bit unsigned value.
2004 @param Divisor A 32-bit unsigned value.
2005 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
2006 optional and may be NULL.
2007
2008 @return Dividend / Divisor
2009
2010 **/
2011 UINT64
2012 EFIAPI
2013 DivU64x32Remainder (
2014 IN UINT64 Dividend,
2015 IN UINT32 Divisor,
2016 OUT UINT32 *Remainder OPTIONAL
2017 );
2018
2019
2020 /**
2021 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2022 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2023
2024 This function divides the 64-bit unsigned value Dividend by the 64-bit
2025 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2026 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2027 This function returns the 64-bit unsigned quotient.
2028
2029 If Divisor is 0, then ASSERT().
2030
2031 @param Dividend A 64-bit unsigned value.
2032 @param Divisor A 64-bit unsigned value.
2033 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2034 optional and may be NULL.
2035
2036 @return Dividend / Divisor
2037
2038 **/
2039 UINT64
2040 EFIAPI
2041 DivU64x64Remainder (
2042 IN UINT64 Dividend,
2043 IN UINT64 Divisor,
2044 OUT UINT64 *Remainder OPTIONAL
2045 );
2046
2047
2048 /**
2049 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2050 64-bit signed result and a optional 64-bit signed remainder.
2051
2052 This function divides the 64-bit signed value Dividend by the 64-bit signed
2053 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2054 NULL, then the 64-bit signed remainder is returned in Remainder. This
2055 function returns the 64-bit signed quotient.
2056
2057 It is the caller's responsibility to not call this function with a Divisor of 0.
2058 If Divisor is 0, then the quotient and remainder should be assumed to be
2059 the largest negative integer.
2060
2061 If Divisor is 0, then ASSERT().
2062
2063 @param Dividend A 64-bit signed value.
2064 @param Divisor A 64-bit signed value.
2065 @param Remainder A pointer to a 64-bit signed value. This parameter is
2066 optional and may be NULL.
2067
2068 @return Dividend / Divisor
2069
2070 **/
2071 INT64
2072 EFIAPI
2073 DivS64x64Remainder (
2074 IN INT64 Dividend,
2075 IN INT64 Divisor,
2076 OUT INT64 *Remainder OPTIONAL
2077 );
2078
2079
2080 /**
2081 Reads a 16-bit value from memory that may be unaligned.
2082
2083 This function returns the 16-bit value pointed to by Buffer. The function
2084 guarantees that the read operation does not produce an alignment fault.
2085
2086 If the Buffer is NULL, then ASSERT().
2087
2088 @param Buffer Pointer to a 16-bit value that may be unaligned.
2089
2090 @return The 16-bit value read from Buffer.
2091
2092 **/
2093 UINT16
2094 EFIAPI
2095 ReadUnaligned16 (
2096 IN CONST UINT16 *Buffer
2097 );
2098
2099
2100 /**
2101 Writes a 16-bit value to memory that may be unaligned.
2102
2103 This function writes the 16-bit value specified by Value to Buffer. Value is
2104 returned. The function guarantees that the write operation does not produce
2105 an alignment fault.
2106
2107 If the Buffer is NULL, then ASSERT().
2108
2109 @param Buffer Pointer to a 16-bit value that may be unaligned.
2110 @param Value 16-bit value to write to Buffer.
2111
2112 @return The 16-bit value to write to Buffer.
2113
2114 **/
2115 UINT16
2116 EFIAPI
2117 WriteUnaligned16 (
2118 OUT UINT16 *Buffer,
2119 IN UINT16 Value
2120 );
2121
2122
2123 /**
2124 Reads a 24-bit value from memory that may be unaligned.
2125
2126 This function returns the 24-bit value pointed to by Buffer. The function
2127 guarantees that the read operation does not produce an alignment fault.
2128
2129 If the Buffer is NULL, then ASSERT().
2130
2131 @param Buffer Pointer to a 24-bit value that may be unaligned.
2132
2133 @return The 24-bit value read from Buffer.
2134
2135 **/
2136 UINT32
2137 EFIAPI
2138 ReadUnaligned24 (
2139 IN CONST UINT32 *Buffer
2140 );
2141
2142
2143 /**
2144 Writes a 24-bit value to memory that may be unaligned.
2145
2146 This function writes the 24-bit value specified by Value to Buffer. Value is
2147 returned. The function guarantees that the write operation does not produce
2148 an alignment fault.
2149
2150 If the Buffer is NULL, then ASSERT().
2151
2152 @param Buffer Pointer to a 24-bit value that may be unaligned.
2153 @param Value 24-bit value to write to Buffer.
2154
2155 @return The 24-bit value to write to Buffer.
2156
2157 **/
2158 UINT32
2159 EFIAPI
2160 WriteUnaligned24 (
2161 OUT UINT32 *Buffer,
2162 IN UINT32 Value
2163 );
2164
2165
2166 /**
2167 Reads a 32-bit value from memory that may be unaligned.
2168
2169 This function returns the 32-bit value pointed to by Buffer. The function
2170 guarantees that the read operation does not produce an alignment fault.
2171
2172 If the Buffer is NULL, then ASSERT().
2173
2174 @param Buffer Pointer to a 32-bit value that may be unaligned.
2175
2176 @return The 32-bit value read from Buffer.
2177
2178 **/
2179 UINT32
2180 EFIAPI
2181 ReadUnaligned32 (
2182 IN CONST UINT32 *Buffer
2183 );
2184
2185
2186 /**
2187 Writes a 32-bit value to memory that may be unaligned.
2188
2189 This function writes the 32-bit value specified by Value to Buffer. Value is
2190 returned. The function guarantees that the write operation does not produce
2191 an alignment fault.
2192
2193 If the Buffer is NULL, then ASSERT().
2194
2195 @param Buffer Pointer to a 32-bit value that may be unaligned.
2196 @param Value 32-bit value to write to Buffer.
2197
2198 @return The 32-bit value to write to Buffer.
2199
2200 **/
2201 UINT32
2202 EFIAPI
2203 WriteUnaligned32 (
2204 OUT UINT32 *Buffer,
2205 IN UINT32 Value
2206 );
2207
2208
2209 /**
2210 Reads a 64-bit value from memory that may be unaligned.
2211
2212 This function returns the 64-bit value pointed to by Buffer. The function
2213 guarantees that the read operation does not produce an alignment fault.
2214
2215 If the Buffer is NULL, then ASSERT().
2216
2217 @param Buffer Pointer to a 64-bit value that may be unaligned.
2218
2219 @return The 64-bit value read from Buffer.
2220
2221 **/
2222 UINT64
2223 EFIAPI
2224 ReadUnaligned64 (
2225 IN CONST UINT64 *Buffer
2226 );
2227
2228
2229 /**
2230 Writes a 64-bit value to memory that may be unaligned.
2231
2232 This function writes the 64-bit value specified by Value to Buffer. Value is
2233 returned. The function guarantees that the write operation does not produce
2234 an alignment fault.
2235
2236 If the Buffer is NULL, then ASSERT().
2237
2238 @param Buffer Pointer to a 64-bit value that may be unaligned.
2239 @param Value 64-bit value to write to Buffer.
2240
2241 @return The 64-bit value to write to Buffer.
2242
2243 **/
2244 UINT64
2245 EFIAPI
2246 WriteUnaligned64 (
2247 OUT UINT64 *Buffer,
2248 IN UINT64 Value
2249 );
2250
2251
2252 //
2253 // Bit Field Functions
2254 //
2255
2256 /**
2257 Returns a bit field from an 8-bit value.
2258
2259 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2260
2261 If 8-bit operations are not supported, then ASSERT().
2262 If StartBit is greater than 7, then ASSERT().
2263 If EndBit is greater than 7, then ASSERT().
2264 If EndBit is less than StartBit, then ASSERT().
2265
2266 @param Operand Operand on which to perform the bitfield operation.
2267 @param StartBit The ordinal of the least significant bit in the bit field.
2268 Range 0..7.
2269 @param EndBit The ordinal of the most significant bit in the bit field.
2270 Range 0..7.
2271
2272 @return The bit field read.
2273
2274 **/
2275 UINT8
2276 EFIAPI
2277 BitFieldRead8 (
2278 IN UINT8 Operand,
2279 IN UINTN StartBit,
2280 IN UINTN EndBit
2281 );
2282
2283
2284 /**
2285 Writes a bit field to an 8-bit value, and returns the result.
2286
2287 Writes Value to the bit field specified by the StartBit and the EndBit in
2288 Operand. All other bits in Operand are preserved. The new 8-bit value is
2289 returned.
2290
2291 If 8-bit operations are not supported, then ASSERT().
2292 If StartBit is greater than 7, then ASSERT().
2293 If EndBit is greater than 7, then ASSERT().
2294 If EndBit is less than StartBit, then ASSERT().
2295
2296 @param Operand Operand on which to perform the bitfield operation.
2297 @param StartBit The ordinal of the least significant bit in the bit field.
2298 Range 0..7.
2299 @param EndBit The ordinal of the most significant bit in the bit field.
2300 Range 0..7.
2301 @param Value New value of the bit field.
2302
2303 @return The new 8-bit value.
2304
2305 **/
2306 UINT8
2307 EFIAPI
2308 BitFieldWrite8 (
2309 IN UINT8 Operand,
2310 IN UINTN StartBit,
2311 IN UINTN EndBit,
2312 IN UINT8 Value
2313 );
2314
2315
2316 /**
2317 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2318 result.
2319
2320 Performs a bitwise OR between the bit field specified by StartBit
2321 and EndBit in Operand and the value specified by OrData. All other bits in
2322 Operand are preserved. The new 8-bit value is returned.
2323
2324 If 8-bit operations are not supported, then ASSERT().
2325 If StartBit is greater than 7, then ASSERT().
2326 If EndBit is greater than 7, then ASSERT().
2327 If EndBit is less than StartBit, then ASSERT().
2328
2329 @param Operand Operand on which to perform the bitfield operation.
2330 @param StartBit The ordinal of the least significant bit in the bit field.
2331 Range 0..7.
2332 @param EndBit The ordinal of the most significant bit in the bit field.
2333 Range 0..7.
2334 @param OrData The value to OR with the read value from the value
2335
2336 @return The new 8-bit value.
2337
2338 **/
2339 UINT8
2340 EFIAPI
2341 BitFieldOr8 (
2342 IN UINT8 Operand,
2343 IN UINTN StartBit,
2344 IN UINTN EndBit,
2345 IN UINT8 OrData
2346 );
2347
2348
2349 /**
2350 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2351 the result.
2352
2353 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2354 in Operand and the value specified by AndData. All other bits in Operand are
2355 preserved. The new 8-bit value is returned.
2356
2357 If 8-bit operations are not supported, then ASSERT().
2358 If StartBit is greater than 7, then ASSERT().
2359 If EndBit is greater than 7, then ASSERT().
2360 If EndBit is less than StartBit, then ASSERT().
2361
2362 @param Operand Operand on which to perform the bitfield operation.
2363 @param StartBit The ordinal of the least significant bit in the bit field.
2364 Range 0..7.
2365 @param EndBit The ordinal of the most significant bit in the bit field.
2366 Range 0..7.
2367 @param AndData The value to AND with the read value from the value.
2368
2369 @return The new 8-bit value.
2370
2371 **/
2372 UINT8
2373 EFIAPI
2374 BitFieldAnd8 (
2375 IN UINT8 Operand,
2376 IN UINTN StartBit,
2377 IN UINTN EndBit,
2378 IN UINT8 AndData
2379 );
2380
2381
2382 /**
2383 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2384 bitwise OR, and returns the result.
2385
2386 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2387 in Operand and the value specified by AndData, followed by a bitwise
2388 OR with value specified by OrData. All other bits in Operand are
2389 preserved. The new 8-bit value is returned.
2390
2391 If 8-bit operations are not supported, then ASSERT().
2392 If StartBit is greater than 7, then ASSERT().
2393 If EndBit is greater than 7, then ASSERT().
2394 If EndBit is less than StartBit, then ASSERT().
2395
2396 @param Operand Operand on which to perform the bitfield operation.
2397 @param StartBit The ordinal of the least significant bit in the bit field.
2398 Range 0..7.
2399 @param EndBit The ordinal of the most significant bit in the bit field.
2400 Range 0..7.
2401 @param AndData The value to AND with the read value from the value.
2402 @param OrData The value to OR with the result of the AND operation.
2403
2404 @return The new 8-bit value.
2405
2406 **/
2407 UINT8
2408 EFIAPI
2409 BitFieldAndThenOr8 (
2410 IN UINT8 Operand,
2411 IN UINTN StartBit,
2412 IN UINTN EndBit,
2413 IN UINT8 AndData,
2414 IN UINT8 OrData
2415 );
2416
2417
2418 /**
2419 Returns a bit field from a 16-bit value.
2420
2421 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2422
2423 If 16-bit operations are not supported, then ASSERT().
2424 If StartBit is greater than 15, then ASSERT().
2425 If EndBit is greater than 15, then ASSERT().
2426 If EndBit is less than StartBit, then ASSERT().
2427
2428 @param Operand Operand on which to perform the bitfield operation.
2429 @param StartBit The ordinal of the least significant bit in the bit field.
2430 Range 0..15.
2431 @param EndBit The ordinal of the most significant bit in the bit field.
2432 Range 0..15.
2433
2434 @return The bit field read.
2435
2436 **/
2437 UINT16
2438 EFIAPI
2439 BitFieldRead16 (
2440 IN UINT16 Operand,
2441 IN UINTN StartBit,
2442 IN UINTN EndBit
2443 );
2444
2445
2446 /**
2447 Writes a bit field to a 16-bit value, and returns the result.
2448
2449 Writes Value to the bit field specified by the StartBit and the EndBit in
2450 Operand. All other bits in Operand are preserved. The new 16-bit value is
2451 returned.
2452
2453 If 16-bit operations are not supported, then ASSERT().
2454 If StartBit is greater than 15, then ASSERT().
2455 If EndBit is greater than 15, then ASSERT().
2456 If EndBit is less than StartBit, then ASSERT().
2457
2458 @param Operand Operand on which to perform the bitfield operation.
2459 @param StartBit The ordinal of the least significant bit in the bit field.
2460 Range 0..15.
2461 @param EndBit The ordinal of the most significant bit in the bit field.
2462 Range 0..15.
2463 @param Value New value of the bit field.
2464
2465 @return The new 16-bit value.
2466
2467 **/
2468 UINT16
2469 EFIAPI
2470 BitFieldWrite16 (
2471 IN UINT16 Operand,
2472 IN UINTN StartBit,
2473 IN UINTN EndBit,
2474 IN UINT16 Value
2475 );
2476
2477
2478 /**
2479 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2480 result.
2481
2482 Performs a bitwise OR between the bit field specified by StartBit
2483 and EndBit in Operand and the value specified by OrData. All other bits in
2484 Operand are preserved. The new 16-bit value is returned.
2485
2486 If 16-bit operations are not supported, then ASSERT().
2487 If StartBit is greater than 15, then ASSERT().
2488 If EndBit is greater than 15, then ASSERT().
2489 If EndBit is less than StartBit, then ASSERT().
2490
2491 @param Operand Operand on which to perform the bitfield operation.
2492 @param StartBit The ordinal of the least significant bit in the bit field.
2493 Range 0..15.
2494 @param EndBit The ordinal of the most significant bit in the bit field.
2495 Range 0..15.
2496 @param OrData The value to OR with the read value from the value
2497
2498 @return The new 16-bit value.
2499
2500 **/
2501 UINT16
2502 EFIAPI
2503 BitFieldOr16 (
2504 IN UINT16 Operand,
2505 IN UINTN StartBit,
2506 IN UINTN EndBit,
2507 IN UINT16 OrData
2508 );
2509
2510
2511 /**
2512 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2513 the result.
2514
2515 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2516 in Operand and the value specified by AndData. All other bits in Operand are
2517 preserved. The new 16-bit value is returned.
2518
2519 If 16-bit operations are not supported, then ASSERT().
2520 If StartBit is greater than 15, then ASSERT().
2521 If EndBit is greater than 15, then ASSERT().
2522 If EndBit is less than StartBit, then ASSERT().
2523
2524 @param Operand Operand on which to perform the bitfield operation.
2525 @param StartBit The ordinal of the least significant bit in the bit field.
2526 Range 0..15.
2527 @param EndBit The ordinal of the most significant bit in the bit field.
2528 Range 0..15.
2529 @param AndData The value to AND with the read value from the value
2530
2531 @return The new 16-bit value.
2532
2533 **/
2534 UINT16
2535 EFIAPI
2536 BitFieldAnd16 (
2537 IN UINT16 Operand,
2538 IN UINTN StartBit,
2539 IN UINTN EndBit,
2540 IN UINT16 AndData
2541 );
2542
2543
2544 /**
2545 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2546 bitwise OR, and returns the result.
2547
2548 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2549 in Operand and the value specified by AndData, followed by a bitwise
2550 OR with value specified by OrData. All other bits in Operand are
2551 preserved. The new 16-bit value is returned.
2552
2553 If 16-bit operations are not supported, then ASSERT().
2554 If StartBit is greater than 15, then ASSERT().
2555 If EndBit is greater than 15, then ASSERT().
2556 If EndBit is less than StartBit, then ASSERT().
2557
2558 @param Operand Operand on which to perform the bitfield operation.
2559 @param StartBit The ordinal of the least significant bit in the bit field.
2560 Range 0..15.
2561 @param EndBit The ordinal of the most significant bit in the bit field.
2562 Range 0..15.
2563 @param AndData The value to AND with the read value from the value.
2564 @param OrData The value to OR with the result of the AND operation.
2565
2566 @return The new 16-bit value.
2567
2568 **/
2569 UINT16
2570 EFIAPI
2571 BitFieldAndThenOr16 (
2572 IN UINT16 Operand,
2573 IN UINTN StartBit,
2574 IN UINTN EndBit,
2575 IN UINT16 AndData,
2576 IN UINT16 OrData
2577 );
2578
2579
2580 /**
2581 Returns a bit field from a 32-bit value.
2582
2583 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2584
2585 If 32-bit operations are not supported, then ASSERT().
2586 If StartBit is greater than 31, then ASSERT().
2587 If EndBit is greater than 31, then ASSERT().
2588 If EndBit is less than StartBit, then ASSERT().
2589
2590 @param Operand Operand on which to perform the bitfield operation.
2591 @param StartBit The ordinal of the least significant bit in the bit field.
2592 Range 0..31.
2593 @param EndBit The ordinal of the most significant bit in the bit field.
2594 Range 0..31.
2595
2596 @return The bit field read.
2597
2598 **/
2599 UINT32
2600 EFIAPI
2601 BitFieldRead32 (
2602 IN UINT32 Operand,
2603 IN UINTN StartBit,
2604 IN UINTN EndBit
2605 );
2606
2607
2608 /**
2609 Writes a bit field to a 32-bit value, and returns the result.
2610
2611 Writes Value to the bit field specified by the StartBit and the EndBit in
2612 Operand. All other bits in Operand are preserved. The new 32-bit value is
2613 returned.
2614
2615 If 32-bit operations are not supported, then ASSERT().
2616 If StartBit is greater than 31, then ASSERT().
2617 If EndBit is greater than 31, then ASSERT().
2618 If EndBit is less than StartBit, then ASSERT().
2619
2620 @param Operand Operand on which to perform the bitfield operation.
2621 @param StartBit The ordinal of the least significant bit in the bit field.
2622 Range 0..31.
2623 @param EndBit The ordinal of the most significant bit in the bit field.
2624 Range 0..31.
2625 @param Value New value of the bit field.
2626
2627 @return The new 32-bit value.
2628
2629 **/
2630 UINT32
2631 EFIAPI
2632 BitFieldWrite32 (
2633 IN UINT32 Operand,
2634 IN UINTN StartBit,
2635 IN UINTN EndBit,
2636 IN UINT32 Value
2637 );
2638
2639
2640 /**
2641 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2642 result.
2643
2644 Performs a bitwise OR between the bit field specified by StartBit
2645 and EndBit in Operand and the value specified by OrData. All other bits in
2646 Operand are preserved. The new 32-bit value is returned.
2647
2648 If 32-bit operations are not supported, then ASSERT().
2649 If StartBit is greater than 31, then ASSERT().
2650 If EndBit is greater than 31, then ASSERT().
2651 If EndBit is less than StartBit, then ASSERT().
2652
2653 @param Operand Operand on which to perform the bitfield operation.
2654 @param StartBit The ordinal of the least significant bit in the bit field.
2655 Range 0..31.
2656 @param EndBit The ordinal of the most significant bit in the bit field.
2657 Range 0..31.
2658 @param OrData The value to OR with the read value from the value
2659
2660 @return The new 32-bit value.
2661
2662 **/
2663 UINT32
2664 EFIAPI
2665 BitFieldOr32 (
2666 IN UINT32 Operand,
2667 IN UINTN StartBit,
2668 IN UINTN EndBit,
2669 IN UINT32 OrData
2670 );
2671
2672
2673 /**
2674 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2675 the result.
2676
2677 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2678 in Operand and the value specified by AndData. All other bits in Operand are
2679 preserved. The new 32-bit value is returned.
2680
2681 If 32-bit operations are not supported, then ASSERT().
2682 If StartBit is greater than 31, then ASSERT().
2683 If EndBit is greater than 31, then ASSERT().
2684 If EndBit is less than StartBit, then ASSERT().
2685
2686 @param Operand Operand on which to perform the bitfield operation.
2687 @param StartBit The ordinal of the least significant bit in the bit field.
2688 Range 0..31.
2689 @param EndBit The ordinal of the most significant bit in the bit field.
2690 Range 0..31.
2691 @param AndData The value to AND with the read value from the value
2692
2693 @return The new 32-bit value.
2694
2695 **/
2696 UINT32
2697 EFIAPI
2698 BitFieldAnd32 (
2699 IN UINT32 Operand,
2700 IN UINTN StartBit,
2701 IN UINTN EndBit,
2702 IN UINT32 AndData
2703 );
2704
2705
2706 /**
2707 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2708 bitwise OR, and returns the result.
2709
2710 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2711 in Operand and the value specified by AndData, followed by a bitwise
2712 OR with value specified by OrData. All other bits in Operand are
2713 preserved. The new 32-bit value is returned.
2714
2715 If 32-bit operations are not supported, then ASSERT().
2716 If StartBit is greater than 31, then ASSERT().
2717 If EndBit is greater than 31, then ASSERT().
2718 If EndBit is less than StartBit, then ASSERT().
2719
2720 @param Operand Operand on which to perform the bitfield operation.
2721 @param StartBit The ordinal of the least significant bit in the bit field.
2722 Range 0..31.
2723 @param EndBit The ordinal of the most significant bit in the bit field.
2724 Range 0..31.
2725 @param AndData The value to AND with the read value from the value.
2726 @param OrData The value to OR with the result of the AND operation.
2727
2728 @return The new 32-bit value.
2729
2730 **/
2731 UINT32
2732 EFIAPI
2733 BitFieldAndThenOr32 (
2734 IN UINT32 Operand,
2735 IN UINTN StartBit,
2736 IN UINTN EndBit,
2737 IN UINT32 AndData,
2738 IN UINT32 OrData
2739 );
2740
2741
2742 /**
2743 Returns a bit field from a 64-bit value.
2744
2745 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2746
2747 If 64-bit operations are not supported, then ASSERT().
2748 If StartBit is greater than 63, then ASSERT().
2749 If EndBit is greater than 63, then ASSERT().
2750 If EndBit is less than StartBit, then ASSERT().
2751
2752 @param Operand Operand on which to perform the bitfield operation.
2753 @param StartBit The ordinal of the least significant bit in the bit field.
2754 Range 0..63.
2755 @param EndBit The ordinal of the most significant bit in the bit field.
2756 Range 0..63.
2757
2758 @return The bit field read.
2759
2760 **/
2761 UINT64
2762 EFIAPI
2763 BitFieldRead64 (
2764 IN UINT64 Operand,
2765 IN UINTN StartBit,
2766 IN UINTN EndBit
2767 );
2768
2769
2770 /**
2771 Writes a bit field to a 64-bit value, and returns the result.
2772
2773 Writes Value to the bit field specified by the StartBit and the EndBit in
2774 Operand. All other bits in Operand are preserved. The new 64-bit value is
2775 returned.
2776
2777 If 64-bit operations are not supported, then ASSERT().
2778 If StartBit is greater than 63, then ASSERT().
2779 If EndBit is greater than 63, then ASSERT().
2780 If EndBit is less than StartBit, then ASSERT().
2781
2782 @param Operand Operand on which to perform the bitfield operation.
2783 @param StartBit The ordinal of the least significant bit in the bit field.
2784 Range 0..63.
2785 @param EndBit The ordinal of the most significant bit in the bit field.
2786 Range 0..63.
2787 @param Value New value of the bit field.
2788
2789 @return The new 64-bit value.
2790
2791 **/
2792 UINT64
2793 EFIAPI
2794 BitFieldWrite64 (
2795 IN UINT64 Operand,
2796 IN UINTN StartBit,
2797 IN UINTN EndBit,
2798 IN UINT64 Value
2799 );
2800
2801
2802 /**
2803 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2804 result.
2805
2806 Performs a bitwise OR between the bit field specified by StartBit
2807 and EndBit in Operand and the value specified by OrData. All other bits in
2808 Operand are preserved. The new 64-bit value is returned.
2809
2810 If 64-bit operations are not supported, then ASSERT().
2811 If StartBit is greater than 63, then ASSERT().
2812 If EndBit is greater than 63, then ASSERT().
2813 If EndBit is less than StartBit, then ASSERT().
2814
2815 @param Operand Operand on which to perform the bitfield operation.
2816 @param StartBit The ordinal of the least significant bit in the bit field.
2817 Range 0..63.
2818 @param EndBit The ordinal of the most significant bit in the bit field.
2819 Range 0..63.
2820 @param OrData The value to OR with the read value from the value
2821
2822 @return The new 64-bit value.
2823
2824 **/
2825 UINT64
2826 EFIAPI
2827 BitFieldOr64 (
2828 IN UINT64 Operand,
2829 IN UINTN StartBit,
2830 IN UINTN EndBit,
2831 IN UINT64 OrData
2832 );
2833
2834
2835 /**
2836 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2837 the result.
2838
2839 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2840 in Operand and the value specified by AndData. All other bits in Operand are
2841 preserved. The new 64-bit value is returned.
2842
2843 If 64-bit operations are not supported, then ASSERT().
2844 If StartBit is greater than 63, then ASSERT().
2845 If EndBit is greater than 63, then ASSERT().
2846 If EndBit is less than StartBit, then ASSERT().
2847
2848 @param Operand Operand on which to perform the bitfield operation.
2849 @param StartBit The ordinal of the least significant bit in the bit field.
2850 Range 0..63.
2851 @param EndBit The ordinal of the most significant bit in the bit field.
2852 Range 0..63.
2853 @param AndData The value to AND with the read value from the value
2854
2855 @return The new 64-bit value.
2856
2857 **/
2858 UINT64
2859 EFIAPI
2860 BitFieldAnd64 (
2861 IN UINT64 Operand,
2862 IN UINTN StartBit,
2863 IN UINTN EndBit,
2864 IN UINT64 AndData
2865 );
2866
2867
2868 /**
2869 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2870 bitwise OR, and returns the result.
2871
2872 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2873 in Operand and the value specified by AndData, followed by a bitwise
2874 OR with value specified by OrData. All other bits in Operand are
2875 preserved. The new 64-bit value is returned.
2876
2877 If 64-bit operations are not supported, then ASSERT().
2878 If StartBit is greater than 63, then ASSERT().
2879 If EndBit is greater than 63, then ASSERT().
2880 If EndBit is less than StartBit, then ASSERT().
2881
2882 @param Operand Operand on which to perform the bitfield operation.
2883 @param StartBit The ordinal of the least significant bit in the bit field.
2884 Range 0..63.
2885 @param EndBit The ordinal of the most significant bit in the bit field.
2886 Range 0..63.
2887 @param AndData The value to AND with the read value from the value.
2888 @param OrData The value to OR with the result of the AND operation.
2889
2890 @return The new 64-bit value.
2891
2892 **/
2893 UINT64
2894 EFIAPI
2895 BitFieldAndThenOr64 (
2896 IN UINT64 Operand,
2897 IN UINTN StartBit,
2898 IN UINTN EndBit,
2899 IN UINT64 AndData,
2900 IN UINT64 OrData
2901 );
2902
2903 //
2904 // Base Library Checksum Functions
2905 //
2906
2907 /**
2908 Returns the sum of all elements in a buffer in unit of UINT8.
2909 During calculation, the carry bits are dropped.
2910
2911 This function calculates the sum of all elements in a buffer
2912 in unit of UINT8. The carry bits in result of addition are dropped.
2913 The result is returned as UINT8. If Length is Zero, then Zero is
2914 returned.
2915
2916 If Buffer is NULL, then ASSERT().
2917 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2918
2919 @param Buffer Pointer to the buffer to carry out the sum operation.
2920 @param Length The size, in bytes, of Buffer.
2921
2922 @return Sum The sum of Buffer with carry bits dropped during additions.
2923
2924 **/
2925 UINT8
2926 EFIAPI
2927 CalculateSum8 (
2928 IN CONST UINT8 *Buffer,
2929 IN UINTN Length
2930 );
2931
2932
2933 /**
2934 Returns the two's complement checksum of all elements in a buffer
2935 of 8-bit values.
2936
2937 This function first calculates the sum of the 8-bit values in the
2938 buffer specified by Buffer and Length. The carry bits in the result
2939 of addition are dropped. Then, the two's complement of the sum is
2940 returned. If Length is 0, then 0 is returned.
2941
2942 If Buffer is NULL, then ASSERT().
2943 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2944
2945 @param Buffer Pointer to the buffer to carry out the checksum operation.
2946 @param Length The size, in bytes, of Buffer.
2947
2948 @return Checksum The 2's complement checksum of Buffer.
2949
2950 **/
2951 UINT8
2952 EFIAPI
2953 CalculateCheckSum8 (
2954 IN CONST UINT8 *Buffer,
2955 IN UINTN Length
2956 );
2957
2958
2959 /**
2960 Returns the sum of all elements in a buffer of 16-bit values. During
2961 calculation, the carry bits are dropped.
2962
2963 This function calculates the sum of the 16-bit values in the buffer
2964 specified by Buffer and Length. The carry bits in result of addition are dropped.
2965 The 16-bit result is returned. If Length is 0, then 0 is returned.
2966
2967 If Buffer is NULL, then ASSERT().
2968 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
2969 If Length is not aligned on a 16-bit boundary, then ASSERT().
2970 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2971
2972 @param Buffer Pointer to the buffer to carry out the sum operation.
2973 @param Length The size, in bytes, of Buffer.
2974
2975 @return Sum The sum of Buffer with carry bits dropped during additions.
2976
2977 **/
2978 UINT16
2979 EFIAPI
2980 CalculateSum16 (
2981 IN CONST UINT16 *Buffer,
2982 IN UINTN Length
2983 );
2984
2985
2986 /**
2987 Returns the two's complement checksum of all elements in a buffer of
2988 16-bit values.
2989
2990 This function first calculates the sum of the 16-bit values in the buffer
2991 specified by Buffer and Length. The carry bits in the result of addition
2992 are dropped. Then, the two's complement of the sum is returned. If Length
2993 is 0, then 0 is returned.
2994
2995 If Buffer is NULL, then ASSERT().
2996 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
2997 If Length is not aligned on a 16-bit boundary, then ASSERT().
2998 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2999
3000 @param Buffer Pointer to the buffer to carry out the checksum operation.
3001 @param Length The size, in bytes, of Buffer.
3002
3003 @return Checksum The 2's complement checksum of Buffer.
3004
3005 **/
3006 UINT16
3007 EFIAPI
3008 CalculateCheckSum16 (
3009 IN CONST UINT16 *Buffer,
3010 IN UINTN Length
3011 );
3012
3013
3014 /**
3015 Returns the sum of all elements in a buffer of 32-bit values. During
3016 calculation, the carry bits are dropped.
3017
3018 This function calculates the sum of the 32-bit values in the buffer
3019 specified by Buffer and Length. The carry bits in result of addition are dropped.
3020 The 32-bit result is returned. If Length is 0, then 0 is returned.
3021
3022 If Buffer is NULL, then ASSERT().
3023 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3024 If Length is not aligned on a 32-bit boundary, then ASSERT().
3025 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3026
3027 @param Buffer Pointer to the buffer to carry out the sum operation.
3028 @param Length The size, in bytes, of Buffer.
3029
3030 @return Sum The sum of Buffer with carry bits dropped during additions.
3031
3032 **/
3033 UINT32
3034 EFIAPI
3035 CalculateSum32 (
3036 IN CONST UINT32 *Buffer,
3037 IN UINTN Length
3038 );
3039
3040
3041 /**
3042 Returns the two's complement checksum of all elements in a buffer of
3043 32-bit values.
3044
3045 This function first calculates the sum of the 32-bit values in the buffer
3046 specified by Buffer and Length. The carry bits in the result of addition
3047 are dropped. Then, the two's complement of the sum is returned. If Length
3048 is 0, then 0 is returned.
3049
3050 If Buffer is NULL, then ASSERT().
3051 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3052 If Length is not aligned on a 32-bit boundary, then ASSERT().
3053 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3054
3055 @param Buffer Pointer to the buffer to carry out the checksum operation.
3056 @param Length The size, in bytes, of Buffer.
3057
3058 @return Checksum The 2's complement checksum of Buffer.
3059
3060 **/
3061 UINT32
3062 EFIAPI
3063 CalculateCheckSum32 (
3064 IN CONST UINT32 *Buffer,
3065 IN UINTN Length
3066 );
3067
3068
3069 /**
3070 Returns the sum of all elements in a buffer of 64-bit values. During
3071 calculation, the carry bits are dropped.
3072
3073 This function calculates the sum of the 64-bit values in the buffer
3074 specified by Buffer and Length. The carry bits in result of addition are dropped.
3075 The 64-bit result is returned. If Length is 0, then 0 is returned.
3076
3077 If Buffer is NULL, then ASSERT().
3078 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3079 If Length is not aligned on a 64-bit boundary, then ASSERT().
3080 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3081
3082 @param Buffer Pointer to the buffer to carry out the sum operation.
3083 @param Length The size, in bytes, of Buffer.
3084
3085 @return Sum The sum of Buffer with carry bits dropped during additions.
3086
3087 **/
3088 UINT64
3089 EFIAPI
3090 CalculateSum64 (
3091 IN CONST UINT64 *Buffer,
3092 IN UINTN Length
3093 );
3094
3095
3096 /**
3097 Returns the two's complement checksum of all elements in a buffer of
3098 64-bit values.
3099
3100 This function first calculates the sum of the 64-bit values in the buffer
3101 specified by Buffer and Length. The carry bits in the result of addition
3102 are dropped. Then, the two's complement of the sum is returned. If Length
3103 is 0, then 0 is returned.
3104
3105 If Buffer is NULL, then ASSERT().
3106 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3107 If Length is not aligned on a 64-bit boundary, then ASSERT().
3108 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3109
3110 @param Buffer Pointer to the buffer to carry out the checksum operation.
3111 @param Length The size, in bytes, of Buffer.
3112
3113 @return Checksum The 2's complement checksum of Buffer.
3114
3115 **/
3116 UINT64
3117 EFIAPI
3118 CalculateCheckSum64 (
3119 IN CONST UINT64 *Buffer,
3120 IN UINTN Length
3121 );
3122
3123
3124 //
3125 // Base Library CPU Functions
3126 //
3127
3128 /**
3129 Function entry point used when a stack switch is requested with SwitchStack()
3130
3131 @param Context1 Context1 parameter passed into SwitchStack().
3132 @param Context2 Context2 parameter passed into SwitchStack().
3133
3134 **/
3135 typedef
3136 VOID
3137 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3138 IN VOID *Context1, OPTIONAL
3139 IN VOID *Context2 OPTIONAL
3140 );
3141
3142
3143 /**
3144 Used to serialize load and store operations.
3145
3146 All loads and stores that proceed calls to this function are guaranteed to be
3147 globally visible when this function returns.
3148
3149 **/
3150 VOID
3151 EFIAPI
3152 MemoryFence (
3153 VOID
3154 );
3155
3156
3157 /**
3158 Saves the current CPU context that can be restored with a call to LongJump()
3159 and returns 0.
3160
3161 Saves the current CPU context in the buffer specified by JumpBuffer and
3162 returns 0. The initial call to SetJump() must always return 0. Subsequent
3163 calls to LongJump() cause a non-zero value to be returned by SetJump().
3164
3165 If JumpBuffer is NULL, then ASSERT().
3166 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3167
3168 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3169 The same structure must never be used for more than one CPU architecture context.
3170 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3171 SetJump()/LongJump() is not currently supported for the EBC processor type.
3172
3173 @param JumpBuffer A pointer to CPU context buffer.
3174
3175 @retval 0 Indicates a return from SetJump().
3176
3177 **/
3178 UINTN
3179 EFIAPI
3180 SetJump (
3181 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3182 );
3183
3184
3185 /**
3186 Restores the CPU context that was saved with SetJump().
3187
3188 Restores the CPU context from the buffer specified by JumpBuffer. This
3189 function never returns to the caller. Instead is resumes execution based on
3190 the state of JumpBuffer.
3191
3192 If JumpBuffer is NULL, then ASSERT().
3193 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3194 If Value is 0, then ASSERT().
3195
3196 @param JumpBuffer A pointer to CPU context buffer.
3197 @param Value The value to return when the SetJump() context is
3198 restored and must be non-zero.
3199
3200 **/
3201 VOID
3202 EFIAPI
3203 LongJump (
3204 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3205 IN UINTN Value
3206 );
3207
3208
3209 /**
3210 Enables CPU interrupts.
3211
3212 **/
3213 VOID
3214 EFIAPI
3215 EnableInterrupts (
3216 VOID
3217 );
3218
3219
3220 /**
3221 Disables CPU interrupts.
3222
3223 **/
3224 VOID
3225 EFIAPI
3226 DisableInterrupts (
3227 VOID
3228 );
3229
3230
3231 /**
3232 Disables CPU interrupts and returns the interrupt state prior to the disable
3233 operation.
3234
3235 @retval TRUE CPU interrupts were enabled on entry to this call.
3236 @retval FALSE CPU interrupts were disabled on entry to this call.
3237
3238 **/
3239 BOOLEAN
3240 EFIAPI
3241 SaveAndDisableInterrupts (
3242 VOID
3243 );
3244
3245
3246 /**
3247 Enables CPU interrupts for the smallest window required to capture any
3248 pending interrupts.
3249
3250 **/
3251 VOID
3252 EFIAPI
3253 EnableDisableInterrupts (
3254 VOID
3255 );
3256
3257
3258 /**
3259 Retrieves the current CPU interrupt state.
3260
3261 Returns TRUE is interrupts are currently enabled. Otherwise
3262 returns FALSE.
3263
3264 @retval TRUE CPU interrupts are enabled.
3265 @retval FALSE CPU interrupts are disabled.
3266
3267 **/
3268 BOOLEAN
3269 EFIAPI
3270 GetInterruptState (
3271 VOID
3272 );
3273
3274
3275 /**
3276 Set the current CPU interrupt state.
3277
3278 Sets the current CPU interrupt state to the state specified by
3279 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3280 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3281 returned.
3282
3283 @param InterruptState TRUE if interrupts should enabled. FALSE if
3284 interrupts should be disabled.
3285
3286 @return InterruptState
3287
3288 **/
3289 BOOLEAN
3290 EFIAPI
3291 SetInterruptState (
3292 IN BOOLEAN InterruptState
3293 );
3294
3295
3296 /**
3297 Requests CPU to pause for a short period of time.
3298
3299 Requests CPU to pause for a short period of time. Typically used in MP
3300 systems to prevent memory starvation while waiting for a spin lock.
3301
3302 **/
3303 VOID
3304 EFIAPI
3305 CpuPause (
3306 VOID
3307 );
3308
3309
3310 /**
3311 Transfers control to a function starting with a new stack.
3312
3313 Transfers control to the function specified by EntryPoint using the
3314 new stack specified by NewStack and passing in the parameters specified
3315 by Context1 and Context2. Context1 and Context2 are optional and may
3316 be NULL. The function EntryPoint must never return. This function
3317 supports a variable number of arguments following the NewStack parameter.
3318 These additional arguments are ignored on IA-32, x64, and EBC architectures.
3319 Itanium processors expect one additional parameter of type VOID * that specifies
3320 the new backing store pointer.
3321
3322 If EntryPoint is NULL, then ASSERT().
3323 If NewStack is NULL, then ASSERT().
3324
3325 @param EntryPoint A pointer to function to call with the new stack.
3326 @param Context1 A pointer to the context to pass into the EntryPoint
3327 function.
3328 @param Context2 A pointer to the context to pass into the EntryPoint
3329 function.
3330 @param NewStack A pointer to the new stack to use for the EntryPoint
3331 function.
3332 @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures.
3333 For Itanium processors, this variable argument list is expected to contain
3334 a single parameter of type VOID * that specifies the new backing
3335 store pointer.
3336
3337
3338 **/
3339 VOID
3340 EFIAPI
3341 SwitchStack (
3342 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3343 IN VOID *Context1, OPTIONAL
3344 IN VOID *Context2, OPTIONAL
3345 IN VOID *NewStack,
3346 ...
3347 );
3348
3349
3350 /**
3351 Generates a breakpoint on the CPU.
3352
3353 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3354 that code can resume normal execution after the breakpoint.
3355
3356 **/
3357 VOID
3358 EFIAPI
3359 CpuBreakpoint (
3360 VOID
3361 );
3362
3363
3364 /**
3365 Executes an infinite loop.
3366
3367 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3368 past the loop and the code that follows the loop must execute properly. This
3369 implies that the infinite loop must not cause the code that follow it to be
3370 optimized away.
3371
3372 **/
3373 VOID
3374 EFIAPI
3375 CpuDeadLoop (
3376 VOID
3377 );
3378
3379 #if defined (MDE_CPU_IPF)
3380
3381 /**
3382 Flush a range of cache lines in the cache coherency domain of the calling
3383 CPU.
3384
3385 Flushes the cache lines specified by Address and Length. If Address is not aligned
3386 on a cache line boundary, then entire cache line containing Address is flushed.
3387 If Address + Length is not aligned on a cache line boundary, then the entire cache
3388 line containing Address + Length - 1 is flushed. This function may choose to flush
3389 the entire cache if that is more efficient than flushing the specified range. If
3390 Length is 0, the no cache lines are flushed. Address is returned.
3391 This function is only available on Itanium processors.
3392
3393 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3394
3395 @param Address The base address of the instruction lines to invalidate. If
3396 the CPU is in a physical addressing mode, then Address is a
3397 physical address. If the CPU is in a virtual addressing mode,
3398 then Address is a virtual address.
3399
3400 @param Length The number of bytes to invalidate from the instruction cache.
3401
3402 @return Address.
3403
3404 **/
3405 VOID *
3406 EFIAPI
3407 AsmFlushCacheRange (
3408 IN VOID *Address,
3409 IN UINTN Length
3410 );
3411
3412
3413 /**
3414 Executes a FC instruction
3415 Executes a FC instruction on the cache line specified by Address.
3416 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3417 An implementation may flush a larger region. This function is only available on Itanium processors.
3418
3419 @param Address The Address of cache line to be flushed.
3420
3421 @return The address of FC instruction executed.
3422
3423 **/
3424 UINT64
3425 EFIAPI
3426 AsmFc (
3427 IN UINT64 Address
3428 );
3429
3430
3431 /**
3432 Executes a FC.I instruction.
3433 Executes a FC.I instruction on the cache line specified by Address.
3434 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3435 An implementation may flush a larger region. This function is only available on Itanium processors.
3436
3437 @param Address The Address of cache line to be flushed.
3438
3439 @return The address of FC.I instruction executed.
3440
3441 **/
3442 UINT64
3443 EFIAPI
3444 AsmFci (
3445 IN UINT64 Address
3446 );
3447
3448
3449 /**
3450 Reads the current value of a Processor Identifier Register (CPUID).
3451
3452 Reads and returns the current value of Processor Identifier Register specified by Index.
3453 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3454 registers) is determined by CPUID [3] bits {7:0}.
3455 No parameter checking is performed on Index. If the Index value is beyond the
3456 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3457 must either guarantee that Index is valid, or the caller must set up fault handlers to
3458 catch the faults. This function is only available on Itanium processors.
3459
3460 @param Index The 8-bit Processor Identifier Register index to read.
3461
3462 @return The current value of Processor Identifier Register specified by Index.
3463
3464 **/
3465 UINT64
3466 EFIAPI
3467 AsmReadCpuid (
3468 IN UINT8 Index
3469 );
3470
3471
3472 /**
3473 Reads the current value of 64-bit Processor Status Register (PSR).
3474 This function is only available on Itanium processors.
3475
3476 @return The current value of PSR.
3477
3478 **/
3479 UINT64
3480 EFIAPI
3481 AsmReadPsr (
3482 VOID
3483 );
3484
3485
3486 /**
3487 Writes the current value of 64-bit Processor Status Register (PSR).
3488
3489 No parameter checking is performed on Value. All bits of Value corresponding to
3490 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3491 The caller must either guarantee that Value is valid, or the caller must set up
3492 fault handlers to catch the faults. This function is only available on Itanium processors.
3493
3494 @param Value The 64-bit value to write to PSR.
3495
3496 @return The 64-bit value written to the PSR.
3497
3498 **/
3499 UINT64
3500 EFIAPI
3501 AsmWritePsr (
3502 IN UINT64 Value
3503 );
3504
3505
3506 /**
3507 Reads the current value of 64-bit Kernel Register #0 (KR0).
3508
3509 Reads and returns the current value of KR0.
3510 This function is only available on Itanium processors.
3511
3512 @return The current value of KR0.
3513
3514 **/
3515 UINT64
3516 EFIAPI
3517 AsmReadKr0 (
3518 VOID
3519 );
3520
3521
3522 /**
3523 Reads the current value of 64-bit Kernel Register #1 (KR1).
3524
3525 Reads and returns the current value of KR1.
3526 This function is only available on Itanium processors.
3527
3528 @return The current value of KR1.
3529
3530 **/
3531 UINT64
3532 EFIAPI
3533 AsmReadKr1 (
3534 VOID
3535 );
3536
3537
3538 /**
3539 Reads the current value of 64-bit Kernel Register #2 (KR2).
3540
3541 Reads and returns the current value of KR2.
3542 This function is only available on Itanium processors.
3543
3544 @return The current value of KR2.
3545
3546 **/
3547 UINT64
3548 EFIAPI
3549 AsmReadKr2 (
3550 VOID
3551 );
3552
3553
3554 /**
3555 Reads the current value of 64-bit Kernel Register #3 (KR3).
3556
3557 Reads and returns the current value of KR3.
3558 This function is only available on Itanium processors.
3559
3560 @return The current value of KR3.
3561
3562 **/
3563 UINT64
3564 EFIAPI
3565 AsmReadKr3 (
3566 VOID
3567 );
3568
3569
3570 /**
3571 Reads the current value of 64-bit Kernel Register #4 (KR4).
3572
3573 Reads and returns the current value of KR4.
3574 This function is only available on Itanium processors.
3575
3576 @return The current value of KR4.
3577
3578 **/
3579 UINT64
3580 EFIAPI
3581 AsmReadKr4 (
3582 VOID
3583 );
3584
3585
3586 /**
3587 Reads the current value of 64-bit Kernel Register #5 (KR5).
3588
3589 Reads and returns the current value of KR5.
3590 This function is only available on Itanium processors.
3591
3592 @return The current value of KR5.
3593
3594 **/
3595 UINT64
3596 EFIAPI
3597 AsmReadKr5 (
3598 VOID
3599 );
3600
3601
3602 /**
3603 Reads the current value of 64-bit Kernel Register #6 (KR6).
3604
3605 Reads and returns the current value of KR6.
3606 This function is only available on Itanium processors.
3607
3608 @return The current value of KR6.
3609
3610 **/
3611 UINT64
3612 EFIAPI
3613 AsmReadKr6 (
3614 VOID
3615 );
3616
3617
3618 /**
3619 Reads the current value of 64-bit Kernel Register #7 (KR7).
3620
3621 Reads and returns the current value of KR7.
3622 This function is only available on Itanium processors.
3623
3624 @return The current value of KR7.
3625
3626 **/
3627 UINT64
3628 EFIAPI
3629 AsmReadKr7 (
3630 VOID
3631 );
3632
3633
3634 /**
3635 Write the current value of 64-bit Kernel Register #0 (KR0).
3636
3637 Writes the current value of KR0. The 64-bit value written to
3638 the KR0 is returned. This function is only available on Itanium processors.
3639
3640 @param Value The 64-bit value to write to KR0.
3641
3642 @return The 64-bit value written to the KR0.
3643
3644 **/
3645 UINT64
3646 EFIAPI
3647 AsmWriteKr0 (
3648 IN UINT64 Value
3649 );
3650
3651
3652 /**
3653 Write the current value of 64-bit Kernel Register #1 (KR1).
3654
3655 Writes the current value of KR1. The 64-bit value written to
3656 the KR1 is returned. This function is only available on Itanium processors.
3657
3658 @param Value The 64-bit value to write to KR1.
3659
3660 @return The 64-bit value written to the KR1.
3661
3662 **/
3663 UINT64
3664 EFIAPI
3665 AsmWriteKr1 (
3666 IN UINT64 Value
3667 );
3668
3669
3670 /**
3671 Write the current value of 64-bit Kernel Register #2 (KR2).
3672
3673 Writes the current value of KR2. The 64-bit value written to
3674 the KR2 is returned. This function is only available on Itanium processors.
3675
3676 @param Value The 64-bit value to write to KR2.
3677
3678 @return The 64-bit value written to the KR2.
3679
3680 **/
3681 UINT64
3682 EFIAPI
3683 AsmWriteKr2 (
3684 IN UINT64 Value
3685 );
3686
3687
3688 /**
3689 Write the current value of 64-bit Kernel Register #3 (KR3).
3690
3691 Writes the current value of KR3. The 64-bit value written to
3692 the KR3 is returned. This function is only available on Itanium processors.
3693
3694 @param Value The 64-bit value to write to KR3.
3695
3696 @return The 64-bit value written to the KR3.
3697
3698 **/
3699 UINT64
3700 EFIAPI
3701 AsmWriteKr3 (
3702 IN UINT64 Value
3703 );
3704
3705
3706 /**
3707 Write the current value of 64-bit Kernel Register #4 (KR4).
3708
3709 Writes the current value of KR4. The 64-bit value written to
3710 the KR4 is returned. This function is only available on Itanium processors.
3711
3712 @param Value The 64-bit value to write to KR4.
3713
3714 @return The 64-bit value written to the KR4.
3715
3716 **/
3717 UINT64
3718 EFIAPI
3719 AsmWriteKr4 (
3720 IN UINT64 Value
3721 );
3722
3723
3724 /**
3725 Write the current value of 64-bit Kernel Register #5 (KR5).
3726
3727 Writes the current value of KR5. The 64-bit value written to
3728 the KR5 is returned. This function is only available on Itanium processors.
3729
3730 @param Value The 64-bit value to write to KR5.
3731
3732 @return The 64-bit value written to the KR5.
3733
3734 **/
3735 UINT64
3736 EFIAPI
3737 AsmWriteKr5 (
3738 IN UINT64 Value
3739 );
3740
3741
3742 /**
3743 Write the current value of 64-bit Kernel Register #6 (KR6).
3744
3745 Writes the current value of KR6. The 64-bit value written to
3746 the KR6 is returned. This function is only available on Itanium processors.
3747
3748 @param Value The 64-bit value to write to KR6.
3749
3750 @return The 64-bit value written to the KR6.
3751
3752 **/
3753 UINT64
3754 EFIAPI
3755 AsmWriteKr6 (
3756 IN UINT64 Value
3757 );
3758
3759
3760 /**
3761 Write the current value of 64-bit Kernel Register #7 (KR7).
3762
3763 Writes the current value of KR7. The 64-bit value written to
3764 the KR7 is returned. This function is only available on Itanium processors.
3765
3766 @param Value The 64-bit value to write to KR7.
3767
3768 @return The 64-bit value written to the KR7.
3769
3770 **/
3771 UINT64
3772 EFIAPI
3773 AsmWriteKr7 (
3774 IN UINT64 Value
3775 );
3776
3777
3778 /**
3779 Reads the current value of Interval Timer Counter Register (ITC).
3780
3781 Reads and returns the current value of ITC.
3782 This function is only available on Itanium processors.
3783
3784 @return The current value of ITC.
3785
3786 **/
3787 UINT64
3788 EFIAPI
3789 AsmReadItc (
3790 VOID
3791 );
3792
3793
3794 /**
3795 Reads the current value of Interval Timer Vector Register (ITV).
3796
3797 Reads and returns the current value of ITV.
3798 This function is only available on Itanium processors.
3799
3800 @return The current value of ITV.
3801
3802 **/
3803 UINT64
3804 EFIAPI
3805 AsmReadItv (
3806 VOID
3807 );
3808
3809
3810 /**
3811 Reads the current value of Interval Timer Match Register (ITM).
3812
3813 Reads and returns the current value of ITM.
3814 This function is only available on Itanium processors.
3815
3816 @return The current value of ITM.
3817 **/
3818 UINT64
3819 EFIAPI
3820 AsmReadItm (
3821 VOID
3822 );
3823
3824
3825 /**
3826 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3827
3828 Writes the current value of ITC. The 64-bit value written to the ITC is returned.
3829 This function is only available on Itanium processors.
3830
3831 @param Value The 64-bit value to write to ITC.
3832
3833 @return The 64-bit value written to the ITC.
3834
3835 **/
3836 UINT64
3837 EFIAPI
3838 AsmWriteItc (
3839 IN UINT64 Value
3840 );
3841
3842
3843 /**
3844 Writes the current value of 64-bit Interval Timer Match Register (ITM).
3845
3846 Writes the current value of ITM. The 64-bit value written to the ITM is returned.
3847 This function is only available on Itanium processors.
3848
3849 @param Value The 64-bit value to write to ITM.
3850
3851 @return The 64-bit value written to the ITM.
3852
3853 **/
3854 UINT64
3855 EFIAPI
3856 AsmWriteItm (
3857 IN UINT64 Value
3858 );
3859
3860
3861 /**
3862 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3863
3864 Writes the current value of ITV. The 64-bit value written to the ITV is returned.
3865 No parameter checking is performed on Value. All bits of Value corresponding to
3866 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3867 The caller must either guarantee that Value is valid, or the caller must set up
3868 fault handlers to catch the faults.
3869 This function is only available on Itanium processors.
3870
3871 @param Value The 64-bit value to write to ITV.
3872
3873 @return The 64-bit value written to the ITV.
3874
3875 **/
3876 UINT64
3877 EFIAPI
3878 AsmWriteItv (
3879 IN UINT64 Value
3880 );
3881
3882
3883 /**
3884 Reads the current value of Default Control Register (DCR).
3885
3886 Reads and returns the current value of DCR. This function is only available on Itanium processors.
3887
3888 @return The current value of DCR.
3889
3890 **/
3891 UINT64
3892 EFIAPI
3893 AsmReadDcr (
3894 VOID
3895 );
3896
3897
3898 /**
3899 Reads the current value of Interruption Vector Address Register (IVA).
3900
3901 Reads and returns the current value of IVA. This function is only available on Itanium processors.
3902
3903 @return The current value of IVA.
3904 **/
3905 UINT64
3906 EFIAPI
3907 AsmReadIva (
3908 VOID
3909 );
3910
3911
3912 /**
3913 Reads the current value of Page Table Address Register (PTA).
3914
3915 Reads and returns the current value of PTA. This function is only available on Itanium processors.
3916
3917 @return The current value of PTA.
3918
3919 **/
3920 UINT64
3921 EFIAPI
3922 AsmReadPta (
3923 VOID
3924 );
3925
3926
3927 /**
3928 Writes the current value of 64-bit Default Control Register (DCR).
3929
3930 Writes the current value of DCR. The 64-bit value written to the DCR is returned.
3931 No parameter checking is performed on Value. All bits of Value corresponding to
3932 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3933 The caller must either guarantee that Value is valid, or the caller must set up
3934 fault handlers to catch the faults.
3935 This function is only available on Itanium processors.
3936
3937 @param Value The 64-bit value to write to DCR.
3938
3939 @return The 64-bit value written to the DCR.
3940
3941 **/
3942 UINT64
3943 EFIAPI
3944 AsmWriteDcr (
3945 IN UINT64 Value
3946 );
3947
3948
3949 /**
3950 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
3951
3952 Writes the current value of IVA. The 64-bit value written to the IVA is returned.
3953 The size of vector table is 32 K bytes and is 32 K bytes aligned
3954 the low 15 bits of Value is ignored when written.
3955 This function is only available on Itanium processors.
3956
3957 @param Value The 64-bit value to write to IVA.
3958
3959 @return The 64-bit value written to the IVA.
3960
3961 **/
3962 UINT64
3963 EFIAPI
3964 AsmWriteIva (
3965 IN UINT64 Value
3966 );
3967
3968
3969 /**
3970 Writes the current value of 64-bit Page Table Address Register (PTA).
3971
3972 Writes the current value of PTA. The 64-bit value written to the PTA is returned.
3973 No parameter checking is performed on Value. All bits of Value corresponding to
3974 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
3975 The caller must either guarantee that Value is valid, or the caller must set up
3976 fault handlers to catch the faults.
3977 This function is only available on Itanium processors.
3978
3979 @param Value The 64-bit value to write to PTA.
3980
3981 @return The 64-bit value written to the PTA.
3982 **/
3983 UINT64
3984 EFIAPI
3985 AsmWritePta (
3986 IN UINT64 Value
3987 );
3988
3989
3990 /**
3991 Reads the current value of Local Interrupt ID Register (LID).
3992
3993 Reads and returns the current value of LID. This function is only available on Itanium processors.
3994
3995 @return The current value of LID.
3996
3997 **/
3998 UINT64
3999 EFIAPI
4000 AsmReadLid (
4001 VOID
4002 );
4003
4004
4005 /**
4006 Reads the current value of External Interrupt Vector Register (IVR).
4007
4008 Reads and returns the current value of IVR. This function is only available on Itanium processors.
4009
4010 @return The current value of IVR.
4011
4012 **/
4013 UINT64
4014 EFIAPI
4015 AsmReadIvr (
4016 VOID
4017 );
4018
4019
4020 /**
4021 Reads the current value of Task Priority Register (TPR).
4022
4023 Reads and returns the current value of TPR. This function is only available on Itanium processors.
4024
4025 @return The current value of TPR.
4026
4027 **/
4028 UINT64
4029 EFIAPI
4030 AsmReadTpr (
4031 VOID
4032 );
4033
4034
4035 /**
4036 Reads the current value of External Interrupt Request Register #0 (IRR0).
4037
4038 Reads and returns the current value of IRR0. This function is only available on Itanium processors.
4039
4040 @return The current value of IRR0.
4041
4042 **/
4043 UINT64
4044 EFIAPI
4045 AsmReadIrr0 (
4046 VOID
4047 );
4048
4049
4050 /**
4051 Reads the current value of External Interrupt Request Register #1 (IRR1).
4052
4053 Reads and returns the current value of IRR1. This function is only available on Itanium processors.
4054
4055 @return The current value of IRR1.
4056
4057 **/
4058 UINT64
4059 EFIAPI
4060 AsmReadIrr1 (
4061 VOID
4062 );
4063
4064
4065 /**
4066 Reads the current value of External Interrupt Request Register #2 (IRR2).
4067
4068 Reads and returns the current value of IRR2. This function is only available on Itanium processors.
4069
4070 @return The current value of IRR2.
4071
4072 **/
4073 UINT64
4074 EFIAPI
4075 AsmReadIrr2 (
4076 VOID
4077 );
4078
4079
4080 /**
4081 Reads the current value of External Interrupt Request Register #3 (IRR3).
4082
4083 Reads and returns the current value of IRR3. This function is only available on Itanium processors.
4084
4085 @return The current value of IRR3.
4086
4087 **/
4088 UINT64
4089 EFIAPI
4090 AsmReadIrr3 (
4091 VOID
4092 );
4093
4094
4095 /**
4096 Reads the current value of Performance Monitor Vector Register (PMV).
4097
4098 Reads and returns the current value of PMV. This function is only available on Itanium processors.
4099
4100 @return The current value of PMV.
4101
4102 **/
4103 UINT64
4104 EFIAPI
4105 AsmReadPmv (
4106 VOID
4107 );
4108
4109
4110 /**
4111 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4112
4113 Reads and returns the current value of CMCV. This function is only available on Itanium processors.
4114
4115 @return The current value of CMCV.
4116
4117 **/
4118 UINT64
4119 EFIAPI
4120 AsmReadCmcv (
4121 VOID
4122 );
4123
4124
4125 /**
4126 Reads the current value of Local Redirection Register #0 (LRR0).
4127
4128 Reads and returns the current value of LRR0. This function is only available on Itanium processors.
4129
4130 @return The current value of LRR0.
4131
4132 **/
4133 UINT64
4134 EFIAPI
4135 AsmReadLrr0 (
4136 VOID
4137 );
4138
4139
4140 /**
4141 Reads the current value of Local Redirection Register #1 (LRR1).
4142
4143 Reads and returns the current value of LRR1. This function is only available on Itanium processors.
4144
4145 @return The current value of LRR1.
4146
4147 **/
4148 UINT64
4149 EFIAPI
4150 AsmReadLrr1 (
4151 VOID
4152 );
4153
4154
4155 /**
4156 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4157
4158 Writes the current value of LID. The 64-bit value written to the LID is returned.
4159 No parameter checking is performed on Value. All bits of Value corresponding to
4160 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4161 The caller must either guarantee that Value is valid, or the caller must set up
4162 fault handlers to catch the faults.
4163 This function is only available on Itanium processors.
4164
4165 @param Value The 64-bit value to write to LID.
4166
4167 @return The 64-bit value written to the LID.
4168
4169 **/
4170 UINT64
4171 EFIAPI
4172 AsmWriteLid (
4173 IN UINT64 Value
4174 );
4175
4176
4177 /**
4178 Writes the current value of 64-bit Task Priority Register (TPR).
4179
4180 Writes the current value of TPR. The 64-bit value written to the TPR is returned.
4181 No parameter checking is performed on Value. All bits of Value corresponding to
4182 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4183 The caller must either guarantee that Value is valid, or the caller must set up
4184 fault handlers to catch the faults.
4185 This function is only available on Itanium processors.
4186
4187 @param Value The 64-bit value to write to TPR.
4188
4189 @return The 64-bit value written to the TPR.
4190
4191 **/
4192 UINT64
4193 EFIAPI
4194 AsmWriteTpr (
4195 IN UINT64 Value
4196 );
4197
4198
4199 /**
4200 Performs a write operation on End OF External Interrupt Register (EOI).
4201
4202 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.
4203
4204 **/
4205 VOID
4206 EFIAPI
4207 AsmWriteEoi (
4208 VOID
4209 );
4210
4211
4212 /**
4213 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4214
4215 Writes the current value of PMV. The 64-bit value written to the PMV is returned.
4216 No parameter checking is performed on Value. All bits of Value corresponding
4217 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4218 The caller must either guarantee that Value is valid, or the caller must set up
4219 fault handlers to catch the faults.
4220 This function is only available on Itanium processors.
4221
4222 @param Value The 64-bit value to write to PMV.
4223
4224 @return The 64-bit value written to the PMV.
4225
4226 **/
4227 UINT64
4228 EFIAPI
4229 AsmWritePmv (
4230 IN UINT64 Value
4231 );
4232
4233
4234 /**
4235 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4236
4237 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned.
4238 No parameter checking is performed on Value. All bits of Value corresponding
4239 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4240 The caller must either guarantee that Value is valid, or the caller must set up
4241 fault handlers to catch the faults.
4242 This function is only available on Itanium processors.
4243
4244 @param Value The 64-bit value to write to CMCV.
4245
4246 @return The 64-bit value written to the CMCV.
4247
4248 **/
4249 UINT64
4250 EFIAPI
4251 AsmWriteCmcv (
4252 IN UINT64 Value
4253 );
4254
4255
4256 /**
4257 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4258
4259 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned.
4260 No parameter checking is performed on Value. All bits of Value corresponding
4261 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4262 The caller must either guarantee that Value is valid, or the caller must set up
4263 fault handlers to catch the faults.
4264 This function is only available on Itanium processors.
4265
4266 @param Value The 64-bit value to write to LRR0.
4267
4268 @return The 64-bit value written to the LRR0.
4269
4270 **/
4271 UINT64
4272 EFIAPI
4273 AsmWriteLrr0 (
4274 IN UINT64 Value
4275 );
4276
4277
4278 /**
4279 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4280
4281 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned.
4282 No parameter checking is performed on Value. All bits of Value corresponding
4283 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4284 The caller must either guarantee that Value is valid, or the caller must
4285 set up fault handlers to catch the faults.
4286 This function is only available on Itanium processors.
4287
4288 @param Value The 64-bit value to write to LRR1.
4289
4290 @return The 64-bit value written to the LRR1.
4291
4292 **/
4293 UINT64
4294 EFIAPI
4295 AsmWriteLrr1 (
4296 IN UINT64 Value
4297 );
4298
4299
4300 /**
4301 Reads the current value of Instruction Breakpoint Register (IBR).
4302
4303 The Instruction Breakpoint Registers are used in pairs. The even numbered
4304 registers contain breakpoint addresses, and the odd numbered registers contain
4305 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4306 on all processor models. Implemented registers are contiguous starting with
4307 register 0. No parameter checking is performed on Index, and if the Index value
4308 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4309 occur. The caller must either guarantee that Index is valid, or the caller must
4310 set up fault handlers to catch the faults.
4311 This function is only available on Itanium processors.
4312
4313 @param Index The 8-bit Instruction Breakpoint Register index to read.
4314
4315 @return The current value of Instruction Breakpoint Register specified by Index.
4316
4317 **/
4318 UINT64
4319 EFIAPI
4320 AsmReadIbr (
4321 IN UINT8 Index
4322 );
4323
4324
4325 /**
4326 Reads the current value of Data Breakpoint Register (DBR).
4327
4328 The Data Breakpoint Registers are used in pairs. The even numbered registers
4329 contain breakpoint addresses, and odd numbered registers contain breakpoint
4330 mask conditions. At least 4 data registers pairs are implemented on all processor
4331 models. Implemented registers are contiguous starting with register 0.
4332 No parameter checking is performed on Index. If the Index value is beyond
4333 the implemented DBR register range, a Reserved Register/Field fault may occur.
4334 The caller must either guarantee that Index is valid, or the caller must set up
4335 fault handlers to catch the faults.
4336 This function is only available on Itanium processors.
4337
4338 @param Index The 8-bit Data Breakpoint Register index to read.
4339
4340 @return The current value of Data Breakpoint Register specified by Index.
4341
4342 **/
4343 UINT64
4344 EFIAPI
4345 AsmReadDbr (
4346 IN UINT8 Index
4347 );
4348
4349
4350 /**
4351 Reads the current value of Performance Monitor Configuration Register (PMC).
4352
4353 All processor implementations provide at least 4 performance counters
4354 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4355 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4356 additional implementation-dependent PMC and PMD to increase the number of
4357 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4358 register set is implementation dependent. No parameter checking is performed
4359 on Index. If the Index value is beyond the implemented PMC register range,
4360 zero value will be returned.
4361 This function is only available on Itanium processors.
4362
4363 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4364
4365 @return The current value of Performance Monitor Configuration Register
4366 specified by Index.
4367
4368 **/
4369 UINT64
4370 EFIAPI
4371 AsmReadPmc (
4372 IN UINT8 Index
4373 );
4374
4375
4376 /**
4377 Reads the current value of Performance Monitor Data Register (PMD).
4378
4379 All processor implementations provide at least 4 performance counters
4380 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4381 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4382 provide additional implementation-dependent PMC and PMD to increase the number
4383 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4384 register set is implementation dependent. No parameter checking is performed
4385 on Index. If the Index value is beyond the implemented PMD register range,
4386 zero value will be returned.
4387 This function is only available on Itanium processors.
4388
4389 @param Index The 8-bit Performance Monitor Data Register index to read.
4390
4391 @return The current value of Performance Monitor Data Register specified by Index.
4392
4393 **/
4394 UINT64
4395 EFIAPI
4396 AsmReadPmd (
4397 IN UINT8 Index
4398 );
4399
4400
4401 /**
4402 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4403
4404 Writes current value of Instruction Breakpoint Register specified by Index.
4405 The Instruction Breakpoint Registers are used in pairs. The even numbered
4406 registers contain breakpoint addresses, and odd numbered registers contain
4407 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4408 on all processor models. Implemented registers are contiguous starting with
4409 register 0. No parameter checking is performed on Index. If the Index value
4410 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4411 occur. The caller must either guarantee that Index is valid, or the caller must
4412 set up fault handlers to catch the faults.
4413 This function is only available on Itanium processors.
4414
4415 @param Index The 8-bit Instruction Breakpoint Register index to write.
4416 @param Value The 64-bit value to write to IBR.
4417
4418 @return The 64-bit value written to the IBR.
4419
4420 **/
4421 UINT64
4422 EFIAPI
4423 AsmWriteIbr (
4424 IN UINT8 Index,
4425 IN UINT64 Value
4426 );
4427
4428
4429 /**
4430 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4431
4432 Writes current value of Data Breakpoint Register specified by Index.
4433 The Data Breakpoint Registers are used in pairs. The even numbered registers
4434 contain breakpoint addresses, and odd numbered registers contain breakpoint
4435 mask conditions. At least 4 data registers pairs are implemented on all processor
4436 models. Implemented registers are contiguous starting with register 0. No parameter
4437 checking is performed on Index. If the Index value is beyond the implemented
4438 DBR register range, a Reserved Register/Field fault may occur. The caller must
4439 either guarantee that Index is valid, or the caller must set up fault handlers to
4440 catch the faults.
4441 This function is only available on Itanium processors.
4442
4443 @param Index The 8-bit Data Breakpoint Register index to write.
4444 @param Value The 64-bit value to write to DBR.
4445
4446 @return The 64-bit value written to the DBR.
4447
4448 **/
4449 UINT64
4450 EFIAPI
4451 AsmWriteDbr (
4452 IN UINT8 Index,
4453 IN UINT64 Value
4454 );
4455
4456
4457 /**
4458 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4459
4460 Writes current value of Performance Monitor Configuration Register specified by Index.
4461 All processor implementations provide at least 4 performance counters
4462 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4463 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4464 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4465 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4466 dependent. No parameter checking is performed on Index. If the Index value is
4467 beyond the implemented PMC register range, the write is ignored.
4468 This function is only available on Itanium processors.
4469
4470 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4471 @param Value The 64-bit value to write to PMC.
4472
4473 @return The 64-bit value written to the PMC.
4474
4475 **/
4476 UINT64
4477 EFIAPI
4478 AsmWritePmc (
4479 IN UINT8 Index,
4480 IN UINT64 Value
4481 );
4482
4483
4484 /**
4485 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4486
4487 Writes current value of Performance Monitor Data Register specified by Index.
4488 All processor implementations provide at least 4 performance counters
4489 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4490 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4491 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4492 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4493 is implementation dependent. No parameter checking is performed on Index. If the
4494 Index value is beyond the implemented PMD register range, the write is ignored.
4495 This function is only available on Itanium processors.
4496
4497 @param Index The 8-bit Performance Monitor Data Register index to write.
4498 @param Value The 64-bit value to write to PMD.
4499
4500 @return The 64-bit value written to the PMD.
4501
4502 **/
4503 UINT64
4504 EFIAPI
4505 AsmWritePmd (
4506 IN UINT8 Index,
4507 IN UINT64 Value
4508 );
4509
4510
4511 /**
4512 Reads the current value of 64-bit Global Pointer (GP).
4513
4514 Reads and returns the current value of GP.
4515 This function is only available on Itanium processors.
4516
4517 @return The current value of GP.
4518
4519 **/
4520 UINT64
4521 EFIAPI
4522 AsmReadGp (
4523 VOID
4524 );
4525
4526
4527 /**
4528 Write the current value of 64-bit Global Pointer (GP).
4529
4530 Writes the current value of GP. The 64-bit value written to the GP is returned.
4531 No parameter checking is performed on Value.
4532 This function is only available on Itanium processors.
4533
4534 @param Value The 64-bit value to write to GP.
4535
4536 @return The 64-bit value written to the GP.
4537
4538 **/
4539 UINT64
4540 EFIAPI
4541 AsmWriteGp (
4542 IN UINT64 Value
4543 );
4544
4545
4546 /**
4547 Reads the current value of 64-bit Stack Pointer (SP).
4548
4549 Reads and returns the current value of SP.
4550 This function is only available on Itanium processors.
4551
4552 @return The current value of SP.
4553
4554 **/
4555 UINT64
4556 EFIAPI
4557 AsmReadSp (
4558 VOID
4559 );
4560
4561
4562 ///
4563 /// Valid Index value for AsmReadControlRegister()
4564 ///
4565 #define IPF_CONTROL_REGISTER_DCR 0
4566 #define IPF_CONTROL_REGISTER_ITM 1
4567 #define IPF_CONTROL_REGISTER_IVA 2
4568 #define IPF_CONTROL_REGISTER_PTA 8
4569 #define IPF_CONTROL_REGISTER_IPSR 16
4570 #define IPF_CONTROL_REGISTER_ISR 17
4571 #define IPF_CONTROL_REGISTER_IIP 19
4572 #define IPF_CONTROL_REGISTER_IFA 20
4573 #define IPF_CONTROL_REGISTER_ITIR 21
4574 #define IPF_CONTROL_REGISTER_IIPA 22
4575 #define IPF_CONTROL_REGISTER_IFS 23
4576 #define IPF_CONTROL_REGISTER_IIM 24
4577 #define IPF_CONTROL_REGISTER_IHA 25
4578 #define IPF_CONTROL_REGISTER_LID 64
4579 #define IPF_CONTROL_REGISTER_IVR 65
4580 #define IPF_CONTROL_REGISTER_TPR 66
4581 #define IPF_CONTROL_REGISTER_EOI 67
4582 #define IPF_CONTROL_REGISTER_IRR0 68
4583 #define IPF_CONTROL_REGISTER_IRR1 69
4584 #define IPF_CONTROL_REGISTER_IRR2 70
4585 #define IPF_CONTROL_REGISTER_IRR3 71
4586 #define IPF_CONTROL_REGISTER_ITV 72
4587 #define IPF_CONTROL_REGISTER_PMV 73
4588 #define IPF_CONTROL_REGISTER_CMCV 74
4589 #define IPF_CONTROL_REGISTER_LRR0 80
4590 #define IPF_CONTROL_REGISTER_LRR1 81
4591
4592 /**
4593 Reads a 64-bit control register.
4594
4595 Reads and returns the control register specified by Index. The valid Index valued are defined
4596 above in "Related Definitions".
4597 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4598
4599 @param Index The index of the control register to read.
4600
4601 @return The control register specified by Index.
4602
4603 **/
4604 UINT64
4605 EFIAPI
4606 AsmReadControlRegister (
4607 IN UINT64 Index
4608 );
4609
4610
4611 ///
4612 /// Valid Index value for AsmReadApplicationRegister()
4613 ///
4614 #define IPF_APPLICATION_REGISTER_K0 0
4615 #define IPF_APPLICATION_REGISTER_K1 1
4616 #define IPF_APPLICATION_REGISTER_K2 2
4617 #define IPF_APPLICATION_REGISTER_K3 3
4618 #define IPF_APPLICATION_REGISTER_K4 4
4619 #define IPF_APPLICATION_REGISTER_K5 5
4620 #define IPF_APPLICATION_REGISTER_K6 6
4621 #define IPF_APPLICATION_REGISTER_K7 7
4622 #define IPF_APPLICATION_REGISTER_RSC 16
4623 #define IPF_APPLICATION_REGISTER_BSP 17
4624 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4625 #define IPF_APPLICATION_REGISTER_RNAT 19
4626 #define IPF_APPLICATION_REGISTER_FCR 21
4627 #define IPF_APPLICATION_REGISTER_EFLAG 24
4628 #define IPF_APPLICATION_REGISTER_CSD 25
4629 #define IPF_APPLICATION_REGISTER_SSD 26
4630 #define IPF_APPLICATION_REGISTER_CFLG 27
4631 #define IPF_APPLICATION_REGISTER_FSR 28
4632 #define IPF_APPLICATION_REGISTER_FIR 29
4633 #define IPF_APPLICATION_REGISTER_FDR 30
4634 #define IPF_APPLICATION_REGISTER_CCV 32
4635 #define IPF_APPLICATION_REGISTER_UNAT 36
4636 #define IPF_APPLICATION_REGISTER_FPSR 40
4637 #define IPF_APPLICATION_REGISTER_ITC 44
4638 #define IPF_APPLICATION_REGISTER_PFS 64
4639 #define IPF_APPLICATION_REGISTER_LC 65
4640 #define IPF_APPLICATION_REGISTER_EC 66
4641
4642 /**
4643 Reads a 64-bit application register.
4644
4645 Reads and returns the application register specified by Index. The valid Index valued are defined
4646 above in "Related Definitions".
4647 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.
4648
4649 @param Index The index of the application register to read.
4650
4651 @return The application register specified by Index.
4652
4653 **/
4654 UINT64
4655 EFIAPI
4656 AsmReadApplicationRegister (
4657 IN UINT64 Index
4658 );
4659
4660
4661 /**
4662 Reads the current value of a Machine Specific Register (MSR).
4663
4664 Reads and returns the current value of the Machine Specific Register specified by Index. No
4665 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4666 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4667 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4668 only available on Itanium processors.
4669
4670 @param Index The 8-bit Machine Specific Register index to read.
4671
4672 @return The current value of the Machine Specific Register specified by Index.
4673
4674 **/
4675 UINT64
4676 EFIAPI
4677 AsmReadMsr (
4678 IN UINT8 Index
4679 );
4680
4681
4682 /**
4683 Writes the current value of a Machine Specific Register (MSR).
4684
4685 Writes Value to the Machine Specific Register specified by Index. Value is returned. No
4686 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4687 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
4688 Index is valid, or the caller must set up fault handlers to catch the faults. This function is
4689 only available on Itanium processors.
4690
4691 @param Index The 8-bit Machine Specific Register index to write.
4692 @param Value The 64-bit value to write to the Machine Specific Register.
4693
4694 @return The 64-bit value to write to the Machine Specific Register.
4695
4696 **/
4697 UINT64
4698 EFIAPI
4699 AsmWriteMsr (
4700 IN UINT8 Index,
4701 IN UINT64 Value
4702 );
4703
4704
4705 /**
4706 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4707
4708 Determines the current execution mode of the CPU.
4709 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4710 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4711 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4712 and -1 is returned.
4713 This function is only available on Itanium processors.
4714
4715 @retval 1 The CPU is in virtual mode.
4716 @retval 0 The CPU is in physical mode.
4717 @retval -1 The CPU is in mixed mode.
4718
4719 **/
4720 INT64
4721 EFIAPI
4722 AsmCpuVirtual (
4723 VOID
4724 );
4725
4726
4727 /**
4728 Makes a PAL procedure call.
4729
4730 This is a wrapper function to make a PAL procedure call. Based on the Index
4731 value this API will make static or stacked PAL call. The following table
4732 describes the usage of PAL Procedure Index Assignment. Architected procedures
4733 may be designated as required or optional. If a PAL procedure is specified
4734 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4735 Status field of the PAL_CALL_RETURN structure.
4736 This indicates that the procedure is not present in this PAL implementation.
4737 It is the caller's responsibility to check for this return code after calling
4738 any optional PAL procedure.
4739 No parameter checking is performed on the 5 input parameters, but there are
4740 some common rules that the caller should follow when making a PAL call. Any
4741 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4742 Unaligned addresses may cause undefined results. For those parameters defined
4743 as reserved or some fields defined as reserved must be zero filled or the invalid
4744 argument return value may be returned or undefined result may occur during the
4745 execution of the procedure. If the PalEntryPoint does not point to a valid
4746 PAL entry point then the system behavior is undefined. This function is only
4747 available on Itanium processors.
4748
4749 @param PalEntryPoint The PAL procedure calls entry point.
4750 @param Index The PAL procedure Index number.
4751 @param Arg2 The 2nd parameter for PAL procedure calls.
4752 @param Arg3 The 3rd parameter for PAL procedure calls.
4753 @param Arg4 The 4th parameter for PAL procedure calls.
4754
4755 @return structure returned from the PAL Call procedure, including the status and return value.
4756
4757 **/
4758 PAL_CALL_RETURN
4759 EFIAPI
4760 AsmPalCall (
4761 IN UINT64 PalEntryPoint,
4762 IN UINT64 Index,
4763 IN UINT64 Arg2,
4764 IN UINT64 Arg3,
4765 IN UINT64 Arg4
4766 );
4767 #endif
4768
4769 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4770 ///
4771 /// IA32 and x64 Specific Functions
4772 /// Byte packed structure for 16-bit Real Mode EFLAGS
4773 ///
4774 typedef union {
4775 struct {
4776 UINT32 CF:1; ///< Carry Flag
4777 UINT32 Reserved_0:1; ///< Reserved
4778 UINT32 PF:1; ///< Parity Flag
4779 UINT32 Reserved_1:1; ///< Reserved
4780 UINT32 AF:1; ///< Auxiliary Carry Flag
4781 UINT32 Reserved_2:1; ///< Reserved
4782 UINT32 ZF:1; ///< Zero Flag
4783 UINT32 SF:1; ///< Sign Flag
4784 UINT32 TF:1; ///< Trap Flag
4785 UINT32 IF:1; ///< Interrupt Enable Flag
4786 UINT32 DF:1; ///< Direction Flag
4787 UINT32 OF:1; ///< Overflow Flag
4788 UINT32 IOPL:2; ///< I/O Privilege Level
4789 UINT32 NT:1; ///< Nested Task
4790 UINT32 Reserved_3:1; ///< Reserved
4791 } Bits;
4792 UINT16 Uint16;
4793 } IA32_FLAGS16;
4794
4795 ///
4796 /// Byte packed structure for EFLAGS/RFLAGS
4797 /// 32-bits on IA-32
4798 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4799 ///
4800 typedef union {
4801 struct {
4802 UINT32 CF:1; ///< Carry Flag
4803 UINT32 Reserved_0:1; ///< Reserved
4804 UINT32 PF:1; ///< Parity Flag
4805 UINT32 Reserved_1:1; ///< Reserved
4806 UINT32 AF:1; ///< Auxiliary Carry Flag
4807 UINT32 Reserved_2:1; ///< Reserved
4808 UINT32 ZF:1; ///< Zero Flag
4809 UINT32 SF:1; ///< Sign Flag
4810 UINT32 TF:1; ///< Trap Flag
4811 UINT32 IF:1; ///< Interrupt Enable Flag
4812 UINT32 DF:1; ///< Direction Flag
4813 UINT32 OF:1; ///< Overflow Flag
4814 UINT32 IOPL:2; ///< I/O Privilege Level
4815 UINT32 NT:1; ///< Nested Task
4816 UINT32 Reserved_3:1; ///< Reserved
4817 UINT32 RF:1; ///< Resume Flag
4818 UINT32 VM:1; ///< Virtual 8086 Mode
4819 UINT32 AC:1; ///< Alignment Check
4820 UINT32 VIF:1; ///< Virtual Interrupt Flag
4821 UINT32 VIP:1; ///< Virtual Interrupt Pending
4822 UINT32 ID:1; ///< ID Flag
4823 UINT32 Reserved_4:10; ///< Reserved
4824 } Bits;
4825 UINTN UintN;
4826 } IA32_EFLAGS32;
4827
4828 ///
4829 /// Byte packed structure for Control Register 0 (CR0)
4830 /// 32-bits on IA-32
4831 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4832 ///
4833 typedef union {
4834 struct {
4835 UINT32 PE:1; ///< Protection Enable
4836 UINT32 MP:1; ///< Monitor Coprocessor
4837 UINT32 EM:1; ///< Emulation
4838 UINT32 TS:1; ///< Task Switched
4839 UINT32 ET:1; ///< Extension Type
4840 UINT32 NE:1; ///< Numeric Error
4841 UINT32 Reserved_0:10; ///< Reserved
4842 UINT32 WP:1; ///< Write Protect
4843 UINT32 Reserved_1:1; ///< Reserved
4844 UINT32 AM:1; ///< Alignment Mask
4845 UINT32 Reserved_2:10; ///< Reserved
4846 UINT32 NW:1; ///< Mot Write-through
4847 UINT32 CD:1; ///< Cache Disable
4848 UINT32 PG:1; ///< Paging
4849 } Bits;
4850 UINTN UintN;
4851 } IA32_CR0;
4852
4853 ///
4854 /// Byte packed structure for Control Register 4 (CR4)
4855 /// 32-bits on IA-32
4856 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4857 ///
4858 typedef union {
4859 struct {
4860 UINT32 VME:1; ///< Virtual-8086 Mode Extensions
4861 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts
4862 UINT32 TSD:1; ///< Time Stamp Disable
4863 UINT32 DE:1; ///< Debugging Extensions
4864 UINT32 PSE:1; ///< Page Size Extensions
4865 UINT32 PAE:1; ///< Physical Address Extension
4866 UINT32 MCE:1; ///< Machine Check Enable
4867 UINT32 PGE:1; ///< Page Global Enable
4868 UINT32 PCE:1; ///< Performance Monitoring Counter
4869 ///< Enable
4870 UINT32 OSFXSR:1; ///< Operating System Support for
4871 ///< FXSAVE and FXRSTOR instructions
4872 UINT32 OSXMMEXCPT:1; ///< Operating System Support for
4873 ///< Unmasked SIMD Floating Point
4874 ///< Exceptions
4875 UINT32 Reserved_0:2; ///< Reserved
4876 UINT32 VMXE:1; ///< VMX Enable
4877 UINT32 Reserved_1:18; ///< Reserved
4878 } Bits;
4879 UINTN UintN;
4880 } IA32_CR4;
4881
4882 ///
4883 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
4884 ///
4885 #pragma pack (1)
4886 typedef struct {
4887 UINT16 Limit;
4888 UINTN Base;
4889 } IA32_DESCRIPTOR;
4890 #pragma pack ()
4891
4892 #define IA32_IDT_GATE_TYPE_TASK 0x85
4893 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
4894 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
4895 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
4896 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
4897
4898
4899 #if defined (MDE_CPU_IA32)
4900 ///
4901 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor
4902 ///
4903 typedef union {
4904 struct {
4905 UINT32 OffsetLow:16; ///< Offset bits 15..0
4906 UINT32 Selector:16; ///< Selector
4907 UINT32 Reserved_0:8; ///< Reserved
4908 UINT32 GateType:8; ///< Gate Type. See #defines above
4909 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4910 } Bits;
4911 UINT64 Uint64;
4912 } IA32_IDT_GATE_DESCRIPTOR;
4913
4914 #endif
4915
4916 #if defined (MDE_CPU_X64)
4917 ///
4918 /// Byte packed structure for an x64 Interrupt Gate Descriptor
4919 ///
4920 typedef union {
4921 struct {
4922 UINT32 OffsetLow:16; ///< Offset bits 15..0
4923 UINT32 Selector:16; ///< Selector
4924 UINT32 Reserved_0:8; ///< Reserved
4925 UINT32 GateType:8; ///< Gate Type. See #defines above
4926 UINT32 OffsetHigh:16; ///< Offset bits 31..16
4927 UINT32 OffsetUpper:32; ///< Offset bits 63..32
4928 UINT32 Reserved_1:32; ///< Reserved
4929 } Bits;
4930 struct {
4931 UINT64 Uint64;
4932 UINT64 Uint64_1;
4933 } Uint128;
4934 } IA32_IDT_GATE_DESCRIPTOR;
4935
4936 #endif
4937
4938 ///
4939 /// Byte packed structure for an FP/SSE/SSE2 context
4940 ///
4941 typedef struct {
4942 UINT8 Buffer[512];
4943 } IA32_FX_BUFFER;
4944
4945 ///
4946 /// Structures for the 16-bit real mode thunks
4947 ///
4948 typedef struct {
4949 UINT32 Reserved1;
4950 UINT32 Reserved2;
4951 UINT32 Reserved3;
4952 UINT32 Reserved4;
4953 UINT8 BL;
4954 UINT8 BH;
4955 UINT16 Reserved5;
4956 UINT8 DL;
4957 UINT8 DH;
4958 UINT16 Reserved6;
4959 UINT8 CL;
4960 UINT8 CH;
4961 UINT16 Reserved7;
4962 UINT8 AL;
4963 UINT8 AH;
4964 UINT16 Reserved8;
4965 } IA32_BYTE_REGS;
4966
4967 typedef struct {
4968 UINT16 DI;
4969 UINT16 Reserved1;
4970 UINT16 SI;
4971 UINT16 Reserved2;
4972 UINT16 BP;
4973 UINT16 Reserved3;
4974 UINT16 SP;
4975 UINT16 Reserved4;
4976 UINT16 BX;
4977 UINT16 Reserved5;
4978 UINT16 DX;
4979 UINT16 Reserved6;
4980 UINT16 CX;
4981 UINT16 Reserved7;
4982 UINT16 AX;
4983 UINT16 Reserved8;
4984 } IA32_WORD_REGS;
4985
4986 typedef struct {
4987 UINT32 EDI;
4988 UINT32 ESI;
4989 UINT32 EBP;
4990 UINT32 ESP;
4991 UINT32 EBX;
4992 UINT32 EDX;
4993 UINT32 ECX;
4994 UINT32 EAX;
4995 UINT16 DS;
4996 UINT16 ES;
4997 UINT16 FS;
4998 UINT16 GS;
4999 IA32_EFLAGS32 EFLAGS;
5000 UINT32 Eip;
5001 UINT16 CS;
5002 UINT16 SS;
5003 } IA32_DWORD_REGS;
5004
5005 typedef union {
5006 IA32_DWORD_REGS E;
5007 IA32_WORD_REGS X;
5008 IA32_BYTE_REGS H;
5009 } IA32_REGISTER_SET;
5010
5011 ///
5012 /// Byte packed structure for an 16-bit real mode thunks
5013 ///
5014 typedef struct {
5015 IA32_REGISTER_SET *RealModeState;
5016 VOID *RealModeBuffer;
5017 UINT32 RealModeBufferSize;
5018 UINT32 ThunkAttributes;
5019 } THUNK_CONTEXT;
5020
5021 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5022 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5023 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5024
5025 /**
5026 Retrieves CPUID information.
5027
5028 Executes the CPUID instruction with EAX set to the value specified by Index.
5029 This function always returns Index.
5030 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5031 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5032 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5033 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5034 This function is only available on IA-32 and x64.
5035
5036 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5037 instruction.
5038 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5039 instruction. This is an optional parameter that may be NULL.
5040 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5041 instruction. This is an optional parameter that may be NULL.
5042 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5043 instruction. This is an optional parameter that may be NULL.
5044 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5045 instruction. This is an optional parameter that may be NULL.
5046
5047 @return Index.
5048
5049 **/
5050 UINT32
5051 EFIAPI
5052 AsmCpuid (
5053 IN UINT32 Index,
5054 OUT UINT32 *Eax, OPTIONAL
5055 OUT UINT32 *Ebx, OPTIONAL
5056 OUT UINT32 *Ecx, OPTIONAL
5057 OUT UINT32 *Edx OPTIONAL
5058 );
5059
5060
5061 /**
5062 Retrieves CPUID information using an extended leaf identifier.
5063
5064 Executes the CPUID instruction with EAX set to the value specified by Index
5065 and ECX set to the value specified by SubIndex. This function always returns
5066 Index. This function is only available on IA-32 and x64.
5067
5068 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5069 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5070 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5071 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5072
5073 @param Index The 32-bit value to load into EAX prior to invoking the
5074 CPUID instruction.
5075 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5076 CPUID instruction.
5077 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5078 instruction. This is an optional parameter that may be
5079 NULL.
5080 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5081 instruction. This is an optional parameter that may be
5082 NULL.
5083 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5084 instruction. This is an optional parameter that may be
5085 NULL.
5086 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5087 instruction. This is an optional parameter that may be
5088 NULL.
5089
5090 @return Index.
5091
5092 **/
5093 UINT32
5094 EFIAPI
5095 AsmCpuidEx (
5096 IN UINT32 Index,
5097 IN UINT32 SubIndex,
5098 OUT UINT32 *Eax, OPTIONAL
5099 OUT UINT32 *Ebx, OPTIONAL
5100 OUT UINT32 *Ecx, OPTIONAL
5101 OUT UINT32 *Edx OPTIONAL
5102 );
5103
5104
5105 /**
5106 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5107
5108 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5109 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5110
5111 **/
5112 VOID
5113 EFIAPI
5114 AsmDisableCache (
5115 VOID
5116 );
5117
5118
5119 /**
5120 Perform a WBINVD and clear both the CD and NW bits of CR0.
5121
5122 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5123 bits of CR0 to 0. This function is only available on IA-32 and x64.
5124
5125 **/
5126 VOID
5127 EFIAPI
5128 AsmEnableCache (
5129 VOID
5130 );
5131
5132
5133 /**
5134 Returns the lower 32-bits of a Machine Specific Register(MSR).
5135
5136 Reads and returns the lower 32-bits of the MSR specified by Index.
5137 No parameter checking is performed on Index, and some Index values may cause
5138 CPU exceptions. The caller must either guarantee that Index is valid, or the
5139 caller must set up exception handlers to catch the exceptions. This function
5140 is only available on IA-32 and x64.
5141
5142 @param Index The 32-bit MSR index to read.
5143
5144 @return The lower 32 bits of the MSR identified by Index.
5145
5146 **/
5147 UINT32
5148 EFIAPI
5149 AsmReadMsr32 (
5150 IN UINT32 Index
5151 );
5152
5153
5154 /**
5155 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5156 The upper 32-bits of the MSR are set to zero.
5157
5158 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5159 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5160 the MSR is returned. No parameter checking is performed on Index or Value,
5161 and some of these may cause CPU exceptions. The caller must either guarantee
5162 that Index and Value are valid, or the caller must establish proper exception
5163 handlers. This function is only available on IA-32 and x64.
5164
5165 @param Index The 32-bit MSR index to write.
5166 @param Value The 32-bit value to write to the MSR.
5167
5168 @return Value
5169
5170 **/
5171 UINT32
5172 EFIAPI
5173 AsmWriteMsr32 (
5174 IN UINT32 Index,
5175 IN UINT32 Value
5176 );
5177
5178
5179 /**
5180 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5181 writes the result back to the 64-bit MSR.
5182
5183 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5184 between the lower 32-bits of the read result and the value specified by
5185 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5186 32-bits of the value written to the MSR is returned. No parameter checking is
5187 performed on Index or OrData, and some of these may cause CPU exceptions. The
5188 caller must either guarantee that Index and OrData are valid, or the caller
5189 must establish proper exception handlers. This function is only available on
5190 IA-32 and x64.
5191
5192 @param Index The 32-bit MSR index to write.
5193 @param OrData The value to OR with the read value from the MSR.
5194
5195 @return The lower 32-bit value written to the MSR.
5196
5197 **/
5198 UINT32
5199 EFIAPI
5200 AsmMsrOr32 (
5201 IN UINT32 Index,
5202 IN UINT32 OrData
5203 );
5204
5205
5206 /**
5207 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5208 the result back to the 64-bit MSR.
5209
5210 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5211 lower 32-bits of the read result and the value specified by AndData, and
5212 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5213 the value written to the MSR is returned. No parameter checking is performed
5214 on Index or AndData, and some of these may cause CPU exceptions. The caller
5215 must either guarantee that Index and AndData are valid, or the caller must
5216 establish proper exception handlers. This function is only available on IA-32
5217 and x64.
5218
5219 @param Index The 32-bit MSR index to write.
5220 @param AndData The value to AND with the read value from the MSR.
5221
5222 @return The lower 32-bit value written to the MSR.
5223
5224 **/
5225 UINT32
5226 EFIAPI
5227 AsmMsrAnd32 (
5228 IN UINT32 Index,
5229 IN UINT32 AndData
5230 );
5231
5232
5233 /**
5234 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5235 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5236
5237 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5238 lower 32-bits of the read result and the value specified by AndData
5239 preserving the upper 32-bits, performs a bitwise OR between the
5240 result of the AND operation and the value specified by OrData, and writes the
5241 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5242 written to the MSR is returned. No parameter checking is performed on Index,
5243 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5244 must either guarantee that Index, AndData, and OrData are valid, or the
5245 caller must establish proper exception handlers. This function is only
5246 available on IA-32 and x64.
5247
5248 @param Index The 32-bit MSR index to write.
5249 @param AndData The value to AND with the read value from the MSR.
5250 @param OrData The value to OR with the result of the AND operation.
5251
5252 @return The lower 32-bit value written to the MSR.
5253
5254 **/
5255 UINT32
5256 EFIAPI
5257 AsmMsrAndThenOr32 (
5258 IN UINT32 Index,
5259 IN UINT32 AndData,
5260 IN UINT32 OrData
5261 );
5262
5263
5264 /**
5265 Reads a bit field of an MSR.
5266
5267 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5268 specified by the StartBit and the EndBit. The value of the bit field is
5269 returned. The caller must either guarantee that Index is valid, or the caller
5270 must set up exception handlers to catch the exceptions. This function is only
5271 available on IA-32 and x64.
5272
5273 If StartBit is greater than 31, then ASSERT().
5274 If EndBit is greater than 31, then ASSERT().
5275 If EndBit is less than StartBit, then ASSERT().
5276
5277 @param Index The 32-bit MSR index to read.
5278 @param StartBit The ordinal of the least significant bit in the bit field.
5279 Range 0..31.
5280 @param EndBit The ordinal of the most significant bit in the bit field.
5281 Range 0..31.
5282
5283 @return The bit field read from the MSR.
5284
5285 **/
5286 UINT32
5287 EFIAPI
5288 AsmMsrBitFieldRead32 (
5289 IN UINT32 Index,
5290 IN UINTN StartBit,
5291 IN UINTN EndBit
5292 );
5293
5294
5295 /**
5296 Writes a bit field to an MSR.
5297
5298 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5299 field is specified by the StartBit and the EndBit. All other bits in the
5300 destination MSR are preserved. The lower 32-bits of the MSR written is
5301 returned. The caller must either guarantee that Index and the data written
5302 is valid, or the caller must set up exception handlers to catch the exceptions.
5303 This function is only available on IA-32 and x64.
5304
5305 If StartBit is greater than 31, then ASSERT().
5306 If EndBit is greater than 31, then ASSERT().
5307 If EndBit is less than StartBit, then ASSERT().
5308
5309 @param Index The 32-bit MSR index to write.
5310 @param StartBit The ordinal of the least significant bit in the bit field.
5311 Range 0..31.
5312 @param EndBit The ordinal of the most significant bit in the bit field.
5313 Range 0..31.
5314 @param Value New value of the bit field.
5315
5316 @return The lower 32-bit of the value written to the MSR.
5317
5318 **/
5319 UINT32
5320 EFIAPI
5321 AsmMsrBitFieldWrite32 (
5322 IN UINT32 Index,
5323 IN UINTN StartBit,
5324 IN UINTN EndBit,
5325 IN UINT32 Value
5326 );
5327
5328
5329 /**
5330 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5331 result back to the bit field in the 64-bit MSR.
5332
5333 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5334 between the read result and the value specified by OrData, and writes the
5335 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5336 written to the MSR are returned. Extra left bits in OrData are stripped. The
5337 caller must either guarantee that Index and the data written is valid, or
5338 the caller must set up exception handlers to catch the exceptions. This
5339 function is only available on IA-32 and x64.
5340
5341 If StartBit is greater than 31, then ASSERT().
5342 If EndBit is greater than 31, then ASSERT().
5343 If EndBit is less than StartBit, then ASSERT().
5344
5345 @param Index The 32-bit MSR index to write.
5346 @param StartBit The ordinal of the least significant bit in the bit field.
5347 Range 0..31.
5348 @param EndBit The ordinal of the most significant bit in the bit field.
5349 Range 0..31.
5350 @param OrData The value to OR with the read value from the MSR.
5351
5352 @return The lower 32-bit of the value written to the MSR.
5353
5354 **/
5355 UINT32
5356 EFIAPI
5357 AsmMsrBitFieldOr32 (
5358 IN UINT32 Index,
5359 IN UINTN StartBit,
5360 IN UINTN EndBit,
5361 IN UINT32 OrData
5362 );
5363
5364
5365 /**
5366 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5367 result back to the bit field in the 64-bit MSR.
5368
5369 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5370 read result and the value specified by AndData, and writes the result to the
5371 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5372 MSR are returned. Extra left bits in AndData are stripped. The caller must
5373 either guarantee that Index and the data written is valid, or the caller must
5374 set up exception handlers to catch the exceptions. This function is only
5375 available on IA-32 and x64.
5376
5377 If StartBit is greater than 31, then ASSERT().
5378 If EndBit is greater than 31, then ASSERT().
5379 If EndBit is less than StartBit, then ASSERT().
5380
5381 @param Index The 32-bit MSR index to write.
5382 @param StartBit The ordinal of the least significant bit in the bit field.
5383 Range 0..31.
5384 @param EndBit The ordinal of the most significant bit in the bit field.
5385 Range 0..31.
5386 @param AndData The value to AND with the read value from the MSR.
5387
5388 @return The lower 32-bit of the value written to the MSR.
5389
5390 **/
5391 UINT32
5392 EFIAPI
5393 AsmMsrBitFieldAnd32 (
5394 IN UINT32 Index,
5395 IN UINTN StartBit,
5396 IN UINTN EndBit,
5397 IN UINT32 AndData
5398 );
5399
5400
5401 /**
5402 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5403 bitwise OR, and writes the result back to the bit field in the
5404 64-bit MSR.
5405
5406 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5407 bitwise OR between the read result and the value specified by
5408 AndData, and writes the result to the 64-bit MSR specified by Index. The
5409 lower 32-bits of the value written to the MSR are returned. Extra left bits
5410 in both AndData and OrData are stripped. The caller must either guarantee
5411 that Index and the data written is valid, or the caller must set up exception
5412 handlers to catch the exceptions. This function is only available on IA-32
5413 and x64.
5414
5415 If StartBit is greater than 31, then ASSERT().
5416 If EndBit is greater than 31, then ASSERT().
5417 If EndBit is less than StartBit, then ASSERT().
5418
5419 @param Index The 32-bit MSR index to write.
5420 @param StartBit The ordinal of the least significant bit in the bit field.
5421 Range 0..31.
5422 @param EndBit The ordinal of the most significant bit in the bit field.
5423 Range 0..31.
5424 @param AndData The value to AND with the read value from the MSR.
5425 @param OrData The value to OR with the result of the AND operation.
5426
5427 @return The lower 32-bit of the value written to the MSR.
5428
5429 **/
5430 UINT32
5431 EFIAPI
5432 AsmMsrBitFieldAndThenOr32 (
5433 IN UINT32 Index,
5434 IN UINTN StartBit,
5435 IN UINTN EndBit,
5436 IN UINT32 AndData,
5437 IN UINT32 OrData
5438 );
5439
5440
5441 /**
5442 Returns a 64-bit Machine Specific Register(MSR).
5443
5444 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5445 performed on Index, and some Index values may cause CPU exceptions. The
5446 caller must either guarantee that Index is valid, or the caller must set up
5447 exception handlers to catch the exceptions. This function is only available
5448 on IA-32 and x64.
5449
5450 @param Index The 32-bit MSR index to read.
5451
5452 @return The value of the MSR identified by Index.
5453
5454 **/
5455 UINT64
5456 EFIAPI
5457 AsmReadMsr64 (
5458 IN UINT32 Index
5459 );
5460
5461
5462 /**
5463 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5464 value.
5465
5466 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5467 64-bit value written to the MSR is returned. No parameter checking is
5468 performed on Index or Value, and some of these may cause CPU exceptions. The
5469 caller must either guarantee that Index and Value are valid, or the caller
5470 must establish proper exception handlers. This function is only available on
5471 IA-32 and x64.
5472
5473 @param Index The 32-bit MSR index to write.
5474 @param Value The 64-bit value to write to the MSR.
5475
5476 @return Value
5477
5478 **/
5479 UINT64
5480 EFIAPI
5481 AsmWriteMsr64 (
5482 IN UINT32 Index,
5483 IN UINT64 Value
5484 );
5485
5486
5487 /**
5488 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5489 back to the 64-bit MSR.
5490
5491 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5492 between the read result and the value specified by OrData, and writes the
5493 result to the 64-bit MSR specified by Index. The value written to the MSR is
5494 returned. No parameter checking is performed on Index or OrData, and some of
5495 these may cause CPU exceptions. The caller must either guarantee that Index
5496 and OrData are valid, or the caller must establish proper exception handlers.
5497 This function is only available on IA-32 and x64.
5498
5499 @param Index The 32-bit MSR index to write.
5500 @param OrData The value to OR with the read value from the MSR.
5501
5502 @return The value written back to the MSR.
5503
5504 **/
5505 UINT64
5506 EFIAPI
5507 AsmMsrOr64 (
5508 IN UINT32 Index,
5509 IN UINT64 OrData
5510 );
5511
5512
5513 /**
5514 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5515 64-bit MSR.
5516
5517 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5518 read result and the value specified by OrData, and writes the result to the
5519 64-bit MSR specified by Index. The value written to the MSR is returned. No
5520 parameter checking is performed on Index or OrData, and some of these may
5521 cause CPU exceptions. The caller must either guarantee that Index and OrData
5522 are valid, or the caller must establish proper exception handlers. This
5523 function is only available on IA-32 and x64.
5524
5525 @param Index The 32-bit MSR index to write.
5526 @param AndData The value to AND with the read value from the MSR.
5527
5528 @return The value written back to the MSR.
5529
5530 **/
5531 UINT64
5532 EFIAPI
5533 AsmMsrAnd64 (
5534 IN UINT32 Index,
5535 IN UINT64 AndData
5536 );
5537
5538
5539 /**
5540 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5541 OR, and writes the result back to the 64-bit MSR.
5542
5543 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5544 result and the value specified by AndData, performs a bitwise OR
5545 between the result of the AND operation and the value specified by OrData,
5546 and writes the result to the 64-bit MSR specified by Index. The value written
5547 to the MSR is returned. No parameter checking is performed on Index, AndData,
5548 or OrData, and some of these may cause CPU exceptions. The caller must either
5549 guarantee that Index, AndData, and OrData are valid, or the caller must
5550 establish proper exception handlers. This function is only available on IA-32
5551 and x64.
5552
5553 @param Index The 32-bit MSR index to write.
5554 @param AndData The value to AND with the read value from the MSR.
5555 @param OrData The value to OR with the result of the AND operation.
5556
5557 @return The value written back to the MSR.
5558
5559 **/
5560 UINT64
5561 EFIAPI
5562 AsmMsrAndThenOr64 (
5563 IN UINT32 Index,
5564 IN UINT64 AndData,
5565 IN UINT64 OrData
5566 );
5567
5568
5569 /**
5570 Reads a bit field of an MSR.
5571
5572 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5573 StartBit and the EndBit. The value of the bit field is returned. The caller
5574 must either guarantee that Index is valid, or the caller must set up
5575 exception handlers to catch the exceptions. This function is only available
5576 on IA-32 and x64.
5577
5578 If StartBit is greater than 63, then ASSERT().
5579 If EndBit is greater than 63, then ASSERT().
5580 If EndBit is less than StartBit, then ASSERT().
5581
5582 @param Index The 32-bit MSR index to read.
5583 @param StartBit The ordinal of the least significant bit in the bit field.
5584 Range 0..63.
5585 @param EndBit The ordinal of the most significant bit in the bit field.
5586 Range 0..63.
5587
5588 @return The value read from the MSR.
5589
5590 **/
5591 UINT64
5592 EFIAPI
5593 AsmMsrBitFieldRead64 (
5594 IN UINT32 Index,
5595 IN UINTN StartBit,
5596 IN UINTN EndBit
5597 );
5598
5599
5600 /**
5601 Writes a bit field to an MSR.
5602
5603 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5604 the StartBit and the EndBit. All other bits in the destination MSR are
5605 preserved. The MSR written is returned. The caller must either guarantee
5606 that Index and the data written is valid, or the caller must set up exception
5607 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5608
5609 If StartBit is greater than 63, then ASSERT().
5610 If EndBit is greater than 63, then ASSERT().
5611 If EndBit is less than StartBit, then ASSERT().
5612
5613 @param Index The 32-bit MSR index to write.
5614 @param StartBit The ordinal of the least significant bit in the bit field.
5615 Range 0..63.
5616 @param EndBit The ordinal of the most significant bit in the bit field.
5617 Range 0..63.
5618 @param Value New value of the bit field.
5619
5620 @return The value written back to the MSR.
5621
5622 **/
5623 UINT64
5624 EFIAPI
5625 AsmMsrBitFieldWrite64 (
5626 IN UINT32 Index,
5627 IN UINTN StartBit,
5628 IN UINTN EndBit,
5629 IN UINT64 Value
5630 );
5631
5632
5633 /**
5634 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5635 writes the result back to the bit field in the 64-bit MSR.
5636
5637 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5638 between the read result and the value specified by OrData, and writes the
5639 result to the 64-bit MSR specified by Index. The value written to the MSR is
5640 returned. Extra left bits in OrData are stripped. The caller must either
5641 guarantee that Index and the data written is valid, or the caller must set up
5642 exception handlers to catch the exceptions. This function is only available
5643 on IA-32 and x64.
5644
5645 If StartBit is greater than 63, then ASSERT().
5646 If EndBit is greater than 63, then ASSERT().
5647 If EndBit is less than StartBit, then ASSERT().
5648
5649 @param Index The 32-bit MSR index to write.
5650 @param StartBit The ordinal of the least significant bit in the bit field.
5651 Range 0..63.
5652 @param EndBit The ordinal of the most significant bit in the bit field.
5653 Range 0..63.
5654 @param OrData The value to OR with the read value from the bit field.
5655
5656 @return The value written back to the MSR.
5657
5658 **/
5659 UINT64
5660 EFIAPI
5661 AsmMsrBitFieldOr64 (
5662 IN UINT32 Index,
5663 IN UINTN StartBit,
5664 IN UINTN EndBit,
5665 IN UINT64 OrData
5666 );
5667
5668
5669 /**
5670 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5671 result back to the bit field in the 64-bit MSR.
5672
5673 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5674 read result and the value specified by AndData, and writes the result to the
5675 64-bit MSR specified by Index. The value written to the MSR is returned.
5676 Extra left bits in AndData are stripped. The caller must either guarantee
5677 that Index and the data written is valid, or the caller must set up exception
5678 handlers to catch the exceptions. This function is only available on IA-32
5679 and x64.
5680
5681 If StartBit is greater than 63, then ASSERT().
5682 If EndBit is greater than 63, then ASSERT().
5683 If EndBit is less than StartBit, then ASSERT().
5684
5685 @param Index The 32-bit MSR index to write.
5686 @param StartBit The ordinal of the least significant bit in the bit field.
5687 Range 0..63.
5688 @param EndBit The ordinal of the most significant bit in the bit field.
5689 Range 0..63.
5690 @param AndData The value to AND with the read value from the bit field.
5691
5692 @return The value written back to the MSR.
5693
5694 **/
5695 UINT64
5696 EFIAPI
5697 AsmMsrBitFieldAnd64 (
5698 IN UINT32 Index,
5699 IN UINTN StartBit,
5700 IN UINTN EndBit,
5701 IN UINT64 AndData
5702 );
5703
5704
5705 /**
5706 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5707 bitwise OR, and writes the result back to the bit field in the
5708 64-bit MSR.
5709
5710 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5711 a bitwise OR between the read result and the value specified by
5712 AndData, and writes the result to the 64-bit MSR specified by Index. The
5713 value written to the MSR is returned. Extra left bits in both AndData and
5714 OrData are stripped. The caller must either guarantee that Index and the data
5715 written is valid, or the caller must set up exception handlers to catch the
5716 exceptions. This function is only available on IA-32 and x64.
5717
5718 If StartBit is greater than 63, then ASSERT().
5719 If EndBit is greater than 63, then ASSERT().
5720 If EndBit is less than StartBit, then ASSERT().
5721
5722 @param Index The 32-bit MSR index to write.
5723 @param StartBit The ordinal of the least significant bit in the bit field.
5724 Range 0..63.
5725 @param EndBit The ordinal of the most significant bit in the bit field.
5726 Range 0..63.
5727 @param AndData The value to AND with the read value from the bit field.
5728 @param OrData The value to OR with the result of the AND operation.
5729
5730 @return The value written back to the MSR.
5731
5732 **/
5733 UINT64
5734 EFIAPI
5735 AsmMsrBitFieldAndThenOr64 (
5736 IN UINT32 Index,
5737 IN UINTN StartBit,
5738 IN UINTN EndBit,
5739 IN UINT64 AndData,
5740 IN UINT64 OrData
5741 );
5742
5743
5744 /**
5745 Reads the current value of the EFLAGS register.
5746
5747 Reads and returns the current value of the EFLAGS register. This function is
5748 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5749 64-bit value on x64.
5750
5751 @return EFLAGS on IA-32 or RFLAGS on x64.
5752
5753 **/
5754 UINTN
5755 EFIAPI
5756 AsmReadEflags (
5757 VOID
5758 );
5759
5760
5761 /**
5762 Reads the current value of the Control Register 0 (CR0).
5763
5764 Reads and returns the current value of CR0. This function is only available
5765 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5766 x64.
5767
5768 @return The value of the Control Register 0 (CR0).
5769
5770 **/
5771 UINTN
5772 EFIAPI
5773 AsmReadCr0 (
5774 VOID
5775 );
5776
5777
5778 /**
5779 Reads the current value of the Control Register 2 (CR2).
5780
5781 Reads and returns the current value of CR2. This function is only available
5782 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5783 x64.
5784
5785 @return The value of the Control Register 2 (CR2).
5786
5787 **/
5788 UINTN
5789 EFIAPI
5790 AsmReadCr2 (
5791 VOID
5792 );
5793
5794
5795 /**
5796 Reads the current value of the Control Register 3 (CR3).
5797
5798 Reads and returns the current value of CR3. This function is only available
5799 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5800 x64.
5801
5802 @return The value of the Control Register 3 (CR3).
5803
5804 **/
5805 UINTN
5806 EFIAPI
5807 AsmReadCr3 (
5808 VOID
5809 );
5810
5811
5812 /**
5813 Reads the current value of the Control Register 4 (CR4).
5814
5815 Reads and returns the current value of CR4. This function is only available
5816 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5817 x64.
5818
5819 @return The value of the Control Register 4 (CR4).
5820
5821 **/
5822 UINTN
5823 EFIAPI
5824 AsmReadCr4 (
5825 VOID
5826 );
5827
5828
5829 /**
5830 Writes a value to Control Register 0 (CR0).
5831
5832 Writes and returns a new value to CR0. This function is only available on
5833 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5834
5835 @param Cr0 The value to write to CR0.
5836
5837 @return The value written to CR0.
5838
5839 **/
5840 UINTN
5841 EFIAPI
5842 AsmWriteCr0 (
5843 UINTN Cr0
5844 );
5845
5846
5847 /**
5848 Writes a value to Control Register 2 (CR2).
5849
5850 Writes and returns a new value to CR2. This function is only available on
5851 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5852
5853 @param Cr2 The value to write to CR2.
5854
5855 @return The value written to CR2.
5856
5857 **/
5858 UINTN
5859 EFIAPI
5860 AsmWriteCr2 (
5861 UINTN Cr2
5862 );
5863
5864
5865 /**
5866 Writes a value to Control Register 3 (CR3).
5867
5868 Writes and returns a new value to CR3. This function is only available on
5869 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5870
5871 @param Cr3 The value to write to CR3.
5872
5873 @return The value written to CR3.
5874
5875 **/
5876 UINTN
5877 EFIAPI
5878 AsmWriteCr3 (
5879 UINTN Cr3
5880 );
5881
5882
5883 /**
5884 Writes a value to Control Register 4 (CR4).
5885
5886 Writes and returns a new value to CR4. This function is only available on
5887 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5888
5889 @param Cr4 The value to write to CR4.
5890
5891 @return The value written to CR4.
5892
5893 **/
5894 UINTN
5895 EFIAPI
5896 AsmWriteCr4 (
5897 UINTN Cr4
5898 );
5899
5900
5901 /**
5902 Reads the current value of Debug Register 0 (DR0).
5903
5904 Reads and returns the current value of DR0. This function is only available
5905 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5906 x64.
5907
5908 @return The value of Debug Register 0 (DR0).
5909
5910 **/
5911 UINTN
5912 EFIAPI
5913 AsmReadDr0 (
5914 VOID
5915 );
5916
5917
5918 /**
5919 Reads the current value of Debug Register 1 (DR1).
5920
5921 Reads and returns the current value of DR1. This function is only available
5922 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5923 x64.
5924
5925 @return The value of Debug Register 1 (DR1).
5926
5927 **/
5928 UINTN
5929 EFIAPI
5930 AsmReadDr1 (
5931 VOID
5932 );
5933
5934
5935 /**
5936 Reads the current value of Debug Register 2 (DR2).
5937
5938 Reads and returns the current value of DR2. This function is only available
5939 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5940 x64.
5941
5942 @return The value of Debug Register 2 (DR2).
5943
5944 **/
5945 UINTN
5946 EFIAPI
5947 AsmReadDr2 (
5948 VOID
5949 );
5950
5951
5952 /**
5953 Reads the current value of Debug Register 3 (DR3).
5954
5955 Reads and returns the current value of DR3. This function is only available
5956 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5957 x64.
5958
5959 @return The value of Debug Register 3 (DR3).
5960
5961 **/
5962 UINTN
5963 EFIAPI
5964 AsmReadDr3 (
5965 VOID
5966 );
5967
5968
5969 /**
5970 Reads the current value of Debug Register 4 (DR4).
5971
5972 Reads and returns the current value of DR4. This function is only available
5973 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5974 x64.
5975
5976 @return The value of Debug Register 4 (DR4).
5977
5978 **/
5979 UINTN
5980 EFIAPI
5981 AsmReadDr4 (
5982 VOID
5983 );
5984
5985
5986 /**
5987 Reads the current value of Debug Register 5 (DR5).
5988
5989 Reads and returns the current value of DR5. This function is only available
5990 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5991 x64.
5992
5993 @return The value of Debug Register 5 (DR5).
5994
5995 **/
5996 UINTN
5997 EFIAPI
5998 AsmReadDr5 (
5999 VOID
6000 );
6001
6002
6003 /**
6004 Reads the current value of Debug Register 6 (DR6).
6005
6006 Reads and returns the current value of DR6. This function is only available
6007 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6008 x64.
6009
6010 @return The value of Debug Register 6 (DR6).
6011
6012 **/
6013 UINTN
6014 EFIAPI
6015 AsmReadDr6 (
6016 VOID
6017 );
6018
6019
6020 /**
6021 Reads the current value of Debug Register 7 (DR7).
6022
6023 Reads and returns the current value of DR7. This function is only available
6024 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6025 x64.
6026
6027 @return The value of Debug Register 7 (DR7).
6028
6029 **/
6030 UINTN
6031 EFIAPI
6032 AsmReadDr7 (
6033 VOID
6034 );
6035
6036
6037 /**
6038 Writes a value to Debug Register 0 (DR0).
6039
6040 Writes and returns a new value to DR0. This function is only available on
6041 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6042
6043 @param Dr0 The value to write to Dr0.
6044
6045 @return The value written to Debug Register 0 (DR0).
6046
6047 **/
6048 UINTN
6049 EFIAPI
6050 AsmWriteDr0 (
6051 UINTN Dr0
6052 );
6053
6054
6055 /**
6056 Writes a value to Debug Register 1 (DR1).
6057
6058 Writes and returns a new value to DR1. This function is only available on
6059 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6060
6061 @param Dr1 The value to write to Dr1.
6062
6063 @return The value written to Debug Register 1 (DR1).
6064
6065 **/
6066 UINTN
6067 EFIAPI
6068 AsmWriteDr1 (
6069 UINTN Dr1
6070 );
6071
6072
6073 /**
6074 Writes a value to Debug Register 2 (DR2).
6075
6076 Writes and returns a new value to DR2. This function is only available on
6077 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6078
6079 @param Dr2 The value to write to Dr2.
6080
6081 @return The value written to Debug Register 2 (DR2).
6082
6083 **/
6084 UINTN
6085 EFIAPI
6086 AsmWriteDr2 (
6087 UINTN Dr2
6088 );
6089
6090
6091 /**
6092 Writes a value to Debug Register 3 (DR3).
6093
6094 Writes and returns a new value to DR3. This function is only available on
6095 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6096
6097 @param Dr3 The value to write to Dr3.
6098
6099 @return The value written to Debug Register 3 (DR3).
6100
6101 **/
6102 UINTN
6103 EFIAPI
6104 AsmWriteDr3 (
6105 UINTN Dr3
6106 );
6107
6108
6109 /**
6110 Writes a value to Debug Register 4 (DR4).
6111
6112 Writes and returns a new value to DR4. This function is only available on
6113 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6114
6115 @param Dr4 The value to write to Dr4.
6116
6117 @return The value written to Debug Register 4 (DR4).
6118
6119 **/
6120 UINTN
6121 EFIAPI
6122 AsmWriteDr4 (
6123 UINTN Dr4
6124 );
6125
6126
6127 /**
6128 Writes a value to Debug Register 5 (DR5).
6129
6130 Writes and returns a new value to DR5. This function is only available on
6131 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6132
6133 @param Dr5 The value to write to Dr5.
6134
6135 @return The value written to Debug Register 5 (DR5).
6136
6137 **/
6138 UINTN
6139 EFIAPI
6140 AsmWriteDr5 (
6141 UINTN Dr5
6142 );
6143
6144
6145 /**
6146 Writes a value to Debug Register 6 (DR6).
6147
6148 Writes and returns a new value to DR6. This function is only available on
6149 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6150
6151 @param Dr6 The value to write to Dr6.
6152
6153 @return The value written to Debug Register 6 (DR6).
6154
6155 **/
6156 UINTN
6157 EFIAPI
6158 AsmWriteDr6 (
6159 UINTN Dr6
6160 );
6161
6162
6163 /**
6164 Writes a value to Debug Register 7 (DR7).
6165
6166 Writes and returns a new value to DR7. This function is only available on
6167 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6168
6169 @param Dr7 The value to write to Dr7.
6170
6171 @return The value written to Debug Register 7 (DR7).
6172
6173 **/
6174 UINTN
6175 EFIAPI
6176 AsmWriteDr7 (
6177 UINTN Dr7
6178 );
6179
6180
6181 /**
6182 Reads the current value of Code Segment Register (CS).
6183
6184 Reads and returns the current value of CS. This function is only available on
6185 IA-32 and x64.
6186
6187 @return The current value of CS.
6188
6189 **/
6190 UINT16
6191 EFIAPI
6192 AsmReadCs (
6193 VOID
6194 );
6195
6196
6197 /**
6198 Reads the current value of Data Segment Register (DS).
6199
6200 Reads and returns the current value of DS. This function is only available on
6201 IA-32 and x64.
6202
6203 @return The current value of DS.
6204
6205 **/
6206 UINT16
6207 EFIAPI
6208 AsmReadDs (
6209 VOID
6210 );
6211
6212
6213 /**
6214 Reads the current value of Extra Segment Register (ES).
6215
6216 Reads and returns the current value of ES. This function is only available on
6217 IA-32 and x64.
6218
6219 @return The current value of ES.
6220
6221 **/
6222 UINT16
6223 EFIAPI
6224 AsmReadEs (
6225 VOID
6226 );
6227
6228
6229 /**
6230 Reads the current value of FS Data Segment Register (FS).
6231
6232 Reads and returns the current value of FS. This function is only available on
6233 IA-32 and x64.
6234
6235 @return The current value of FS.
6236
6237 **/
6238 UINT16
6239 EFIAPI
6240 AsmReadFs (
6241 VOID
6242 );
6243
6244
6245 /**
6246 Reads the current value of GS Data Segment Register (GS).
6247
6248 Reads and returns the current value of GS. This function is only available on
6249 IA-32 and x64.
6250
6251 @return The current value of GS.
6252
6253 **/
6254 UINT16
6255 EFIAPI
6256 AsmReadGs (
6257 VOID
6258 );
6259
6260
6261 /**
6262 Reads the current value of Stack Segment Register (SS).
6263
6264 Reads and returns the current value of SS. This function is only available on
6265 IA-32 and x64.
6266
6267 @return The current value of SS.
6268
6269 **/
6270 UINT16
6271 EFIAPI
6272 AsmReadSs (
6273 VOID
6274 );
6275
6276
6277 /**
6278 Reads the current value of Task Register (TR).
6279
6280 Reads and returns the current value of TR. This function is only available on
6281 IA-32 and x64.
6282
6283 @return The current value of TR.
6284
6285 **/
6286 UINT16
6287 EFIAPI
6288 AsmReadTr (
6289 VOID
6290 );
6291
6292
6293 /**
6294 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6295
6296 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6297 function is only available on IA-32 and x64.
6298
6299 If Gdtr is NULL, then ASSERT().
6300
6301 @param Gdtr Pointer to a GDTR descriptor.
6302
6303 **/
6304 VOID
6305 EFIAPI
6306 AsmReadGdtr (
6307 OUT IA32_DESCRIPTOR *Gdtr
6308 );
6309
6310
6311 /**
6312 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6313
6314 Writes and the current GDTR descriptor specified by Gdtr. This function is
6315 only available on IA-32 and x64.
6316
6317 If Gdtr is NULL, then ASSERT().
6318
6319 @param Gdtr Pointer to a GDTR descriptor.
6320
6321 **/
6322 VOID
6323 EFIAPI
6324 AsmWriteGdtr (
6325 IN CONST IA32_DESCRIPTOR *Gdtr
6326 );
6327
6328
6329 /**
6330 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6331
6332 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6333 function is only available on IA-32 and x64.
6334
6335 If Idtr is NULL, then ASSERT().
6336
6337 @param Idtr Pointer to a IDTR descriptor.
6338
6339 **/
6340 VOID
6341 EFIAPI
6342 AsmReadIdtr (
6343 OUT IA32_DESCRIPTOR *Idtr
6344 );
6345
6346
6347 /**
6348 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6349
6350 Writes the current IDTR descriptor and returns it in Idtr. This function is
6351 only available on IA-32 and x64.
6352
6353 If Idtr is NULL, then ASSERT().
6354
6355 @param Idtr Pointer to a IDTR descriptor.
6356
6357 **/
6358 VOID
6359 EFIAPI
6360 AsmWriteIdtr (
6361 IN CONST IA32_DESCRIPTOR *Idtr
6362 );
6363
6364
6365 /**
6366 Reads the current Local Descriptor Table Register(LDTR) selector.
6367
6368 Reads and returns the current 16-bit LDTR descriptor value. This function is
6369 only available on IA-32 and x64.
6370
6371 @return The current selector of LDT.
6372
6373 **/
6374 UINT16
6375 EFIAPI
6376 AsmReadLdtr (
6377 VOID
6378 );
6379
6380
6381 /**
6382 Writes the current Local Descriptor Table Register (LDTR) selector.
6383
6384 Writes and the current LDTR descriptor specified by Ldtr. This function is
6385 only available on IA-32 and x64.
6386
6387 @param Ldtr 16-bit LDTR selector value.
6388
6389 **/
6390 VOID
6391 EFIAPI
6392 AsmWriteLdtr (
6393 IN UINT16 Ldtr
6394 );
6395
6396
6397 /**
6398 Save the current floating point/SSE/SSE2 context to a buffer.
6399
6400 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6401 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6402 available on IA-32 and x64.
6403
6404 If Buffer is NULL, then ASSERT().
6405 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6406
6407 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6408
6409 **/
6410 VOID
6411 EFIAPI
6412 AsmFxSave (
6413 OUT IA32_FX_BUFFER *Buffer
6414 );
6415
6416
6417 /**
6418 Restores the current floating point/SSE/SSE2 context from a buffer.
6419
6420 Restores the current floating point/SSE/SSE2 state from the buffer specified
6421 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6422 only available on IA-32 and x64.
6423
6424 If Buffer is NULL, then ASSERT().
6425 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6426 If Buffer was not saved with AsmFxSave(), then ASSERT().
6427
6428 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6429
6430 **/
6431 VOID
6432 EFIAPI
6433 AsmFxRestore (
6434 IN CONST IA32_FX_BUFFER *Buffer
6435 );
6436
6437
6438 /**
6439 Reads the current value of 64-bit MMX Register #0 (MM0).
6440
6441 Reads and returns the current value of MM0. This function is only available
6442 on IA-32 and x64.
6443
6444 @return The current value of MM0.
6445
6446 **/
6447 UINT64
6448 EFIAPI
6449 AsmReadMm0 (
6450 VOID
6451 );
6452
6453
6454 /**
6455 Reads the current value of 64-bit MMX Register #1 (MM1).
6456
6457 Reads and returns the current value of MM1. This function is only available
6458 on IA-32 and x64.
6459
6460 @return The current value of MM1.
6461
6462 **/
6463 UINT64
6464 EFIAPI
6465 AsmReadMm1 (
6466 VOID
6467 );
6468
6469
6470 /**
6471 Reads the current value of 64-bit MMX Register #2 (MM2).
6472
6473 Reads and returns the current value of MM2. This function is only available
6474 on IA-32 and x64.
6475
6476 @return The current value of MM2.
6477
6478 **/
6479 UINT64
6480 EFIAPI
6481 AsmReadMm2 (
6482 VOID
6483 );
6484
6485
6486 /**
6487 Reads the current value of 64-bit MMX Register #3 (MM3).
6488
6489 Reads and returns the current value of MM3. This function is only available
6490 on IA-32 and x64.
6491
6492 @return The current value of MM3.
6493
6494 **/
6495 UINT64
6496 EFIAPI
6497 AsmReadMm3 (
6498 VOID
6499 );
6500
6501
6502 /**
6503 Reads the current value of 64-bit MMX Register #4 (MM4).
6504
6505 Reads and returns the current value of MM4. This function is only available
6506 on IA-32 and x64.
6507
6508 @return The current value of MM4.
6509
6510 **/
6511 UINT64
6512 EFIAPI
6513 AsmReadMm4 (
6514 VOID
6515 );
6516
6517
6518 /**
6519 Reads the current value of 64-bit MMX Register #5 (MM5).
6520
6521 Reads and returns the current value of MM5. This function is only available
6522 on IA-32 and x64.
6523
6524 @return The current value of MM5.
6525
6526 **/
6527 UINT64
6528 EFIAPI
6529 AsmReadMm5 (
6530 VOID
6531 );
6532
6533
6534 /**
6535 Reads the current value of 64-bit MMX Register #6 (MM6).
6536
6537 Reads and returns the current value of MM6. This function is only available
6538 on IA-32 and x64.
6539
6540 @return The current value of MM6.
6541
6542 **/
6543 UINT64
6544 EFIAPI
6545 AsmReadMm6 (
6546 VOID
6547 );
6548
6549
6550 /**
6551 Reads the current value of 64-bit MMX Register #7 (MM7).
6552
6553 Reads and returns the current value of MM7. This function is only available
6554 on IA-32 and x64.
6555
6556 @return The current value of MM7.
6557
6558 **/
6559 UINT64
6560 EFIAPI
6561 AsmReadMm7 (
6562 VOID
6563 );
6564
6565
6566 /**
6567 Writes the current value of 64-bit MMX Register #0 (MM0).
6568
6569 Writes the current value of MM0. This function is only available on IA32 and
6570 x64.
6571
6572 @param Value The 64-bit value to write to MM0.
6573
6574 **/
6575 VOID
6576 EFIAPI
6577 AsmWriteMm0 (
6578 IN UINT64 Value
6579 );
6580
6581
6582 /**
6583 Writes the current value of 64-bit MMX Register #1 (MM1).
6584
6585 Writes the current value of MM1. This function is only available on IA32 and
6586 x64.
6587
6588 @param Value The 64-bit value to write to MM1.
6589
6590 **/
6591 VOID
6592 EFIAPI
6593 AsmWriteMm1 (
6594 IN UINT64 Value
6595 );
6596
6597
6598 /**
6599 Writes the current value of 64-bit MMX Register #2 (MM2).
6600
6601 Writes the current value of MM2. This function is only available on IA32 and
6602 x64.
6603
6604 @param Value The 64-bit value to write to MM2.
6605
6606 **/
6607 VOID
6608 EFIAPI
6609 AsmWriteMm2 (
6610 IN UINT64 Value
6611 );
6612
6613
6614 /**
6615 Writes the current value of 64-bit MMX Register #3 (MM3).
6616
6617 Writes the current value of MM3. This function is only available on IA32 and
6618 x64.
6619
6620 @param Value The 64-bit value to write to MM3.
6621
6622 **/
6623 VOID
6624 EFIAPI
6625 AsmWriteMm3 (
6626 IN UINT64 Value
6627 );
6628
6629
6630 /**
6631 Writes the current value of 64-bit MMX Register #4 (MM4).
6632
6633 Writes the current value of MM4. This function is only available on IA32 and
6634 x64.
6635
6636 @param Value The 64-bit value to write to MM4.
6637
6638 **/
6639 VOID
6640 EFIAPI
6641 AsmWriteMm4 (
6642 IN UINT64 Value
6643 );
6644
6645
6646 /**
6647 Writes the current value of 64-bit MMX Register #5 (MM5).
6648
6649 Writes the current value of MM5. This function is only available on IA32 and
6650 x64.
6651
6652 @param Value The 64-bit value to write to MM5.
6653
6654 **/
6655 VOID
6656 EFIAPI
6657 AsmWriteMm5 (
6658 IN UINT64 Value
6659 );
6660
6661
6662 /**
6663 Writes the current value of 64-bit MMX Register #6 (MM6).
6664
6665 Writes the current value of MM6. This function is only available on IA32 and
6666 x64.
6667
6668 @param Value The 64-bit value to write to MM6.
6669
6670 **/
6671 VOID
6672 EFIAPI
6673 AsmWriteMm6 (
6674 IN UINT64 Value
6675 );
6676
6677
6678 /**
6679 Writes the current value of 64-bit MMX Register #7 (MM7).
6680
6681 Writes the current value of MM7. This function is only available on IA32 and
6682 x64.
6683
6684 @param Value The 64-bit value to write to MM7.
6685
6686 **/
6687 VOID
6688 EFIAPI
6689 AsmWriteMm7 (
6690 IN UINT64 Value
6691 );
6692
6693
6694 /**
6695 Reads the current value of Time Stamp Counter (TSC).
6696
6697 Reads and returns the current value of TSC. This function is only available
6698 on IA-32 and x64.
6699
6700 @return The current value of TSC
6701
6702 **/
6703 UINT64
6704 EFIAPI
6705 AsmReadTsc (
6706 VOID
6707 );
6708
6709
6710 /**
6711 Reads the current value of a Performance Counter (PMC).
6712
6713 Reads and returns the current value of performance counter specified by
6714 Index. This function is only available on IA-32 and x64.
6715
6716 @param Index The 32-bit Performance Counter index to read.
6717
6718 @return The value of the PMC specified by Index.
6719
6720 **/
6721 UINT64
6722 EFIAPI
6723 AsmReadPmc (
6724 IN UINT32 Index
6725 );
6726
6727
6728 /**
6729 Sets up a monitor buffer that is used by AsmMwait().
6730
6731 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6732 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6733
6734 @param Eax The value to load into EAX or RAX before executing the MONITOR
6735 instruction.
6736 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6737 instruction.
6738 @param Edx The value to load into EDX or RDX before executing the MONITOR
6739 instruction.
6740
6741 @return Eax
6742
6743 **/
6744 UINTN
6745 EFIAPI
6746 AsmMonitor (
6747 IN UINTN Eax,
6748 IN UINTN Ecx,
6749 IN UINTN Edx
6750 );
6751
6752
6753 /**
6754 Executes an MWAIT instruction.
6755
6756 Executes an MWAIT instruction with the register state specified by Eax and
6757 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6758
6759 @param Eax The value to load into EAX or RAX before executing the MONITOR
6760 instruction.
6761 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6762 instruction.
6763
6764 @return Eax
6765
6766 **/
6767 UINTN
6768 EFIAPI
6769 AsmMwait (
6770 IN UINTN Eax,
6771 IN UINTN Ecx
6772 );
6773
6774
6775 /**
6776 Executes a WBINVD instruction.
6777
6778 Executes a WBINVD instruction. This function is only available on IA-32 and
6779 x64.
6780
6781 **/
6782 VOID
6783 EFIAPI
6784 AsmWbinvd (
6785 VOID
6786 );
6787
6788
6789 /**
6790 Executes a INVD instruction.
6791
6792 Executes a INVD instruction. This function is only available on IA-32 and
6793 x64.
6794
6795 **/
6796 VOID
6797 EFIAPI
6798 AsmInvd (
6799 VOID
6800 );
6801
6802
6803 /**
6804 Flushes a cache line from all the instruction and data caches within the
6805 coherency domain of the CPU.
6806
6807 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6808 This function is only available on IA-32 and x64.
6809
6810 @param LinearAddress The address of the cache line to flush. If the CPU is
6811 in a physical addressing mode, then LinearAddress is a
6812 physical address. If the CPU is in a virtual
6813 addressing mode, then LinearAddress is a virtual
6814 address.
6815
6816 @return LinearAddress
6817 **/
6818 VOID *
6819 EFIAPI
6820 AsmFlushCacheLine (
6821 IN VOID *LinearAddress
6822 );
6823
6824
6825 /**
6826 Enables the 32-bit paging mode on the CPU.
6827
6828 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6829 must be properly initialized prior to calling this service. This function
6830 assumes the current execution mode is 32-bit protected mode. This function is
6831 only available on IA-32. After the 32-bit paging mode is enabled, control is
6832 transferred to the function specified by EntryPoint using the new stack
6833 specified by NewStack and passing in the parameters specified by Context1 and
6834 Context2. Context1 and Context2 are optional and may be NULL. The function
6835 EntryPoint must never return.
6836
6837 If the current execution mode is not 32-bit protected mode, then ASSERT().
6838 If EntryPoint is NULL, then ASSERT().
6839 If NewStack is NULL, then ASSERT().
6840
6841 There are a number of constraints that must be followed before calling this
6842 function:
6843 1) Interrupts must be disabled.
6844 2) The caller must be in 32-bit protected mode with flat descriptors. This
6845 means all descriptors must have a base of 0 and a limit of 4GB.
6846 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6847 descriptors.
6848 4) CR3 must point to valid page tables that will be used once the transition
6849 is complete, and those page tables must guarantee that the pages for this
6850 function and the stack are identity mapped.
6851
6852 @param EntryPoint A pointer to function to call with the new stack after
6853 paging is enabled.
6854 @param Context1 A pointer to the context to pass into the EntryPoint
6855 function as the first parameter after paging is enabled.
6856 @param Context2 A pointer to the context to pass into the EntryPoint
6857 function as the second parameter after paging is enabled.
6858 @param NewStack A pointer to the new stack to use for the EntryPoint
6859 function after paging is enabled.
6860
6861 **/
6862 VOID
6863 EFIAPI
6864 AsmEnablePaging32 (
6865 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6866 IN VOID *Context1, OPTIONAL
6867 IN VOID *Context2, OPTIONAL
6868 IN VOID *NewStack
6869 );
6870
6871
6872 /**
6873 Disables the 32-bit paging mode on the CPU.
6874
6875 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6876 mode. This function assumes the current execution mode is 32-paged protected
6877 mode. This function is only available on IA-32. After the 32-bit paging mode
6878 is disabled, control is transferred to the function specified by EntryPoint
6879 using the new stack specified by NewStack and passing in the parameters
6880 specified by Context1 and Context2. Context1 and Context2 are optional and
6881 may be NULL. The function EntryPoint must never return.
6882
6883 If the current execution mode is not 32-bit paged mode, then ASSERT().
6884 If EntryPoint is NULL, then ASSERT().
6885 If NewStack is NULL, then ASSERT().
6886
6887 There are a number of constraints that must be followed before calling this
6888 function:
6889 1) Interrupts must be disabled.
6890 2) The caller must be in 32-bit paged mode.
6891 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6892 4) CR3 must point to valid page tables that guarantee that the pages for
6893 this function and the stack are identity mapped.
6894
6895 @param EntryPoint A pointer to function to call with the new stack after
6896 paging is disabled.
6897 @param Context1 A pointer to the context to pass into the EntryPoint
6898 function as the first parameter after paging is disabled.
6899 @param Context2 A pointer to the context to pass into the EntryPoint
6900 function as the second parameter after paging is
6901 disabled.
6902 @param NewStack A pointer to the new stack to use for the EntryPoint
6903 function after paging is disabled.
6904
6905 **/
6906 VOID
6907 EFIAPI
6908 AsmDisablePaging32 (
6909 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6910 IN VOID *Context1, OPTIONAL
6911 IN VOID *Context2, OPTIONAL
6912 IN VOID *NewStack
6913 );
6914
6915
6916 /**
6917 Enables the 64-bit paging mode on the CPU.
6918
6919 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6920 must be properly initialized prior to calling this service. This function
6921 assumes the current execution mode is 32-bit protected mode with flat
6922 descriptors. This function is only available on IA-32. After the 64-bit
6923 paging mode is enabled, control is transferred to the function specified by
6924 EntryPoint using the new stack specified by NewStack and passing in the
6925 parameters specified by Context1 and Context2. Context1 and Context2 are
6926 optional and may be 0. The function EntryPoint must never return.
6927
6928 If the current execution mode is not 32-bit protected mode with flat
6929 descriptors, then ASSERT().
6930 If EntryPoint is 0, then ASSERT().
6931 If NewStack is 0, then ASSERT().
6932
6933 @param Cs The 16-bit selector to load in the CS before EntryPoint
6934 is called. The descriptor in the GDT that this selector
6935 references must be setup for long mode.
6936 @param EntryPoint The 64-bit virtual address of the function to call with
6937 the new stack after paging is enabled.
6938 @param Context1 The 64-bit virtual address of the context to pass into
6939 the EntryPoint function as the first parameter after
6940 paging is enabled.
6941 @param Context2 The 64-bit virtual address of the context to pass into
6942 the EntryPoint function as the second parameter after
6943 paging is enabled.
6944 @param NewStack The 64-bit virtual address of the new stack to use for
6945 the EntryPoint function after paging is enabled.
6946
6947 **/
6948 VOID
6949 EFIAPI
6950 AsmEnablePaging64 (
6951 IN UINT16 Cs,
6952 IN UINT64 EntryPoint,
6953 IN UINT64 Context1, OPTIONAL
6954 IN UINT64 Context2, OPTIONAL
6955 IN UINT64 NewStack
6956 );
6957
6958
6959 /**
6960 Disables the 64-bit paging mode on the CPU.
6961
6962 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
6963 mode. This function assumes the current execution mode is 64-paging mode.
6964 This function is only available on x64. After the 64-bit paging mode is
6965 disabled, control is transferred to the function specified by EntryPoint
6966 using the new stack specified by NewStack and passing in the parameters
6967 specified by Context1 and Context2. Context1 and Context2 are optional and
6968 may be 0. The function EntryPoint must never return.
6969
6970 If the current execution mode is not 64-bit paged mode, then ASSERT().
6971 If EntryPoint is 0, then ASSERT().
6972 If NewStack is 0, then ASSERT().
6973
6974 @param Cs The 16-bit selector to load in the CS before EntryPoint
6975 is called. The descriptor in the GDT that this selector
6976 references must be setup for 32-bit protected mode.
6977 @param EntryPoint The 64-bit virtual address of the function to call with
6978 the new stack after paging is disabled.
6979 @param Context1 The 64-bit virtual address of the context to pass into
6980 the EntryPoint function as the first parameter after
6981 paging is disabled.
6982 @param Context2 The 64-bit virtual address of the context to pass into
6983 the EntryPoint function as the second parameter after
6984 paging is disabled.
6985 @param NewStack The 64-bit virtual address of the new stack to use for
6986 the EntryPoint function after paging is disabled.
6987
6988 **/
6989 VOID
6990 EFIAPI
6991 AsmDisablePaging64 (
6992 IN UINT16 Cs,
6993 IN UINT32 EntryPoint,
6994 IN UINT32 Context1, OPTIONAL
6995 IN UINT32 Context2, OPTIONAL
6996 IN UINT32 NewStack
6997 );
6998
6999
7000 //
7001 // 16-bit thunking services
7002 //
7003
7004 /**
7005 Retrieves the properties for 16-bit thunk functions.
7006
7007 Computes the size of the buffer and stack below 1MB required to use the
7008 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7009 buffer size is returned in RealModeBufferSize, and the stack size is returned
7010 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7011 then the actual minimum stack size is ExtraStackSize plus the maximum number
7012 of bytes that need to be passed to the 16-bit real mode code.
7013
7014 If RealModeBufferSize is NULL, then ASSERT().
7015 If ExtraStackSize is NULL, then ASSERT().
7016
7017 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7018 required to use the 16-bit thunk functions.
7019 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7020 that the 16-bit thunk functions require for
7021 temporary storage in the transition to and from
7022 16-bit real mode.
7023
7024 **/
7025 VOID
7026 EFIAPI
7027 AsmGetThunk16Properties (
7028 OUT UINT32 *RealModeBufferSize,
7029 OUT UINT32 *ExtraStackSize
7030 );
7031
7032
7033 /**
7034 Prepares all structures a code required to use AsmThunk16().
7035
7036 Prepares all structures and code required to use AsmThunk16().
7037
7038 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7039 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7040
7041 If ThunkContext is NULL, then ASSERT().
7042
7043 @param ThunkContext A pointer to the context structure that describes the
7044 16-bit real mode code to call.
7045
7046 **/
7047 VOID
7048 EFIAPI
7049 AsmPrepareThunk16 (
7050 OUT THUNK_CONTEXT *ThunkContext
7051 );
7052
7053
7054 /**
7055 Transfers control to a 16-bit real mode entry point and returns the results.
7056
7057 Transfers control to a 16-bit real mode entry point and returns the results.
7058 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7059 This function must be called with interrupts disabled.
7060
7061 The register state from the RealModeState field of ThunkContext is restored just prior
7062 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7063 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7064 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7065 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7066 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7067 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7068 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7069 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7070 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7071 after the RETF instruction is executed.
7072
7073 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7074 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7075 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7076
7077 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7078 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7079 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7080
7081 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7082 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7083
7084 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7085 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7086 disable the A20 mask.
7087
7088 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7089 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7090 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7091
7092 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7093 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7094
7095 If ThunkContext is NULL, then ASSERT().
7096 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7097 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7098 ThunkAttributes, then ASSERT().
7099
7100 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7101 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7102
7103 @param ThunkContext A pointer to the context structure that describes the
7104 16-bit real mode code to call.
7105
7106 **/
7107 VOID
7108 EFIAPI
7109 AsmThunk16 (
7110 IN OUT THUNK_CONTEXT *ThunkContext
7111 );
7112
7113
7114 /**
7115 Prepares all structures and code for a 16-bit real mode thunk, transfers
7116 control to a 16-bit real mode entry point, and returns the results.
7117
7118 Prepares all structures and code for a 16-bit real mode thunk, transfers
7119 control to a 16-bit real mode entry point, and returns the results. If the
7120 caller only need to perform a single 16-bit real mode thunk, then this
7121 service should be used. If the caller intends to make more than one 16-bit
7122 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7123 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7124
7125 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7126 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7127
7128 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7129
7130 @param ThunkContext A pointer to the context structure that describes the
7131 16-bit real mode code to call.
7132
7133 **/
7134 VOID
7135 EFIAPI
7136 AsmPrepareAndThunk16 (
7137 IN OUT THUNK_CONTEXT *ThunkContext
7138 );
7139
7140 #endif
7141 #endif
7142
7143