MdePkg/Include/Library/BaseLib.h

   1 /** @file
   2   Provides string functions, linked list functions, math functions, synchronization
   3   functions, and CPU architecture-specific functions.
   4
   5 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
   6 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   7 This program and the accompanying materials
   8 are licensed and made available under the terms and conditions of the BSD License
   9 which accompanies this distribution.  The full text of the license may be found at
  10 http://opensource.org/licenses/bsd-license.php.
  11
  12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #ifndef __BASE_LIB__
  18 #define __BASE_LIB__
  19
  20 //
  21 // Definitions for architecture-specific types
  22 //
  23 #if   defined (MDE_CPU_IA32)
  24 ///
  25 /// The IA-32 architecture context buffer used by SetJump() and LongJump().
  26 ///
  27 typedef struct {
  28   UINT32                            Ebx;
  29   UINT32                            Esi;
  30   UINT32                            Edi;
  31   UINT32                            Ebp;
  32   UINT32                            Esp;
  33   UINT32                            Eip;
  34 } BASE_LIBRARY_JUMP_BUFFER;
  35
  36 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
  37
  38 #endif // defined (MDE_CPU_IA32)
  39
  40 #if defined (MDE_CPU_IPF)
  41
  42 ///
  43 /// The Itanium architecture context buffer used by SetJump() and LongJump().
  44 ///
  45 typedef struct {
  46   UINT64                            F2[2];
  47   UINT64                            F3[2];
  48   UINT64                            F4[2];
  49   UINT64                            F5[2];
  50   UINT64                            F16[2];
  51   UINT64                            F17[2];
  52   UINT64                            F18[2];
  53   UINT64                            F19[2];
  54   UINT64                            F20[2];
  55   UINT64                            F21[2];
  56   UINT64                            F22[2];
  57   UINT64                            F23[2];
  58   UINT64                            F24[2];
  59   UINT64                            F25[2];
  60   UINT64                            F26[2];
  61   UINT64                            F27[2];
  62   UINT64                            F28[2];
  63   UINT64                            F29[2];
  64   UINT64                            F30[2];
  65   UINT64                            F31[2];
  66   UINT64                            R4;
  67   UINT64                            R5;
  68   UINT64                            R6;
  69   UINT64                            R7;
  70   UINT64                            SP;
  71   UINT64                            BR0;
  72   UINT64                            BR1;
  73   UINT64                            BR2;
  74   UINT64                            BR3;
  75   UINT64                            BR4;
  76   UINT64                            BR5;
  77   UINT64                            InitialUNAT;
  78   UINT64                            AfterSpillUNAT;
  79   UINT64                            PFS;
  80   UINT64                            BSP;
  81   UINT64                            Predicates;
  82   UINT64                            LoopCount;
  83   UINT64                            FPSR;
  84 } BASE_LIBRARY_JUMP_BUFFER;
  85
  86 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
  87
  88 #endif // defined (MDE_CPU_IPF)
  89
  90 #if defined (MDE_CPU_X64)
  91 ///
  92 /// The x64 architecture context buffer used by SetJump() and LongJump().
  93 ///
  94 typedef struct {
  95   UINT64                            Rbx;
  96   UINT64                            Rsp;
  97   UINT64                            Rbp;
  98   UINT64                            Rdi;
  99   UINT64                            Rsi;
 100   UINT64                            R12;
 101   UINT64                            R13;
 102   UINT64                            R14;
 103   UINT64                            R15;
 104   UINT64                            Rip;
 105   UINT64                            MxCsr;
 106   UINT8                             XmmBuffer[160]; ///< XMM6-XMM15.
 107 } BASE_LIBRARY_JUMP_BUFFER;
 108
 109 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
 110
 111 #endif // defined (MDE_CPU_X64)
 112
 113 #if defined (MDE_CPU_EBC)
 114 ///
 115 /// The EBC context buffer used by SetJump() and LongJump().
 116 ///
 117 typedef struct {
 118   UINT64                            R0;
 119   UINT64                            R1;
 120   UINT64                            R2;
 121   UINT64                            R3;
 122   UINT64                            IP;
 123 } BASE_LIBRARY_JUMP_BUFFER;
 124
 125 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
 126
 127 #endif // defined (MDE_CPU_EBC)
 128
 129 #if defined (MDE_CPU_ARM)
 130
 131 typedef struct {
 132   UINT32    R3;  ///< A copy of R13.
 133   UINT32    R4;
 134   UINT32    R5;
 135   UINT32    R6;
 136   UINT32    R7;
 137   UINT32    R8;
 138   UINT32    R9;
 139   UINT32    R10;
 140   UINT32    R11;
 141   UINT32    R12;
 142   UINT32    R14;
 143 } BASE_LIBRARY_JUMP_BUFFER;
 144
 145 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
 146
 147 #endif  // defined (MDE_CPU_ARM)
 148
 149 //
 150 // String Services
 151 //
 152
 153 /**
 154   Copies one Null-terminated Unicode string to another Null-terminated Unicode
 155   string and returns the new Unicode string.
 156
 157   This function copies the contents of the Unicode string Source to the Unicode
 158   string Destination, and returns Destination. If Source and Destination
 159   overlap, then the results are undefined.
 160
 161   If Destination is NULL, then ASSERT().
 162   If Destination is not aligned on a 16-bit boundary, then ASSERT().
 163   If Source is NULL, then ASSERT().
 164   If Source is not aligned on a 16-bit boundary, then ASSERT().
 165   If Source and Destination overlap, then ASSERT().
 166   If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
 167   PcdMaximumUnicodeStringLength Unicode characters not including the
 168   Null-terminator, then ASSERT().
 169
 170   @param  Destination The pointer to a Null-terminated Unicode string.
 171   @param  Source      The pointer to a Null-terminated Unicode string.
 172
 173   @return Destination.
 174
 175 **/
 176 CHAR16 *
 177 EFIAPI
 178 StrCpy (
 179   OUT     CHAR16                    *Destination,
 180   IN      CONST CHAR16              *Source
 181   );
 182
 183
 184 /**
 185   Copies up to a specified length from one Null-terminated Unicode string to
 186   another Null-terminated Unicode string and returns the new Unicode string.
 187
 188   This function copies the contents of the Unicode string Source to the Unicode
 189   string Destination, and returns Destination. At most, Length Unicode
 190   characters are copied from Source to Destination. If Length is 0, then
 191   Destination is returned unmodified. If Length is greater that the number of
 192   Unicode characters in Source, then Destination is padded with Null Unicode
 193   characters. If Source and Destination overlap, then the results are
 194   undefined.
 195
 196   If Length > 0 and Destination is NULL, then ASSERT().
 197   If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
 198   If Length > 0 and Source is NULL, then ASSERT().
 199   If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
 200   If Source and Destination overlap, then ASSERT().
 201   If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
 202   PcdMaximumUnicodeStringLength, then ASSERT().
 203   If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
 204   PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
 205   then ASSERT().
 206
 207   @param  Destination The pointer to a Null-terminated Unicode string.
 208   @param  Source      The pointer to a Null-terminated Unicode string.
 209   @param  Length      The maximum number of Unicode characters to copy.
 210
 211   @return Destination.
 212
 213 **/
 214 CHAR16 *
 215 EFIAPI
 216 StrnCpy (
 217   OUT     CHAR16                    *Destination,
 218   IN      CONST CHAR16              *Source,
 219   IN      UINTN                     Length
 220   );
 221
 222
 223 /**
 224   Returns the length of a Null-terminated Unicode string.
 225
 226   This function returns the number of Unicode characters in the Null-terminated
 227   Unicode string specified by String.
 228
 229   If String is NULL, then ASSERT().
 230   If String is not aligned on a 16-bit boundary, then ASSERT().
 231   If PcdMaximumUnicodeStringLength is not zero, and String contains more than
 232   PcdMaximumUnicodeStringLength Unicode characters not including the
 233   Null-terminator, then ASSERT().
 234
 235   @param  String  Pointer to a Null-terminated Unicode string.
 236
 237   @return The length of String.
 238
 239 **/
 240 UINTN
 241 EFIAPI
 242 StrLen (
 243   IN      CONST CHAR16              *String
 244   );
 245
 246
 247 /**
 248   Returns the size of a Null-terminated Unicode string in bytes, including the
 249   Null terminator.
 250
 251   This function returns the size, in bytes, of the Null-terminated Unicode string
 252   specified by String.
 253
 254   If String is NULL, then ASSERT().
 255   If String is not aligned on a 16-bit boundary, then ASSERT().
 256   If PcdMaximumUnicodeStringLength is not zero, and String contains more than
 257   PcdMaximumUnicodeStringLength Unicode characters not including the
 258   Null-terminator, then ASSERT().
 259
 260   @param  String  The pointer to a Null-terminated Unicode string.
 261
 262   @return The size of String.
 263
 264 **/
 265 UINTN
 266 EFIAPI
 267 StrSize (
 268   IN      CONST CHAR16              *String
 269   );
 270
 271
 272 /**
 273   Compares two Null-terminated Unicode strings, and returns the difference
 274   between the first mismatched Unicode characters.
 275
 276   This function compares the Null-terminated Unicode string FirstString to the
 277   Null-terminated Unicode string SecondString. If FirstString is identical to
 278   SecondString, then 0 is returned. Otherwise, the value returned is the first
 279   mismatched Unicode character in SecondString subtracted from the first
 280   mismatched Unicode character in FirstString.
 281
 282   If FirstString is NULL, then ASSERT().
 283   If FirstString is not aligned on a 16-bit boundary, then ASSERT().
 284   If SecondString is NULL, then ASSERT().
 285   If SecondString is not aligned on a 16-bit boundary, then ASSERT().
 286   If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
 287   than PcdMaximumUnicodeStringLength Unicode characters not including the
 288   Null-terminator, then ASSERT().
 289   If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
 290   than PcdMaximumUnicodeStringLength Unicode characters, not including the
 291   Null-terminator, then ASSERT().
 292
 293   @param  FirstString   The pointer to a Null-terminated Unicode string.
 294   @param  SecondString  The pointer to a Null-terminated Unicode string.
 295
 296   @retval 0      FirstString is identical to SecondString.
 297   @return others FirstString is not identical to SecondString.
 298
 299 **/
 300 INTN
 301 EFIAPI
 302 StrCmp (
 303   IN      CONST CHAR16              *FirstString,
 304   IN      CONST CHAR16              *SecondString
 305   );
 306
 307
 308 /**
 309   Compares up to a specified length the contents of two Null-terminated Unicode strings,
 310   and returns the difference between the first mismatched Unicode characters.
 311
 312   This function compares the Null-terminated Unicode string FirstString to the
 313   Null-terminated Unicode string SecondString. At most, Length Unicode
 314   characters will be compared. If Length is 0, then 0 is returned. If
 315   FirstString is identical to SecondString, then 0 is returned. Otherwise, the
 316   value returned is the first mismatched Unicode character in SecondString
 317   subtracted from the first mismatched Unicode character in FirstString.
 318
 319   If Length > 0 and FirstString is NULL, then ASSERT().
 320   If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
 321   If Length > 0 and SecondString is NULL, then ASSERT().
 322   If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
 323   If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
 324   PcdMaximumUnicodeStringLength, then ASSERT().
 325   If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
 326   PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
 327   then ASSERT().
 328   If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
 329   PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
 330   then ASSERT().
 331
 332   @param  FirstString   The pointer to a Null-terminated Unicode string.
 333   @param  SecondString  The pointer to a Null-terminated Unicode string.
 334   @param  Length        The maximum number of Unicode characters to compare.
 335
 336   @retval 0      FirstString is identical to SecondString.
 337   @return others FirstString is not identical to SecondString.
 338
 339 **/
 340 INTN
 341 EFIAPI
 342 StrnCmp (
 343   IN      CONST CHAR16              *FirstString,
 344   IN      CONST CHAR16              *SecondString,
 345   IN      UINTN                     Length
 346   );
 347
 348
 349 /**
 350   Concatenates one Null-terminated Unicode string to another Null-terminated
 351   Unicode string, and returns the concatenated Unicode string.
 352
 353   This function concatenates two Null-terminated Unicode strings. The contents
 354   of Null-terminated Unicode string Source are concatenated to the end of
 355   Null-terminated Unicode string Destination. The Null-terminated concatenated
 356   Unicode String is returned. If Source and Destination overlap, then the
 357   results are undefined.
 358
 359   If Destination is NULL, then ASSERT().
 360   If Destination is not aligned on a 16-bit boundary, then ASSERT().
 361   If Source is NULL, then ASSERT().
 362   If Source is not aligned on a 16-bit boundary, then ASSERT().
 363   If Source and Destination overlap, then ASSERT().
 364   If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
 365   than PcdMaximumUnicodeStringLength Unicode characters, not including the
 366   Null-terminator, then ASSERT().
 367   If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
 368   PcdMaximumUnicodeStringLength Unicode characters, not including the
 369   Null-terminator, then ASSERT().
 370   If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
 371   and Source results in a Unicode string with more than
 372   PcdMaximumUnicodeStringLength Unicode characters, not including the
 373   Null-terminator, then ASSERT().
 374
 375   @param  Destination The pointer to a Null-terminated Unicode string.
 376   @param  Source      The pointer to a Null-terminated Unicode string.
 377
 378   @return Destination.
 379
 380 **/
 381 CHAR16 *
 382 EFIAPI
 383 StrCat (
 384   IN OUT  CHAR16                    *Destination,
 385   IN      CONST CHAR16              *Source
 386   );
 387
 388
 389 /**
 390   Concatenates up to a specified length one Null-terminated Unicode to the end
 391   of another Null-terminated Unicode string, and returns the concatenated
 392   Unicode string.
 393
 394   This function concatenates two Null-terminated Unicode strings. The contents
 395   of Null-terminated Unicode string Source are concatenated to the end of
 396   Null-terminated Unicode string Destination, and Destination is returned. At
 397   most, Length Unicode characters are concatenated from Source to the end of
 398   Destination, and Destination is always Null-terminated. If Length is 0, then
 399   Destination is returned unmodified. If Source and Destination overlap, then
 400   the results are undefined.
 401
 402   If Destination is NULL, then ASSERT().
 403   If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
 404   If Length > 0 and Source is NULL, then ASSERT().
 405   If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
 406   If Source and Destination overlap, then ASSERT().
 407   If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
 408   PcdMaximumUnicodeStringLength, then ASSERT().
 409   If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
 410   than PcdMaximumUnicodeStringLength Unicode characters, not including the
 411   Null-terminator, then ASSERT().
 412   If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
 413   PcdMaximumUnicodeStringLength Unicode characters, not including the
 414   Null-terminator, then ASSERT().
 415   If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
 416   and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
 417   Unicode characters, not including the Null-terminator, then ASSERT().
 418
 419   @param  Destination The pointer to a Null-terminated Unicode string.
 420   @param  Source      The pointer to a Null-terminated Unicode string.
 421   @param  Length      The maximum number of Unicode characters to concatenate from
 422                       Source.
 423
 424   @return Destination.
 425
 426 **/
 427 CHAR16 *
 428 EFIAPI
 429 StrnCat (
 430   IN OUT  CHAR16                    *Destination,
 431   IN      CONST CHAR16              *Source,
 432   IN      UINTN                     Length
 433   );
 434
 435 /**
 436   Returns the first occurrence of a Null-terminated Unicode sub-string
 437   in a Null-terminated Unicode string.
 438
 439   This function scans the contents of the Null-terminated Unicode string
 440   specified by String and returns the first occurrence of SearchString.
 441   If SearchString is not found in String, then NULL is returned.  If
 442   the length of SearchString is zero, then String is returned.
 443
 444   If String is NULL, then ASSERT().
 445   If String is not aligned on a 16-bit boundary, then ASSERT().
 446   If SearchString is NULL, then ASSERT().
 447   If SearchString is not aligned on a 16-bit boundary, then ASSERT().
 448
 449   If PcdMaximumUnicodeStringLength is not zero, and SearchString
 450   or String contains more than PcdMaximumUnicodeStringLength Unicode
 451   characters, not including the Null-terminator, then ASSERT().
 452
 453   @param  String          The pointer to a Null-terminated Unicode string.
 454   @param  SearchString    The pointer to a Null-terminated Unicode string to search for.
 455
 456   @retval NULL            If the SearchString does not appear in String.
 457   @return others          If there is a match.
 458
 459 **/
 460 CHAR16 *
 461 EFIAPI
 462 StrStr (
 463   IN      CONST CHAR16              *String,
 464   IN      CONST CHAR16              *SearchString
 465   );
 466
 467 /**
 468   Convert a Null-terminated Unicode decimal string to a value of
 469   type UINTN.
 470
 471   This function returns a value of type UINTN by interpreting the contents
 472   of the Unicode string specified by String as a decimal number. The format
 473   of the input Unicode string String is:
 474
 475                   [spaces] [decimal digits].
 476
 477   The valid decimal digit character is in the range [0-9]. The
 478   function will ignore the pad space, which includes spaces or
 479   tab characters, before [decimal digits]. The running zero in the
 480   beginning of [decimal digits] will be ignored. Then, the function
 481   stops at the first character that is a not a valid decimal character
 482   or a Null-terminator, whichever one comes first.
 483
 484   If String is NULL, then ASSERT().
 485   If String is not aligned in a 16-bit boundary, then ASSERT().
 486   If String has only pad spaces, then 0 is returned.
 487   If String has no pad spaces or valid decimal digits,
 488   then 0 is returned.
 489   If the number represented by String overflows according
 490   to the range defined by UINTN, then ASSERT().
 491
 492   If PcdMaximumUnicodeStringLength is not zero, and String contains
 493   more than PcdMaximumUnicodeStringLength Unicode characters not including
 494   the Null-terminator, then ASSERT().
 495
 496   @param  String      The pointer to a Null-terminated Unicode string.
 497
 498   @retval Value translated from String.
 499
 500 **/
 501 UINTN
 502 EFIAPI
 503 StrDecimalToUintn (
 504   IN      CONST CHAR16              *String
 505   );
 506
 507 /**
 508   Convert a Null-terminated Unicode decimal string to a value of
 509   type UINT64.
 510
 511   This function returns a value of type UINT64 by interpreting the contents
 512   of the Unicode string specified by String as a decimal number. The format
 513   of the input Unicode string String is:
 514
 515                   [spaces] [decimal digits].
 516
 517   The valid decimal digit character is in the range [0-9]. The
 518   function will ignore the pad space, which includes spaces or
 519   tab characters, before [decimal digits]. The running zero in the
 520   beginning of [decimal digits] will be ignored. Then, the function
 521   stops at the first character that is a not a valid decimal character
 522   or a Null-terminator, whichever one comes first.
 523
 524   If String is NULL, then ASSERT().
 525   If String is not aligned in a 16-bit boundary, then ASSERT().
 526   If String has only pad spaces, then 0 is returned.
 527   If String has no pad spaces or valid decimal digits,
 528   then 0 is returned.
 529   If the number represented by String overflows according
 530   to the range defined by UINT64, then ASSERT().
 531
 532   If PcdMaximumUnicodeStringLength is not zero, and String contains
 533   more than PcdMaximumUnicodeStringLength Unicode characters not including
 534   the Null-terminator, then ASSERT().
 535
 536   @param  String          The pointer to a Null-terminated Unicode string.
 537
 538   @retval Value translated from String.
 539
 540 **/
 541 UINT64
 542 EFIAPI
 543 StrDecimalToUint64 (
 544   IN      CONST CHAR16              *String
 545   );
 546
 547
 548 /**
 549   Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
 550
 551   This function returns a value of type UINTN by interpreting the contents
 552   of the Unicode string specified by String as a hexadecimal number.
 553   The format of the input Unicode string String is:
 554
 555                   [spaces][zeros][x][hexadecimal digits].
 556
 557   The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
 558   The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
 559   If "x" appears in the input string, it must be prefixed with at least one 0.
 560   The function will ignore the pad space, which includes spaces or tab characters,
 561   before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
 562   [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
 563   first valid hexadecimal digit. Then, the function stops at the first character
 564   that is a not a valid hexadecimal character or NULL, whichever one comes first.
 565
 566   If String is NULL, then ASSERT().
 567   If String is not aligned in a 16-bit boundary, then ASSERT().
 568   If String has only pad spaces, then zero is returned.
 569   If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
 570   then zero is returned.
 571   If the number represented by String overflows according to the range defined by
 572   UINTN, then ASSERT().
 573
 574   If PcdMaximumUnicodeStringLength is not zero, and String contains more than
 575   PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
 576   then ASSERT().
 577
 578   @param  String          The pointer to a Null-terminated Unicode string.
 579
 580   @retval Value translated from String.
 581
 582 **/
 583 UINTN
 584 EFIAPI
 585 StrHexToUintn (
 586   IN      CONST CHAR16              *String
 587   );
 588
 589
 590 /**
 591   Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
 592
 593   This function returns a value of type UINT64 by interpreting the contents
 594   of the Unicode string specified by String as a hexadecimal number.
 595   The format of the input Unicode string String is
 596
 597                   [spaces][zeros][x][hexadecimal digits].
 598
 599   The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
 600   The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
 601   If "x" appears in the input string, it must be prefixed with at least one 0.
 602   The function will ignore the pad space, which includes spaces or tab characters,
 603   before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
 604   [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
 605   first valid hexadecimal digit. Then, the function stops at the first character that is
 606   a not a valid hexadecimal character or NULL, whichever one comes first.
 607
 608   If String is NULL, then ASSERT().
 609   If String is not aligned in a 16-bit boundary, then ASSERT().
 610   If String has only pad spaces, then zero is returned.
 611   If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
 612   then zero is returned.
 613   If the number represented by String overflows according to the range defined by
 614   UINT64, then ASSERT().
 615
 616   If PcdMaximumUnicodeStringLength is not zero, and String contains more than
 617   PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
 618   then ASSERT().
 619
 620   @param  String          The pointer to a Null-terminated Unicode string.
 621
 622   @retval Value translated from String.
 623
 624 **/
 625 UINT64
 626 EFIAPI
 627 StrHexToUint64 (
 628   IN      CONST CHAR16             *String
 629   );
 630
 631 /**
 632   Convert a Null-terminated Unicode string to a Null-terminated
 633   ASCII string and returns the ASCII string.
 634
 635   This function converts the content of the Unicode string Source
 636   to the ASCII string Destination by copying the lower 8 bits of
 637   each Unicode character. It returns Destination.
 638
 639   The caller is responsible to make sure Destination points to a buffer with size
 640   equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.
 641
 642   If any Unicode characters in Source contain non-zero value in
 643   the upper 8 bits, then ASSERT().
 644
 645   If Destination is NULL, then ASSERT().
 646   If Source is NULL, then ASSERT().
 647   If Source is not aligned on a 16-bit boundary, then ASSERT().
 648   If Source and Destination overlap, then ASSERT().
 649
 650   If PcdMaximumUnicodeStringLength is not zero, and Source contains
 651   more than PcdMaximumUnicodeStringLength Unicode characters not including
 652   the Null-terminator, then ASSERT().
 653
 654   If PcdMaximumAsciiStringLength is not zero, and Source contains more
 655   than PcdMaximumAsciiStringLength Unicode characters not including the
 656   Null-terminator, then ASSERT().
 657
 658   @param  Source        The pointer to a Null-terminated Unicode string.
 659   @param  Destination   The pointer to a Null-terminated ASCII string.
 660
 661   @return Destination.
 662
 663 **/
 664 CHAR8 *
 665 EFIAPI
 666 UnicodeStrToAsciiStr (
 667   IN      CONST CHAR16              *Source,
 668   OUT     CHAR8                     *Destination
 669   );
 670
 671
 672 /**
 673   Copies one Null-terminated ASCII string to another Null-terminated ASCII
 674   string and returns the new ASCII string.
 675
 676   This function copies the contents of the ASCII string Source to the ASCII
 677   string Destination, and returns Destination. If Source and Destination
 678   overlap, then the results are undefined.
 679
 680   If Destination is NULL, then ASSERT().
 681   If Source is NULL, then ASSERT().
 682   If Source and Destination overlap, then ASSERT().
 683   If PcdMaximumAsciiStringLength is not zero and Source contains more than
 684   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 685   then ASSERT().
 686
 687   @param  Destination The pointer to a Null-terminated ASCII string.
 688   @param  Source      The pointer to a Null-terminated ASCII string.
 689
 690   @return Destination
 691
 692 **/
 693 CHAR8 *
 694 EFIAPI
 695 AsciiStrCpy (
 696   OUT     CHAR8                     *Destination,
 697   IN      CONST CHAR8               *Source
 698   );
 699
 700
 701 /**
 702   Copies up to a specified length one Null-terminated ASCII string to another
 703   Null-terminated ASCII string and returns the new ASCII string.
 704
 705   This function copies the contents of the ASCII string Source to the ASCII
 706   string Destination, and returns Destination. At most, Length ASCII characters
 707   are copied from Source to Destination. If Length is 0, then Destination is
 708   returned unmodified. If Length is greater that the number of ASCII characters
 709   in Source, then Destination is padded with Null ASCII characters. If Source
 710   and Destination overlap, then the results are undefined.
 711
 712   If Destination is NULL, then ASSERT().
 713   If Source is NULL, then ASSERT().
 714   If Source and Destination overlap, then ASSERT().
 715   If PcdMaximumAsciiStringLength is not zero, and Length is greater than
 716   PcdMaximumAsciiStringLength, then ASSERT().
 717   If PcdMaximumAsciiStringLength is not zero, and Source contains more than
 718   PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
 719   then ASSERT().
 720
 721   @param  Destination The pointer to a Null-terminated ASCII string.
 722   @param  Source      The pointer to a Null-terminated ASCII string.
 723   @param  Length      The maximum number of ASCII characters to copy.
 724
 725   @return Destination
 726
 727 **/
 728 CHAR8 *
 729 EFIAPI
 730 AsciiStrnCpy (
 731   OUT     CHAR8                     *Destination,
 732   IN      CONST CHAR8               *Source,
 733   IN      UINTN                     Length
 734   );
 735
 736
 737 /**
 738   Returns the length of a Null-terminated ASCII string.
 739
 740   This function returns the number of ASCII characters in the Null-terminated
 741   ASCII string specified by String.
 742
 743   If Length > 0 and Destination is NULL, then ASSERT().
 744   If Length > 0 and Source is NULL, then ASSERT().
 745   If PcdMaximumAsciiStringLength is not zero and String contains more than
 746   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 747   then ASSERT().
 748
 749   @param  String  The pointer to a Null-terminated ASCII string.
 750
 751   @return The length of String.
 752
 753 **/
 754 UINTN
 755 EFIAPI
 756 AsciiStrLen (
 757   IN      CONST CHAR8               *String
 758   );
 759
 760
 761 /**
 762   Returns the size of a Null-terminated ASCII string in bytes, including the
 763   Null terminator.
 764
 765   This function returns the size, in bytes, of the Null-terminated ASCII string
 766   specified by String.
 767
 768   If String is NULL, then ASSERT().
 769   If PcdMaximumAsciiStringLength is not zero and String contains more than
 770   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 771   then ASSERT().
 772
 773   @param  String  The pointer to a Null-terminated ASCII string.
 774
 775   @return The size of String.
 776
 777 **/
 778 UINTN
 779 EFIAPI
 780 AsciiStrSize (
 781   IN      CONST CHAR8               *String
 782   );
 783
 784
 785 /**
 786   Compares two Null-terminated ASCII strings, and returns the difference
 787   between the first mismatched ASCII characters.
 788
 789   This function compares the Null-terminated ASCII string FirstString to the
 790   Null-terminated ASCII string SecondString. If FirstString is identical to
 791   SecondString, then 0 is returned. Otherwise, the value returned is the first
 792   mismatched ASCII character in SecondString subtracted from the first
 793   mismatched ASCII character in FirstString.
 794
 795   If FirstString is NULL, then ASSERT().
 796   If SecondString is NULL, then ASSERT().
 797   If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
 798   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 799   then ASSERT().
 800   If PcdMaximumAsciiStringLength is not zero and SecondString contains more
 801   than PcdMaximumAsciiStringLength ASCII characters not including the
 802   Null-terminator, then ASSERT().
 803
 804   @param  FirstString   The pointer to a Null-terminated ASCII string.
 805   @param  SecondString  The pointer to a Null-terminated ASCII string.
 806
 807   @retval ==0      FirstString is identical to SecondString.
 808   @retval !=0      FirstString is not identical to SecondString.
 809
 810 **/
 811 INTN
 812 EFIAPI
 813 AsciiStrCmp (
 814   IN      CONST CHAR8               *FirstString,
 815   IN      CONST CHAR8               *SecondString
 816   );
 817
 818
 819 /**
 820   Performs a case insensitive comparison of two Null-terminated ASCII strings,
 821   and returns the difference between the first mismatched ASCII characters.
 822
 823   This function performs a case insensitive comparison of the Null-terminated
 824   ASCII string FirstString to the Null-terminated ASCII string SecondString. If
 825   FirstString is identical to SecondString, then 0 is returned. Otherwise, the
 826   value returned is the first mismatched lower case ASCII character in
 827   SecondString subtracted from the first mismatched lower case ASCII character
 828   in FirstString.
 829
 830   If FirstString is NULL, then ASSERT().
 831   If SecondString is NULL, then ASSERT().
 832   If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
 833   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 834   then ASSERT().
 835   If PcdMaximumAsciiStringLength is not zero and SecondString contains more
 836   than PcdMaximumAsciiStringLength ASCII characters not including the
 837   Null-terminator, then ASSERT().
 838
 839   @param  FirstString   The pointer to a Null-terminated ASCII string.
 840   @param  SecondString  The pointer to a Null-terminated ASCII string.
 841
 842   @retval ==0    FirstString is identical to SecondString using case insensitive
 843                  comparisons.
 844   @retval !=0    FirstString is not identical to SecondString using case
 845                  insensitive comparisons.
 846
 847 **/
 848 INTN
 849 EFIAPI
 850 AsciiStriCmp (
 851   IN      CONST CHAR8               *FirstString,
 852   IN      CONST CHAR8               *SecondString
 853   );
 854
 855
 856 /**
 857   Compares two Null-terminated ASCII strings with maximum lengths, and returns
 858   the difference between the first mismatched ASCII characters.
 859
 860   This function compares the Null-terminated ASCII string FirstString to the
 861   Null-terminated ASCII  string SecondString. At most, Length ASCII characters
 862   will be compared. If Length is 0, then 0 is returned. If FirstString is
 863   identical to SecondString, then 0 is returned. Otherwise, the value returned
 864   is the first mismatched ASCII character in SecondString subtracted from the
 865   first mismatched ASCII character in FirstString.
 866
 867   If Length > 0 and FirstString is NULL, then ASSERT().
 868   If Length > 0 and SecondString is NULL, then ASSERT().
 869   If PcdMaximumAsciiStringLength is not zero, and Length is greater than
 870   PcdMaximumAsciiStringLength, then ASSERT().
 871   If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
 872   PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
 873   then ASSERT().
 874   If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
 875   PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
 876   then ASSERT().
 877
 878   @param  FirstString   The pointer to a Null-terminated ASCII string.
 879   @param  SecondString  The pointer to a Null-terminated ASCII string.
 880   @param  Length        The maximum number of ASCII characters for compare.
 881
 882   @retval ==0       FirstString is identical to SecondString.
 883   @retval !=0       FirstString is not identical to SecondString.
 884
 885 **/
 886 INTN
 887 EFIAPI
 888 AsciiStrnCmp (
 889   IN      CONST CHAR8               *FirstString,
 890   IN      CONST CHAR8               *SecondString,
 891   IN      UINTN                     Length
 892   );
 893
 894
 895 /**
 896   Concatenates one Null-terminated ASCII string to another Null-terminated
 897   ASCII string, and returns the concatenated ASCII string.
 898
 899   This function concatenates two Null-terminated ASCII strings. The contents of
 900   Null-terminated ASCII string Source are concatenated to the end of Null-
 901   terminated ASCII string Destination. The Null-terminated concatenated ASCII
 902   String is returned.
 903
 904   If Destination is NULL, then ASSERT().
 905   If Source is NULL, then ASSERT().
 906   If PcdMaximumAsciiStringLength is not zero and Destination contains more than
 907   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 908   then ASSERT().
 909   If PcdMaximumAsciiStringLength is not zero and Source contains more than
 910   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
 911   then ASSERT().
 912   If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
 913   Source results in a ASCII string with more than PcdMaximumAsciiStringLength
 914   ASCII characters, then ASSERT().
 915
 916   @param  Destination The pointer to a Null-terminated ASCII string.
 917   @param  Source      The pointer to a Null-terminated ASCII string.
 918
 919   @return Destination
 920
 921 **/
 922 CHAR8 *
 923 EFIAPI
 924 AsciiStrCat (
 925   IN OUT CHAR8    *Destination,
 926   IN CONST CHAR8  *Source
 927   );
 928
 929
 930 /**
 931   Concatenates up to a specified length one Null-terminated ASCII string to
 932   the end of another Null-terminated ASCII string, and returns the
 933   concatenated ASCII string.
 934
 935   This function concatenates two Null-terminated ASCII strings. The contents
 936   of Null-terminated ASCII string Source are concatenated to the end of Null-
 937   terminated ASCII string Destination, and Destination is returned. At most,
 938   Length ASCII characters are concatenated from Source to the end of
 939   Destination, and Destination is always Null-terminated. If Length is 0, then
 940   Destination is returned unmodified. If Source and Destination overlap, then
 941   the results are undefined.
 942
 943   If Length > 0 and Destination is NULL, then ASSERT().
 944   If Length > 0 and Source is NULL, then ASSERT().
 945   If Source and Destination overlap, then ASSERT().
 946   If PcdMaximumAsciiStringLength is not zero, and Length is greater than
 947   PcdMaximumAsciiStringLength, then ASSERT().
 948   If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
 949   PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
 950   then ASSERT().
 951   If PcdMaximumAsciiStringLength is not zero, and Source contains more than
 952   PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
 953   then ASSERT().
 954   If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
 955   Source results in a ASCII string with more than PcdMaximumAsciiStringLength
 956   ASCII characters, not including the Null-terminator, then ASSERT().
 957
 958   @param  Destination The pointer to a Null-terminated ASCII string.
 959   @param  Source      The pointer to a Null-terminated ASCII string.
 960   @param  Length      The maximum number of ASCII characters to concatenate from
 961                       Source.
 962
 963   @return Destination
 964
 965 **/
 966 CHAR8 *
 967 EFIAPI
 968 AsciiStrnCat (
 969   IN OUT  CHAR8                     *Destination,
 970   IN      CONST CHAR8               *Source,
 971   IN      UINTN                     Length
 972   );
 973
 974
 975 /**
 976   Returns the first occurrence of a Null-terminated ASCII sub-string
 977   in a Null-terminated ASCII string.
 978
 979   This function scans the contents of the ASCII string specified by String
 980   and returns the first occurrence of SearchString. If SearchString is not
 981   found in String, then NULL is returned. If the length of SearchString is zero,
 982   then String is returned.
 983
 984   If String is NULL, then ASSERT().
 985   If SearchString is NULL, then ASSERT().
 986
 987   If PcdMaximumAsciiStringLength is not zero, and SearchString or
 988   String contains more than PcdMaximumAsciiStringLength Unicode characters
 989   not including the Null-terminator, then ASSERT().
 990
 991   @param  String          The pointer to a Null-terminated ASCII string.
 992   @param  SearchString    The pointer to a Null-terminated ASCII string to search for.
 993
 994   @retval NULL            If the SearchString does not appear in String.
 995   @retval others          If there is a match return the first occurrence of SearchingString.
 996                           If the length of SearchString is zero,return String.
 997
 998 **/
 999 CHAR8 *
1000 EFIAPI
1001 AsciiStrStr (
1002   IN      CONST CHAR8               *String,
1003   IN      CONST CHAR8               *SearchString
1004   );
1005
1006
1007 /**
1008   Convert a Null-terminated ASCII decimal string to a value of type
1009   UINTN.
1010
1011   This function returns a value of type UINTN by interpreting the contents
1012   of the ASCII string String as a decimal number. The format of the input
1013   ASCII string String is:
1014
1015                     [spaces] [decimal digits].
1016
1017   The valid decimal digit character is in the range [0-9]. The function will
1018   ignore the pad space, which includes spaces or tab characters, before the digits.
1019   The running zero in the beginning of [decimal digits] will be ignored. Then, the
1020   function stops at the first character that is a not a valid decimal character or
1021   Null-terminator, whichever on comes first.
1022
1023   If String has only pad spaces, then 0 is returned.
1024   If String has no pad spaces or valid decimal digits, then 0 is returned.
1025   If the number represented by String overflows according to the range defined by
1026   UINTN, then ASSERT().
1027   If String is NULL, then ASSERT().
1028   If PcdMaximumAsciiStringLength is not zero, and String contains more than
1029   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1030   then ASSERT().
1031
1032   @param  String          The pointer to a Null-terminated ASCII string.
1033
1034   @retval The value translated from String.
1035
1036 **/
1037 UINTN
1038 EFIAPI
1039 AsciiStrDecimalToUintn (
1040   IN      CONST CHAR8               *String
1041   );
1042
1043
1044 /**
1045   Convert a Null-terminated ASCII decimal string to a value of type
1046   UINT64.
1047
1048   This function returns a value of type UINT64 by interpreting the contents
1049   of the ASCII string String as a decimal number. The format of the input
1050   ASCII string String is:
1051
1052                     [spaces] [decimal digits].
1053
1054   The valid decimal digit character is in the range [0-9]. The function will
1055   ignore the pad space, which includes spaces or tab characters, before the digits.
1056   The running zero in the beginning of [decimal digits] will be ignored. Then, the
1057   function stops at the first character that is a not a valid decimal character or
1058   Null-terminator, whichever on comes first.
1059
1060   If String has only pad spaces, then 0 is returned.
1061   If String has no pad spaces or valid decimal digits, then 0 is returned.
1062   If the number represented by String overflows according to the range defined by
1063   UINT64, then ASSERT().
1064   If String is NULL, then ASSERT().
1065   If PcdMaximumAsciiStringLength is not zero, and String contains more than
1066   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1067   then ASSERT().
1068
1069   @param  String          The pointer to a Null-terminated ASCII string.
1070
1071   @retval Value translated from String.
1072
1073 **/
1074 UINT64
1075 EFIAPI
1076 AsciiStrDecimalToUint64 (
1077   IN      CONST CHAR8               *String
1078   );
1079
1080
1081 /**
1082   Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1083
1084   This function returns a value of type UINTN by interpreting the contents of
1085   the ASCII string String as a hexadecimal number. The format of the input ASCII
1086   string String is:
1087
1088                   [spaces][zeros][x][hexadecimal digits].
1089
1090   The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1091   The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1092   appears in the input string, it must be prefixed with at least one 0. The function
1093   will ignore the pad space, which includes spaces or tab characters, before [zeros],
1094   [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1095   will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1096   digit. Then, the function stops at the first character that is a not a valid
1097   hexadecimal character or Null-terminator, whichever on comes first.
1098
1099   If String has only pad spaces, then 0 is returned.
1100   If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1101   0 is returned.
1102
1103   If the number represented by String overflows according to the range defined by UINTN,
1104   then ASSERT().
1105   If String is NULL, then ASSERT().
1106   If PcdMaximumAsciiStringLength is not zero,
1107   and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1108   the Null-terminator, then ASSERT().
1109
1110   @param  String          The pointer to a Null-terminated ASCII string.
1111
1112   @retval Value translated from String.
1113
1114 **/
1115 UINTN
1116 EFIAPI
1117 AsciiStrHexToUintn (
1118   IN      CONST CHAR8               *String
1119   );
1120
1121
1122 /**
1123   Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1124
1125   This function returns a value of type UINT64 by interpreting the contents of
1126   the ASCII string String as a hexadecimal number. The format of the input ASCII
1127   string String is:
1128
1129                   [spaces][zeros][x][hexadecimal digits].
1130
1131   The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1132   The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1133   appears in the input string, it must be prefixed with at least one 0. The function
1134   will ignore the pad space, which includes spaces or tab characters, before [zeros],
1135   [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1136   will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1137   digit. Then, the function stops at the first character that is a not a valid
1138   hexadecimal character or Null-terminator, whichever on comes first.
1139
1140   If String has only pad spaces, then 0 is returned.
1141   If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1142   0 is returned.
1143
1144   If the number represented by String overflows according to the range defined by UINT64,
1145   then ASSERT().
1146   If String is NULL, then ASSERT().
1147   If PcdMaximumAsciiStringLength is not zero,
1148   and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1149   the Null-terminator, then ASSERT().
1150
1151   @param  String          The pointer to a Null-terminated ASCII string.
1152
1153   @retval Value translated from String.
1154
1155 **/
1156 UINT64
1157 EFIAPI
1158 AsciiStrHexToUint64 (
1159   IN      CONST CHAR8                *String
1160   );
1161
1162
1163 /**
1164   Convert one Null-terminated ASCII string to a Null-terminated
1165   Unicode string and returns the Unicode string.
1166
1167   This function converts the contents of the ASCII string Source to the Unicode
1168   string Destination, and returns Destination.  The function terminates the
1169   Unicode string Destination by appending a Null-terminator character at the end.
1170   The caller is responsible to make sure Destination points to a buffer with size
1171   equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1172
1173   If Destination is NULL, then ASSERT().
1174   If Destination is not aligned on a 16-bit boundary, then ASSERT().
1175   If Source is NULL, then ASSERT().
1176   If Source and Destination overlap, then ASSERT().
1177   If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1178   PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1179   then ASSERT().
1180   If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1181   PcdMaximumUnicodeStringLength ASCII characters not including the
1182   Null-terminator, then ASSERT().
1183
1184   @param  Source        The pointer to a Null-terminated ASCII string.
1185   @param  Destination   The pointer to a Null-terminated Unicode string.
1186
1187   @return Destination.
1188
1189 **/
1190 CHAR16 *
1191 EFIAPI
1192 AsciiStrToUnicodeStr (
1193   IN      CONST CHAR8               *Source,
1194   OUT     CHAR16                    *Destination
1195   );
1196
1197
1198 /**
1199   Converts an 8-bit value to an 8-bit BCD value.
1200
1201   Converts the 8-bit value specified by Value to BCD. The BCD value is
1202   returned.
1203
1204   If Value >= 100, then ASSERT().
1205
1206   @param  Value The 8-bit value to convert to BCD. Range 0..99.
1207
1208   @return The BCD value.
1209
1210 **/
1211 UINT8
1212 EFIAPI
1213 DecimalToBcd8 (
1214   IN      UINT8                     Value
1215   );
1216
1217
1218 /**
1219   Converts an 8-bit BCD value to an 8-bit value.
1220
1221   Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1222   value is returned.
1223
1224   If Value >= 0xA0, then ASSERT().
1225   If (Value & 0x0F) >= 0x0A, then ASSERT().
1226
1227   @param  Value The 8-bit BCD value to convert to an 8-bit value.
1228
1229   @return The 8-bit value is returned.
1230
1231 **/
1232 UINT8
1233 EFIAPI
1234 BcdToDecimal8 (
1235   IN      UINT8                     Value
1236   );
1237
1238
1239 //
1240 // Linked List Functions and Macros
1241 //
1242
1243 /**
1244   Initializes the head node of a doubly linked list that is declared as a
1245   global variable in a module.
1246
1247   Initializes the forward and backward links of a new linked list. After
1248   initializing a linked list with this macro, the other linked list functions
1249   may be used to add and remove nodes from the linked list. This macro results
1250   in smaller executables by initializing the linked list in the data section,
1251   instead if calling the InitializeListHead() function to perform the
1252   equivalent operation.
1253
1254   @param  ListHead  The head note of a list to initialize.
1255
1256 **/
1257 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead)  {&(ListHead), &(ListHead)}
1258
1259
1260 /**
1261   Initializes the head node of a doubly linked list, and returns the pointer to
1262   the head node of the doubly linked list.
1263
1264   Initializes the forward and backward links of a new linked list. After
1265   initializing a linked list with this function, the other linked list
1266   functions may be used to add and remove nodes from the linked list. It is up
1267   to the caller of this function to allocate the memory for ListHead.
1268
1269   If ListHead is NULL, then ASSERT().
1270
1271   @param  ListHead  A pointer to the head node of a new doubly linked list.
1272
1273   @return ListHead
1274
1275 **/
1276 LIST_ENTRY *
1277 EFIAPI
1278 InitializeListHead (
1279   IN OUT  LIST_ENTRY                *ListHead
1280   );
1281
1282
1283 /**
1284   Adds a node to the beginning of a doubly linked list, and returns the pointer
1285   to the head node of the doubly linked list.
1286
1287   Adds the node Entry at the beginning of the doubly linked list denoted by
1288   ListHead, and returns ListHead.
1289
1290   If ListHead is NULL, then ASSERT().
1291   If Entry is NULL, then ASSERT().
1292   If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1293   InitializeListHead(), then ASSERT().
1294   If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1295   of nodes in ListHead, including the ListHead node, is greater than or
1296   equal to PcdMaximumLinkedListLength, then ASSERT().
1297
1298   @param  ListHead  A pointer to the head node of a doubly linked list.
1299   @param  Entry     A pointer to a node that is to be inserted at the beginning
1300                     of a doubly linked list.
1301
1302   @return ListHead
1303
1304 **/
1305 LIST_ENTRY *
1306 EFIAPI
1307 InsertHeadList (
1308   IN OUT  LIST_ENTRY                *ListHead,
1309   IN OUT  LIST_ENTRY                *Entry
1310   );
1311
1312
1313 /**
1314   Adds a node to the end of a doubly linked list, and returns the pointer to
1315   the head node of the doubly linked list.
1316
1317   Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1318   and returns ListHead.
1319
1320   If ListHead is NULL, then ASSERT().
1321   If Entry is NULL, then ASSERT().
1322   If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1323   InitializeListHead(), then ASSERT().
1324   If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1325   of nodes in ListHead, including the ListHead node, is greater than or
1326   equal to PcdMaximumLinkedListLength, then ASSERT().
1327
1328   @param  ListHead  A pointer to the head node of a doubly linked list.
1329   @param  Entry     A pointer to a node that is to be added at the end of the
1330                     doubly linked list.
1331
1332   @return ListHead
1333
1334 **/
1335 LIST_ENTRY *
1336 EFIAPI
1337 InsertTailList (
1338   IN OUT  LIST_ENTRY                *ListHead,
1339   IN OUT  LIST_ENTRY                *Entry
1340   );
1341
1342
1343 /**
1344   Retrieves the first node of a doubly linked list.
1345
1346   Returns the first node of a doubly linked list.  List must have been
1347   initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1348   If List is empty, then List is returned.
1349
1350   If List is NULL, then ASSERT().
1351   If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1352   InitializeListHead(), then ASSERT().
1353   If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1354   in List, including the List node, is greater than or equal to
1355   PcdMaximumLinkedListLength, then ASSERT().
1356
1357   @param  List  A pointer to the head node of a doubly linked list.
1358
1359   @return The first node of a doubly linked list.
1360   @retval NULL  The list is empty.
1361
1362 **/
1363 LIST_ENTRY *
1364 EFIAPI
1365 GetFirstNode (
1366   IN      CONST LIST_ENTRY          *List
1367   );
1368
1369
1370 /**
1371   Retrieves the next node of a doubly linked list.
1372
1373   Returns the node of a doubly linked list that follows Node.
1374   List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1375   or InitializeListHead().  If List is empty, then List is returned.
1376
1377   If List is NULL, then ASSERT().
1378   If Node is NULL, then ASSERT().
1379   If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1380   InitializeListHead(), then ASSERT().
1381   If PcdMaximumLinkedListLenth is not zero, and List contains more than
1382   PcdMaximumLinkedListLenth nodes, then ASSERT().
1383   If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1384
1385   @param  List  A pointer to the head node of a doubly linked list.
1386   @param  Node  A pointer to a node in the doubly linked list.
1387
1388   @return The pointer to the next node if one exists. Otherwise List is returned.
1389
1390 **/
1391 LIST_ENTRY *
1392 EFIAPI
1393 GetNextNode (
1394   IN      CONST LIST_ENTRY          *List,
1395   IN      CONST LIST_ENTRY          *Node
1396   );
1397
1398
1399 /**
1400   Retrieves the previous node of a doubly linked list.
1401
1402   Returns the node of a doubly linked list that precedes Node.
1403   List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1404   or InitializeListHead().  If List is empty, then List is returned.
1405
1406   If List is NULL, then ASSERT().
1407   If Node is NULL, then ASSERT().
1408   If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1409   InitializeListHead(), then ASSERT().
1410   If PcdMaximumLinkedListLenth is not zero, and List contains more than
1411   PcdMaximumLinkedListLenth nodes, then ASSERT().
1412   If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1413
1414   @param  List  A pointer to the head node of a doubly linked list.
1415   @param  Node  A pointer to a node in the doubly linked list.
1416
1417   @return The pointer to the previous node if one exists. Otherwise List is returned.
1418
1419 **/
1420 LIST_ENTRY *
1421 EFIAPI
1422 GetPreviousNode (
1423   IN      CONST LIST_ENTRY          *List,
1424   IN      CONST LIST_ENTRY          *Node
1425   );
1426
1427
1428 /**
1429   Checks to see if a doubly linked list is empty or not.
1430
1431   Checks to see if the doubly linked list is empty. If the linked list contains
1432   zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1433
1434   If ListHead is NULL, then ASSERT().
1435   If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1436   InitializeListHead(), then ASSERT().
1437   If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1438   in List, including the List node, is greater than or equal to
1439   PcdMaximumLinkedListLength, then ASSERT().
1440
1441   @param  ListHead  A pointer to the head node of a doubly linked list.
1442
1443   @retval TRUE  The linked list is empty.
1444   @retval FALSE The linked list is not empty.
1445
1446 **/
1447 BOOLEAN
1448 EFIAPI
1449 IsListEmpty (
1450   IN      CONST LIST_ENTRY          *ListHead
1451   );
1452
1453
1454 /**
1455   Determines if a node in a doubly linked list is the head node of a the same
1456   doubly linked list.  This function is typically used to terminate a loop that
1457   traverses all the nodes in a doubly linked list starting with the head node.
1458
1459   Returns TRUE if Node is equal to List.  Returns FALSE if Node is one of the
1460   nodes in the doubly linked list specified by List.  List must have been
1461   initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1462
1463   If List is NULL, then ASSERT().
1464   If Node is NULL, then ASSERT().
1465   If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1466   then ASSERT().
1467   If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1468   in List, including the List node, is greater than or equal to
1469   PcdMaximumLinkedListLength, then ASSERT().
1470   If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
1471   to List, then ASSERT().
1472
1473   @param  List  A pointer to the head node of a doubly linked list.
1474   @param  Node  A pointer to a node in the doubly linked list.
1475
1476   @retval TRUE  Node is the head of the doubly-linked list pointed by List.
1477   @retval FALSE Node is not the head of the doubly-linked list pointed by List.
1478
1479 **/
1480 BOOLEAN
1481 EFIAPI
1482 IsNull (
1483   IN      CONST LIST_ENTRY          *List,
1484   IN      CONST LIST_ENTRY          *Node
1485   );
1486
1487
1488 /**
1489   Determines if a node the last node in a doubly linked list.
1490
1491   Returns TRUE if Node is the last node in the doubly linked list specified by
1492   List. Otherwise, FALSE is returned. List must have been initialized with
1493   INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1494
1495   If List is NULL, then ASSERT().
1496   If Node is NULL, then ASSERT().
1497   If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1498   InitializeListHead(), then ASSERT().
1499   If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1500   in List, including the List node, is greater than or equal to
1501   PcdMaximumLinkedListLength, then ASSERT().
1502   If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
1503
1504   @param  List  A pointer to the head node of a doubly linked list.
1505   @param  Node  A pointer to a node in the doubly linked list.
1506
1507   @retval TRUE  Node is the last node in the linked list.
1508   @retval FALSE Node is not the last node in the linked list.
1509
1510 **/
1511 BOOLEAN
1512 EFIAPI
1513 IsNodeAtEnd (
1514   IN      CONST LIST_ENTRY          *List,
1515   IN      CONST LIST_ENTRY          *Node
1516   );
1517
1518
1519 /**
1520   Swaps the location of two nodes in a doubly linked list, and returns the
1521   first node after the swap.
1522
1523   If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1524   Otherwise, the location of the FirstEntry node is swapped with the location
1525   of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1526   same double linked list as FirstEntry and that double linked list must have
1527   been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1528   SecondEntry is returned after the nodes are swapped.
1529
1530   If FirstEntry is NULL, then ASSERT().
1531   If SecondEntry is NULL, then ASSERT().
1532   If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
1533   same linked list, then ASSERT().
1534   If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1535   linked list containing the FirstEntry and SecondEntry nodes, including
1536   the FirstEntry and SecondEntry nodes, is greater than or equal to
1537   PcdMaximumLinkedListLength, then ASSERT().
1538
1539   @param  FirstEntry  A pointer to a node in a linked list.
1540   @param  SecondEntry A pointer to another node in the same linked list.
1541
1542   @return SecondEntry.
1543
1544 **/
1545 LIST_ENTRY *
1546 EFIAPI
1547 SwapListEntries (
1548   IN OUT  LIST_ENTRY                *FirstEntry,
1549   IN OUT  LIST_ENTRY                *SecondEntry
1550   );
1551
1552
1553 /**
1554   Removes a node from a doubly linked list, and returns the node that follows
1555   the removed node.
1556
1557   Removes the node Entry from a doubly linked list. It is up to the caller of
1558   this function to release the memory used by this node if that is required. On
1559   exit, the node following Entry in the doubly linked list is returned. If
1560   Entry is the only node in the linked list, then the head node of the linked
1561   list is returned.
1562
1563   If Entry is NULL, then ASSERT().
1564   If Entry is the head node of an empty list, then ASSERT().
1565   If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1566   linked list containing Entry, including the Entry node, is greater than
1567   or equal to PcdMaximumLinkedListLength, then ASSERT().
1568
1569   @param  Entry A pointer to a node in a linked list.
1570
1571   @return Entry.
1572
1573 **/
1574 LIST_ENTRY *
1575 EFIAPI
1576 RemoveEntryList (
1577   IN      CONST LIST_ENTRY          *Entry
1578   );
1579
1580 //
1581 // Math Services
1582 //
1583
1584 /**
1585   Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1586   with zeros. The shifted value is returned.
1587
1588   This function shifts the 64-bit value Operand to the left by Count bits. The
1589   low Count bits are set to zero. The shifted value is returned.
1590
1591   If Count is greater than 63, then ASSERT().
1592
1593   @param  Operand The 64-bit operand to shift left.
1594   @param  Count   The number of bits to shift left.
1595
1596   @return Operand << Count.
1597
1598 **/
1599 UINT64
1600 EFIAPI
1601 LShiftU64 (
1602   IN      UINT64                    Operand,
1603   IN      UINTN                     Count
1604   );
1605
1606
1607 /**
1608   Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1609   filled with zeros. The shifted value is returned.
1610
1611   This function shifts the 64-bit value Operand to the right by Count bits. The
1612   high Count bits are set to zero. The shifted value is returned.
1613
1614   If Count is greater than 63, then ASSERT().
1615
1616   @param  Operand The 64-bit operand to shift right.
1617   @param  Count   The number of bits to shift right.
1618
1619   @return Operand >> Count
1620
1621 **/
1622 UINT64
1623 EFIAPI
1624 RShiftU64 (
1625   IN      UINT64                    Operand,
1626   IN      UINTN                     Count
1627   );
1628
1629
1630 /**
1631   Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1632   with original integer's bit 63. The shifted value is returned.
1633
1634   This function shifts the 64-bit value Operand to the right by Count bits. The
1635   high Count bits are set to bit 63 of Operand.  The shifted value is returned.
1636
1637   If Count is greater than 63, then ASSERT().
1638
1639   @param  Operand The 64-bit operand to shift right.
1640   @param  Count   The number of bits to shift right.
1641
1642   @return Operand >> Count
1643
1644 **/
1645 UINT64
1646 EFIAPI
1647 ARShiftU64 (
1648   IN      UINT64                    Operand,
1649   IN      UINTN                     Count
1650   );
1651
1652
1653 /**
1654   Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1655   with the high bits that were rotated.
1656
1657   This function rotates the 32-bit value Operand to the left by Count bits. The
1658   low Count bits are fill with the high Count bits of Operand. The rotated
1659   value is returned.
1660
1661   If Count is greater than 31, then ASSERT().
1662
1663   @param  Operand The 32-bit operand to rotate left.
1664   @param  Count   The number of bits to rotate left.
1665
1666   @return Operand << Count
1667
1668 **/
1669 UINT32
1670 EFIAPI
1671 LRotU32 (
1672   IN      UINT32                    Operand,
1673   IN      UINTN                     Count
1674   );
1675
1676
1677 /**
1678   Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1679   with the low bits that were rotated.
1680
1681   This function rotates the 32-bit value Operand to the right by Count bits.
1682   The high Count bits are fill with the low Count bits of Operand. The rotated
1683   value is returned.
1684
1685   If Count is greater than 31, then ASSERT().
1686
1687   @param  Operand The 32-bit operand to rotate right.
1688   @param  Count   The number of bits to rotate right.
1689
1690   @return Operand >> Count
1691
1692 **/
1693 UINT32
1694 EFIAPI
1695 RRotU32 (
1696   IN      UINT32                    Operand,
1697   IN      UINTN                     Count
1698   );
1699
1700
1701 /**
1702   Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1703   with the high bits that were rotated.
1704
1705   This function rotates the 64-bit value Operand to the left by Count bits. The
1706   low Count bits are fill with the high Count bits of Operand. The rotated
1707   value is returned.
1708
1709   If Count is greater than 63, then ASSERT().
1710
1711   @param  Operand The 64-bit operand to rotate left.
1712   @param  Count   The number of bits to rotate left.
1713
1714   @return Operand << Count
1715
1716 **/
1717 UINT64
1718 EFIAPI
1719 LRotU64 (
1720   IN      UINT64                    Operand,
1721   IN      UINTN                     Count
1722   );
1723
1724
1725 /**
1726   Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1727   with the high low bits that were rotated.
1728
1729   This function rotates the 64-bit value Operand to the right by Count bits.
1730   The high Count bits are fill with the low Count bits of Operand. The rotated
1731   value is returned.
1732
1733   If Count is greater than 63, then ASSERT().
1734
1735   @param  Operand The 64-bit operand to rotate right.
1736   @param  Count   The number of bits to rotate right.
1737
1738   @return Operand >> Count
1739
1740 **/
1741 UINT64
1742 EFIAPI
1743 RRotU64 (
1744   IN      UINT64                    Operand,
1745   IN      UINTN                     Count
1746   );
1747
1748
1749 /**
1750   Returns the bit position of the lowest bit set in a 32-bit value.
1751
1752   This function computes the bit position of the lowest bit set in the 32-bit
1753   value specified by Operand. If Operand is zero, then -1 is returned.
1754   Otherwise, a value between 0 and 31 is returned.
1755
1756   @param  Operand The 32-bit operand to evaluate.
1757
1758   @retval 0..31  The lowest bit set in Operand was found.
1759   @retval -1    Operand is zero.
1760
1761 **/
1762 INTN
1763 EFIAPI
1764 LowBitSet32 (
1765   IN      UINT32                    Operand
1766   );
1767
1768
1769 /**
1770   Returns the bit position of the lowest bit set in a 64-bit value.
1771
1772   This function computes the bit position of the lowest bit set in the 64-bit
1773   value specified by Operand. If Operand is zero, then -1 is returned.
1774   Otherwise, a value between 0 and 63 is returned.
1775
1776   @param  Operand The 64-bit operand to evaluate.
1777
1778   @retval 0..63  The lowest bit set in Operand was found.
1779   @retval -1    Operand is zero.
1780
1781
1782 **/
1783 INTN
1784 EFIAPI
1785 LowBitSet64 (
1786   IN      UINT64                    Operand
1787   );
1788
1789
1790 /**
1791   Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1792   to log2(x).
1793
1794   This function computes the bit position of the highest bit set in the 32-bit
1795   value specified by Operand. If Operand is zero, then -1 is returned.
1796   Otherwise, a value between 0 and 31 is returned.
1797
1798   @param  Operand The 32-bit operand to evaluate.
1799
1800   @retval 0..31  Position of the highest bit set in Operand if found.
1801   @retval -1    Operand is zero.
1802
1803 **/
1804 INTN
1805 EFIAPI
1806 HighBitSet32 (
1807   IN      UINT32                    Operand
1808   );
1809
1810
1811 /**
1812   Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1813   to log2(x).
1814
1815   This function computes the bit position of the highest bit set in the 64-bit
1816   value specified by Operand. If Operand is zero, then -1 is returned.
1817   Otherwise, a value between 0 and 63 is returned.
1818
1819   @param  Operand The 64-bit operand to evaluate.
1820
1821   @retval 0..63   Position of the highest bit set in Operand if found.
1822   @retval -1     Operand is zero.
1823
1824 **/
1825 INTN
1826 EFIAPI
1827 HighBitSet64 (
1828   IN      UINT64                    Operand
1829   );
1830
1831
1832 /**
1833   Returns the value of the highest bit set in a 32-bit value. Equivalent to
1834   1 << log2(x).
1835
1836   This function computes the value of the highest bit set in the 32-bit value
1837   specified by Operand. If Operand is zero, then zero is returned.
1838
1839   @param  Operand The 32-bit operand to evaluate.
1840
1841   @return 1 << HighBitSet32(Operand)
1842   @retval 0 Operand is zero.
1843
1844 **/
1845 UINT32
1846 EFIAPI
1847 GetPowerOfTwo32 (
1848   IN      UINT32                    Operand
1849   );
1850
1851
1852 /**
1853   Returns the value of the highest bit set in a 64-bit value. Equivalent to
1854   1 << log2(x).
1855
1856   This function computes the value of the highest bit set in the 64-bit value
1857   specified by Operand. If Operand is zero, then zero is returned.
1858
1859   @param  Operand The 64-bit operand to evaluate.
1860
1861   @return 1 << HighBitSet64(Operand)
1862   @retval 0 Operand is zero.
1863
1864 **/
1865 UINT64
1866 EFIAPI
1867 GetPowerOfTwo64 (
1868   IN      UINT64                    Operand
1869   );
1870
1871
1872 /**
1873   Switches the endianness of a 16-bit integer.
1874
1875   This function swaps the bytes in a 16-bit unsigned value to switch the value
1876   from little endian to big endian or vice versa. The byte swapped value is
1877   returned.
1878
1879   @param  Value A 16-bit unsigned value.
1880
1881   @return The byte swapped Value.
1882
1883 **/
1884 UINT16
1885 EFIAPI
1886 SwapBytes16 (
1887   IN      UINT16                    Value
1888   );
1889
1890
1891 /**
1892   Switches the endianness of a 32-bit integer.
1893
1894   This function swaps the bytes in a 32-bit unsigned value to switch the value
1895   from little endian to big endian or vice versa. The byte swapped value is
1896   returned.
1897
1898   @param  Value A 32-bit unsigned value.
1899
1900   @return The byte swapped Value.
1901
1902 **/
1903 UINT32
1904 EFIAPI
1905 SwapBytes32 (
1906   IN      UINT32                    Value
1907   );
1908
1909
1910 /**
1911   Switches the endianness of a 64-bit integer.
1912
1913   This function swaps the bytes in a 64-bit unsigned value to switch the value
1914   from little endian to big endian or vice versa. The byte swapped value is
1915   returned.
1916
1917   @param  Value A 64-bit unsigned value.
1918
1919   @return The byte swapped Value.
1920
1921 **/
1922 UINT64
1923 EFIAPI
1924 SwapBytes64 (
1925   IN      UINT64                    Value
1926   );
1927
1928
1929 /**
1930   Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1931   generates a 64-bit unsigned result.
1932
1933   This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1934   unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1935   bit unsigned result is returned.
1936
1937   @param  Multiplicand  A 64-bit unsigned value.
1938   @param  Multiplier    A 32-bit unsigned value.
1939
1940   @return Multiplicand * Multiplier
1941
1942 **/
1943 UINT64
1944 EFIAPI
1945 MultU64x32 (
1946   IN      UINT64                    Multiplicand,
1947   IN      UINT32                    Multiplier
1948   );
1949
1950
1951 /**
1952   Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1953   generates a 64-bit unsigned result.
1954
1955   This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1956   unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1957   bit unsigned result is returned.
1958
1959   @param  Multiplicand  A 64-bit unsigned value.
1960   @param  Multiplier    A 64-bit unsigned value.
1961
1962   @return Multiplicand * Multiplier.
1963
1964 **/
1965 UINT64
1966 EFIAPI
1967 MultU64x64 (
1968   IN      UINT64                    Multiplicand,
1969   IN      UINT64                    Multiplier
1970   );
1971
1972
1973 /**
1974   Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1975   64-bit signed result.
1976
1977   This function multiples the 64-bit signed value Multiplicand by the 64-bit
1978   signed value Multiplier and generates a 64-bit signed result. This 64-bit
1979   signed result is returned.
1980
1981   @param  Multiplicand  A 64-bit signed value.
1982   @param  Multiplier    A 64-bit signed value.
1983
1984   @return Multiplicand * Multiplier
1985
1986 **/
1987 INT64
1988 EFIAPI
1989 MultS64x64 (
1990   IN      INT64                     Multiplicand,
1991   IN      INT64                     Multiplier
1992   );
1993
1994
1995 /**
1996   Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1997   a 64-bit unsigned result.
1998
1999   This function divides the 64-bit unsigned value Dividend by the 32-bit
2000   unsigned value Divisor and generates a 64-bit unsigned quotient. This
2001   function returns the 64-bit unsigned quotient.
2002
2003   If Divisor is 0, then ASSERT().
2004
2005   @param  Dividend  A 64-bit unsigned value.
2006   @param  Divisor   A 32-bit unsigned value.
2007
2008   @return Dividend / Divisor.
2009
2010 **/
2011 UINT64
2012 EFIAPI
2013 DivU64x32 (
2014   IN      UINT64                    Dividend,
2015   IN      UINT32                    Divisor
2016   );
2017
2018
2019 /**
2020   Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2021   a 32-bit unsigned remainder.
2022
2023   This function divides the 64-bit unsigned value Dividend by the 32-bit
2024   unsigned value Divisor and generates a 32-bit remainder. This function
2025   returns the 32-bit unsigned remainder.
2026
2027   If Divisor is 0, then ASSERT().
2028
2029   @param  Dividend  A 64-bit unsigned value.
2030   @param  Divisor   A 32-bit unsigned value.
2031
2032   @return Dividend % Divisor.
2033
2034 **/
2035 UINT32
2036 EFIAPI
2037 ModU64x32 (
2038   IN      UINT64                    Dividend,
2039   IN      UINT32                    Divisor
2040   );
2041
2042
2043 /**
2044   Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
2045   a 64-bit unsigned result and an optional 32-bit unsigned remainder.
2046
2047   This function divides the 64-bit unsigned value Dividend by the 32-bit
2048   unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2049   is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
2050   This function returns the 64-bit unsigned quotient.
2051
2052   If Divisor is 0, then ASSERT().
2053
2054   @param  Dividend  A 64-bit unsigned value.
2055   @param  Divisor   A 32-bit unsigned value.
2056   @param  Remainder A pointer to a 32-bit unsigned value. This parameter is
2057                     optional and may be NULL.
2058
2059   @return Dividend / Divisor.
2060
2061 **/
2062 UINT64
2063 EFIAPI
2064 DivU64x32Remainder (
2065   IN      UINT64                    Dividend,
2066   IN      UINT32                    Divisor,
2067   OUT     UINT32                    *Remainder  OPTIONAL
2068   );
2069
2070
2071 /**
2072   Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2073   a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2074
2075   This function divides the 64-bit unsigned value Dividend by the 64-bit
2076   unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2077   is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2078   This function returns the 64-bit unsigned quotient.
2079
2080   If Divisor is 0, then ASSERT().
2081
2082   @param  Dividend  A 64-bit unsigned value.
2083   @param  Divisor   A 64-bit unsigned value.
2084   @param  Remainder A pointer to a 64-bit unsigned value. This parameter is
2085                     optional and may be NULL.
2086
2087   @return Dividend / Divisor.
2088
2089 **/
2090 UINT64
2091 EFIAPI
2092 DivU64x64Remainder (
2093   IN      UINT64                    Dividend,
2094   IN      UINT64                    Divisor,
2095   OUT     UINT64                    *Remainder  OPTIONAL
2096   );
2097
2098
2099 /**
2100   Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2101   64-bit signed result and a optional 64-bit signed remainder.
2102
2103   This function divides the 64-bit signed value Dividend by the 64-bit signed
2104   value Divisor and generates a 64-bit signed quotient. If Remainder is not
2105   NULL, then the 64-bit signed remainder is returned in Remainder. This
2106   function returns the 64-bit signed quotient.
2107
2108   It is the caller's responsibility to not call this function with a Divisor of 0.
2109   If Divisor is 0, then the quotient and remainder should be assumed to be
2110   the largest negative integer.
2111
2112   If Divisor is 0, then ASSERT().
2113
2114   @param  Dividend  A 64-bit signed value.
2115   @param  Divisor   A 64-bit signed value.
2116   @param  Remainder A pointer to a 64-bit signed value. This parameter is
2117                     optional and may be NULL.
2118
2119   @return Dividend / Divisor.
2120
2121 **/
2122 INT64
2123 EFIAPI
2124 DivS64x64Remainder (
2125   IN      INT64                     Dividend,
2126   IN      INT64                     Divisor,
2127   OUT     INT64                     *Remainder  OPTIONAL
2128   );
2129
2130
2131 /**
2132   Reads a 16-bit value from memory that may be unaligned.
2133
2134   This function returns the 16-bit value pointed to by Buffer. The function
2135   guarantees that the read operation does not produce an alignment fault.
2136
2137   If the Buffer is NULL, then ASSERT().
2138
2139   @param  Buffer  The pointer to a 16-bit value that may be unaligned.
2140
2141   @return The 16-bit value read from Buffer.
2142
2143 **/
2144 UINT16
2145 EFIAPI
2146 ReadUnaligned16 (
2147   IN CONST UINT16              *Buffer
2148   );
2149
2150
2151 /**
2152   Writes a 16-bit value to memory that may be unaligned.
2153
2154   This function writes the 16-bit value specified by Value to Buffer. Value is
2155   returned. The function guarantees that the write operation does not produce
2156   an alignment fault.
2157
2158   If the Buffer is NULL, then ASSERT().
2159
2160   @param  Buffer  The pointer to a 16-bit value that may be unaligned.
2161   @param  Value   16-bit value to write to Buffer.
2162
2163   @return The 16-bit value to write to Buffer.
2164
2165 **/
2166 UINT16
2167 EFIAPI
2168 WriteUnaligned16 (
2169   OUT UINT16                    *Buffer,
2170   IN  UINT16                    Value
2171   );
2172
2173
2174 /**
2175   Reads a 24-bit value from memory that may be unaligned.
2176
2177   This function returns the 24-bit value pointed to by Buffer. The function
2178   guarantees that the read operation does not produce an alignment fault.
2179
2180   If the Buffer is NULL, then ASSERT().
2181
2182   @param  Buffer  The pointer to a 24-bit value that may be unaligned.
2183
2184   @return The 24-bit value read from Buffer.
2185
2186 **/
2187 UINT32
2188 EFIAPI
2189 ReadUnaligned24 (
2190   IN CONST UINT32              *Buffer
2191   );
2192
2193
2194 /**
2195   Writes a 24-bit value to memory that may be unaligned.
2196
2197   This function writes the 24-bit value specified by Value to Buffer. Value is
2198   returned. The function guarantees that the write operation does not produce
2199   an alignment fault.
2200
2201   If the Buffer is NULL, then ASSERT().
2202
2203   @param  Buffer  The pointer to a 24-bit value that may be unaligned.
2204   @param  Value   24-bit value to write to Buffer.
2205
2206   @return The 24-bit value to write to Buffer.
2207
2208 **/
2209 UINT32
2210 EFIAPI
2211 WriteUnaligned24 (
2212   OUT UINT32                    *Buffer,
2213   IN  UINT32                    Value
2214   );
2215
2216
2217 /**
2218   Reads a 32-bit value from memory that may be unaligned.
2219
2220   This function returns the 32-bit value pointed to by Buffer. The function
2221   guarantees that the read operation does not produce an alignment fault.
2222
2223   If the Buffer is NULL, then ASSERT().
2224
2225   @param  Buffer  The pointer to a 32-bit value that may be unaligned.
2226
2227   @return The 32-bit value read from Buffer.
2228
2229 **/
2230 UINT32
2231 EFIAPI
2232 ReadUnaligned32 (
2233   IN CONST UINT32              *Buffer
2234   );
2235
2236
2237 /**
2238   Writes a 32-bit value to memory that may be unaligned.
2239
2240   This function writes the 32-bit value specified by Value to Buffer. Value is
2241   returned. The function guarantees that the write operation does not produce
2242   an alignment fault.
2243
2244   If the Buffer is NULL, then ASSERT().
2245
2246   @param  Buffer  The pointer to a 32-bit value that may be unaligned.
2247   @param  Value   32-bit value to write to Buffer.
2248
2249   @return The 32-bit value to write to Buffer.
2250
2251 **/
2252 UINT32
2253 EFIAPI
2254 WriteUnaligned32 (
2255   OUT UINT32                    *Buffer,
2256   IN  UINT32                    Value
2257   );
2258
2259
2260 /**
2261   Reads a 64-bit value from memory that may be unaligned.
2262
2263   This function returns the 64-bit value pointed to by Buffer. The function
2264   guarantees that the read operation does not produce an alignment fault.
2265
2266   If the Buffer is NULL, then ASSERT().
2267
2268   @param  Buffer  The pointer to a 64-bit value that may be unaligned.
2269
2270   @return The 64-bit value read from Buffer.
2271
2272 **/
2273 UINT64
2274 EFIAPI
2275 ReadUnaligned64 (
2276   IN CONST UINT64              *Buffer
2277   );
2278
2279
2280 /**
2281   Writes a 64-bit value to memory that may be unaligned.
2282
2283   This function writes the 64-bit value specified by Value to Buffer. Value is
2284   returned. The function guarantees that the write operation does not produce
2285   an alignment fault.
2286
2287   If the Buffer is NULL, then ASSERT().
2288
2289   @param  Buffer  The pointer to a 64-bit value that may be unaligned.
2290   @param  Value   64-bit value to write to Buffer.
2291
2292   @return The 64-bit value to write to Buffer.
2293
2294 **/
2295 UINT64
2296 EFIAPI
2297 WriteUnaligned64 (
2298   OUT UINT64                    *Buffer,
2299   IN  UINT64                    Value
2300   );
2301
2302
2303 //
2304 // Bit Field Functions
2305 //
2306
2307 /**
2308   Returns a bit field from an 8-bit value.
2309
2310   Returns the bitfield specified by the StartBit and the EndBit from Operand.
2311
2312   If 8-bit operations are not supported, then ASSERT().
2313   If StartBit is greater than 7, then ASSERT().
2314   If EndBit is greater than 7, then ASSERT().
2315   If EndBit is less than StartBit, then ASSERT().
2316
2317   @param  Operand   Operand on which to perform the bitfield operation.
2318   @param  StartBit  The ordinal of the least significant bit in the bit field.
2319                     Range 0..7.
2320   @param  EndBit    The ordinal of the most significant bit in the bit field.
2321                     Range 0..7.
2322
2323   @return The bit field read.
2324
2325 **/
2326 UINT8
2327 EFIAPI
2328 BitFieldRead8 (
2329   IN      UINT8                     Operand,
2330   IN      UINTN                     StartBit,
2331   IN      UINTN                     EndBit
2332   );
2333
2334
2335 /**
2336   Writes a bit field to an 8-bit value, and returns the result.
2337
2338   Writes Value to the bit field specified by the StartBit and the EndBit in
2339   Operand. All other bits in Operand are preserved. The new 8-bit value is
2340   returned.
2341
2342   If 8-bit operations are not supported, then ASSERT().
2343   If StartBit is greater than 7, then ASSERT().
2344   If EndBit is greater than 7, then ASSERT().
2345   If EndBit is less than StartBit, then ASSERT().
2346   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2347
2348   @param  Operand   Operand on which to perform the bitfield operation.
2349   @param  StartBit  The ordinal of the least significant bit in the bit field.
2350                     Range 0..7.
2351   @param  EndBit    The ordinal of the most significant bit in the bit field.
2352                     Range 0..7.
2353   @param  Value     New value of the bit field.
2354
2355   @return The new 8-bit value.
2356
2357 **/
2358 UINT8
2359 EFIAPI
2360 BitFieldWrite8 (
2361   IN      UINT8                     Operand,
2362   IN      UINTN                     StartBit,
2363   IN      UINTN                     EndBit,
2364   IN      UINT8                     Value
2365   );
2366
2367
2368 /**
2369   Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2370   result.
2371
2372   Performs a bitwise OR between the bit field specified by StartBit
2373   and EndBit in Operand and the value specified by OrData. All other bits in
2374   Operand are preserved. The new 8-bit value is returned.
2375
2376   If 8-bit operations are not supported, then ASSERT().
2377   If StartBit is greater than 7, then ASSERT().
2378   If EndBit is greater than 7, then ASSERT().
2379   If EndBit is less than StartBit, then ASSERT().
2380   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2381
2382   @param  Operand   Operand on which to perform the bitfield operation.
2383   @param  StartBit  The ordinal of the least significant bit in the bit field.
2384                     Range 0..7.
2385   @param  EndBit    The ordinal of the most significant bit in the bit field.
2386                     Range 0..7.
2387   @param  OrData    The value to OR with the read value from the value
2388
2389   @return The new 8-bit value.
2390
2391 **/
2392 UINT8
2393 EFIAPI
2394 BitFieldOr8 (
2395   IN      UINT8                     Operand,
2396   IN      UINTN                     StartBit,
2397   IN      UINTN                     EndBit,
2398   IN      UINT8                     OrData
2399   );
2400
2401
2402 /**
2403   Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2404   the result.
2405
2406   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2407   in Operand and the value specified by AndData. All other bits in Operand are
2408   preserved. The new 8-bit value is returned.
2409
2410   If 8-bit operations are not supported, then ASSERT().
2411   If StartBit is greater than 7, then ASSERT().
2412   If EndBit is greater than 7, then ASSERT().
2413   If EndBit is less than StartBit, then ASSERT().
2414   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2415
2416   @param  Operand   Operand on which to perform the bitfield operation.
2417   @param  StartBit  The ordinal of the least significant bit in the bit field.
2418                     Range 0..7.
2419   @param  EndBit    The ordinal of the most significant bit in the bit field.
2420                     Range 0..7.
2421   @param  AndData   The value to AND with the read value from the value.
2422
2423   @return The new 8-bit value.
2424
2425 **/
2426 UINT8
2427 EFIAPI
2428 BitFieldAnd8 (
2429   IN      UINT8                     Operand,
2430   IN      UINTN                     StartBit,
2431   IN      UINTN                     EndBit,
2432   IN      UINT8                     AndData
2433   );
2434
2435
2436 /**
2437   Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2438   bitwise OR, and returns the result.
2439
2440   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2441   in Operand and the value specified by AndData, followed by a bitwise
2442   OR with value specified by OrData. All other bits in Operand are
2443   preserved. The new 8-bit value is returned.
2444
2445   If 8-bit operations are not supported, then ASSERT().
2446   If StartBit is greater than 7, then ASSERT().
2447   If EndBit is greater than 7, then ASSERT().
2448   If EndBit is less than StartBit, then ASSERT().
2449   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2450   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2451
2452   @param  Operand   Operand on which to perform the bitfield operation.
2453   @param  StartBit  The ordinal of the least significant bit in the bit field.
2454                     Range 0..7.
2455   @param  EndBit    The ordinal of the most significant bit in the bit field.
2456                     Range 0..7.
2457   @param  AndData   The value to AND with the read value from the value.
2458   @param  OrData    The value to OR with the result of the AND operation.
2459
2460   @return The new 8-bit value.
2461
2462 **/
2463 UINT8
2464 EFIAPI
2465 BitFieldAndThenOr8 (
2466   IN      UINT8                     Operand,
2467   IN      UINTN                     StartBit,
2468   IN      UINTN                     EndBit,
2469   IN      UINT8                     AndData,
2470   IN      UINT8                     OrData
2471   );
2472
2473
2474 /**
2475   Returns a bit field from a 16-bit value.
2476
2477   Returns the bitfield specified by the StartBit and the EndBit from Operand.
2478
2479   If 16-bit operations are not supported, then ASSERT().
2480   If StartBit is greater than 15, then ASSERT().
2481   If EndBit is greater than 15, then ASSERT().
2482   If EndBit is less than StartBit, then ASSERT().
2483
2484   @param  Operand   Operand on which to perform the bitfield operation.
2485   @param  StartBit  The ordinal of the least significant bit in the bit field.
2486                     Range 0..15.
2487   @param  EndBit    The ordinal of the most significant bit in the bit field.
2488                     Range 0..15.
2489
2490   @return The bit field read.
2491
2492 **/
2493 UINT16
2494 EFIAPI
2495 BitFieldRead16 (
2496   IN      UINT16                    Operand,
2497   IN      UINTN                     StartBit,
2498   IN      UINTN                     EndBit
2499   );
2500
2501
2502 /**
2503   Writes a bit field to a 16-bit value, and returns the result.
2504
2505   Writes Value to the bit field specified by the StartBit and the EndBit in
2506   Operand. All other bits in Operand are preserved. The new 16-bit value is
2507   returned.
2508
2509   If 16-bit operations are not supported, then ASSERT().
2510   If StartBit is greater than 15, then ASSERT().
2511   If EndBit is greater than 15, then ASSERT().
2512   If EndBit is less than StartBit, then ASSERT().
2513   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2514
2515   @param  Operand   Operand on which to perform the bitfield operation.
2516   @param  StartBit  The ordinal of the least significant bit in the bit field.
2517                     Range 0..15.
2518   @param  EndBit    The ordinal of the most significant bit in the bit field.
2519                     Range 0..15.
2520   @param  Value     New value of the bit field.
2521
2522   @return The new 16-bit value.
2523
2524 **/
2525 UINT16
2526 EFIAPI
2527 BitFieldWrite16 (
2528   IN      UINT16                    Operand,
2529   IN      UINTN                     StartBit,
2530   IN      UINTN                     EndBit,
2531   IN      UINT16                    Value
2532   );
2533
2534
2535 /**
2536   Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2537   result.
2538
2539   Performs a bitwise OR between the bit field specified by StartBit
2540   and EndBit in Operand and the value specified by OrData. All other bits in
2541   Operand are preserved. The new 16-bit value is returned.
2542
2543   If 16-bit operations are not supported, then ASSERT().
2544   If StartBit is greater than 15, then ASSERT().
2545   If EndBit is greater than 15, then ASSERT().
2546   If EndBit is less than StartBit, then ASSERT().
2547   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2548
2549   @param  Operand   Operand on which to perform the bitfield operation.
2550   @param  StartBit  The ordinal of the least significant bit in the bit field.
2551                     Range 0..15.
2552   @param  EndBit    The ordinal of the most significant bit in the bit field.
2553                     Range 0..15.
2554   @param  OrData    The value to OR with the read value from the value
2555
2556   @return The new 16-bit value.
2557
2558 **/
2559 UINT16
2560 EFIAPI
2561 BitFieldOr16 (
2562   IN      UINT16                    Operand,
2563   IN      UINTN                     StartBit,
2564   IN      UINTN                     EndBit,
2565   IN      UINT16                    OrData
2566   );
2567
2568
2569 /**
2570   Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2571   the result.
2572
2573   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2574   in Operand and the value specified by AndData. All other bits in Operand are
2575   preserved. The new 16-bit value is returned.
2576
2577   If 16-bit operations are not supported, then ASSERT().
2578   If StartBit is greater than 15, then ASSERT().
2579   If EndBit is greater than 15, then ASSERT().
2580   If EndBit is less than StartBit, then ASSERT().
2581   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2582
2583   @param  Operand   Operand on which to perform the bitfield operation.
2584   @param  StartBit  The ordinal of the least significant bit in the bit field.
2585                     Range 0..15.
2586   @param  EndBit    The ordinal of the most significant bit in the bit field.
2587                     Range 0..15.
2588   @param  AndData   The value to AND with the read value from the value
2589
2590   @return The new 16-bit value.
2591
2592 **/
2593 UINT16
2594 EFIAPI
2595 BitFieldAnd16 (
2596   IN      UINT16                    Operand,
2597   IN      UINTN                     StartBit,
2598   IN      UINTN                     EndBit,
2599   IN      UINT16                    AndData
2600   );
2601
2602
2603 /**
2604   Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2605   bitwise OR, and returns the result.
2606
2607   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2608   in Operand and the value specified by AndData, followed by a bitwise
2609   OR with value specified by OrData. All other bits in Operand are
2610   preserved. The new 16-bit value is returned.
2611
2612   If 16-bit operations are not supported, then ASSERT().
2613   If StartBit is greater than 15, then ASSERT().
2614   If EndBit is greater than 15, then ASSERT().
2615   If EndBit is less than StartBit, then ASSERT().
2616   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2617   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2618
2619   @param  Operand   Operand on which to perform the bitfield operation.
2620   @param  StartBit  The ordinal of the least significant bit in the bit field.
2621                     Range 0..15.
2622   @param  EndBit    The ordinal of the most significant bit in the bit field.
2623                     Range 0..15.
2624   @param  AndData   The value to AND with the read value from the value.
2625   @param  OrData    The value to OR with the result of the AND operation.
2626
2627   @return The new 16-bit value.
2628
2629 **/
2630 UINT16
2631 EFIAPI
2632 BitFieldAndThenOr16 (
2633   IN      UINT16                    Operand,
2634   IN      UINTN                     StartBit,
2635   IN      UINTN                     EndBit,
2636   IN      UINT16                    AndData,
2637   IN      UINT16                    OrData
2638   );
2639
2640
2641 /**
2642   Returns a bit field from a 32-bit value.
2643
2644   Returns the bitfield specified by the StartBit and the EndBit from Operand.
2645
2646   If 32-bit operations are not supported, then ASSERT().
2647   If StartBit is greater than 31, then ASSERT().
2648   If EndBit is greater than 31, then ASSERT().
2649   If EndBit is less than StartBit, then ASSERT().
2650
2651   @param  Operand   Operand on which to perform the bitfield operation.
2652   @param  StartBit  The ordinal of the least significant bit in the bit field.
2653                     Range 0..31.
2654   @param  EndBit    The ordinal of the most significant bit in the bit field.
2655                     Range 0..31.
2656
2657   @return The bit field read.
2658
2659 **/
2660 UINT32
2661 EFIAPI
2662 BitFieldRead32 (
2663   IN      UINT32                    Operand,
2664   IN      UINTN                     StartBit,
2665   IN      UINTN                     EndBit
2666   );
2667
2668
2669 /**
2670   Writes a bit field to a 32-bit value, and returns the result.
2671
2672   Writes Value to the bit field specified by the StartBit and the EndBit in
2673   Operand. All other bits in Operand are preserved. The new 32-bit value is
2674   returned.
2675
2676   If 32-bit operations are not supported, then ASSERT().
2677   If StartBit is greater than 31, then ASSERT().
2678   If EndBit is greater than 31, then ASSERT().
2679   If EndBit is less than StartBit, then ASSERT().
2680   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2681
2682   @param  Operand   Operand on which to perform the bitfield operation.
2683   @param  StartBit  The ordinal of the least significant bit in the bit field.
2684                     Range 0..31.
2685   @param  EndBit    The ordinal of the most significant bit in the bit field.
2686                     Range 0..31.
2687   @param  Value     New value of the bit field.
2688
2689   @return The new 32-bit value.
2690
2691 **/
2692 UINT32
2693 EFIAPI
2694 BitFieldWrite32 (
2695   IN      UINT32                    Operand,
2696   IN      UINTN                     StartBit,
2697   IN      UINTN                     EndBit,
2698   IN      UINT32                    Value
2699   );
2700
2701
2702 /**
2703   Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2704   result.
2705
2706   Performs a bitwise OR between the bit field specified by StartBit
2707   and EndBit in Operand and the value specified by OrData. All other bits in
2708   Operand are preserved. The new 32-bit value is returned.
2709
2710   If 32-bit operations are not supported, then ASSERT().
2711   If StartBit is greater than 31, then ASSERT().
2712   If EndBit is greater than 31, then ASSERT().
2713   If EndBit is less than StartBit, then ASSERT().
2714   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2715
2716   @param  Operand   Operand on which to perform the bitfield operation.
2717   @param  StartBit  The ordinal of the least significant bit in the bit field.
2718                     Range 0..31.
2719   @param  EndBit    The ordinal of the most significant bit in the bit field.
2720                     Range 0..31.
2721   @param  OrData    The value to OR with the read value from the value.
2722
2723   @return The new 32-bit value.
2724
2725 **/
2726 UINT32
2727 EFIAPI
2728 BitFieldOr32 (
2729   IN      UINT32                    Operand,
2730   IN      UINTN                     StartBit,
2731   IN      UINTN                     EndBit,
2732   IN      UINT32                    OrData
2733   );
2734
2735
2736 /**
2737   Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2738   the result.
2739
2740   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2741   in Operand and the value specified by AndData. All other bits in Operand are
2742   preserved. The new 32-bit value is returned.
2743
2744   If 32-bit operations are not supported, then ASSERT().
2745   If StartBit is greater than 31, then ASSERT().
2746   If EndBit is greater than 31, then ASSERT().
2747   If EndBit is less than StartBit, then ASSERT().
2748   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2749
2750   @param  Operand   Operand on which to perform the bitfield operation.
2751   @param  StartBit  The ordinal of the least significant bit in the bit field.
2752                     Range 0..31.
2753   @param  EndBit    The ordinal of the most significant bit in the bit field.
2754                     Range 0..31.
2755   @param  AndData   The value to AND with the read value from the value
2756
2757   @return The new 32-bit value.
2758
2759 **/
2760 UINT32
2761 EFIAPI
2762 BitFieldAnd32 (
2763   IN      UINT32                    Operand,
2764   IN      UINTN                     StartBit,
2765   IN      UINTN                     EndBit,
2766   IN      UINT32                    AndData
2767   );
2768
2769
2770 /**
2771   Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2772   bitwise OR, and returns the result.
2773
2774   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2775   in Operand and the value specified by AndData, followed by a bitwise
2776   OR with value specified by OrData. All other bits in Operand are
2777   preserved. The new 32-bit value is returned.
2778
2779   If 32-bit operations are not supported, then ASSERT().
2780   If StartBit is greater than 31, then ASSERT().
2781   If EndBit is greater than 31, then ASSERT().
2782   If EndBit is less than StartBit, then ASSERT().
2783   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2784   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2785
2786   @param  Operand   Operand on which to perform the bitfield operation.
2787   @param  StartBit  The ordinal of the least significant bit in the bit field.
2788                     Range 0..31.
2789   @param  EndBit    The ordinal of the most significant bit in the bit field.
2790                     Range 0..31.
2791   @param  AndData   The value to AND with the read value from the value.
2792   @param  OrData    The value to OR with the result of the AND operation.
2793
2794   @return The new 32-bit value.
2795
2796 **/
2797 UINT32
2798 EFIAPI
2799 BitFieldAndThenOr32 (
2800   IN      UINT32                    Operand,
2801   IN      UINTN                     StartBit,
2802   IN      UINTN                     EndBit,
2803   IN      UINT32                    AndData,
2804   IN      UINT32                    OrData
2805   );
2806
2807
2808 /**
2809   Returns a bit field from a 64-bit value.
2810
2811   Returns the bitfield specified by the StartBit and the EndBit from Operand.
2812
2813   If 64-bit operations are not supported, then ASSERT().
2814   If StartBit is greater than 63, then ASSERT().
2815   If EndBit is greater than 63, then ASSERT().
2816   If EndBit is less than StartBit, then ASSERT().
2817
2818   @param  Operand   Operand on which to perform the bitfield operation.
2819   @param  StartBit  The ordinal of the least significant bit in the bit field.
2820                     Range 0..63.
2821   @param  EndBit    The ordinal of the most significant bit in the bit field.
2822                     Range 0..63.
2823
2824   @return The bit field read.
2825
2826 **/
2827 UINT64
2828 EFIAPI
2829 BitFieldRead64 (
2830   IN      UINT64                    Operand,
2831   IN      UINTN                     StartBit,
2832   IN      UINTN                     EndBit
2833   );
2834
2835
2836 /**
2837   Writes a bit field to a 64-bit value, and returns the result.
2838
2839   Writes Value to the bit field specified by the StartBit and the EndBit in
2840   Operand. All other bits in Operand are preserved. The new 64-bit value is
2841   returned.
2842
2843   If 64-bit operations are not supported, then ASSERT().
2844   If StartBit is greater than 63, then ASSERT().
2845   If EndBit is greater than 63, then ASSERT().
2846   If EndBit is less than StartBit, then ASSERT().
2847   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2848
2849   @param  Operand   Operand on which to perform the bitfield operation.
2850   @param  StartBit  The ordinal of the least significant bit in the bit field.
2851                     Range 0..63.
2852   @param  EndBit    The ordinal of the most significant bit in the bit field.
2853                     Range 0..63.
2854   @param  Value     New value of the bit field.
2855
2856   @return The new 64-bit value.
2857
2858 **/
2859 UINT64
2860 EFIAPI
2861 BitFieldWrite64 (
2862   IN      UINT64                    Operand,
2863   IN      UINTN                     StartBit,
2864   IN      UINTN                     EndBit,
2865   IN      UINT64                    Value
2866   );
2867
2868
2869 /**
2870   Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2871   result.
2872
2873   Performs a bitwise OR between the bit field specified by StartBit
2874   and EndBit in Operand and the value specified by OrData. All other bits in
2875   Operand are preserved. The new 64-bit value is returned.
2876
2877   If 64-bit operations are not supported, then ASSERT().
2878   If StartBit is greater than 63, then ASSERT().
2879   If EndBit is greater than 63, then ASSERT().
2880   If EndBit is less than StartBit, then ASSERT().
2881   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2882
2883   @param  Operand   Operand on which to perform the bitfield operation.
2884   @param  StartBit  The ordinal of the least significant bit in the bit field.
2885                     Range 0..63.
2886   @param  EndBit    The ordinal of the most significant bit in the bit field.
2887                     Range 0..63.
2888   @param  OrData    The value to OR with the read value from the value
2889
2890   @return The new 64-bit value.
2891
2892 **/
2893 UINT64
2894 EFIAPI
2895 BitFieldOr64 (
2896   IN      UINT64                    Operand,
2897   IN      UINTN                     StartBit,
2898   IN      UINTN                     EndBit,
2899   IN      UINT64                    OrData
2900   );
2901
2902
2903 /**
2904   Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2905   the result.
2906
2907   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2908   in Operand and the value specified by AndData. All other bits in Operand are
2909   preserved. The new 64-bit value is returned.
2910
2911   If 64-bit operations are not supported, then ASSERT().
2912   If StartBit is greater than 63, then ASSERT().
2913   If EndBit is greater than 63, then ASSERT().
2914   If EndBit is less than StartBit, then ASSERT().
2915   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2916
2917   @param  Operand   Operand on which to perform the bitfield operation.
2918   @param  StartBit  The ordinal of the least significant bit in the bit field.
2919                     Range 0..63.
2920   @param  EndBit    The ordinal of the most significant bit in the bit field.
2921                     Range 0..63.
2922   @param  AndData   The value to AND with the read value from the value
2923
2924   @return The new 64-bit value.
2925
2926 **/
2927 UINT64
2928 EFIAPI
2929 BitFieldAnd64 (
2930   IN      UINT64                    Operand,
2931   IN      UINTN                     StartBit,
2932   IN      UINTN                     EndBit,
2933   IN      UINT64                    AndData
2934   );
2935
2936
2937 /**
2938   Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2939   bitwise OR, and returns the result.
2940
2941   Performs a bitwise AND between the bit field specified by StartBit and EndBit
2942   in Operand and the value specified by AndData, followed by a bitwise
2943   OR with value specified by OrData. All other bits in Operand are
2944   preserved. The new 64-bit value is returned.
2945
2946   If 64-bit operations are not supported, then ASSERT().
2947   If StartBit is greater than 63, then ASSERT().
2948   If EndBit is greater than 63, then ASSERT().
2949   If EndBit is less than StartBit, then ASSERT().
2950   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2951   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
2952
2953   @param  Operand   Operand on which to perform the bitfield operation.
2954   @param  StartBit  The ordinal of the least significant bit in the bit field.
2955                     Range 0..63.
2956   @param  EndBit    The ordinal of the most significant bit in the bit field.
2957                     Range 0..63.
2958   @param  AndData   The value to AND with the read value from the value.
2959   @param  OrData    The value to OR with the result of the AND operation.
2960
2961   @return The new 64-bit value.
2962
2963 **/
2964 UINT64
2965 EFIAPI
2966 BitFieldAndThenOr64 (
2967   IN      UINT64                    Operand,
2968   IN      UINTN                     StartBit,
2969   IN      UINTN                     EndBit,
2970   IN      UINT64                    AndData,
2971   IN      UINT64                    OrData
2972   );
2973
2974 //
2975 // Base Library Checksum Functions
2976 //
2977
2978 /**
2979   Returns the sum of all elements in a buffer in unit of UINT8.
2980   During calculation, the carry bits are dropped.
2981
2982   This function calculates the sum of all elements in a buffer
2983   in unit of UINT8. The carry bits in result of addition are dropped.
2984   The result is returned as UINT8. If Length is Zero, then Zero is
2985   returned.
2986
2987   If Buffer is NULL, then ASSERT().
2988   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
2989
2990   @param  Buffer      The pointer to the buffer to carry out the sum operation.
2991   @param  Length      The size, in bytes, of Buffer.
2992
2993   @return Sum         The sum of Buffer with carry bits dropped during additions.
2994
2995 **/
2996 UINT8
2997 EFIAPI
2998 CalculateSum8 (
2999   IN      CONST UINT8              *Buffer,
3000   IN      UINTN                     Length
3001   );
3002
3003
3004 /**
3005   Returns the two's complement checksum of all elements in a buffer
3006   of 8-bit values.
3007
3008   This function first calculates the sum of the 8-bit values in the
3009   buffer specified by Buffer and Length.  The carry bits in the result
3010   of addition are dropped. Then, the two's complement of the sum is
3011   returned.  If Length is 0, then 0 is returned.
3012
3013   If Buffer is NULL, then ASSERT().
3014   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3015
3016   @param  Buffer      The pointer to the buffer to carry out the checksum operation.
3017   @param  Length      The size, in bytes, of Buffer.
3018
3019   @return Checksum    The two's complement checksum of Buffer.
3020
3021 **/
3022 UINT8
3023 EFIAPI
3024 CalculateCheckSum8 (
3025   IN      CONST UINT8              *Buffer,
3026   IN      UINTN                     Length
3027   );
3028
3029
3030 /**
3031   Returns the sum of all elements in a buffer of 16-bit values.  During
3032   calculation, the carry bits are dropped.
3033
3034   This function calculates the sum of the 16-bit values in the buffer
3035   specified by Buffer and Length. The carry bits in result of addition are dropped.
3036   The 16-bit result is returned.  If Length is 0, then 0 is returned.
3037
3038   If Buffer is NULL, then ASSERT().
3039   If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3040   If Length is not aligned on a 16-bit boundary, then ASSERT().
3041   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3042
3043   @param  Buffer      The pointer to the buffer to carry out the sum operation.
3044   @param  Length      The size, in bytes, of Buffer.
3045
3046   @return Sum         The sum of Buffer with carry bits dropped during additions.
3047
3048 **/
3049 UINT16
3050 EFIAPI
3051 CalculateSum16 (
3052   IN      CONST UINT16             *Buffer,
3053   IN      UINTN                     Length
3054   );
3055
3056
3057 /**
3058   Returns the two's complement checksum of all elements in a buffer of
3059   16-bit values.
3060
3061   This function first calculates the sum of the 16-bit values in the buffer
3062   specified by Buffer and Length.  The carry bits in the result of addition
3063   are dropped. Then, the two's complement of the sum is returned.  If Length
3064   is 0, then 0 is returned.
3065
3066   If Buffer is NULL, then ASSERT().
3067   If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3068   If Length is not aligned on a 16-bit boundary, then ASSERT().
3069   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3070
3071   @param  Buffer      The pointer to the buffer to carry out the checksum operation.
3072   @param  Length      The size, in bytes, of Buffer.
3073
3074   @return Checksum    The two's complement checksum of Buffer.
3075
3076 **/
3077 UINT16
3078 EFIAPI
3079 CalculateCheckSum16 (
3080   IN      CONST UINT16             *Buffer,
3081   IN      UINTN                     Length
3082   );
3083
3084
3085 /**
3086   Returns the sum of all elements in a buffer of 32-bit values. During
3087   calculation, the carry bits are dropped.
3088
3089   This function calculates the sum of the 32-bit values in the buffer
3090   specified by Buffer and Length. The carry bits in result of addition are dropped.
3091   The 32-bit result is returned. If Length is 0, then 0 is returned.
3092
3093   If Buffer is NULL, then ASSERT().
3094   If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3095   If Length is not aligned on a 32-bit boundary, then ASSERT().
3096   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3097
3098   @param  Buffer      The pointer to the buffer to carry out the sum operation.
3099   @param  Length      The size, in bytes, of Buffer.
3100
3101   @return Sum         The sum of Buffer with carry bits dropped during additions.
3102
3103 **/
3104 UINT32
3105 EFIAPI
3106 CalculateSum32 (
3107   IN      CONST UINT32             *Buffer,
3108   IN      UINTN                     Length
3109   );
3110
3111
3112 /**
3113   Returns the two's complement checksum of all elements in a buffer of
3114   32-bit values.
3115
3116   This function first calculates the sum of the 32-bit values in the buffer
3117   specified by Buffer and Length.  The carry bits in the result of addition
3118   are dropped. Then, the two's complement of the sum is returned.  If Length
3119   is 0, then 0 is returned.
3120
3121   If Buffer is NULL, then ASSERT().
3122   If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3123   If Length is not aligned on a 32-bit boundary, then ASSERT().
3124   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3125
3126   @param  Buffer      The pointer to the buffer to carry out the checksum operation.
3127   @param  Length      The size, in bytes, of Buffer.
3128
3129   @return Checksum    The two's complement checksum of Buffer.
3130
3131 **/
3132 UINT32
3133 EFIAPI
3134 CalculateCheckSum32 (
3135   IN      CONST UINT32             *Buffer,
3136   IN      UINTN                     Length
3137   );
3138
3139
3140 /**
3141   Returns the sum of all elements in a buffer of 64-bit values.  During
3142   calculation, the carry bits are dropped.
3143
3144   This function calculates the sum of the 64-bit values in the buffer
3145   specified by Buffer and Length. The carry bits in result of addition are dropped.
3146   The 64-bit result is returned.  If Length is 0, then 0 is returned.
3147
3148   If Buffer is NULL, then ASSERT().
3149   If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3150   If Length is not aligned on a 64-bit boundary, then ASSERT().
3151   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3152
3153   @param  Buffer      The pointer to the buffer to carry out the sum operation.
3154   @param  Length      The size, in bytes, of Buffer.
3155
3156   @return Sum         The sum of Buffer with carry bits dropped during additions.
3157
3158 **/
3159 UINT64
3160 EFIAPI
3161 CalculateSum64 (
3162   IN      CONST UINT64             *Buffer,
3163   IN      UINTN                     Length
3164   );
3165
3166
3167 /**
3168   Returns the two's complement checksum of all elements in a buffer of
3169   64-bit values.
3170
3171   This function first calculates the sum of the 64-bit values in the buffer
3172   specified by Buffer and Length.  The carry bits in the result of addition
3173   are dropped. Then, the two's complement of the sum is returned.  If Length
3174   is 0, then 0 is returned.
3175
3176   If Buffer is NULL, then ASSERT().
3177   If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3178   If Length is not aligned on a 64-bit boundary, then ASSERT().
3179   If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3180
3181   @param  Buffer      The pointer to the buffer to carry out the checksum operation.
3182   @param  Length      The size, in bytes, of Buffer.
3183
3184   @return Checksum    The two's complement checksum of Buffer.
3185
3186 **/
3187 UINT64
3188 EFIAPI
3189 CalculateCheckSum64 (
3190   IN      CONST UINT64             *Buffer,
3191   IN      UINTN                     Length
3192   );
3193
3194
3195 //
3196 // Base Library CPU Functions
3197 //
3198
3199 /**
3200   Function entry point used when a stack switch is requested with SwitchStack()
3201
3202   @param  Context1        Context1 parameter passed into SwitchStack().
3203   @param  Context2        Context2 parameter passed into SwitchStack().
3204
3205 **/
3206 typedef
3207 VOID
3208 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3209   IN      VOID                      *Context1,  OPTIONAL
3210   IN      VOID                      *Context2   OPTIONAL
3211   );
3212
3213
3214 /**
3215   Used to serialize load and store operations.
3216
3217   All loads and stores that proceed calls to this function are guaranteed to be
3218   globally visible when this function returns.
3219
3220 **/
3221 VOID
3222 EFIAPI
3223 MemoryFence (
3224   VOID
3225   );
3226
3227
3228 /**
3229   Saves the current CPU context that can be restored with a call to LongJump()
3230   and returns 0.
3231
3232   Saves the current CPU context in the buffer specified by JumpBuffer and
3233   returns 0. The initial call to SetJump() must always return 0. Subsequent
3234   calls to LongJump() cause a non-zero value to be returned by SetJump().
3235
3236   If JumpBuffer is NULL, then ASSERT().
3237   For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3238
3239   NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3240   The same structure must never be used for more than one CPU architecture context.
3241   For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3242   SetJump()/LongJump() is not currently supported for the EBC processor type.
3243
3244   @param  JumpBuffer  A pointer to CPU context buffer.
3245
3246   @retval 0 Indicates a return from SetJump().
3247
3248 **/
3249 UINTN
3250 EFIAPI
3251 SetJump (
3252   OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer
3253   );
3254
3255
3256 /**
3257   Restores the CPU context that was saved with SetJump().
3258
3259   Restores the CPU context from the buffer specified by JumpBuffer. This
3260   function never returns to the caller. Instead is resumes execution based on
3261   the state of JumpBuffer.
3262
3263   If JumpBuffer is NULL, then ASSERT().
3264   For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3265   If Value is 0, then ASSERT().
3266
3267   @param  JumpBuffer  A pointer to CPU context buffer.
3268   @param  Value       The value to return when the SetJump() context is
3269                       restored and must be non-zero.
3270
3271 **/
3272 VOID
3273 EFIAPI
3274 LongJump (
3275   IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,
3276   IN      UINTN                     Value
3277   );
3278
3279
3280 /**
3281   Enables CPU interrupts.
3282
3283 **/
3284 VOID
3285 EFIAPI
3286 EnableInterrupts (
3287   VOID
3288   );
3289
3290
3291 /**
3292   Disables CPU interrupts.
3293
3294 **/
3295 VOID
3296 EFIAPI
3297 DisableInterrupts (
3298   VOID
3299   );
3300
3301
3302 /**
3303   Disables CPU interrupts and returns the interrupt state prior to the disable
3304   operation.
3305
3306   @retval TRUE  CPU interrupts were enabled on entry to this call.
3307   @retval FALSE CPU interrupts were disabled on entry to this call.
3308
3309 **/
3310 BOOLEAN
3311 EFIAPI
3312 SaveAndDisableInterrupts (
3313   VOID
3314   );
3315
3316
3317 /**
3318   Enables CPU interrupts for the smallest window required to capture any
3319   pending interrupts.
3320
3321 **/
3322 VOID
3323 EFIAPI
3324 EnableDisableInterrupts (
3325   VOID
3326   );
3327
3328
3329 /**
3330   Retrieves the current CPU interrupt state.
3331
3332   Returns TRUE if interrupts are currently enabled. Otherwise
3333   returns FALSE.
3334
3335   @retval TRUE  CPU interrupts are enabled.
3336   @retval FALSE CPU interrupts are disabled.
3337
3338 **/
3339 BOOLEAN
3340 EFIAPI
3341 GetInterruptState (
3342   VOID
3343   );
3344
3345
3346 /**
3347   Set the current CPU interrupt state.
3348
3349   Sets the current CPU interrupt state to the state specified by
3350   InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3351   InterruptState is FALSE, then interrupts are disabled. InterruptState is
3352   returned.
3353
3354   @param  InterruptState  TRUE if interrupts should enabled. FALSE if
3355                           interrupts should be disabled.
3356
3357   @return InterruptState
3358
3359 **/
3360 BOOLEAN
3361 EFIAPI
3362 SetInterruptState (
3363   IN      BOOLEAN                   InterruptState
3364   );
3365
3366
3367 /**
3368   Requests CPU to pause for a short period of time.
3369
3370   Requests CPU to pause for a short period of time. Typically used in MP
3371   systems to prevent memory starvation while waiting for a spin lock.
3372
3373 **/
3374 VOID
3375 EFIAPI
3376 CpuPause (
3377   VOID
3378   );
3379
3380
3381 /**
3382   Transfers control to a function starting with a new stack.
3383
3384   Transfers control to the function specified by EntryPoint using the
3385   new stack specified by NewStack and passing in the parameters specified
3386   by Context1 and Context2.  Context1 and Context2 are optional and may
3387   be NULL.  The function EntryPoint must never return.  This function
3388   supports a variable number of arguments following the NewStack parameter.
3389   These additional arguments are ignored on IA-32, x64, and EBC architectures.
3390   Itanium processors expect one additional parameter of type VOID * that specifies
3391   the new backing store pointer.
3392
3393   If EntryPoint is NULL, then ASSERT().
3394   If NewStack is NULL, then ASSERT().
3395
3396   @param  EntryPoint  A pointer to function to call with the new stack.
3397   @param  Context1    A pointer to the context to pass into the EntryPoint
3398                       function.
3399   @param  Context2    A pointer to the context to pass into the EntryPoint
3400                       function.
3401   @param  NewStack    A pointer to the new stack to use for the EntryPoint
3402                       function.
3403   @param  ...         This variable argument list is ignored for IA-32, x64, and
3404                       EBC architectures.  For Itanium processors, this variable
3405                       argument list is expected to contain a single parameter of
3406                       type VOID * that specifies the new backing store pointer.
3407
3408
3409 **/
3410 VOID
3411 EFIAPI
3412 SwitchStack (
3413   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
3414   IN      VOID                      *Context1,  OPTIONAL
3415   IN      VOID                      *Context2,  OPTIONAL
3416   IN      VOID                      *NewStack,
3417   ...
3418   );
3419
3420
3421 /**
3422   Generates a breakpoint on the CPU.
3423
3424   Generates a breakpoint on the CPU. The breakpoint must be implemented such
3425   that code can resume normal execution after the breakpoint.
3426
3427 **/
3428 VOID
3429 EFIAPI
3430 CpuBreakpoint (
3431   VOID
3432   );
3433
3434
3435 /**
3436   Executes an infinite loop.
3437
3438   Forces the CPU to execute an infinite loop. A debugger may be used to skip
3439   past the loop and the code that follows the loop must execute properly. This
3440   implies that the infinite loop must not cause the code that follow it to be
3441   optimized away.
3442
3443 **/
3444 VOID
3445 EFIAPI
3446 CpuDeadLoop (
3447   VOID
3448   );
3449
3450 #if defined (MDE_CPU_IPF)
3451
3452 /**
3453   Flush a range of  cache lines in the cache coherency domain of the calling
3454   CPU.
3455
3456   Flushes the cache lines specified by Address and Length.  If Address is not aligned
3457   on a cache line boundary, then entire cache line containing Address is flushed.
3458   If Address + Length is not aligned on a cache line boundary, then the entire cache
3459   line containing Address + Length - 1 is flushed.  This function may choose to flush
3460   the entire cache if that is more efficient than flushing the specified range.  If
3461   Length is 0, the no cache lines are flushed.  Address is returned.
3462   This function is only available on Itanium processors.
3463
3464   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3465
3466   @param  Address The base address of the instruction lines to invalidate. If
3467                   the CPU is in a physical addressing mode, then Address is a
3468                   physical address. If the CPU is in a virtual addressing mode,
3469                   then Address is a virtual address.
3470
3471   @param  Length  The number of bytes to invalidate from the instruction cache.
3472
3473   @return Address.
3474
3475 **/
3476 VOID *
3477 EFIAPI
3478 AsmFlushCacheRange (
3479   IN      VOID                      *Address,
3480   IN      UINTN                     Length
3481   );
3482
3483
3484 /**
3485   Executes an FC instruction.
3486   Executes an FC instruction on the cache line specified by Address.
3487   The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3488   An implementation may flush a larger region.  This function is only available on Itanium processors.
3489
3490   @param Address    The Address of cache line to be flushed.
3491
3492   @return The address of FC instruction executed.
3493
3494 **/
3495 UINT64
3496 EFIAPI
3497 AsmFc (
3498   IN  UINT64  Address
3499   );
3500
3501
3502 /**
3503   Executes an FC.I instruction.
3504   Executes an FC.I instruction on the cache line specified by Address.
3505   The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3506   An implementation may flush a larger region.  This function is only available on Itanium processors.
3507
3508   @param Address    The Address of cache line to be flushed.
3509
3510   @return The address of the FC.I instruction executed.
3511
3512 **/
3513 UINT64
3514 EFIAPI
3515 AsmFci (
3516   IN  UINT64  Address
3517   );
3518
3519
3520 /**
3521   Reads the current value of a Processor Identifier Register (CPUID).
3522
3523   Reads and returns the current value of Processor Identifier Register specified by Index.
3524   The Index of largest implemented CPUID (One less than the number of implemented CPUID
3525   registers) is determined by CPUID [3] bits {7:0}.
3526   No parameter checking is performed on Index.  If the Index value is beyond the
3527   implemented CPUID register range, a Reserved Register/Field fault may occur.  The caller
3528   must either guarantee that Index is valid, or the caller must set up fault handlers to
3529   catch the faults.  This function is only available on Itanium processors.
3530
3531   @param Index    The 8-bit Processor Identifier Register index to read.
3532
3533   @return The current value of Processor Identifier Register specified by Index.
3534
3535 **/
3536 UINT64
3537 EFIAPI
3538 AsmReadCpuid (
3539   IN  UINT8   Index
3540   );
3541
3542
3543 /**
3544   Reads the current value of 64-bit Processor Status Register (PSR).
3545   This function is only available on Itanium processors.
3546
3547   @return The current value of PSR.
3548
3549 **/
3550 UINT64
3551 EFIAPI
3552 AsmReadPsr (
3553   VOID
3554   );
3555
3556
3557 /**
3558   Writes the current value of 64-bit Processor Status Register (PSR).
3559
3560   No parameter checking is performed on Value.  All bits of Value corresponding to
3561   reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3562   The caller must either guarantee that Value is valid, or the caller must set up
3563   fault handlers to catch the faults. This function is only available on Itanium processors.
3564
3565   @param Value    The 64-bit value to write to PSR.
3566
3567   @return The 64-bit value written to the PSR.
3568
3569 **/
3570 UINT64
3571 EFIAPI
3572 AsmWritePsr (
3573   IN UINT64  Value
3574   );
3575
3576
3577 /**
3578   Reads the current value of 64-bit Kernel Register #0 (KR0).
3579
3580   Reads and returns the current value of KR0.
3581   This function is only available on Itanium processors.
3582
3583   @return The current value of KR0.
3584
3585 **/
3586 UINT64
3587 EFIAPI
3588 AsmReadKr0 (
3589   VOID
3590   );
3591
3592
3593 /**
3594   Reads the current value of 64-bit Kernel Register #1 (KR1).
3595
3596   Reads and returns the current value of KR1.
3597   This function is only available on Itanium processors.
3598
3599   @return The current value of KR1.
3600
3601 **/
3602 UINT64
3603 EFIAPI
3604 AsmReadKr1 (
3605   VOID
3606   );
3607
3608
3609 /**
3610   Reads the current value of 64-bit Kernel Register #2 (KR2).
3611
3612   Reads and returns the current value of KR2.
3613   This function is only available on Itanium processors.
3614
3615   @return The current value of KR2.
3616
3617 **/
3618 UINT64
3619 EFIAPI
3620 AsmReadKr2 (
3621   VOID
3622   );
3623
3624
3625 /**
3626   Reads the current value of 64-bit Kernel Register #3 (KR3).
3627
3628   Reads and returns the current value of KR3.
3629   This function is only available on Itanium processors.
3630
3631   @return The current value of KR3.
3632
3633 **/
3634 UINT64
3635 EFIAPI
3636 AsmReadKr3 (
3637   VOID
3638   );
3639
3640
3641 /**
3642   Reads the current value of 64-bit Kernel Register #4 (KR4).
3643
3644   Reads and returns the current value of KR4.
3645   This function is only available on Itanium processors.
3646
3647   @return The current value of KR4.
3648
3649 **/
3650 UINT64
3651 EFIAPI
3652 AsmReadKr4 (
3653   VOID
3654   );
3655
3656
3657 /**
3658   Reads the current value of 64-bit Kernel Register #5 (KR5).
3659
3660   Reads and returns the current value of KR5.
3661   This function is only available on Itanium processors.
3662
3663   @return The current value of KR5.
3664
3665 **/
3666 UINT64
3667 EFIAPI
3668 AsmReadKr5 (
3669   VOID
3670   );
3671
3672
3673 /**
3674   Reads the current value of 64-bit Kernel Register #6 (KR6).
3675
3676   Reads and returns the current value of KR6.
3677   This function is only available on Itanium processors.
3678
3679   @return The current value of KR6.
3680
3681 **/
3682 UINT64
3683 EFIAPI
3684 AsmReadKr6 (
3685   VOID
3686   );
3687
3688
3689 /**
3690   Reads the current value of 64-bit Kernel Register #7 (KR7).
3691
3692   Reads and returns the current value of KR7.
3693   This function is only available on Itanium processors.
3694
3695   @return The current value of KR7.
3696
3697 **/
3698 UINT64
3699 EFIAPI
3700 AsmReadKr7 (
3701   VOID
3702   );
3703
3704
3705 /**
3706   Write the current value of 64-bit Kernel Register #0 (KR0).
3707
3708   Writes the current value of KR0.  The 64-bit value written to
3709   the KR0 is returned. This function is only available on Itanium processors.
3710
3711   @param  Value   The 64-bit value to write to KR0.
3712
3713   @return The 64-bit value written to the KR0.
3714
3715 **/
3716 UINT64
3717 EFIAPI
3718 AsmWriteKr0 (
3719   IN UINT64  Value
3720   );
3721
3722
3723 /**
3724   Write the current value of 64-bit Kernel Register #1 (KR1).
3725
3726   Writes the current value of KR1.  The 64-bit value written to
3727   the KR1 is returned. This function is only available on Itanium processors.
3728
3729   @param  Value   The 64-bit value to write to KR1.
3730
3731   @return The 64-bit value written to the KR1.
3732
3733 **/
3734 UINT64
3735 EFIAPI
3736 AsmWriteKr1 (
3737   IN UINT64  Value
3738   );
3739
3740
3741 /**
3742   Write the current value of 64-bit Kernel Register #2 (KR2).
3743
3744   Writes the current value of KR2.  The 64-bit value written to
3745   the KR2 is returned. This function is only available on Itanium processors.
3746
3747   @param  Value   The 64-bit value to write to KR2.
3748
3749   @return The 64-bit value written to the KR2.
3750
3751 **/
3752 UINT64
3753 EFIAPI
3754 AsmWriteKr2 (
3755   IN UINT64  Value
3756   );
3757
3758
3759 /**
3760   Write the current value of 64-bit Kernel Register #3 (KR3).
3761
3762   Writes the current value of KR3.  The 64-bit value written to
3763   the KR3 is returned. This function is only available on Itanium processors.
3764
3765   @param  Value   The 64-bit value to write to KR3.
3766
3767   @return The 64-bit value written to the KR3.
3768
3769 **/
3770 UINT64
3771 EFIAPI
3772 AsmWriteKr3 (
3773   IN UINT64  Value
3774   );
3775
3776
3777 /**
3778   Write the current value of 64-bit Kernel Register #4 (KR4).
3779
3780   Writes the current value of KR4.  The 64-bit value written to
3781   the KR4 is returned. This function is only available on Itanium processors.
3782
3783   @param  Value   The 64-bit value to write to KR4.
3784
3785   @return The 64-bit value written to the KR4.
3786
3787 **/
3788 UINT64
3789 EFIAPI
3790 AsmWriteKr4 (
3791   IN UINT64  Value
3792   );
3793
3794
3795 /**
3796   Write the current value of 64-bit Kernel Register #5 (KR5).
3797
3798   Writes the current value of KR5.  The 64-bit value written to
3799   the KR5 is returned. This function is only available on Itanium processors.
3800
3801   @param  Value   The 64-bit value to write to KR5.
3802
3803   @return The 64-bit value written to the KR5.
3804
3805 **/
3806 UINT64
3807 EFIAPI
3808 AsmWriteKr5 (
3809   IN UINT64  Value
3810   );
3811
3812
3813 /**
3814   Write the current value of 64-bit Kernel Register #6 (KR6).
3815
3816   Writes the current value of KR6.  The 64-bit value written to
3817   the KR6 is returned. This function is only available on Itanium processors.
3818
3819   @param  Value   The 64-bit value to write to KR6.
3820
3821   @return The 64-bit value written to the KR6.
3822
3823 **/
3824 UINT64
3825 EFIAPI
3826 AsmWriteKr6 (
3827   IN UINT64  Value
3828   );
3829
3830
3831 /**
3832   Write the current value of 64-bit Kernel Register #7 (KR7).
3833
3834   Writes the current value of KR7.  The 64-bit value written to
3835   the KR7 is returned. This function is only available on Itanium processors.
3836
3837   @param  Value   The 64-bit value to write to KR7.
3838
3839   @return The 64-bit value written to the KR7.
3840
3841 **/
3842 UINT64
3843 EFIAPI
3844 AsmWriteKr7 (
3845   IN UINT64  Value
3846   );
3847
3848
3849 /**
3850   Reads the current value of Interval Timer Counter Register (ITC).
3851
3852   Reads and returns the current value of ITC.
3853   This function is only available on Itanium processors.
3854
3855   @return The current value of ITC.
3856
3857 **/
3858 UINT64
3859 EFIAPI
3860 AsmReadItc (
3861   VOID
3862   );
3863
3864
3865 /**
3866   Reads the current value of Interval Timer Vector Register (ITV).
3867
3868   Reads and returns the current value of ITV.
3869   This function is only available on Itanium processors.
3870
3871   @return The current value of ITV.
3872
3873 **/
3874 UINT64
3875 EFIAPI
3876 AsmReadItv (
3877   VOID
3878   );
3879
3880
3881 /**
3882   Reads the current value of Interval Timer Match Register (ITM).
3883
3884   Reads and returns the current value of ITM.
3885   This function is only available on Itanium processors.
3886
3887   @return The current value of ITM.
3888 **/
3889 UINT64
3890 EFIAPI
3891 AsmReadItm (
3892   VOID
3893   );
3894
3895
3896 /**
3897   Writes the current value of 64-bit Interval Timer Counter Register (ITC).
3898
3899   Writes the current value of ITC.  The 64-bit value written to the ITC is returned.
3900   This function is only available on Itanium processors.
3901
3902   @param Value    The 64-bit value to write to ITC.
3903
3904   @return The 64-bit value written to the ITC.
3905
3906 **/
3907 UINT64
3908 EFIAPI
3909 AsmWriteItc (
3910   IN UINT64  Value
3911   );
3912
3913
3914 /**
3915   Writes the current value of 64-bit Interval Timer Match Register (ITM).
3916
3917   Writes the current value of ITM.  The 64-bit value written to the ITM is returned.
3918   This function is only available on Itanium processors.
3919
3920   @param Value    The 64-bit value to write to ITM.
3921
3922   @return The 64-bit value written to the ITM.
3923
3924 **/
3925 UINT64
3926 EFIAPI
3927 AsmWriteItm (
3928   IN UINT64  Value
3929   );
3930
3931
3932 /**
3933   Writes the current value of 64-bit Interval Timer Vector Register (ITV).
3934
3935   Writes the current value of ITV.  The 64-bit value written to the ITV is returned.
3936   No parameter checking is performed on Value.  All bits of Value corresponding to
3937   reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
3938   The caller must either guarantee that Value is valid, or the caller must set up
3939   fault handlers to catch the faults.
3940   This function is only available on Itanium processors.
3941
3942   @param Value    The 64-bit value to write to ITV.
3943
3944   @return The 64-bit value written to the ITV.
3945
3946 **/
3947 UINT64
3948 EFIAPI
3949 AsmWriteItv (
3950   IN UINT64  Value
3951   );
3952
3953
3954 /**
3955   Reads the current value of Default Control Register (DCR).
3956
3957   Reads and returns the current value of DCR.  This function is only available on Itanium processors.
3958
3959   @return The current value of DCR.
3960
3961 **/
3962 UINT64
3963 EFIAPI
3964 AsmReadDcr (
3965   VOID
3966   );
3967
3968
3969 /**
3970   Reads the current value of Interruption Vector Address Register (IVA).
3971
3972   Reads and returns the current value of IVA.  This function is only available on Itanium processors.
3973
3974   @return The current value of IVA.
3975 **/
3976 UINT64
3977 EFIAPI
3978 AsmReadIva (
3979   VOID
3980   );
3981
3982
3983 /**
3984   Reads the current value of Page Table Address Register (PTA).
3985
3986   Reads and returns the current value of PTA.  This function is only available on Itanium processors.
3987
3988   @return The current value of PTA.
3989
3990 **/
3991 UINT64
3992 EFIAPI
3993 AsmReadPta (
3994   VOID
3995   );
3996
3997
3998 /**
3999   Writes the current value of 64-bit Default Control Register (DCR).
4000
4001   Writes the current value of DCR.  The 64-bit value written to the DCR is returned.
4002   No parameter checking is performed on Value.  All bits of Value corresponding to
4003   reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4004   The caller must either guarantee that Value is valid, or the caller must set up
4005   fault handlers to catch the faults.
4006   This function is only available on Itanium processors.
4007
4008   @param Value    The 64-bit value to write to DCR.
4009
4010   @return The 64-bit value written to the DCR.
4011
4012 **/
4013 UINT64
4014 EFIAPI
4015 AsmWriteDcr (
4016   IN UINT64  Value
4017   );
4018
4019
4020 /**
4021   Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4022
4023   Writes the current value of IVA.  The 64-bit value written to the IVA is returned.
4024   The size of vector table is 32 K bytes and is 32 K bytes aligned
4025   the low 15 bits of Value is ignored when written.
4026   This function is only available on Itanium processors.
4027
4028   @param Value    The 64-bit value to write to IVA.
4029
4030   @return The 64-bit value written to the IVA.
4031
4032 **/
4033 UINT64
4034 EFIAPI
4035 AsmWriteIva (
4036   IN UINT64  Value
4037   );
4038
4039
4040 /**
4041   Writes the current value of 64-bit Page Table Address Register (PTA).
4042
4043   Writes the current value of PTA.  The 64-bit value written to the PTA is returned.
4044   No parameter checking is performed on Value.  All bits of Value corresponding to
4045   reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4046   The caller must either guarantee that Value is valid, or the caller must set up
4047   fault handlers to catch the faults.
4048   This function is only available on Itanium processors.
4049
4050   @param Value    The 64-bit value to write to PTA.
4051
4052   @return The 64-bit value written to the PTA.
4053 **/
4054 UINT64
4055 EFIAPI
4056 AsmWritePta (
4057   IN UINT64  Value
4058   );
4059
4060
4061 /**
4062   Reads the current value of Local Interrupt ID Register (LID).
4063
4064   Reads and returns the current value of LID.  This function is only available on Itanium processors.
4065
4066   @return The current value of LID.
4067
4068 **/
4069 UINT64
4070 EFIAPI
4071 AsmReadLid (
4072   VOID
4073   );
4074
4075
4076 /**
4077   Reads the current value of External Interrupt Vector Register (IVR).
4078
4079   Reads and returns the current value of IVR.  This function is only available on Itanium processors.
4080
4081   @return The current value of IVR.
4082
4083 **/
4084 UINT64
4085 EFIAPI
4086 AsmReadIvr (
4087   VOID
4088   );
4089
4090
4091 /**
4092   Reads the current value of Task Priority Register (TPR).
4093
4094   Reads and returns the current value of TPR.  This function is only available on Itanium processors.
4095
4096   @return The current value of TPR.
4097
4098 **/
4099 UINT64
4100 EFIAPI
4101 AsmReadTpr (
4102   VOID
4103   );
4104
4105
4106 /**
4107   Reads the current value of External Interrupt Request Register #0 (IRR0).
4108
4109   Reads and returns the current value of IRR0.  This function is only available on Itanium processors.
4110
4111   @return The current value of IRR0.
4112
4113 **/
4114 UINT64
4115 EFIAPI
4116 AsmReadIrr0 (
4117   VOID
4118   );
4119
4120
4121 /**
4122   Reads the current value of External Interrupt Request Register #1 (IRR1).
4123
4124   Reads and returns the current value of IRR1.  This function is only available on Itanium processors.
4125
4126   @return The current value of IRR1.
4127
4128 **/
4129 UINT64
4130 EFIAPI
4131 AsmReadIrr1 (
4132   VOID
4133   );
4134
4135
4136 /**
4137   Reads the current value of External Interrupt Request Register #2 (IRR2).
4138
4139   Reads and returns the current value of IRR2.  This function is only available on Itanium processors.
4140
4141   @return The current value of IRR2.
4142
4143 **/
4144 UINT64
4145 EFIAPI
4146 AsmReadIrr2 (
4147   VOID
4148   );
4149
4150
4151 /**
4152   Reads the current value of External Interrupt Request Register #3 (IRR3).
4153
4154   Reads and returns the current value of IRR3.  This function is only available on Itanium processors.
4155
4156   @return The current value of IRR3.
4157
4158 **/
4159 UINT64
4160 EFIAPI
4161 AsmReadIrr3 (
4162   VOID
4163   );
4164
4165
4166 /**
4167   Reads the current value of Performance Monitor Vector Register (PMV).
4168
4169   Reads and returns the current value of PMV.  This function is only available on Itanium processors.
4170
4171   @return The current value of PMV.
4172
4173 **/
4174 UINT64
4175 EFIAPI
4176 AsmReadPmv (
4177   VOID
4178   );
4179
4180
4181 /**
4182   Reads the current value of Corrected Machine Check Vector Register (CMCV).
4183
4184   Reads and returns the current value of CMCV.  This function is only available on Itanium processors.
4185
4186   @return The current value of CMCV.
4187
4188 **/
4189 UINT64
4190 EFIAPI
4191 AsmReadCmcv (
4192   VOID
4193   );
4194
4195
4196 /**
4197   Reads the current value of Local Redirection Register #0 (LRR0).
4198
4199   Reads and returns the current value of LRR0.  This function is only available on Itanium processors.
4200
4201   @return The current value of LRR0.
4202
4203 **/
4204 UINT64
4205 EFIAPI
4206 AsmReadLrr0 (
4207   VOID
4208   );
4209
4210
4211 /**
4212   Reads the current value of Local Redirection Register #1 (LRR1).
4213
4214   Reads and returns the current value of LRR1.  This function is only available on Itanium processors.
4215
4216   @return The current value of LRR1.
4217
4218 **/
4219 UINT64
4220 EFIAPI
4221 AsmReadLrr1 (
4222   VOID
4223   );
4224
4225
4226 /**
4227   Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4228
4229   Writes the current value of LID.  The 64-bit value written to the LID is returned.
4230   No parameter checking is performed on Value.  All bits of Value corresponding to
4231   reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4232   The caller must either guarantee that Value is valid, or the caller must set up
4233   fault handlers to catch the faults.
4234   This function is only available on Itanium processors.
4235
4236   @param Value    The 64-bit value to write to LID.
4237
4238   @return The 64-bit value written to the LID.
4239
4240 **/
4241 UINT64
4242 EFIAPI
4243 AsmWriteLid (
4244   IN UINT64  Value
4245   );
4246
4247
4248 /**
4249   Writes the current value of 64-bit Task Priority Register (TPR).
4250
4251   Writes the current value of TPR.  The 64-bit value written to the TPR is returned.
4252   No parameter checking is performed on Value.  All bits of Value corresponding to
4253   reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4254   The caller must either guarantee that Value is valid, or the caller must set up
4255   fault handlers to catch the faults.
4256   This function is only available on Itanium processors.
4257
4258   @param Value    The 64-bit value to write to TPR.
4259
4260   @return The 64-bit value written to the TPR.
4261
4262 **/
4263 UINT64
4264 EFIAPI
4265 AsmWriteTpr (
4266   IN UINT64  Value
4267   );
4268
4269
4270 /**
4271   Performs a write operation on End OF External Interrupt Register (EOI).
4272
4273   Writes a value of 0 to the EOI Register.  This function is only available on Itanium processors.
4274
4275 **/
4276 VOID
4277 EFIAPI
4278 AsmWriteEoi (
4279   VOID
4280   );
4281
4282
4283 /**
4284   Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4285
4286   Writes the current value of PMV.  The 64-bit value written to the PMV is returned.
4287   No parameter checking is performed on Value.  All bits of Value corresponding
4288   to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4289   The caller must either guarantee that Value is valid, or the caller must set up
4290   fault handlers to catch the faults.
4291   This function is only available on Itanium processors.
4292
4293   @param Value    The 64-bit value to write to PMV.
4294
4295   @return The 64-bit value written to the PMV.
4296
4297 **/
4298 UINT64
4299 EFIAPI
4300 AsmWritePmv (
4301   IN UINT64  Value
4302   );
4303
4304
4305 /**
4306   Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4307
4308   Writes the current value of CMCV.  The 64-bit value written to the CMCV is returned.
4309   No parameter checking is performed on Value.  All bits of Value corresponding
4310   to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4311   The caller must either guarantee that Value is valid, or the caller must set up
4312   fault handlers to catch the faults.
4313   This function is only available on Itanium processors.
4314
4315   @param Value    The 64-bit value to write to CMCV.
4316
4317   @return The 64-bit value written to the CMCV.
4318
4319 **/
4320 UINT64
4321 EFIAPI
4322 AsmWriteCmcv (
4323   IN UINT64  Value
4324   );
4325
4326
4327 /**
4328   Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4329
4330   Writes the current value of LRR0.  The 64-bit value written to the LRR0 is returned.
4331   No parameter checking is performed on Value.  All bits of Value corresponding
4332   to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4333   The caller must either guarantee that Value is valid, or the caller must set up
4334   fault handlers to catch the faults.
4335   This function is only available on Itanium processors.
4336
4337   @param Value    The 64-bit value to write to LRR0.
4338
4339   @return The 64-bit value written to the LRR0.
4340
4341 **/
4342 UINT64
4343 EFIAPI
4344 AsmWriteLrr0 (
4345   IN UINT64  Value
4346   );
4347
4348
4349 /**
4350   Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4351
4352   Writes the current value of LRR1.  The 64-bit value written to the LRR1 is returned.
4353   No parameter checking is performed on Value.  All bits of Value corresponding
4354   to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4355   The caller must either guarantee that Value is valid, or the caller must
4356   set up fault handlers to catch the faults.
4357   This function is only available on Itanium processors.
4358
4359   @param Value    The 64-bit value to write to LRR1.
4360
4361   @return The 64-bit value written to the LRR1.
4362
4363 **/
4364 UINT64
4365 EFIAPI
4366 AsmWriteLrr1 (
4367   IN UINT64  Value
4368   );
4369
4370
4371 /**
4372   Reads the current value of Instruction Breakpoint Register (IBR).
4373
4374   The Instruction Breakpoint Registers are used in pairs.  The even numbered
4375   registers contain breakpoint addresses, and the odd numbered registers contain
4376   breakpoint mask conditions.  At least four instruction registers pairs are implemented
4377   on all processor models.   Implemented registers are contiguous starting with
4378   register 0.  No parameter checking is performed on Index, and if the Index value
4379   is beyond the implemented IBR register range, a Reserved Register/Field fault may
4380   occur.  The caller must either guarantee that Index is valid, or the caller must
4381   set up fault handlers to catch the faults.
4382   This function is only available on Itanium processors.
4383
4384   @param Index    The 8-bit Instruction Breakpoint Register index to read.
4385
4386   @return The current value of Instruction Breakpoint Register specified by Index.
4387
4388 **/
4389 UINT64
4390 EFIAPI
4391 AsmReadIbr (
4392   IN  UINT8   Index
4393   );
4394
4395
4396 /**
4397   Reads the current value of Data Breakpoint Register (DBR).
4398
4399   The Data Breakpoint Registers are used in pairs.  The even numbered registers
4400   contain breakpoint addresses, and odd numbered registers contain breakpoint
4401   mask conditions.  At least four data registers pairs are implemented on all processor
4402   models.  Implemented registers are contiguous starting with register 0.
4403   No parameter checking is performed on Index.  If the Index value is beyond
4404   the implemented DBR register range, a Reserved Register/Field fault may occur.
4405   The caller must either guarantee that Index is valid, or the caller must set up
4406   fault handlers to catch the faults.
4407   This function is only available on Itanium processors.
4408
4409   @param Index    The 8-bit Data Breakpoint Register index to read.
4410
4411   @return The current value of Data Breakpoint Register specified by Index.
4412
4413 **/
4414 UINT64
4415 EFIAPI
4416 AsmReadDbr (
4417   IN  UINT8   Index
4418   );
4419
4420
4421 /**
4422   Reads the current value of Performance Monitor Configuration Register (PMC).
4423
4424   All processor implementations provide at least four performance counters
4425   (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
4426   status registers (PMC [0]... PMC [3]).  Processor implementations may provide
4427   additional implementation-dependent PMC and PMD to increase the number of
4428   'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD
4429   register set is implementation dependent.  No parameter checking is performed
4430   on Index.  If the Index value is beyond the implemented PMC register range,
4431   zero value will be returned.
4432   This function is only available on Itanium processors.
4433
4434   @param Index    The 8-bit Performance Monitor Configuration Register index to read.
4435
4436   @return   The current value of Performance Monitor Configuration Register
4437             specified by Index.
4438
4439 **/
4440 UINT64
4441 EFIAPI
4442 AsmReadPmc (
4443   IN  UINT8   Index
4444   );
4445
4446
4447 /**
4448   Reads the current value of Performance Monitor Data Register (PMD).
4449
4450   All processor implementations provide at least 4 performance counters
4451   (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4452   overflow status registers (PMC [0]... PMC [3]).  Processor implementations may
4453   provide additional implementation-dependent PMC and PMD to increase the number
4454   of 'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD
4455   register set is implementation dependent.  No parameter checking is performed
4456   on Index.  If the Index value is beyond the implemented PMD register range,
4457   zero value will be returned.
4458   This function is only available on Itanium processors.
4459
4460   @param Index    The 8-bit Performance Monitor Data Register index to read.
4461
4462   @return The current value of Performance Monitor Data Register specified by Index.
4463
4464 **/
4465 UINT64
4466 EFIAPI
4467 AsmReadPmd (
4468   IN  UINT8   Index
4469   );
4470
4471
4472 /**
4473   Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4474
4475   Writes current value of Instruction Breakpoint Register specified by Index.
4476   The Instruction Breakpoint Registers are used in pairs.  The even numbered
4477   registers contain breakpoint addresses, and odd numbered registers contain
4478   breakpoint mask conditions.  At least four instruction registers pairs are implemented
4479   on all processor models.  Implemented registers are contiguous starting with
4480   register 0.  No parameter checking is performed on Index.  If the Index value
4481   is beyond the implemented IBR register range, a Reserved Register/Field fault may
4482   occur.  The caller must either guarantee that Index is valid, or the caller must
4483   set up fault handlers to catch the faults.
4484   This function is only available on Itanium processors.
4485
4486   @param Index    The 8-bit Instruction Breakpoint Register index to write.
4487   @param Value    The 64-bit value to write to IBR.
4488
4489   @return The 64-bit value written to the IBR.
4490
4491 **/
4492 UINT64
4493 EFIAPI
4494 AsmWriteIbr (
4495   IN UINT8   Index,
4496   IN UINT64  Value
4497   );
4498
4499
4500 /**
4501   Writes the current value of 64-bit Data Breakpoint Register (DBR).
4502
4503   Writes current value of Data Breakpoint Register specified by Index.
4504   The Data Breakpoint Registers are used in pairs.  The even numbered registers
4505   contain breakpoint addresses, and odd numbered registers contain breakpoint
4506   mask conditions.  At least four data registers pairs are implemented on all processor
4507   models.  Implemented registers are contiguous starting with register 0.  No parameter
4508   checking is performed on Index.  If the Index value is beyond the implemented
4509   DBR register range, a Reserved Register/Field fault may occur.  The caller must
4510   either guarantee that Index is valid, or the caller must set up fault handlers to
4511   catch the faults.
4512   This function is only available on Itanium processors.
4513
4514   @param Index    The 8-bit Data Breakpoint Register index to write.
4515   @param Value    The 64-bit value to write to DBR.
4516
4517   @return The 64-bit value written to the DBR.
4518
4519 **/
4520 UINT64
4521 EFIAPI
4522 AsmWriteDbr (
4523   IN UINT8   Index,
4524   IN UINT64  Value
4525   );
4526
4527
4528 /**
4529   Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4530
4531   Writes current value of Performance Monitor Configuration Register specified by Index.
4532   All processor implementations provide at least four performance counters
4533   (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status
4534   registers (PMC [0]... PMC [3]).  Processor implementations may provide additional
4535   implementation-dependent PMC and PMD to increase the number of 'generic' performance
4536   counters (PMC/PMD pairs).  The remainder of PMC and PMD register set is implementation
4537   dependent.  No parameter checking is performed on Index.  If the Index value is
4538   beyond the implemented PMC register range, the write is ignored.
4539   This function is only available on Itanium processors.
4540
4541   @param Index    The 8-bit Performance Monitor Configuration Register index to write.
4542   @param Value    The 64-bit value to write to PMC.
4543
4544   @return The 64-bit value written to the PMC.
4545
4546 **/
4547 UINT64
4548 EFIAPI
4549 AsmWritePmc (
4550   IN UINT8   Index,
4551   IN UINT64  Value
4552   );
4553
4554
4555 /**
4556   Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4557
4558   Writes current value of Performance Monitor Data Register specified by Index.
4559   All processor implementations provide at least four performance counters
4560   (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
4561   status registers (PMC [0]... PMC [3]).  Processor implementations may provide
4562   additional implementation-dependent PMC and PMD to increase the number of 'generic'
4563   performance counters (PMC/PMD pairs).  The remainder of PMC and PMD register set
4564   is implementation dependent.  No parameter checking is performed on Index.  If the
4565   Index value is beyond the implemented PMD register range, the write is ignored.
4566   This function is only available on Itanium processors.
4567
4568   @param Index    The 8-bit Performance Monitor Data Register index to write.
4569   @param Value    The 64-bit value to write to PMD.
4570
4571   @return The 64-bit value written to the PMD.
4572
4573 **/
4574 UINT64
4575 EFIAPI
4576 AsmWritePmd (
4577   IN UINT8   Index,
4578   IN UINT64  Value
4579   );
4580
4581
4582 /**
4583   Reads the current value of 64-bit Global Pointer (GP).
4584
4585   Reads and returns the current value of GP.
4586   This function is only available on Itanium processors.
4587
4588   @return The current value of GP.
4589
4590 **/
4591 UINT64
4592 EFIAPI
4593 AsmReadGp (
4594   VOID
4595   );
4596
4597
4598 /**
4599   Write the current value of 64-bit Global Pointer (GP).
4600
4601   Writes the current value of GP. The 64-bit value written to the GP is returned.
4602   No parameter checking is performed on Value.
4603   This function is only available on Itanium processors.
4604
4605   @param Value  The 64-bit value to write to GP.
4606
4607   @return The 64-bit value written to the GP.
4608
4609 **/
4610 UINT64
4611 EFIAPI
4612 AsmWriteGp (
4613   IN UINT64  Value
4614   );
4615
4616
4617 /**
4618   Reads the current value of 64-bit Stack Pointer (SP).
4619
4620   Reads and returns the current value of SP.
4621   This function is only available on Itanium processors.
4622
4623   @return The current value of SP.
4624
4625 **/
4626 UINT64
4627 EFIAPI
4628 AsmReadSp (
4629   VOID
4630   );
4631
4632
4633 ///
4634 /// Valid Index value for AsmReadControlRegister().
4635 ///
4636 #define IPF_CONTROL_REGISTER_DCR   0
4637 #define IPF_CONTROL_REGISTER_ITM   1
4638 #define IPF_CONTROL_REGISTER_IVA   2
4639 #define IPF_CONTROL_REGISTER_PTA   8
4640 #define IPF_CONTROL_REGISTER_IPSR  16
4641 #define IPF_CONTROL_REGISTER_ISR   17
4642 #define IPF_CONTROL_REGISTER_IIP   19
4643 #define IPF_CONTROL_REGISTER_IFA   20
4644 #define IPF_CONTROL_REGISTER_ITIR  21
4645 #define IPF_CONTROL_REGISTER_IIPA  22
4646 #define IPF_CONTROL_REGISTER_IFS   23
4647 #define IPF_CONTROL_REGISTER_IIM   24
4648 #define IPF_CONTROL_REGISTER_IHA   25
4649 #define IPF_CONTROL_REGISTER_LID   64
4650 #define IPF_CONTROL_REGISTER_IVR   65
4651 #define IPF_CONTROL_REGISTER_TPR   66
4652 #define IPF_CONTROL_REGISTER_EOI   67
4653 #define IPF_CONTROL_REGISTER_IRR0  68
4654 #define IPF_CONTROL_REGISTER_IRR1  69
4655 #define IPF_CONTROL_REGISTER_IRR2  70
4656 #define IPF_CONTROL_REGISTER_IRR3  71
4657 #define IPF_CONTROL_REGISTER_ITV   72
4658 #define IPF_CONTROL_REGISTER_PMV   73
4659 #define IPF_CONTROL_REGISTER_CMCV  74
4660 #define IPF_CONTROL_REGISTER_LRR0  80
4661 #define IPF_CONTROL_REGISTER_LRR1  81
4662
4663 /**
4664   Reads a 64-bit control register.
4665
4666   Reads and returns the control register specified by Index. The valid Index valued
4667   are defined above in "Related Definitions".
4668   If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only
4669   available on Itanium processors.
4670
4671   @param  Index                     The index of the control register to read.
4672
4673   @return The control register specified by Index.
4674
4675 **/
4676 UINT64
4677 EFIAPI
4678 AsmReadControlRegister (
4679   IN UINT64  Index
4680   );
4681
4682
4683 ///
4684 /// Valid Index value for AsmReadApplicationRegister().
4685 ///
4686 #define IPF_APPLICATION_REGISTER_K0        0
4687 #define IPF_APPLICATION_REGISTER_K1        1
4688 #define IPF_APPLICATION_REGISTER_K2        2
4689 #define IPF_APPLICATION_REGISTER_K3        3
4690 #define IPF_APPLICATION_REGISTER_K4        4
4691 #define IPF_APPLICATION_REGISTER_K5        5
4692 #define IPF_APPLICATION_REGISTER_K6        6
4693 #define IPF_APPLICATION_REGISTER_K7        7
4694 #define IPF_APPLICATION_REGISTER_RSC       16
4695 #define IPF_APPLICATION_REGISTER_BSP       17
4696 #define IPF_APPLICATION_REGISTER_BSPSTORE  18
4697 #define IPF_APPLICATION_REGISTER_RNAT      19
4698 #define IPF_APPLICATION_REGISTER_FCR       21
4699 #define IPF_APPLICATION_REGISTER_EFLAG     24
4700 #define IPF_APPLICATION_REGISTER_CSD       25
4701 #define IPF_APPLICATION_REGISTER_SSD       26
4702 #define IPF_APPLICATION_REGISTER_CFLG      27
4703 #define IPF_APPLICATION_REGISTER_FSR       28
4704 #define IPF_APPLICATION_REGISTER_FIR       29
4705 #define IPF_APPLICATION_REGISTER_FDR       30
4706 #define IPF_APPLICATION_REGISTER_CCV       32
4707 #define IPF_APPLICATION_REGISTER_UNAT      36
4708 #define IPF_APPLICATION_REGISTER_FPSR      40
4709 #define IPF_APPLICATION_REGISTER_ITC       44
4710 #define IPF_APPLICATION_REGISTER_PFS       64
4711 #define IPF_APPLICATION_REGISTER_LC        65
4712 #define IPF_APPLICATION_REGISTER_EC        66
4713
4714 /**
4715   Reads a 64-bit application register.
4716
4717   Reads and returns the application register specified by Index. The valid Index
4718   valued are defined above in "Related Definitions".
4719   If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only
4720   available on Itanium processors.
4721
4722   @param  Index                     The index of the application register to read.
4723
4724   @return The application register specified by Index.
4725
4726 **/
4727 UINT64
4728 EFIAPI
4729 AsmReadApplicationRegister (
4730   IN UINT64  Index
4731   );
4732
4733
4734 /**
4735   Reads the current value of a Machine Specific Register (MSR).
4736
4737   Reads and returns the current value of the Machine Specific Register specified by Index.  No
4738   parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4739   register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that
4740   Index is valid, or the caller must set up fault handlers to catch the faults.  This function is
4741   only available on Itanium processors.
4742
4743   @param  Index                     The 8-bit Machine Specific Register index to read.
4744
4745   @return The current value of the Machine Specific Register specified by Index.
4746
4747 **/
4748 UINT64
4749 EFIAPI
4750 AsmReadMsr (
4751   IN UINT8   Index
4752   );
4753
4754
4755 /**
4756   Writes the current value of a Machine Specific Register (MSR).
4757
4758   Writes Value to the Machine Specific Register specified by Index.  Value is returned.  No
4759   parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
4760   register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that
4761   Index is valid, or the caller must set up fault handlers to catch the faults.  This function is
4762   only available on Itanium processors.
4763
4764   @param  Index                     The 8-bit Machine Specific Register index to write.
4765   @param  Value                     The 64-bit value to write to the Machine Specific Register.
4766
4767   @return The 64-bit value to write to the Machine Specific Register.
4768
4769 **/
4770 UINT64
4771 EFIAPI
4772 AsmWriteMsr (
4773   IN UINT8   Index,
4774   IN UINT64  Value
4775   );
4776
4777
4778 /**
4779   Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4780
4781   Determines the current execution mode of the CPU.
4782   If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4783   If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4784   If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4785   and -1 is returned.
4786   This function is only available on Itanium processors.
4787
4788   @retval  1  The CPU is in virtual mode.
4789   @retval  0  The CPU is in physical mode.
4790   @retval -1  The CPU is in mixed mode.
4791
4792 **/
4793 INT64
4794 EFIAPI
4795 AsmCpuVirtual (
4796   VOID
4797   );
4798
4799
4800 /**
4801   Makes a PAL procedure call.
4802
4803   This is a wrapper function to make a PAL procedure call.  Based on the Index
4804   value this API will make static or stacked PAL call.  The following table
4805   describes the usage of PAL Procedure Index Assignment. Architected procedures
4806   may be designated as required or optional.  If a PAL procedure is specified
4807   as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4808   Status field of the PAL_CALL_RETURN structure.
4809   This indicates that the procedure is not present in this PAL implementation.
4810   It is the caller's responsibility to check for this return code after calling
4811   any optional PAL procedure.
4812   No parameter checking is performed on the 5 input parameters, but there are
4813   some common rules that the caller should follow when making a PAL call.  Any
4814   address passed to PAL as buffers for return parameters must be 8-byte aligned.
4815   Unaligned addresses may cause undefined results.  For those parameters defined
4816   as reserved or some fields defined as reserved must be zero filled or the invalid
4817   argument return value may be returned or undefined result may occur during the
4818   execution of the procedure.  If the PalEntryPoint  does not point to a valid
4819   PAL entry point then the system behavior is undefined.  This function is only
4820   available on Itanium processors.
4821
4822   @param PalEntryPoint  The PAL procedure calls entry point.
4823   @param Index          The PAL procedure Index number.
4824   @param Arg2           The 2nd parameter for PAL procedure calls.
4825   @param Arg3           The 3rd parameter for PAL procedure calls.
4826   @param Arg4           The 4th parameter for PAL procedure calls.
4827
4828   @return structure returned from the PAL Call procedure, including the status and return value.
4829
4830 **/
4831 PAL_CALL_RETURN
4832 EFIAPI
4833 AsmPalCall (
4834   IN UINT64  PalEntryPoint,
4835   IN UINT64  Index,
4836   IN UINT64  Arg2,
4837   IN UINT64  Arg3,
4838   IN UINT64  Arg4
4839   );
4840 #endif
4841
4842 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4843 ///
4844 /// IA32 and x64 Specific Functions.
4845 /// Byte packed structure for 16-bit Real Mode EFLAGS.
4846 ///
4847 typedef union {
4848   struct {
4849     UINT32  CF:1;           ///< Carry Flag.
4850     UINT32  Reserved_0:1;   ///< Reserved.
4851     UINT32  PF:1;           ///< Parity Flag.
4852     UINT32  Reserved_1:1;   ///< Reserved.
4853     UINT32  AF:1;           ///< Auxiliary Carry Flag.
4854     UINT32  Reserved_2:1;   ///< Reserved.
4855     UINT32  ZF:1;           ///< Zero Flag.
4856     UINT32  SF:1;           ///< Sign Flag.
4857     UINT32  TF:1;           ///< Trap Flag.
4858     UINT32  IF:1;           ///< Interrupt Enable Flag.
4859     UINT32  DF:1;           ///< Direction Flag.
4860     UINT32  OF:1;           ///< Overflow Flag.
4861     UINT32  IOPL:2;         ///< I/O Privilege Level.
4862     UINT32  NT:1;           ///< Nested Task.
4863     UINT32  Reserved_3:1;   ///< Reserved.
4864   } Bits;
4865   UINT16    Uint16;
4866 } IA32_FLAGS16;
4867
4868 ///
4869 /// Byte packed structure for EFLAGS/RFLAGS.
4870 /// 32-bits on IA-32.
4871 /// 64-bits on x64.  The upper 32-bits on x64 are reserved.
4872 ///
4873 typedef union {
4874   struct {
4875     UINT32  CF:1;           ///< Carry Flag.
4876     UINT32  Reserved_0:1;   ///< Reserved.
4877     UINT32  PF:1;           ///< Parity Flag.
4878     UINT32  Reserved_1:1;   ///< Reserved.
4879     UINT32  AF:1;           ///< Auxiliary Carry Flag.
4880     UINT32  Reserved_2:1;   ///< Reserved.
4881     UINT32  ZF:1;           ///< Zero Flag.
4882     UINT32  SF:1;           ///< Sign Flag.
4883     UINT32  TF:1;           ///< Trap Flag.
4884     UINT32  IF:1;           ///< Interrupt Enable Flag.
4885     UINT32  DF:1;           ///< Direction Flag.
4886     UINT32  OF:1;           ///< Overflow Flag.
4887     UINT32  IOPL:2;         ///< I/O Privilege Level.
4888     UINT32  NT:1;           ///< Nested Task.
4889     UINT32  Reserved_3:1;   ///< Reserved.
4890     UINT32  RF:1;           ///< Resume Flag.
4891     UINT32  VM:1;           ///< Virtual 8086 Mode.
4892     UINT32  AC:1;           ///< Alignment Check.
4893     UINT32  VIF:1;          ///< Virtual Interrupt Flag.
4894     UINT32  VIP:1;          ///< Virtual Interrupt Pending.
4895     UINT32  ID:1;           ///< ID Flag.
4896     UINT32  Reserved_4:10;  ///< Reserved.
4897   } Bits;
4898   UINTN     UintN;
4899 } IA32_EFLAGS32;
4900
4901 ///
4902 /// Byte packed structure for Control Register 0 (CR0).
4903 /// 32-bits on IA-32.
4904 /// 64-bits on x64.  The upper 32-bits on x64 are reserved.
4905 ///
4906 typedef union {
4907   struct {
4908     UINT32  PE:1;           ///< Protection Enable.
4909     UINT32  MP:1;           ///< Monitor Coprocessor.
4910     UINT32  EM:1;           ///< Emulation.
4911     UINT32  TS:1;           ///< Task Switched.
4912     UINT32  ET:1;           ///< Extension Type.
4913     UINT32  NE:1;           ///< Numeric Error.
4914     UINT32  Reserved_0:10;  ///< Reserved.
4915     UINT32  WP:1;           ///< Write Protect.
4916     UINT32  Reserved_1:1;   ///< Reserved.
4917     UINT32  AM:1;           ///< Alignment Mask.
4918     UINT32  Reserved_2:10;  ///< Reserved.
4919     UINT32  NW:1;           ///< Mot Write-through.
4920     UINT32  CD:1;           ///< Cache Disable.
4921     UINT32  PG:1;           ///< Paging.
4922   } Bits;
4923   UINTN     UintN;
4924 } IA32_CR0;
4925
4926 ///
4927 /// Byte packed structure for Control Register 4 (CR4).
4928 /// 32-bits on IA-32.
4929 /// 64-bits on x64.  The upper 32-bits on x64 are reserved.
4930 ///
4931 typedef union {
4932   struct {
4933     UINT32  VME:1;          ///< Virtual-8086 Mode Extensions.
4934     UINT32  PVI:1;          ///< Protected-Mode Virtual Interrupts.
4935     UINT32  TSD:1;          ///< Time Stamp Disable.
4936     UINT32  DE:1;           ///< Debugging Extensions.
4937     UINT32  PSE:1;          ///< Page Size Extensions.
4938     UINT32  PAE:1;          ///< Physical Address Extension.
4939     UINT32  MCE:1;          ///< Machine Check Enable.
4940     UINT32  PGE:1;          ///< Page Global Enable.
4941     UINT32  PCE:1;          ///< Performance Monitoring Counter
4942                             ///< Enable.
4943     UINT32  OSFXSR:1;       ///< Operating System Support for
4944                             ///< FXSAVE and FXRSTOR instructions
4945     UINT32  OSXMMEXCPT:1;   ///< Operating System Support for
4946                             ///< Unmasked SIMD Floating Point
4947                             ///< Exceptions.
4948     UINT32  Reserved_0:2;   ///< Reserved.
4949     UINT32  VMXE:1;         ///< VMX Enable
4950     UINT32  Reserved_1:18;  ///< Reserved.
4951   } Bits;
4952   UINTN     UintN;
4953 } IA32_CR4;
4954
4955 ///
4956 /// Byte packed structure for a segment descriptor in a GDT/LDT.
4957 ///
4958 typedef union {
4959   struct {
4960     UINT32  LimitLow:16;
4961     UINT32  BaseLow:16;
4962     UINT32  BaseMid:8;
4963     UINT32  Type:4;
4964     UINT32  S:1;
4965     UINT32  DPL:2;
4966     UINT32  P:1;
4967     UINT32  LimitHigh:4;
4968     UINT32  AVL:1;
4969     UINT32  L:1;
4970     UINT32  DB:1;
4971     UINT32  G:1;
4972     UINT32  BaseHigh:8;
4973   } Bits;
4974   UINT64  Uint64;
4975 } IA32_SEGMENT_DESCRIPTOR;
4976
4977 ///
4978 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.
4979 ///
4980 #pragma pack (1)
4981 typedef struct {
4982   UINT16  Limit;
4983   UINTN   Base;
4984 } IA32_DESCRIPTOR;
4985 #pragma pack ()
4986
4987 #define IA32_IDT_GATE_TYPE_TASK          0x85
4988 #define IA32_IDT_GATE_TYPE_INTERRUPT_16  0x86
4989 #define IA32_IDT_GATE_TYPE_TRAP_16       0x87
4990 #define IA32_IDT_GATE_TYPE_INTERRUPT_32  0x8E
4991 #define IA32_IDT_GATE_TYPE_TRAP_32       0x8F
4992
4993
4994 #if defined (MDE_CPU_IA32)
4995 ///
4996 /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
4997 ///
4998 typedef union {
4999   struct {
5000     UINT32  OffsetLow:16;   ///< Offset bits 15..0.
5001     UINT32  Selector:16;    ///< Selector.
5002     UINT32  Reserved_0:8;   ///< Reserved.
5003     UINT32  GateType:8;     ///< Gate Type.  See #defines above.
5004     UINT32  OffsetHigh:16;  ///< Offset bits 31..16.
5005   } Bits;
5006   UINT64  Uint64;
5007 } IA32_IDT_GATE_DESCRIPTOR;
5008
5009 #endif
5010
5011 #if defined (MDE_CPU_X64)
5012 ///
5013 /// Byte packed structure for an x64 Interrupt Gate Descriptor.
5014 ///
5015 typedef union {
5016   struct {
5017     UINT32  OffsetLow:16;   ///< Offset bits 15..0.
5018     UINT32  Selector:16;    ///< Selector.
5019     UINT32  Reserved_0:8;   ///< Reserved.
5020     UINT32  GateType:8;     ///< Gate Type.  See #defines above.
5021     UINT32  OffsetHigh:16;  ///< Offset bits 31..16.
5022     UINT32  OffsetUpper:32; ///< Offset bits 63..32.
5023     UINT32  Reserved_1:32;  ///< Reserved.
5024   } Bits;
5025   struct {
5026     UINT64  Uint64;
5027     UINT64  Uint64_1;
5028   } Uint128;
5029 } IA32_IDT_GATE_DESCRIPTOR;
5030
5031 #endif
5032
5033 ///
5034 /// Byte packed structure for an FP/SSE/SSE2 context.
5035 ///
5036 typedef struct {
5037   UINT8  Buffer[512];
5038 } IA32_FX_BUFFER;
5039
5040 ///
5041 /// Structures for the 16-bit real mode thunks.
5042 ///
5043 typedef struct {
5044   UINT32                            Reserved1;
5045   UINT32                            Reserved2;
5046   UINT32                            Reserved3;
5047   UINT32                            Reserved4;
5048   UINT8                             BL;
5049   UINT8                             BH;
5050   UINT16                            Reserved5;
5051   UINT8                             DL;
5052   UINT8                             DH;
5053   UINT16                            Reserved6;
5054   UINT8                             CL;
5055   UINT8                             CH;
5056   UINT16                            Reserved7;
5057   UINT8                             AL;
5058   UINT8                             AH;
5059   UINT16                            Reserved8;
5060 } IA32_BYTE_REGS;
5061
5062 typedef struct {
5063   UINT16                            DI;
5064   UINT16                            Reserved1;
5065   UINT16                            SI;
5066   UINT16                            Reserved2;
5067   UINT16                            BP;
5068   UINT16                            Reserved3;
5069   UINT16                            SP;
5070   UINT16                            Reserved4;
5071   UINT16                            BX;
5072   UINT16                            Reserved5;
5073   UINT16                            DX;
5074   UINT16                            Reserved6;
5075   UINT16                            CX;
5076   UINT16                            Reserved7;
5077   UINT16                            AX;
5078   UINT16                            Reserved8;
5079 } IA32_WORD_REGS;
5080
5081 typedef struct {
5082   UINT32                            EDI;
5083   UINT32                            ESI;
5084   UINT32                            EBP;
5085   UINT32                            ESP;
5086   UINT32                            EBX;
5087   UINT32                            EDX;
5088   UINT32                            ECX;
5089   UINT32                            EAX;
5090   UINT16                            DS;
5091   UINT16                            ES;
5092   UINT16                            FS;
5093   UINT16                            GS;
5094   IA32_EFLAGS32                     EFLAGS;
5095   UINT32                            Eip;
5096   UINT16                            CS;
5097   UINT16                            SS;
5098 } IA32_DWORD_REGS;
5099
5100 typedef union {
5101   IA32_DWORD_REGS                   E;
5102   IA32_WORD_REGS                    X;
5103   IA32_BYTE_REGS                    H;
5104 } IA32_REGISTER_SET;
5105
5106 ///
5107 /// Byte packed structure for an 16-bit real mode thunks.
5108 ///
5109 typedef struct {
5110   IA32_REGISTER_SET                 *RealModeState;
5111   VOID                              *RealModeBuffer;
5112   UINT32                            RealModeBufferSize;
5113   UINT32                            ThunkAttributes;
5114 } THUNK_CONTEXT;
5115
5116 #define THUNK_ATTRIBUTE_BIG_REAL_MODE             0x00000001
5117 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15   0x00000002
5118 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5119
5120 /**
5121   Retrieves CPUID information.
5122
5123   Executes the CPUID instruction with EAX set to the value specified by Index.
5124   This function always returns Index.
5125   If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5126   If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5127   If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5128   If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5129   This function is only available on IA-32 and x64.
5130
5131   @param  Index The 32-bit value to load into EAX prior to invoking the CPUID
5132                 instruction.
5133   @param  Eax   The pointer to the 32-bit EAX value returned by the CPUID
5134                 instruction. This is an optional parameter that may be NULL.
5135   @param  Ebx   The pointer to the 32-bit EBX value returned by the CPUID
5136                 instruction. This is an optional parameter that may be NULL.
5137   @param  Ecx   The pointer to the 32-bit ECX value returned by the CPUID
5138                 instruction. This is an optional parameter that may be NULL.
5139   @param  Edx   The pointer to the 32-bit EDX value returned by the CPUID
5140                 instruction. This is an optional parameter that may be NULL.
5141
5142   @return Index.
5143
5144 **/
5145 UINT32
5146 EFIAPI
5147 AsmCpuid (
5148   IN      UINT32                    Index,
5149   OUT     UINT32                    *Eax,  OPTIONAL
5150   OUT     UINT32                    *Ebx,  OPTIONAL
5151   OUT     UINT32                    *Ecx,  OPTIONAL
5152   OUT     UINT32                    *Edx   OPTIONAL
5153   );
5154
5155
5156 /**
5157   Retrieves CPUID information using an extended leaf identifier.
5158
5159   Executes the CPUID instruction with EAX set to the value specified by Index
5160   and ECX set to the value specified by SubIndex. This function always returns
5161   Index. This function is only available on IA-32 and x64.
5162
5163   If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5164   If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5165   If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5166   If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5167
5168   @param  Index     The 32-bit value to load into EAX prior to invoking the
5169                     CPUID instruction.
5170   @param  SubIndex  The 32-bit value to load into ECX prior to invoking the
5171                     CPUID instruction.
5172   @param  Eax       The pointer to the 32-bit EAX value returned by the CPUID
5173                     instruction. This is an optional parameter that may be
5174                     NULL.
5175   @param  Ebx       The pointer to the 32-bit EBX value returned by the CPUID
5176                     instruction. This is an optional parameter that may be
5177                     NULL.
5178   @param  Ecx       The pointer to the 32-bit ECX value returned by the CPUID
5179                     instruction. This is an optional parameter that may be
5180                     NULL.
5181   @param  Edx       The pointer to the 32-bit EDX value returned by the CPUID
5182                     instruction. This is an optional parameter that may be
5183                     NULL.
5184
5185   @return Index.
5186
5187 **/
5188 UINT32
5189 EFIAPI
5190 AsmCpuidEx (
5191   IN      UINT32                    Index,
5192   IN      UINT32                    SubIndex,
5193   OUT     UINT32                    *Eax,  OPTIONAL
5194   OUT     UINT32                    *Ebx,  OPTIONAL
5195   OUT     UINT32                    *Ecx,  OPTIONAL
5196   OUT     UINT32                    *Edx   OPTIONAL
5197   );
5198
5199
5200 /**
5201   Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5202
5203   Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5204   and executing a WBINVD instruction.  This function is only available on IA-32 and x64.
5205
5206 **/
5207 VOID
5208 EFIAPI
5209 AsmDisableCache (
5210   VOID
5211   );
5212
5213
5214 /**
5215   Perform a WBINVD and clear both the CD and NW bits of CR0.
5216
5217   Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5218   bits of CR0 to 0.  This function is only available on IA-32 and x64.
5219
5220 **/
5221 VOID
5222 EFIAPI
5223 AsmEnableCache (
5224   VOID
5225   );
5226
5227
5228 /**
5229   Returns the lower 32-bits of a Machine Specific Register(MSR).
5230
5231   Reads and returns the lower 32-bits of the MSR specified by Index.
5232   No parameter checking is performed on Index, and some Index values may cause
5233   CPU exceptions. The caller must either guarantee that Index is valid, or the
5234   caller must set up exception handlers to catch the exceptions. This function
5235   is only available on IA-32 and x64.
5236
5237   @param  Index The 32-bit MSR index to read.
5238
5239   @return The lower 32 bits of the MSR identified by Index.
5240
5241 **/
5242 UINT32
5243 EFIAPI
5244 AsmReadMsr32 (
5245   IN      UINT32                    Index
5246   );
5247
5248
5249 /**
5250   Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5251   The upper 32-bits of the MSR are set to zero.
5252
5253   Writes the 32-bit value specified by Value to the MSR specified by Index. The
5254   upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5255   the MSR is returned. No parameter checking is performed on Index or Value,
5256   and some of these may cause CPU exceptions. The caller must either guarantee
5257   that Index and Value are valid, or the caller must establish proper exception
5258   handlers. This function is only available on IA-32 and x64.
5259
5260   @param  Index The 32-bit MSR index to write.
5261   @param  Value The 32-bit value to write to the MSR.
5262
5263   @return Value
5264
5265 **/
5266 UINT32
5267 EFIAPI
5268 AsmWriteMsr32 (
5269   IN      UINT32                    Index,
5270   IN      UINT32                    Value
5271   );
5272
5273
5274 /**
5275   Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5276   writes the result back to the 64-bit MSR.
5277
5278   Reads the 64-bit MSR specified by Index, performs a bitwise OR
5279   between the lower 32-bits of the read result and the value specified by
5280   OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5281   32-bits of the value written to the MSR is returned. No parameter checking is
5282   performed on Index or OrData, and some of these may cause CPU exceptions. The
5283   caller must either guarantee that Index and OrData are valid, or the caller
5284   must establish proper exception handlers. This function is only available on
5285   IA-32 and x64.
5286
5287   @param  Index   The 32-bit MSR index to write.
5288   @param  OrData  The value to OR with the read value from the MSR.
5289
5290   @return The lower 32-bit value written to the MSR.
5291
5292 **/
5293 UINT32
5294 EFIAPI
5295 AsmMsrOr32 (
5296   IN      UINT32                    Index,
5297   IN      UINT32                    OrData
5298   );
5299
5300
5301 /**
5302   Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5303   the result back to the 64-bit MSR.
5304
5305   Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5306   lower 32-bits of the read result and the value specified by AndData, and
5307   writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5308   the value written to the MSR is returned. No parameter checking is performed
5309   on Index or AndData, and some of these may cause CPU exceptions. The caller
5310   must either guarantee that Index and AndData are valid, or the caller must
5311   establish proper exception handlers. This function is only available on IA-32
5312   and x64.
5313
5314   @param  Index   The 32-bit MSR index to write.
5315   @param  AndData The value to AND with the read value from the MSR.
5316
5317   @return The lower 32-bit value written to the MSR.
5318
5319 **/
5320 UINT32
5321 EFIAPI
5322 AsmMsrAnd32 (
5323   IN      UINT32                    Index,
5324   IN      UINT32                    AndData
5325   );
5326
5327
5328 /**
5329   Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5330   on the lower 32-bits, and writes the result back to the 64-bit MSR.
5331
5332   Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5333   lower 32-bits of the read result and the value specified by AndData
5334   preserving the upper 32-bits, performs a bitwise OR between the
5335   result of the AND operation and the value specified by OrData, and writes the
5336   result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5337   written to the MSR is returned. No parameter checking is performed on Index,
5338   AndData, or OrData, and some of these may cause CPU exceptions. The caller
5339   must either guarantee that Index, AndData, and OrData are valid, or the
5340   caller must establish proper exception handlers. This function is only
5341   available on IA-32 and x64.
5342
5343   @param  Index   The 32-bit MSR index to write.
5344   @param  AndData The value to AND with the read value from the MSR.
5345   @param  OrData  The value to OR with the result of the AND operation.
5346
5347   @return The lower 32-bit value written to the MSR.
5348
5349 **/
5350 UINT32
5351 EFIAPI
5352 AsmMsrAndThenOr32 (
5353   IN      UINT32                    Index,
5354   IN      UINT32                    AndData,
5355   IN      UINT32                    OrData
5356   );
5357
5358
5359 /**
5360   Reads a bit field of an MSR.
5361
5362   Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5363   specified by the StartBit and the EndBit. The value of the bit field is
5364   returned. The caller must either guarantee that Index is valid, or the caller
5365   must set up exception handlers to catch the exceptions. This function is only
5366   available on IA-32 and x64.
5367
5368   If StartBit is greater than 31, then ASSERT().
5369   If EndBit is greater than 31, then ASSERT().
5370   If EndBit is less than StartBit, then ASSERT().
5371
5372   @param  Index     The 32-bit MSR index to read.
5373   @param  StartBit  The ordinal of the least significant bit in the bit field.
5374                     Range 0..31.
5375   @param  EndBit    The ordinal of the most significant bit in the bit field.
5376                     Range 0..31.
5377
5378   @return The bit field read from the MSR.
5379
5380 **/
5381 UINT32
5382 EFIAPI
5383 AsmMsrBitFieldRead32 (
5384   IN      UINT32                    Index,
5385   IN      UINTN                     StartBit,
5386   IN      UINTN                     EndBit
5387   );
5388
5389
5390 /**
5391   Writes a bit field to an MSR.
5392
5393   Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5394   field is specified by the StartBit and the EndBit. All other bits in the
5395   destination MSR are preserved. The lower 32-bits of the MSR written is
5396   returned. The caller must either guarantee that Index and the data written
5397   is valid, or the caller must set up exception handlers to catch the exceptions.
5398   This function is only available on IA-32 and x64.
5399
5400   If StartBit is greater than 31, then ASSERT().
5401   If EndBit is greater than 31, then ASSERT().
5402   If EndBit is less than StartBit, then ASSERT().
5403   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5404
5405   @param  Index     The 32-bit MSR index to write.
5406   @param  StartBit  The ordinal of the least significant bit in the bit field.
5407                     Range 0..31.
5408   @param  EndBit    The ordinal of the most significant bit in the bit field.
5409                     Range 0..31.
5410   @param  Value     New value of the bit field.
5411
5412   @return The lower 32-bit of the value written to the MSR.
5413
5414 **/
5415 UINT32
5416 EFIAPI
5417 AsmMsrBitFieldWrite32 (
5418   IN      UINT32                    Index,
5419   IN      UINTN                     StartBit,
5420   IN      UINTN                     EndBit,
5421   IN      UINT32                    Value
5422   );
5423
5424
5425 /**
5426   Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5427   result back to the bit field in the 64-bit MSR.
5428
5429   Reads the 64-bit MSR specified by Index, performs a bitwise OR
5430   between the read result and the value specified by OrData, and writes the
5431   result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5432   written to the MSR are returned. Extra left bits in OrData are stripped. The
5433   caller must either guarantee that Index and the data written is valid, or
5434   the caller must set up exception handlers to catch the exceptions. This
5435   function is only available on IA-32 and x64.
5436
5437   If StartBit is greater than 31, then ASSERT().
5438   If EndBit is greater than 31, then ASSERT().
5439   If EndBit is less than StartBit, then ASSERT().
5440   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5441
5442   @param  Index     The 32-bit MSR index to write.
5443   @param  StartBit  The ordinal of the least significant bit in the bit field.
5444                     Range 0..31.
5445   @param  EndBit    The ordinal of the most significant bit in the bit field.
5446                     Range 0..31.
5447   @param  OrData    The value to OR with the read value from the MSR.
5448
5449   @return The lower 32-bit of the value written to the MSR.
5450
5451 **/
5452 UINT32
5453 EFIAPI
5454 AsmMsrBitFieldOr32 (
5455   IN      UINT32                    Index,
5456   IN      UINTN                     StartBit,
5457   IN      UINTN                     EndBit,
5458   IN      UINT32                    OrData
5459   );
5460
5461
5462 /**
5463   Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5464   result back to the bit field in the 64-bit MSR.
5465
5466   Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5467   read result and the value specified by AndData, and writes the result to the
5468   64-bit MSR specified by Index. The lower 32-bits of the value written to the
5469   MSR are returned. Extra left bits in AndData are stripped. The caller must
5470   either guarantee that Index and the data written is valid, or the caller must
5471   set up exception handlers to catch the exceptions. This function is only
5472   available on IA-32 and x64.
5473
5474   If StartBit is greater than 31, then ASSERT().
5475   If EndBit is greater than 31, then ASSERT().
5476   If EndBit is less than StartBit, then ASSERT().
5477   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5478
5479   @param  Index     The 32-bit MSR index to write.
5480   @param  StartBit  The ordinal of the least significant bit in the bit field.
5481                     Range 0..31.
5482   @param  EndBit    The ordinal of the most significant bit in the bit field.
5483                     Range 0..31.
5484   @param  AndData   The value to AND with the read value from the MSR.
5485
5486   @return The lower 32-bit of the value written to the MSR.
5487
5488 **/
5489 UINT32
5490 EFIAPI
5491 AsmMsrBitFieldAnd32 (
5492   IN      UINT32                    Index,
5493   IN      UINTN                     StartBit,
5494   IN      UINTN                     EndBit,
5495   IN      UINT32                    AndData
5496   );
5497
5498
5499 /**
5500   Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5501   bitwise OR, and writes the result back to the bit field in the
5502   64-bit MSR.
5503
5504   Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5505   bitwise OR between the read result and the value specified by
5506   AndData, and writes the result to the 64-bit MSR specified by Index. The
5507   lower 32-bits of the value written to the MSR are returned. Extra left bits
5508   in both AndData and OrData are stripped. The caller must either guarantee
5509   that Index and the data written is valid, or the caller must set up exception
5510   handlers to catch the exceptions. This function is only available on IA-32
5511   and x64.
5512
5513   If StartBit is greater than 31, then ASSERT().
5514   If EndBit is greater than 31, then ASSERT().
5515   If EndBit is less than StartBit, then ASSERT().
5516   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5517   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5518
5519   @param  Index     The 32-bit MSR index to write.
5520   @param  StartBit  The ordinal of the least significant bit in the bit field.
5521                     Range 0..31.
5522   @param  EndBit    The ordinal of the most significant bit in the bit field.
5523                     Range 0..31.
5524   @param  AndData   The value to AND with the read value from the MSR.
5525   @param  OrData    The value to OR with the result of the AND operation.
5526
5527   @return The lower 32-bit of the value written to the MSR.
5528
5529 **/
5530 UINT32
5531 EFIAPI
5532 AsmMsrBitFieldAndThenOr32 (
5533   IN      UINT32                    Index,
5534   IN      UINTN                     StartBit,
5535   IN      UINTN                     EndBit,
5536   IN      UINT32                    AndData,
5537   IN      UINT32                    OrData
5538   );
5539
5540
5541 /**
5542   Returns a 64-bit Machine Specific Register(MSR).
5543
5544   Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5545   performed on Index, and some Index values may cause CPU exceptions. The
5546   caller must either guarantee that Index is valid, or the caller must set up
5547   exception handlers to catch the exceptions. This function is only available
5548   on IA-32 and x64.
5549
5550   @param  Index The 32-bit MSR index to read.
5551
5552   @return The value of the MSR identified by Index.
5553
5554 **/
5555 UINT64
5556 EFIAPI
5557 AsmReadMsr64 (
5558   IN      UINT32                    Index
5559   );
5560
5561
5562 /**
5563   Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5564   value.
5565
5566   Writes the 64-bit value specified by Value to the MSR specified by Index. The
5567   64-bit value written to the MSR is returned. No parameter checking is
5568   performed on Index or Value, and some of these may cause CPU exceptions. The
5569   caller must either guarantee that Index and Value are valid, or the caller
5570   must establish proper exception handlers. This function is only available on
5571   IA-32 and x64.
5572
5573   @param  Index The 32-bit MSR index to write.
5574   @param  Value The 64-bit value to write to the MSR.
5575
5576   @return Value
5577
5578 **/
5579 UINT64
5580 EFIAPI
5581 AsmWriteMsr64 (
5582   IN      UINT32                    Index,
5583   IN      UINT64                    Value
5584   );
5585
5586
5587 /**
5588   Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5589   back to the 64-bit MSR.
5590
5591   Reads the 64-bit MSR specified by Index, performs a bitwise OR
5592   between the read result and the value specified by OrData, and writes the
5593   result to the 64-bit MSR specified by Index. The value written to the MSR is
5594   returned. No parameter checking is performed on Index or OrData, and some of
5595   these may cause CPU exceptions. The caller must either guarantee that Index
5596   and OrData are valid, or the caller must establish proper exception handlers.
5597   This function is only available on IA-32 and x64.
5598
5599   @param  Index   The 32-bit MSR index to write.
5600   @param  OrData  The value to OR with the read value from the MSR.
5601
5602   @return The value written back to the MSR.
5603
5604 **/
5605 UINT64
5606 EFIAPI
5607 AsmMsrOr64 (
5608   IN      UINT32                    Index,
5609   IN      UINT64                    OrData
5610   );
5611
5612
5613 /**
5614   Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5615   64-bit MSR.
5616
5617   Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5618   read result and the value specified by OrData, and writes the result to the
5619   64-bit MSR specified by Index. The value written to the MSR is returned. No
5620   parameter checking is performed on Index or OrData, and some of these may
5621   cause CPU exceptions. The caller must either guarantee that Index and OrData
5622   are valid, or the caller must establish proper exception handlers. This
5623   function is only available on IA-32 and x64.
5624
5625   @param  Index   The 32-bit MSR index to write.
5626   @param  AndData The value to AND with the read value from the MSR.
5627
5628   @return The value written back to the MSR.
5629
5630 **/
5631 UINT64
5632 EFIAPI
5633 AsmMsrAnd64 (
5634   IN      UINT32                    Index,
5635   IN      UINT64                    AndData
5636   );
5637
5638
5639 /**
5640   Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5641   OR, and writes the result back to the 64-bit MSR.
5642
5643   Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5644   result and the value specified by AndData, performs a bitwise OR
5645   between the result of the AND operation and the value specified by OrData,
5646   and writes the result to the 64-bit MSR specified by Index. The value written
5647   to the MSR is returned. No parameter checking is performed on Index, AndData,
5648   or OrData, and some of these may cause CPU exceptions. The caller must either
5649   guarantee that Index, AndData, and OrData are valid, or the caller must
5650   establish proper exception handlers. This function is only available on IA-32
5651   and x64.
5652
5653   @param  Index   The 32-bit MSR index to write.
5654   @param  AndData The value to AND with the read value from the MSR.
5655   @param  OrData  The value to OR with the result of the AND operation.
5656
5657   @return The value written back to the MSR.
5658
5659 **/
5660 UINT64
5661 EFIAPI
5662 AsmMsrAndThenOr64 (
5663   IN      UINT32                    Index,
5664   IN      UINT64                    AndData,
5665   IN      UINT64                    OrData
5666   );
5667
5668
5669 /**
5670   Reads a bit field of an MSR.
5671
5672   Reads the bit field in the 64-bit MSR. The bit field is specified by the
5673   StartBit and the EndBit. The value of the bit field is returned. The caller
5674   must either guarantee that Index is valid, or the caller must set up
5675   exception handlers to catch the exceptions. This function is only available
5676   on IA-32 and x64.
5677
5678   If StartBit is greater than 63, then ASSERT().
5679   If EndBit is greater than 63, then ASSERT().
5680   If EndBit is less than StartBit, then ASSERT().
5681
5682   @param  Index     The 32-bit MSR index to read.
5683   @param  StartBit  The ordinal of the least significant bit in the bit field.
5684                     Range 0..63.
5685   @param  EndBit    The ordinal of the most significant bit in the bit field.
5686                     Range 0..63.
5687
5688   @return The value read from the MSR.
5689
5690 **/
5691 UINT64
5692 EFIAPI
5693 AsmMsrBitFieldRead64 (
5694   IN      UINT32                    Index,
5695   IN      UINTN                     StartBit,
5696   IN      UINTN                     EndBit
5697   );
5698
5699
5700 /**
5701   Writes a bit field to an MSR.
5702
5703   Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5704   the StartBit and the EndBit. All other bits in the destination MSR are
5705   preserved. The MSR written is returned. The caller must either guarantee
5706   that Index and the data written is valid, or the caller must set up exception
5707   handlers to catch the exceptions. This function is only available on IA-32 and x64.
5708
5709   If StartBit is greater than 63, then ASSERT().
5710   If EndBit is greater than 63, then ASSERT().
5711   If EndBit is less than StartBit, then ASSERT().
5712   If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5713
5714   @param  Index     The 32-bit MSR index to write.
5715   @param  StartBit  The ordinal of the least significant bit in the bit field.
5716                     Range 0..63.
5717   @param  EndBit    The ordinal of the most significant bit in the bit field.
5718                     Range 0..63.
5719   @param  Value     New value of the bit field.
5720
5721   @return The value written back to the MSR.
5722
5723 **/
5724 UINT64
5725 EFIAPI
5726 AsmMsrBitFieldWrite64 (
5727   IN      UINT32                    Index,
5728   IN      UINTN                     StartBit,
5729   IN      UINTN                     EndBit,
5730   IN      UINT64                    Value
5731   );
5732
5733
5734 /**
5735   Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5736   writes the result back to the bit field in the 64-bit MSR.
5737
5738   Reads the 64-bit MSR specified by Index, performs a bitwise OR
5739   between the read result and the value specified by OrData, and writes the
5740   result to the 64-bit MSR specified by Index. The value written to the MSR is
5741   returned. Extra left bits in OrData are stripped. The caller must either
5742   guarantee that Index and the data written is valid, or the caller must set up
5743   exception handlers to catch the exceptions. This function is only available
5744   on IA-32 and x64.
5745
5746   If StartBit is greater than 63, then ASSERT().
5747   If EndBit is greater than 63, then ASSERT().
5748   If EndBit is less than StartBit, then ASSERT().
5749   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5750
5751   @param  Index     The 32-bit MSR index to write.
5752   @param  StartBit  The ordinal of the least significant bit in the bit field.
5753                     Range 0..63.
5754   @param  EndBit    The ordinal of the most significant bit in the bit field.
5755                     Range 0..63.
5756   @param  OrData    The value to OR with the read value from the bit field.
5757
5758   @return The value written back to the MSR.
5759
5760 **/
5761 UINT64
5762 EFIAPI
5763 AsmMsrBitFieldOr64 (
5764   IN      UINT32                    Index,
5765   IN      UINTN                     StartBit,
5766   IN      UINTN                     EndBit,
5767   IN      UINT64                    OrData
5768   );
5769
5770
5771 /**
5772   Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5773   result back to the bit field in the 64-bit MSR.
5774
5775   Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5776   read result and the value specified by AndData, and writes the result to the
5777   64-bit MSR specified by Index. The value written to the MSR is returned.
5778   Extra left bits in AndData are stripped. The caller must either guarantee
5779   that Index and the data written is valid, or the caller must set up exception
5780   handlers to catch the exceptions. This function is only available on IA-32
5781   and x64.
5782
5783   If StartBit is greater than 63, then ASSERT().
5784   If EndBit is greater than 63, then ASSERT().
5785   If EndBit is less than StartBit, then ASSERT().
5786   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5787
5788   @param  Index     The 32-bit MSR index to write.
5789   @param  StartBit  The ordinal of the least significant bit in the bit field.
5790                     Range 0..63.
5791   @param  EndBit    The ordinal of the most significant bit in the bit field.
5792                     Range 0..63.
5793   @param  AndData   The value to AND with the read value from the bit field.
5794
5795   @return The value written back to the MSR.
5796
5797 **/
5798 UINT64
5799 EFIAPI
5800 AsmMsrBitFieldAnd64 (
5801   IN      UINT32                    Index,
5802   IN      UINTN                     StartBit,
5803   IN      UINTN                     EndBit,
5804   IN      UINT64                    AndData
5805   );
5806
5807
5808 /**
5809   Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5810   bitwise OR, and writes the result back to the bit field in the
5811   64-bit MSR.
5812
5813   Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5814   a bitwise OR between the read result and the value specified by
5815   AndData, and writes the result to the 64-bit MSR specified by Index. The
5816   value written to the MSR is returned. Extra left bits in both AndData and
5817   OrData are stripped. The caller must either guarantee that Index and the data
5818   written is valid, or the caller must set up exception handlers to catch the
5819   exceptions. This function is only available on IA-32 and x64.
5820
5821   If StartBit is greater than 63, then ASSERT().
5822   If EndBit is greater than 63, then ASSERT().
5823   If EndBit is less than StartBit, then ASSERT().
5824   If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5825   If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
5826
5827   @param  Index     The 32-bit MSR index to write.
5828   @param  StartBit  The ordinal of the least significant bit in the bit field.
5829                     Range 0..63.
5830   @param  EndBit    The ordinal of the most significant bit in the bit field.
5831                     Range 0..63.
5832   @param  AndData   The value to AND with the read value from the bit field.
5833   @param  OrData    The value to OR with the result of the AND operation.
5834
5835   @return The value written back to the MSR.
5836
5837 **/
5838 UINT64
5839 EFIAPI
5840 AsmMsrBitFieldAndThenOr64 (
5841   IN      UINT32                    Index,
5842   IN      UINTN                     StartBit,
5843   IN      UINTN                     EndBit,
5844   IN      UINT64                    AndData,
5845   IN      UINT64                    OrData
5846   );
5847
5848
5849 /**
5850   Reads the current value of the EFLAGS register.
5851
5852   Reads and returns the current value of the EFLAGS register. This function is
5853   only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5854   64-bit value on x64.
5855
5856   @return EFLAGS on IA-32 or RFLAGS on x64.
5857
5858 **/
5859 UINTN
5860 EFIAPI
5861 AsmReadEflags (
5862   VOID
5863   );
5864
5865
5866 /**
5867   Reads the current value of the Control Register 0 (CR0).
5868
5869   Reads and returns the current value of CR0. This function is only available
5870   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5871   x64.
5872
5873   @return The value of the Control Register 0 (CR0).
5874
5875 **/
5876 UINTN
5877 EFIAPI
5878 AsmReadCr0 (
5879   VOID
5880   );
5881
5882
5883 /**
5884   Reads the current value of the Control Register 2 (CR2).
5885
5886   Reads and returns the current value of CR2. This function is only available
5887   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5888   x64.
5889
5890   @return The value of the Control Register 2 (CR2).
5891
5892 **/
5893 UINTN
5894 EFIAPI
5895 AsmReadCr2 (
5896   VOID
5897   );
5898
5899
5900 /**
5901   Reads the current value of the Control Register 3 (CR3).
5902
5903   Reads and returns the current value of CR3. This function is only available
5904   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5905   x64.
5906
5907   @return The value of the Control Register 3 (CR3).
5908
5909 **/
5910 UINTN
5911 EFIAPI
5912 AsmReadCr3 (
5913   VOID
5914   );
5915
5916
5917 /**
5918   Reads the current value of the Control Register 4 (CR4).
5919
5920   Reads and returns the current value of CR4. This function is only available
5921   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5922   x64.
5923
5924   @return The value of the Control Register 4 (CR4).
5925
5926 **/
5927 UINTN
5928 EFIAPI
5929 AsmReadCr4 (
5930   VOID
5931   );
5932
5933
5934 /**
5935   Writes a value to Control Register 0 (CR0).
5936
5937   Writes and returns a new value to CR0. This function is only available on
5938   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5939
5940   @param  Cr0 The value to write to CR0.
5941
5942   @return The value written to CR0.
5943
5944 **/
5945 UINTN
5946 EFIAPI
5947 AsmWriteCr0 (
5948   UINTN  Cr0
5949   );
5950
5951
5952 /**
5953   Writes a value to Control Register 2 (CR2).
5954
5955   Writes and returns a new value to CR2. This function is only available on
5956   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5957
5958   @param  Cr2 The value to write to CR2.
5959
5960   @return The value written to CR2.
5961
5962 **/
5963 UINTN
5964 EFIAPI
5965 AsmWriteCr2 (
5966   UINTN  Cr2
5967   );
5968
5969
5970 /**
5971   Writes a value to Control Register 3 (CR3).
5972
5973   Writes and returns a new value to CR3. This function is only available on
5974   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5975
5976   @param  Cr3 The value to write to CR3.
5977
5978   @return The value written to CR3.
5979
5980 **/
5981 UINTN
5982 EFIAPI
5983 AsmWriteCr3 (
5984   UINTN  Cr3
5985   );
5986
5987
5988 /**
5989   Writes a value to Control Register 4 (CR4).
5990
5991   Writes and returns a new value to CR4. This function is only available on
5992   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5993
5994   @param  Cr4 The value to write to CR4.
5995
5996   @return The value written to CR4.
5997
5998 **/
5999 UINTN
6000 EFIAPI
6001 AsmWriteCr4 (
6002   UINTN  Cr4
6003   );
6004
6005
6006 /**
6007   Reads the current value of Debug Register 0 (DR0).
6008
6009   Reads and returns the current value of DR0. This function is only available
6010   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6011   x64.
6012
6013   @return The value of Debug Register 0 (DR0).
6014
6015 **/
6016 UINTN
6017 EFIAPI
6018 AsmReadDr0 (
6019   VOID
6020   );
6021
6022
6023 /**
6024   Reads the current value of Debug Register 1 (DR1).
6025
6026   Reads and returns the current value of DR1. This function is only available
6027   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6028   x64.
6029
6030   @return The value of Debug Register 1 (DR1).
6031
6032 **/
6033 UINTN
6034 EFIAPI
6035 AsmReadDr1 (
6036   VOID
6037   );
6038
6039
6040 /**
6041   Reads the current value of Debug Register 2 (DR2).
6042
6043   Reads and returns the current value of DR2. This function is only available
6044   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6045   x64.
6046
6047   @return The value of Debug Register 2 (DR2).
6048
6049 **/
6050 UINTN
6051 EFIAPI
6052 AsmReadDr2 (
6053   VOID
6054   );
6055
6056
6057 /**
6058   Reads the current value of Debug Register 3 (DR3).
6059
6060   Reads and returns the current value of DR3. This function is only available
6061   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6062   x64.
6063
6064   @return The value of Debug Register 3 (DR3).
6065
6066 **/
6067 UINTN
6068 EFIAPI
6069 AsmReadDr3 (
6070   VOID
6071   );
6072
6073
6074 /**
6075   Reads the current value of Debug Register 4 (DR4).
6076
6077   Reads and returns the current value of DR4. This function is only available
6078   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6079   x64.
6080
6081   @return The value of Debug Register 4 (DR4).
6082
6083 **/
6084 UINTN
6085 EFIAPI
6086 AsmReadDr4 (
6087   VOID
6088   );
6089
6090
6091 /**
6092   Reads the current value of Debug Register 5 (DR5).
6093
6094   Reads and returns the current value of DR5. This function is only available
6095   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6096   x64.
6097
6098   @return The value of Debug Register 5 (DR5).
6099
6100 **/
6101 UINTN
6102 EFIAPI
6103 AsmReadDr5 (
6104   VOID
6105   );
6106
6107
6108 /**
6109   Reads the current value of Debug Register 6 (DR6).
6110
6111   Reads and returns the current value of DR6. This function is only available
6112   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6113   x64.
6114
6115   @return The value of Debug Register 6 (DR6).
6116
6117 **/
6118 UINTN
6119 EFIAPI
6120 AsmReadDr6 (
6121   VOID
6122   );
6123
6124
6125 /**
6126   Reads the current value of Debug Register 7 (DR7).
6127
6128   Reads and returns the current value of DR7. This function is only available
6129   on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6130   x64.
6131
6132   @return The value of Debug Register 7 (DR7).
6133
6134 **/
6135 UINTN
6136 EFIAPI
6137 AsmReadDr7 (
6138   VOID
6139   );
6140
6141
6142 /**
6143   Writes a value to Debug Register 0 (DR0).
6144
6145   Writes and returns a new value to DR0. This function is only available on
6146   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6147
6148   @param  Dr0 The value to write to Dr0.
6149
6150   @return The value written to Debug Register 0 (DR0).
6151
6152 **/
6153 UINTN
6154 EFIAPI
6155 AsmWriteDr0 (
6156   UINTN  Dr0
6157   );
6158
6159
6160 /**
6161   Writes a value to Debug Register 1 (DR1).
6162
6163   Writes and returns a new value to DR1. This function is only available on
6164   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6165
6166   @param  Dr1 The value to write to Dr1.
6167
6168   @return The value written to Debug Register 1 (DR1).
6169
6170 **/
6171 UINTN
6172 EFIAPI
6173 AsmWriteDr1 (
6174   UINTN  Dr1
6175   );
6176
6177
6178 /**
6179   Writes a value to Debug Register 2 (DR2).
6180
6181   Writes and returns a new value to DR2. This function is only available on
6182   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6183
6184   @param  Dr2 The value to write to Dr2.
6185
6186   @return The value written to Debug Register 2 (DR2).
6187
6188 **/
6189 UINTN
6190 EFIAPI
6191 AsmWriteDr2 (
6192   UINTN  Dr2
6193   );
6194
6195
6196 /**
6197   Writes a value to Debug Register 3 (DR3).
6198
6199   Writes and returns a new value to DR3. This function is only available on
6200   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6201
6202   @param  Dr3 The value to write to Dr3.
6203
6204   @return The value written to Debug Register 3 (DR3).
6205
6206 **/
6207 UINTN
6208 EFIAPI
6209 AsmWriteDr3 (
6210   UINTN  Dr3
6211   );
6212
6213
6214 /**
6215   Writes a value to Debug Register 4 (DR4).
6216
6217   Writes and returns a new value to DR4. This function is only available on
6218   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6219
6220   @param  Dr4 The value to write to Dr4.
6221
6222   @return The value written to Debug Register 4 (DR4).
6223
6224 **/
6225 UINTN
6226 EFIAPI
6227 AsmWriteDr4 (
6228   UINTN  Dr4
6229   );
6230
6231
6232 /**
6233   Writes a value to Debug Register 5 (DR5).
6234
6235   Writes and returns a new value to DR5. This function is only available on
6236   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6237
6238   @param  Dr5 The value to write to Dr5.
6239
6240   @return The value written to Debug Register 5 (DR5).
6241
6242 **/
6243 UINTN
6244 EFIAPI
6245 AsmWriteDr5 (
6246   UINTN  Dr5
6247   );
6248
6249
6250 /**
6251   Writes a value to Debug Register 6 (DR6).
6252
6253   Writes and returns a new value to DR6. This function is only available on
6254   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6255
6256   @param  Dr6 The value to write to Dr6.
6257
6258   @return The value written to Debug Register 6 (DR6).
6259
6260 **/
6261 UINTN
6262 EFIAPI
6263 AsmWriteDr6 (
6264   UINTN  Dr6
6265   );
6266
6267
6268 /**
6269   Writes a value to Debug Register 7 (DR7).
6270
6271   Writes and returns a new value to DR7. This function is only available on
6272   IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6273
6274   @param  Dr7 The value to write to Dr7.
6275
6276   @return The value written to Debug Register 7 (DR7).
6277
6278 **/
6279 UINTN
6280 EFIAPI
6281 AsmWriteDr7 (
6282   UINTN  Dr7
6283   );
6284
6285
6286 /**
6287   Reads the current value of Code Segment Register (CS).
6288
6289   Reads and returns the current value of CS. This function is only available on
6290   IA-32 and x64.
6291
6292   @return The current value of CS.
6293
6294 **/
6295 UINT16
6296 EFIAPI
6297 AsmReadCs (
6298   VOID
6299   );
6300
6301
6302 /**
6303   Reads the current value of Data Segment Register (DS).
6304
6305   Reads and returns the current value of DS. This function is only available on
6306   IA-32 and x64.
6307
6308   @return The current value of DS.
6309
6310 **/
6311 UINT16
6312 EFIAPI
6313 AsmReadDs (
6314   VOID
6315   );
6316
6317
6318 /**
6319   Reads the current value of Extra Segment Register (ES).
6320
6321   Reads and returns the current value of ES. This function is only available on
6322   IA-32 and x64.
6323
6324   @return The current value of ES.
6325
6326 **/
6327 UINT16
6328 EFIAPI
6329 AsmReadEs (
6330   VOID
6331   );
6332
6333
6334 /**
6335   Reads the current value of FS Data Segment Register (FS).
6336
6337   Reads and returns the current value of FS. This function is only available on
6338   IA-32 and x64.
6339
6340   @return The current value of FS.
6341
6342 **/
6343 UINT16
6344 EFIAPI
6345 AsmReadFs (
6346   VOID
6347   );
6348
6349
6350 /**
6351   Reads the current value of GS Data Segment Register (GS).
6352
6353   Reads and returns the current value of GS. This function is only available on
6354   IA-32 and x64.
6355
6356   @return The current value of GS.
6357
6358 **/
6359 UINT16
6360 EFIAPI
6361 AsmReadGs (
6362   VOID
6363   );
6364
6365
6366 /**
6367   Reads the current value of Stack Segment Register (SS).
6368
6369   Reads and returns the current value of SS. This function is only available on
6370   IA-32 and x64.
6371
6372   @return The current value of SS.
6373
6374 **/
6375 UINT16
6376 EFIAPI
6377 AsmReadSs (
6378   VOID
6379   );
6380
6381
6382 /**
6383   Reads the current value of Task Register (TR).
6384
6385   Reads and returns the current value of TR. This function is only available on
6386   IA-32 and x64.
6387
6388   @return The current value of TR.
6389
6390 **/
6391 UINT16
6392 EFIAPI
6393 AsmReadTr (
6394   VOID
6395   );
6396
6397
6398 /**
6399   Reads the current Global Descriptor Table Register(GDTR) descriptor.
6400
6401   Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6402   function is only available on IA-32 and x64.
6403
6404   If Gdtr is NULL, then ASSERT().
6405
6406   @param  Gdtr  The pointer to a GDTR descriptor.
6407
6408 **/
6409 VOID
6410 EFIAPI
6411 AsmReadGdtr (
6412   OUT     IA32_DESCRIPTOR           *Gdtr
6413   );
6414
6415
6416 /**
6417   Writes the current Global Descriptor Table Register (GDTR) descriptor.
6418
6419   Writes and the current GDTR descriptor specified by Gdtr. This function is
6420   only available on IA-32 and x64.
6421
6422   If Gdtr is NULL, then ASSERT().
6423
6424   @param  Gdtr  The pointer to a GDTR descriptor.
6425
6426 **/
6427 VOID
6428 EFIAPI
6429 AsmWriteGdtr (
6430   IN      CONST IA32_DESCRIPTOR     *Gdtr
6431   );
6432
6433
6434 /**
6435   Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6436
6437   Reads and returns the current IDTR descriptor and returns it in Idtr. This
6438   function is only available on IA-32 and x64.
6439
6440   If Idtr is NULL, then ASSERT().
6441
6442   @param  Idtr  The pointer to a IDTR descriptor.
6443
6444 **/
6445 VOID
6446 EFIAPI
6447 AsmReadIdtr (
6448   OUT     IA32_DESCRIPTOR           *Idtr
6449   );
6450
6451
6452 /**
6453   Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6454
6455   Writes the current IDTR descriptor and returns it in Idtr. This function is
6456   only available on IA-32 and x64.
6457
6458   If Idtr is NULL, then ASSERT().
6459
6460   @param  Idtr  The pointer to a IDTR descriptor.
6461
6462 **/
6463 VOID
6464 EFIAPI
6465 AsmWriteIdtr (
6466   IN      CONST IA32_DESCRIPTOR     *Idtr
6467   );
6468
6469
6470 /**
6471   Reads the current Local Descriptor Table Register(LDTR) selector.
6472
6473   Reads and returns the current 16-bit LDTR descriptor value. This function is
6474   only available on IA-32 and x64.
6475
6476   @return The current selector of LDT.
6477
6478 **/
6479 UINT16
6480 EFIAPI
6481 AsmReadLdtr (
6482   VOID
6483   );
6484
6485
6486 /**
6487   Writes the current Local Descriptor Table Register (LDTR) selector.
6488
6489   Writes and the current LDTR descriptor specified by Ldtr. This function is
6490   only available on IA-32 and x64.
6491
6492   @param  Ldtr  16-bit LDTR selector value.
6493
6494 **/
6495 VOID
6496 EFIAPI
6497 AsmWriteLdtr (
6498   IN      UINT16                    Ldtr
6499   );
6500
6501
6502 /**
6503   Save the current floating point/SSE/SSE2 context to a buffer.
6504
6505   Saves the current floating point/SSE/SSE2 state to the buffer specified by
6506   Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6507   available on IA-32 and x64.
6508
6509   If Buffer is NULL, then ASSERT().
6510   If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6511
6512   @param  Buffer  The pointer to a buffer to save the floating point/SSE/SSE2 context.
6513
6514 **/
6515 VOID
6516 EFIAPI
6517 AsmFxSave (
6518   OUT     IA32_FX_BUFFER            *Buffer
6519   );
6520
6521
6522 /**
6523   Restores the current floating point/SSE/SSE2 context from a buffer.
6524
6525   Restores the current floating point/SSE/SSE2 state from the buffer specified
6526   by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6527   only available on IA-32 and x64.
6528
6529   If Buffer is NULL, then ASSERT().
6530   If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6531   If Buffer was not saved with AsmFxSave(), then ASSERT().
6532
6533   @param  Buffer  The pointer to a buffer to save the floating point/SSE/SSE2 context.
6534
6535 **/
6536 VOID
6537 EFIAPI
6538 AsmFxRestore (
6539   IN      CONST IA32_FX_BUFFER      *Buffer
6540   );
6541
6542
6543 /**
6544   Reads the current value of 64-bit MMX Register #0 (MM0).
6545
6546   Reads and returns the current value of MM0. This function is only available
6547   on IA-32 and x64.
6548
6549   @return The current value of MM0.
6550
6551 **/
6552 UINT64
6553 EFIAPI
6554 AsmReadMm0 (
6555   VOID
6556   );
6557
6558
6559 /**
6560   Reads the current value of 64-bit MMX Register #1 (MM1).
6561
6562   Reads and returns the current value of MM1. This function is only available
6563   on IA-32 and x64.
6564
6565   @return The current value of MM1.
6566
6567 **/
6568 UINT64
6569 EFIAPI
6570 AsmReadMm1 (
6571   VOID
6572   );
6573
6574
6575 /**
6576   Reads the current value of 64-bit MMX Register #2 (MM2).
6577
6578   Reads and returns the current value of MM2. This function is only available
6579   on IA-32 and x64.
6580
6581   @return The current value of MM2.
6582
6583 **/
6584 UINT64
6585 EFIAPI
6586 AsmReadMm2 (
6587   VOID
6588   );
6589
6590
6591 /**
6592   Reads the current value of 64-bit MMX Register #3 (MM3).
6593
6594   Reads and returns the current value of MM3. This function is only available
6595   on IA-32 and x64.
6596
6597   @return The current value of MM3.
6598
6599 **/
6600 UINT64
6601 EFIAPI
6602 AsmReadMm3 (
6603   VOID
6604   );
6605
6606
6607 /**
6608   Reads the current value of 64-bit MMX Register #4 (MM4).
6609
6610   Reads and returns the current value of MM4. This function is only available
6611   on IA-32 and x64.
6612
6613   @return The current value of MM4.
6614
6615 **/
6616 UINT64
6617 EFIAPI
6618 AsmReadMm4 (
6619   VOID
6620   );
6621
6622
6623 /**
6624   Reads the current value of 64-bit MMX Register #5 (MM5).
6625
6626   Reads and returns the current value of MM5. This function is only available
6627   on IA-32 and x64.
6628
6629   @return The current value of MM5.
6630
6631 **/
6632 UINT64
6633 EFIAPI
6634 AsmReadMm5 (
6635   VOID
6636   );
6637
6638
6639 /**
6640   Reads the current value of 64-bit MMX Register #6 (MM6).
6641
6642   Reads and returns the current value of MM6. This function is only available
6643   on IA-32 and x64.
6644
6645   @return The current value of MM6.
6646
6647 **/
6648 UINT64
6649 EFIAPI
6650 AsmReadMm6 (
6651   VOID
6652   );
6653
6654
6655 /**
6656   Reads the current value of 64-bit MMX Register #7 (MM7).
6657
6658   Reads and returns the current value of MM7. This function is only available
6659   on IA-32 and x64.
6660
6661   @return The current value of MM7.
6662
6663 **/
6664 UINT64
6665 EFIAPI
6666 AsmReadMm7 (
6667   VOID
6668   );
6669
6670
6671 /**
6672   Writes the current value of 64-bit MMX Register #0 (MM0).
6673
6674   Writes the current value of MM0. This function is only available on IA32 and
6675   x64.
6676
6677   @param  Value The 64-bit value to write to MM0.
6678
6679 **/
6680 VOID
6681 EFIAPI
6682 AsmWriteMm0 (
6683   IN      UINT64                    Value
6684   );
6685
6686
6687 /**
6688   Writes the current value of 64-bit MMX Register #1 (MM1).
6689
6690   Writes the current value of MM1. This function is only available on IA32 and
6691   x64.
6692
6693   @param  Value The 64-bit value to write to MM1.
6694
6695 **/
6696 VOID
6697 EFIAPI
6698 AsmWriteMm1 (
6699   IN      UINT64                    Value
6700   );
6701
6702
6703 /**
6704   Writes the current value of 64-bit MMX Register #2 (MM2).
6705
6706   Writes the current value of MM2. This function is only available on IA32 and
6707   x64.
6708
6709   @param  Value The 64-bit value to write to MM2.
6710
6711 **/
6712 VOID
6713 EFIAPI
6714 AsmWriteMm2 (
6715   IN      UINT64                    Value
6716   );
6717
6718
6719 /**
6720   Writes the current value of 64-bit MMX Register #3 (MM3).
6721
6722   Writes the current value of MM3. This function is only available on IA32 and
6723   x64.
6724
6725   @param  Value The 64-bit value to write to MM3.
6726
6727 **/
6728 VOID
6729 EFIAPI
6730 AsmWriteMm3 (
6731   IN      UINT64                    Value
6732   );
6733
6734
6735 /**
6736   Writes the current value of 64-bit MMX Register #4 (MM4).
6737
6738   Writes the current value of MM4. This function is only available on IA32 and
6739   x64.
6740
6741   @param  Value The 64-bit value to write to MM4.
6742
6743 **/
6744 VOID
6745 EFIAPI
6746 AsmWriteMm4 (
6747   IN      UINT64                    Value
6748   );
6749
6750
6751 /**
6752   Writes the current value of 64-bit MMX Register #5 (MM5).
6753
6754   Writes the current value of MM5. This function is only available on IA32 and
6755   x64.
6756
6757   @param  Value The 64-bit value to write to MM5.
6758
6759 **/
6760 VOID
6761 EFIAPI
6762 AsmWriteMm5 (
6763   IN      UINT64                    Value
6764   );
6765
6766
6767 /**
6768   Writes the current value of 64-bit MMX Register #6 (MM6).
6769
6770   Writes the current value of MM6. This function is only available on IA32 and
6771   x64.
6772
6773   @param  Value The 64-bit value to write to MM6.
6774
6775 **/
6776 VOID
6777 EFIAPI
6778 AsmWriteMm6 (
6779   IN      UINT64                    Value
6780   );
6781
6782
6783 /**
6784   Writes the current value of 64-bit MMX Register #7 (MM7).
6785
6786   Writes the current value of MM7. This function is only available on IA32 and
6787   x64.
6788
6789   @param  Value The 64-bit value to write to MM7.
6790
6791 **/
6792 VOID
6793 EFIAPI
6794 AsmWriteMm7 (
6795   IN      UINT64                    Value
6796   );
6797
6798
6799 /**
6800   Reads the current value of Time Stamp Counter (TSC).
6801
6802   Reads and returns the current value of TSC. This function is only available
6803   on IA-32 and x64.
6804
6805   @return The current value of TSC
6806
6807 **/
6808 UINT64
6809 EFIAPI
6810 AsmReadTsc (
6811   VOID
6812   );
6813
6814
6815 /**
6816   Reads the current value of a Performance Counter (PMC).
6817
6818   Reads and returns the current value of performance counter specified by
6819   Index. This function is only available on IA-32 and x64.
6820
6821   @param  Index The 32-bit Performance Counter index to read.
6822
6823   @return The value of the PMC specified by Index.
6824
6825 **/
6826 UINT64
6827 EFIAPI
6828 AsmReadPmc (
6829   IN      UINT32                    Index
6830   );
6831
6832
6833 /**
6834   Sets up a monitor buffer that is used by AsmMwait().
6835
6836   Executes a MONITOR instruction with the register state specified by Eax, Ecx
6837   and Edx. Returns Eax. This function is only available on IA-32 and x64.
6838
6839   @param  Eax The value to load into EAX or RAX before executing the MONITOR
6840               instruction.
6841   @param  Ecx The value to load into ECX or RCX before executing the MONITOR
6842               instruction.
6843   @param  Edx The value to load into EDX or RDX before executing the MONITOR
6844               instruction.
6845
6846   @return Eax
6847
6848 **/
6849 UINTN
6850 EFIAPI
6851 AsmMonitor (
6852   IN      UINTN                     Eax,
6853   IN      UINTN                     Ecx,
6854   IN      UINTN                     Edx
6855   );
6856
6857
6858 /**
6859   Executes an MWAIT instruction.
6860
6861   Executes an MWAIT instruction with the register state specified by Eax and
6862   Ecx. Returns Eax. This function is only available on IA-32 and x64.
6863
6864   @param  Eax The value to load into EAX or RAX before executing the MONITOR
6865               instruction.
6866   @param  Ecx The value to load into ECX or RCX before executing the MONITOR
6867               instruction.
6868
6869   @return Eax
6870
6871 **/
6872 UINTN
6873 EFIAPI
6874 AsmMwait (
6875   IN      UINTN                     Eax,
6876   IN      UINTN                     Ecx
6877   );
6878
6879
6880 /**
6881   Executes a WBINVD instruction.
6882
6883   Executes a WBINVD instruction. This function is only available on IA-32 and
6884   x64.
6885
6886 **/
6887 VOID
6888 EFIAPI
6889 AsmWbinvd (
6890   VOID
6891   );
6892
6893
6894 /**
6895   Executes a INVD instruction.
6896
6897   Executes a INVD instruction. This function is only available on IA-32 and
6898   x64.
6899
6900 **/
6901 VOID
6902 EFIAPI
6903 AsmInvd (
6904   VOID
6905   );
6906
6907
6908 /**
6909   Flushes a cache line from all the instruction and data caches within the
6910   coherency domain of the CPU.
6911
6912   Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6913   This function is only available on IA-32 and x64.
6914
6915   @param  LinearAddress The address of the cache line to flush. If the CPU is
6916                         in a physical addressing mode, then LinearAddress is a
6917                         physical address. If the CPU is in a virtual
6918                         addressing mode, then LinearAddress is a virtual
6919                         address.
6920
6921   @return LinearAddress.
6922 **/
6923 VOID *
6924 EFIAPI
6925 AsmFlushCacheLine (
6926   IN      VOID                      *LinearAddress
6927   );
6928
6929
6930 /**
6931   Enables the 32-bit paging mode on the CPU.
6932
6933   Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6934   must be properly initialized prior to calling this service. This function
6935   assumes the current execution mode is 32-bit protected mode. This function is
6936   only available on IA-32. After the 32-bit paging mode is enabled, control is
6937   transferred to the function specified by EntryPoint using the new stack
6938   specified by NewStack and passing in the parameters specified by Context1 and
6939   Context2. Context1 and Context2 are optional and may be NULL. The function
6940   EntryPoint must never return.
6941
6942   If the current execution mode is not 32-bit protected mode, then ASSERT().
6943   If EntryPoint is NULL, then ASSERT().
6944   If NewStack is NULL, then ASSERT().
6945
6946   There are a number of constraints that must be followed before calling this
6947   function:
6948   1)  Interrupts must be disabled.
6949   2)  The caller must be in 32-bit protected mode with flat descriptors. This
6950       means all descriptors must have a base of 0 and a limit of 4GB.
6951   3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat
6952       descriptors.
6953   4)  CR3 must point to valid page tables that will be used once the transition
6954       is complete, and those page tables must guarantee that the pages for this
6955       function and the stack are identity mapped.
6956
6957   @param  EntryPoint  A pointer to function to call with the new stack after
6958                       paging is enabled.
6959   @param  Context1    A pointer to the context to pass into the EntryPoint
6960                       function as the first parameter after paging is enabled.
6961   @param  Context2    A pointer to the context to pass into the EntryPoint
6962                       function as the second parameter after paging is enabled.
6963   @param  NewStack    A pointer to the new stack to use for the EntryPoint
6964                       function after paging is enabled.
6965
6966 **/
6967 VOID
6968 EFIAPI
6969 AsmEnablePaging32 (
6970   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
6971   IN      VOID                      *Context1,  OPTIONAL
6972   IN      VOID                      *Context2,  OPTIONAL
6973   IN      VOID                      *NewStack
6974   );
6975
6976
6977 /**
6978   Disables the 32-bit paging mode on the CPU.
6979
6980   Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6981   mode. This function assumes the current execution mode is 32-paged protected
6982   mode. This function is only available on IA-32. After the 32-bit paging mode
6983   is disabled, control is transferred to the function specified by EntryPoint
6984   using the new stack specified by NewStack and passing in the parameters
6985   specified by Context1 and Context2. Context1 and Context2 are optional and
6986   may be NULL. The function EntryPoint must never return.
6987
6988   If the current execution mode is not 32-bit paged mode, then ASSERT().
6989   If EntryPoint is NULL, then ASSERT().
6990   If NewStack is NULL, then ASSERT().
6991
6992   There are a number of constraints that must be followed before calling this
6993   function:
6994   1)  Interrupts must be disabled.
6995   2)  The caller must be in 32-bit paged mode.
6996   3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
6997   4)  CR3 must point to valid page tables that guarantee that the pages for
6998       this function and the stack are identity mapped.
6999
7000   @param  EntryPoint  A pointer to function to call with the new stack after
7001                       paging is disabled.
7002   @param  Context1    A pointer to the context to pass into the EntryPoint
7003                       function as the first parameter after paging is disabled.
7004   @param  Context2    A pointer to the context to pass into the EntryPoint
7005                       function as the second parameter after paging is
7006                       disabled.
7007   @param  NewStack    A pointer to the new stack to use for the EntryPoint
7008                       function after paging is disabled.
7009
7010 **/
7011 VOID
7012 EFIAPI
7013 AsmDisablePaging32 (
7014   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
7015   IN      VOID                      *Context1,  OPTIONAL
7016   IN      VOID                      *Context2,  OPTIONAL
7017   IN      VOID                      *NewStack
7018   );
7019
7020
7021 /**
7022   Enables the 64-bit paging mode on the CPU.
7023
7024   Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7025   must be properly initialized prior to calling this service. This function
7026   assumes the current execution mode is 32-bit protected mode with flat
7027   descriptors. This function is only available on IA-32. After the 64-bit
7028   paging mode is enabled, control is transferred to the function specified by
7029   EntryPoint using the new stack specified by NewStack and passing in the
7030   parameters specified by Context1 and Context2. Context1 and Context2 are
7031   optional and may be 0. The function EntryPoint must never return.
7032
7033   If the current execution mode is not 32-bit protected mode with flat
7034   descriptors, then ASSERT().
7035   If EntryPoint is 0, then ASSERT().
7036   If NewStack is 0, then ASSERT().
7037
7038   @param  Cs          The 16-bit selector to load in the CS before EntryPoint
7039                       is called. The descriptor in the GDT that this selector
7040                       references must be setup for long mode.
7041   @param  EntryPoint  The 64-bit virtual address of the function to call with
7042                       the new stack after paging is enabled.
7043   @param  Context1    The 64-bit virtual address of the context to pass into
7044                       the EntryPoint function as the first parameter after
7045                       paging is enabled.
7046   @param  Context2    The 64-bit virtual address of the context to pass into
7047                       the EntryPoint function as the second parameter after
7048                       paging is enabled.
7049   @param  NewStack    The 64-bit virtual address of the new stack to use for
7050                       the EntryPoint function after paging is enabled.
7051
7052 **/
7053 VOID
7054 EFIAPI
7055 AsmEnablePaging64 (
7056   IN      UINT16                    Cs,
7057   IN      UINT64                    EntryPoint,
7058   IN      UINT64                    Context1,  OPTIONAL
7059   IN      UINT64                    Context2,  OPTIONAL
7060   IN      UINT64                    NewStack
7061   );
7062
7063
7064 /**
7065   Disables the 64-bit paging mode on the CPU.
7066
7067   Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7068   mode. This function assumes the current execution mode is 64-paging mode.
7069   This function is only available on x64. After the 64-bit paging mode is
7070   disabled, control is transferred to the function specified by EntryPoint
7071   using the new stack specified by NewStack and passing in the parameters
7072   specified by Context1 and Context2. Context1 and Context2 are optional and
7073   may be 0. The function EntryPoint must never return.
7074
7075   If the current execution mode is not 64-bit paged mode, then ASSERT().
7076   If EntryPoint is 0, then ASSERT().
7077   If NewStack is 0, then ASSERT().
7078
7079   @param  Cs          The 16-bit selector to load in the CS before EntryPoint
7080                       is called. The descriptor in the GDT that this selector
7081                       references must be setup for 32-bit protected mode.
7082   @param  EntryPoint  The 64-bit virtual address of the function to call with
7083                       the new stack after paging is disabled.
7084   @param  Context1    The 64-bit virtual address of the context to pass into
7085                       the EntryPoint function as the first parameter after
7086                       paging is disabled.
7087   @param  Context2    The 64-bit virtual address of the context to pass into
7088                       the EntryPoint function as the second parameter after
7089                       paging is disabled.
7090   @param  NewStack    The 64-bit virtual address of the new stack to use for
7091                       the EntryPoint function after paging is disabled.
7092
7093 **/
7094 VOID
7095 EFIAPI
7096 AsmDisablePaging64 (
7097   IN      UINT16                    Cs,
7098   IN      UINT32                    EntryPoint,
7099   IN      UINT32                    Context1,  OPTIONAL
7100   IN      UINT32                    Context2,  OPTIONAL
7101   IN      UINT32                    NewStack
7102   );
7103
7104
7105 //
7106 // 16-bit thunking services
7107 //
7108
7109 /**
7110   Retrieves the properties for 16-bit thunk functions.
7111
7112   Computes the size of the buffer and stack below 1MB required to use the
7113   AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7114   buffer size is returned in RealModeBufferSize, and the stack size is returned
7115   in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7116   then the actual minimum stack size is ExtraStackSize plus the maximum number
7117   of bytes that need to be passed to the 16-bit real mode code.
7118
7119   If RealModeBufferSize is NULL, then ASSERT().
7120   If ExtraStackSize is NULL, then ASSERT().
7121
7122   @param  RealModeBufferSize  A pointer to the size of the buffer below 1MB
7123                               required to use the 16-bit thunk functions.
7124   @param  ExtraStackSize      A pointer to the extra size of stack below 1MB
7125                               that the 16-bit thunk functions require for
7126                               temporary storage in the transition to and from
7127                               16-bit real mode.
7128
7129 **/
7130 VOID
7131 EFIAPI
7132 AsmGetThunk16Properties (
7133   OUT     UINT32                    *RealModeBufferSize,
7134   OUT     UINT32                    *ExtraStackSize
7135   );
7136
7137
7138 /**
7139   Prepares all structures a code required to use AsmThunk16().
7140
7141   Prepares all structures and code required to use AsmThunk16().
7142
7143   This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7144   virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7145
7146   If ThunkContext is NULL, then ASSERT().
7147
7148   @param  ThunkContext  A pointer to the context structure that describes the
7149                         16-bit real mode code to call.
7150
7151 **/
7152 VOID
7153 EFIAPI
7154 AsmPrepareThunk16 (
7155   IN OUT  THUNK_CONTEXT             *ThunkContext
7156   );
7157
7158
7159 /**
7160   Transfers control to a 16-bit real mode entry point and returns the results.
7161
7162   Transfers control to a 16-bit real mode entry point and returns the results.
7163   AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7164   This function must be called with interrupts disabled.
7165
7166   The register state from the RealModeState field of ThunkContext is restored just prior
7167   to calling the 16-bit real mode entry point.  This includes the EFLAGS field of RealModeState,
7168   which is used to set the interrupt state when a 16-bit real mode entry point is called.
7169   Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7170   The stack is initialized to the SS and ESP fields of RealModeState.  Any parameters passed to
7171   the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7172   The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7173   so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7174   and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7175   point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7176   after the RETF instruction is executed.
7177
7178   If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7179   or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7180   the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7181
7182   If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7183   then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7184   This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7185
7186   If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7187   is invoked in big real mode.  Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7188
7189   If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7190   ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7191   disable the A20 mask.
7192
7193   If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7194   ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask.  If this INT 15 call fails,
7195   then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7196
7197   If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7198   ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7199
7200   If ThunkContext is NULL, then ASSERT().
7201   If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7202   If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7203   ThunkAttributes, then ASSERT().
7204
7205   This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7206   virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.
7207
7208   @param  ThunkContext  A pointer to the context structure that describes the
7209                         16-bit real mode code to call.
7210
7211 **/
7212 VOID
7213 EFIAPI
7214 AsmThunk16 (
7215   IN OUT  THUNK_CONTEXT             *ThunkContext
7216   );
7217
7218
7219 /**
7220   Prepares all structures and code for a 16-bit real mode thunk, transfers
7221   control to a 16-bit real mode entry point, and returns the results.
7222
7223   Prepares all structures and code for a 16-bit real mode thunk, transfers
7224   control to a 16-bit real mode entry point, and returns the results. If the
7225   caller only need to perform a single 16-bit real mode thunk, then this
7226   service should be used. If the caller intends to make more than one 16-bit
7227   real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7228   once and AsmThunk16() can be called for each 16-bit real mode thunk.
7229
7230   This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
7231   virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
7232
7233   See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7234
7235   @param  ThunkContext  A pointer to the context structure that describes the
7236                         16-bit real mode code to call.
7237
7238 **/
7239 VOID
7240 EFIAPI
7241 AsmPrepareAndThunk16 (
7242   IN OUT  THUNK_CONTEXT             *ThunkContext
7243   );
7244
7245 #endif
7246 #endif
7247
7248