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1 /** @file
2 Provides string functions, linked list functions, math functions, synchronization
3 functions, and CPU architecture specific functions.
4
5 Copyright (c) 2006 - 2008, Intel Corporation
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef __BASE_LIB__
17 #define __BASE_LIB__
18
19 ///
20 /// Definitions for SPIN_LOCK
21 ///
22 typedef volatile UINTN SPIN_LOCK;
23
24 //
25 // Definitions for architecture specific types
26 //
27 #if defined (MDE_CPU_IA32)
28 ///
29 /// IA32 context buffer used by SetJump() and LongJump()
30 ///
31 typedef struct {
32 UINT32 Ebx;
33 UINT32 Esi;
34 UINT32 Edi;
35 UINT32 Ebp;
36 UINT32 Esp;
37 UINT32 Eip;
38 } BASE_LIBRARY_JUMP_BUFFER;
39
40 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
41
42 #endif // defined (MDE_CPU_IA32)
43
44 #if defined (MDE_CPU_IPF)
45
46 ///
47 /// IPF context buffer used by SetJump() and LongJump()
48 ///
49 typedef struct {
50 UINT64 F2[2];
51 UINT64 F3[2];
52 UINT64 F4[2];
53 UINT64 F5[2];
54 UINT64 F16[2];
55 UINT64 F17[2];
56 UINT64 F18[2];
57 UINT64 F19[2];
58 UINT64 F20[2];
59 UINT64 F21[2];
60 UINT64 F22[2];
61 UINT64 F23[2];
62 UINT64 F24[2];
63 UINT64 F25[2];
64 UINT64 F26[2];
65 UINT64 F27[2];
66 UINT64 F28[2];
67 UINT64 F29[2];
68 UINT64 F30[2];
69 UINT64 F31[2];
70 UINT64 R4;
71 UINT64 R5;
72 UINT64 R6;
73 UINT64 R7;
74 UINT64 SP;
75 UINT64 BR0;
76 UINT64 BR1;
77 UINT64 BR2;
78 UINT64 BR3;
79 UINT64 BR4;
80 UINT64 BR5;
81 UINT64 InitialUNAT;
82 UINT64 AfterSpillUNAT;
83 UINT64 PFS;
84 UINT64 BSP;
85 UINT64 Predicates;
86 UINT64 LoopCount;
87 UINT64 FPSR;
88 } BASE_LIBRARY_JUMP_BUFFER;
89
90 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
91
92 #endif // defined (MDE_CPU_IPF)
93
94 #if defined (MDE_CPU_X64)
95 ///
96 /// x64 context buffer used by SetJump() and LongJump()
97 ///
98 typedef struct {
99 UINT64 Rbx;
100 UINT64 Rsp;
101 UINT64 Rbp;
102 UINT64 Rdi;
103 UINT64 Rsi;
104 UINT64 R12;
105 UINT64 R13;
106 UINT64 R14;
107 UINT64 R15;
108 UINT64 Rip;
109 } BASE_LIBRARY_JUMP_BUFFER;
110
111 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
112
113 #endif // defined (MDE_CPU_X64)
114
115 #if defined (MDE_CPU_EBC)
116 ///
117 /// EBC context buffer used by SetJump() and LongJump()
118 ///
119 typedef struct {
120 UINT64 R0;
121 UINT64 R1;
122 UINT64 R2;
123 UINT64 R3;
124 UINT64 IP;
125 } BASE_LIBRARY_JUMP_BUFFER;
126
127 #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
128
129 #endif // defined (MDE_CPU_EBC)
130
131 //
132 // String Services
133 //
134
135 /**
136 Copies one Null-terminated Unicode string to another Null-terminated Unicode
137 string and returns the new Unicode string.
138
139 This function copies the contents of the Unicode string Source to the Unicode
140 string Destination, and returns Destination. If Source and Destination
141 overlap, then the results are undefined.
142
143 If Destination is NULL, then ASSERT().
144 If Destination is not aligned on a 16-bit boundary, then ASSERT().
145 If Source is NULL, then ASSERT().
146 If Source is not aligned on a 16-bit boundary, then ASSERT().
147 If Source and Destination overlap, then ASSERT().
148 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
149 PcdMaximumUnicodeStringLength Unicode characters not including the
150 Null-terminator, then ASSERT().
151
152 @param Destination Pointer to a Null-terminated Unicode string.
153 @param Source Pointer to a Null-terminated Unicode string.
154
155 @return Destination.
156
157 **/
158 CHAR16 *
159 EFIAPI
160 StrCpy (
161 OUT CHAR16 *Destination,
162 IN CONST CHAR16 *Source
163 );
164
165
166 /**
167 Copies up to a specified length from one Null-terminated Unicode string to
168 another Null-terminated Unicode string and returns the new Unicode string.
169
170 This function copies the contents of the Unicode string Source to the Unicode
171 string Destination, and returns Destination. At most, Length Unicode
172 characters are copied from Source to Destination. If Length is 0, then
173 Destination is returned unmodified. If Length is greater that the number of
174 Unicode characters in Source, then Destination is padded with Null Unicode
175 characters. If Source and Destination overlap, then the results are
176 undefined.
177
178 If Length > 0 and Destination is NULL, then ASSERT().
179 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
180 If Length > 0 and Source is NULL, then ASSERT().
181 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
182 If Source and Destination overlap, then ASSERT().
183 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
184 PcdMaximumUnicodeStringLength Unicode characters not including the
185 Null-terminator, then ASSERT().
186
187 @param Destination Pointer to a Null-terminated Unicode string.
188 @param Source Pointer to a Null-terminated Unicode string.
189 @param Length Maximum number of Unicode characters to copy.
190
191 @return Destination.
192
193 **/
194 CHAR16 *
195 EFIAPI
196 StrnCpy (
197 OUT CHAR16 *Destination,
198 IN CONST CHAR16 *Source,
199 IN UINTN Length
200 );
201
202
203 /**
204 Returns the length of a Null-terminated Unicode string.
205
206 This function returns the number of Unicode characters in the Null-terminated
207 Unicode string specified by String.
208
209 If String is NULL, then ASSERT().
210 If String is not aligned on a 16-bit boundary, then ASSERT().
211 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
212 PcdMaximumUnicodeStringLength Unicode characters not including the
213 Null-terminator, then ASSERT().
214
215 @param String Pointer to a Null-terminated Unicode string.
216
217 @return The length of String.
218
219 **/
220 UINTN
221 EFIAPI
222 StrLen (
223 IN CONST CHAR16 *String
224 );
225
226
227 /**
228 Returns the size of a Null-terminated Unicode string in bytes, including the
229 Null terminator.
230
231 This function returns the size, in bytes, of the Null-terminated Unicode string
232 specified by String.
233
234 If String is NULL, then ASSERT().
235 If String is not aligned on a 16-bit boundary, then ASSERT().
236 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
237 PcdMaximumUnicodeStringLength Unicode characters not including the
238 Null-terminator, then ASSERT().
239
240 @param String Pointer to a Null-terminated Unicode string.
241
242 @return The size of String.
243
244 **/
245 UINTN
246 EFIAPI
247 StrSize (
248 IN CONST CHAR16 *String
249 );
250
251
252 /**
253 Compares two Null-terminated Unicode strings, and returns the difference
254 between the first mismatched Unicode characters.
255
256 This function compares the Null-terminated Unicode string FirstString to the
257 Null-terminated Unicode string SecondString. If FirstString is identical to
258 SecondString, then 0 is returned. Otherwise, the value returned is the first
259 mismatched Unicode character in SecondString subtracted from the first
260 mismatched Unicode character in FirstString.
261
262 If FirstString is NULL, then ASSERT().
263 If FirstString is not aligned on a 16-bit boundary, then ASSERT().
264 If SecondString is NULL, then ASSERT().
265 If SecondString is not aligned on a 16-bit boundary, then ASSERT().
266 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
267 than PcdMaximumUnicodeStringLength Unicode characters not including the
268 Null-terminator, then ASSERT().
269 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
270 than PcdMaximumUnicodeStringLength Unicode characters not including the
271 Null-terminator, then ASSERT().
272
273 @param FirstString Pointer to a Null-terminated Unicode string.
274 @param SecondString Pointer to a Null-terminated Unicode string.
275
276 @retval 0 FirstString is identical to SecondString.
277 @return others FirstString is not identical to SecondString.
278
279 **/
280 INTN
281 EFIAPI
282 StrCmp (
283 IN CONST CHAR16 *FirstString,
284 IN CONST CHAR16 *SecondString
285 );
286
287
288 /**
289 Compares up to a specified length the contents of two Null-terminated Unicode strings,
290 and returns the difference between the first mismatched Unicode characters.
291
292 This function compares the Null-terminated Unicode string FirstString to the
293 Null-terminated Unicode string SecondString. At most, Length Unicode
294 characters will be compared. If Length is 0, then 0 is returned. If
295 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
296 value returned is the first mismatched Unicode character in SecondString
297 subtracted from the first mismatched Unicode character in FirstString.
298
299 If Length > 0 and FirstString is NULL, then ASSERT().
300 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
301 If Length > 0 and SecondString is NULL, then ASSERT().
302 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
303 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
304 than PcdMaximumUnicodeStringLength Unicode characters not including the
305 Null-terminator, then ASSERT().
306 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
307 than PcdMaximumUnicodeStringLength Unicode characters not including the
308 Null-terminator, then ASSERT().
309
310 @param FirstString Pointer to a Null-terminated Unicode string.
311 @param SecondString Pointer to a Null-terminated Unicode string.
312 @param Length Maximum number of Unicode characters to compare.
313
314 @retval 0 FirstString is identical to SecondString.
315 @return others FirstString is not identical to SecondString.
316
317 **/
318 INTN
319 EFIAPI
320 StrnCmp (
321 IN CONST CHAR16 *FirstString,
322 IN CONST CHAR16 *SecondString,
323 IN UINTN Length
324 );
325
326
327 /**
328 Concatenates one Null-terminated Unicode string to another Null-terminated
329 Unicode string, and returns the concatenated Unicode string.
330
331 This function concatenates two Null-terminated Unicode strings. The contents
332 of Null-terminated Unicode string Source are concatenated to the end of
333 Null-terminated Unicode string Destination. The Null-terminated concatenated
334 Unicode String is returned. If Source and Destination overlap, then the
335 results are undefined.
336
337 If Destination is NULL, then ASSERT().
338 If Destination is not aligned on a 16-bit bounadary, then ASSERT().
339 If Source is NULL, then ASSERT().
340 If Source is not aligned on a 16-bit bounadary, then ASSERT().
341 If Source and Destination overlap, then ASSERT().
342 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
343 than PcdMaximumUnicodeStringLength Unicode characters not including the
344 Null-terminator, then ASSERT().
345 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
346 PcdMaximumUnicodeStringLength Unicode characters not including the
347 Null-terminator, then ASSERT().
348 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
349 and Source results in a Unicode string with more than
350 PcdMaximumUnicodeStringLength Unicode characters not including the
351 Null-terminator, then ASSERT().
352
353 @param Destination Pointer to a Null-terminated Unicode string.
354 @param Source Pointer to a Null-terminated Unicode string.
355
356 @return Destination.
357
358 **/
359 CHAR16 *
360 EFIAPI
361 StrCat (
362 IN OUT CHAR16 *Destination,
363 IN CONST CHAR16 *Source
364 );
365
366
367 /**
368 Concatenates up to a specified length one Null-terminated Unicode to the end
369 of another Null-terminated Unicode string, and returns the concatenated
370 Unicode string.
371
372 This function concatenates two Null-terminated Unicode strings. The contents
373 of Null-terminated Unicode string Source are concatenated to the end of
374 Null-terminated Unicode string Destination, and Destination is returned. At
375 most, Length Unicode characters are concatenated from Source to the end of
376 Destination, and Destination is always Null-terminated. If Length is 0, then
377 Destination is returned unmodified. If Source and Destination overlap, then
378 the results are undefined.
379
380 If Destination is NULL, then ASSERT().
381 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
382 If Length > 0 and Source is NULL, then ASSERT().
383 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
384 If Source and Destination overlap, then ASSERT().
385 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
386 than PcdMaximumUnicodeStringLength Unicode characters not including the
387 Null-terminator, then ASSERT().
388 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
389 PcdMaximumUnicodeStringLength Unicode characters not including the
390 Null-terminator, then ASSERT().
391 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
392 and Source results in a Unicode string with more than
393 PcdMaximumUnicodeStringLength Unicode characters not including the
394 Null-terminator, then ASSERT().
395
396 @param Destination Pointer to a Null-terminated Unicode string.
397 @param Source Pointer to a Null-terminated Unicode string.
398 @param Length Maximum number of Unicode characters to concatenate from
399 Source.
400
401 @return Destination.
402
403 **/
404 CHAR16 *
405 EFIAPI
406 StrnCat (
407 IN OUT CHAR16 *Destination,
408 IN CONST CHAR16 *Source,
409 IN UINTN Length
410 );
411
412 /**
413 Returns the first occurrence of a Null-terminated Unicode sub-string
414 in a Null-terminated Unicode string.
415
416 This function scans the contents of the Null-terminated Unicode string
417 specified by String and returns the first occurrence of SearchString.
418 If SearchString is not found in String, then NULL is returned. If
419 the length of SearchString is zero, then String is
420 returned.
421
422 If String is NULL, then ASSERT().
423 If String is not aligned on a 16-bit boundary, then ASSERT().
424 If SearchString is NULL, then ASSERT().
425 If SearchString is not aligned on a 16-bit boundary, then ASSERT().
426
427 If PcdMaximumUnicodeStringLength is not zero, and SearchString
428 or String contains more than PcdMaximumUnicodeStringLength Unicode
429 characters not including the Null-terminator, then ASSERT().
430
431 @param String Pointer to a Null-terminated Unicode string.
432 @param SearchString Pointer to a Null-terminated Unicode string to search for.
433
434 @retval NULL If the SearchString does not appear in String.
435 @return others If there is a match.
436
437 **/
438 CHAR16 *
439 EFIAPI
440 StrStr (
441 IN CONST CHAR16 *String,
442 IN CONST CHAR16 *SearchString
443 );
444
445 /**
446 Convert a Null-terminated Unicode decimal string to a value of
447 type UINTN.
448
449 This function returns a value of type UINTN by interpreting the contents
450 of the Unicode string specified by String as a decimal number. The format
451 of the input Unicode string String is:
452
453 [spaces] [decimal digits].
454
455 The valid decimal digit character is in the range [0-9]. The
456 function will ignore the pad space, which includes spaces or
457 tab characters, before [decimal digits]. The running zero in the
458 beginning of [decimal digits] will be ignored. Then, the function
459 stops at the first character that is a not a valid decimal character
460 or a Null-terminator, whichever one comes first.
461
462 If String is NULL, then ASSERT().
463 If String is not aligned in a 16-bit boundary, then ASSERT().
464 If String has only pad spaces, then 0 is returned.
465 If String has no pad spaces or valid decimal digits,
466 then 0 is returned.
467 If the number represented by String overflows according
468 to the range defined by UINTN, then ASSERT().
469
470 If PcdMaximumUnicodeStringLength is not zero, and String contains
471 more than PcdMaximumUnicodeStringLength Unicode characters not including
472 the Null-terminator, then ASSERT().
473
474 @param String Pointer to a Null-terminated Unicode string.
475
476 @retval Value translated from String.
477
478 **/
479 UINTN
480 EFIAPI
481 StrDecimalToUintn (
482 IN CONST CHAR16 *String
483 );
484
485 /**
486 Convert a Null-terminated Unicode decimal string to a value of
487 type UINT64.
488
489 This function returns a value of type UINT64 by interpreting the contents
490 of the Unicode string specified by String as a decimal number. The format
491 of the input Unicode string String is:
492
493 [spaces] [decimal digits].
494
495 The valid decimal digit character is in the range [0-9]. The
496 function will ignore the pad space, which includes spaces or
497 tab characters, before [decimal digits]. The running zero in the
498 beginning of [decimal digits] will be ignored. Then, the function
499 stops at the first character that is a not a valid decimal character
500 or a Null-terminator, whichever one comes first.
501
502 If String is NULL, then ASSERT().
503 If String is not aligned in a 16-bit boundary, then ASSERT().
504 If String has only pad spaces, then 0 is returned.
505 If String has no pad spaces or valid decimal digits,
506 then 0 is returned.
507 If the number represented by String overflows according
508 to the range defined by UINT64, then ASSERT().
509
510 If PcdMaximumUnicodeStringLength is not zero, and String contains
511 more than PcdMaximumUnicodeStringLength Unicode characters not including
512 the Null-terminator, then ASSERT().
513
514 @param String Pointer to a Null-terminated Unicode string.
515
516 @retval Value translated from String.
517
518 **/
519 UINT64
520 EFIAPI
521 StrDecimalToUint64 (
522 IN CONST CHAR16 *String
523 );
524
525
526 /**
527 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
528
529 This function returns a value of type UINTN by interpreting the contents
530 of the Unicode string specified by String as a hexadecimal number.
531 The format of the input Unicode string String is:
532
533 [spaces][zeros][x][hexadecimal digits].
534
535 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
536 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
537 If "x" appears in the input string, it must be prefixed with at least one 0.
538 The function will ignore the pad space, which includes spaces or tab characters,
539 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
540 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
541 first valid hexadecimal digit. Then, the function stops at the first character that is
542 a not a valid hexadecimal character or NULL, whichever one comes first.
543
544 If String is NULL, then ASSERT().
545 If String is not aligned in a 16-bit boundary, then ASSERT().
546 If String has only pad spaces, then zero is returned.
547 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
548 then zero is returned.
549 If the number represented by String overflows according to the range defined by
550 UINTN, then ASSERT().
551
552 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
553 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
554 then ASSERT().
555
556 @param String Pointer to a Null-terminated Unicode string.
557
558 @retval Value translated from String.
559
560 **/
561 UINTN
562 EFIAPI
563 StrHexToUintn (
564 IN CONST CHAR16 *String
565 );
566
567
568 /**
569 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
570
571 This function returns a value of type UINT64 by interpreting the contents
572 of the Unicode string specified by String as a hexadecimal number.
573 The format of the input Unicode string String is
574
575 [spaces][zeros][x][hexadecimal digits].
576
577 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
578 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
579 If "x" appears in the input string, it must be prefixed with at least one 0.
580 The function will ignore the pad space, which includes spaces or tab characters,
581 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
582 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
583 first valid hexadecimal digit. Then, the function stops at the first character that is
584 a not a valid hexadecimal character or NULL, whichever one comes first.
585
586 If String is NULL, then ASSERT().
587 If String is not aligned in a 16-bit boundary, then ASSERT().
588 If String has only pad spaces, then zero is returned.
589 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
590 then zero is returned.
591 If the number represented by String overflows according to the range defined by
592 UINT64, then ASSERT().
593
594 If PcdMaximumUnicodeStringLength is not zero, and String contains more than
595 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
596 then ASSERT().
597
598 @param String Pointer to a Null-terminated Unicode string.
599
600 @retval Value translated from String.
601
602 **/
603 UINT64
604 EFIAPI
605 StrHexToUint64 (
606 IN CONST CHAR16 *String
607 );
608
609 /**
610 Convert a Null-terminated Unicode string to a Null-terminated
611 ASCII string and returns the ASCII string.
612
613 This function converts the content of the Unicode string Source
614 to the ASCII string Destination by copying the lower 8 bits of
615 each Unicode character. It returns Destination.
616
617 If any Unicode characters in Source contain non-zero value in
618 the upper 8 bits, then ASSERT().
619
620 If Destination is NULL, then ASSERT().
621 If Source is NULL, then ASSERT().
622 If Source is not aligned on a 16-bit boundary, then ASSERT().
623 If Source and Destination overlap, then ASSERT().
624
625 If PcdMaximumUnicodeStringLength is not zero, and Source contains
626 more than PcdMaximumUnicodeStringLength Unicode characters not including
627 the Null-terminator, then ASSERT().
628
629 If PcdMaximumAsciiStringLength is not zero, and Source contains more
630 than PcdMaximumAsciiStringLength Unicode characters not including the
631 Null-terminator, then ASSERT().
632
633 @param Source Pointer to a Null-terminated Unicode string.
634 @param Destination Pointer to a Null-terminated ASCII string.
635
636 @return Destination.
637
638 **/
639 CHAR8 *
640 EFIAPI
641 UnicodeStrToAsciiStr (
642 IN CONST CHAR16 *Source,
643 OUT CHAR8 *Destination
644 );
645
646
647 /**
648 Copies one Null-terminated ASCII string to another Null-terminated ASCII
649 string and returns the new ASCII string.
650
651 This function copies the contents of the ASCII string Source to the ASCII
652 string Destination, and returns Destination. If Source and Destination
653 overlap, then the results are undefined.
654
655 If Destination is NULL, then ASSERT().
656 If Source is NULL, then ASSERT().
657 If Source and Destination overlap, then ASSERT().
658 If PcdMaximumAsciiStringLength is not zero and Source contains more than
659 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
660 then ASSERT().
661
662 @param Destination Pointer to a Null-terminated ASCII string.
663 @param Source Pointer to a Null-terminated ASCII string.
664
665 @return Destination
666
667 **/
668 CHAR8 *
669 EFIAPI
670 AsciiStrCpy (
671 OUT CHAR8 *Destination,
672 IN CONST CHAR8 *Source
673 );
674
675
676 /**
677 Copies up to a specified length one Null-terminated ASCII string to another
678 Null-terminated ASCII string and returns the new ASCII string.
679
680 This function copies the contents of the ASCII string Source to the ASCII
681 string Destination, and returns Destination. At most, Length ASCII characters
682 are copied from Source to Destination. If Length is 0, then Destination is
683 returned unmodified. If Length is greater that the number of ASCII characters
684 in Source, then Destination is padded with Null ASCII characters. If Source
685 and Destination overlap, then the results are undefined.
686
687 If Destination is NULL, then ASSERT().
688 If Source is NULL, then ASSERT().
689 If Source and Destination overlap, then ASSERT().
690 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
691 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
692 then ASSERT().
693
694 @param Destination Pointer to a Null-terminated ASCII string.
695 @param Source Pointer to a Null-terminated ASCII string.
696 @param Length Maximum number of ASCII characters to copy.
697
698 @return Destination
699
700 **/
701 CHAR8 *
702 EFIAPI
703 AsciiStrnCpy (
704 OUT CHAR8 *Destination,
705 IN CONST CHAR8 *Source,
706 IN UINTN Length
707 );
708
709
710 /**
711 Returns the length of a Null-terminated ASCII string.
712
713 This function returns the number of ASCII characters in the Null-terminated
714 ASCII string specified by String.
715
716 If Length > 0 and Destination is NULL, then ASSERT().
717 If Length > 0 and Source is NULL, then ASSERT().
718 If PcdMaximumAsciiStringLength is not zero and String contains more than
719 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
720 then ASSERT().
721
722 @param String Pointer to a Null-terminated ASCII string.
723
724 @return The length of String.
725
726 **/
727 UINTN
728 EFIAPI
729 AsciiStrLen (
730 IN CONST CHAR8 *String
731 );
732
733
734 /**
735 Returns the size of a Null-terminated ASCII string in bytes, including the
736 Null terminator.
737
738 This function returns the size, in bytes, of the Null-terminated ASCII string
739 specified by String.
740
741 If String is NULL, then ASSERT().
742 If PcdMaximumAsciiStringLength is not zero and String contains more than
743 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
744 then ASSERT().
745
746 @param String Pointer to a Null-terminated ASCII string.
747
748 @return The size of String.
749
750 **/
751 UINTN
752 EFIAPI
753 AsciiStrSize (
754 IN CONST CHAR8 *String
755 );
756
757
758 /**
759 Compares two Null-terminated ASCII strings, and returns the difference
760 between the first mismatched ASCII characters.
761
762 This function compares the Null-terminated ASCII string FirstString to the
763 Null-terminated ASCII string SecondString. If FirstString is identical to
764 SecondString, then 0 is returned. Otherwise, the value returned is the first
765 mismatched ASCII character in SecondString subtracted from the first
766 mismatched ASCII character in FirstString.
767
768 If FirstString is NULL, then ASSERT().
769 If SecondString is NULL, then ASSERT().
770 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
771 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
772 then ASSERT().
773 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
774 than PcdMaximumAsciiStringLength ASCII characters not including the
775 Null-terminator, then ASSERT().
776
777 @param FirstString Pointer to a Null-terminated ASCII string.
778 @param SecondString Pointer to a Null-terminated ASCII string.
779
780 @retval ==0 FirstString is identical to SecondString.
781 @retval !=0 FirstString is not identical to SecondString.
782
783 **/
784 INTN
785 EFIAPI
786 AsciiStrCmp (
787 IN CONST CHAR8 *FirstString,
788 IN CONST CHAR8 *SecondString
789 );
790
791
792 /**
793 Performs a case insensitive comparison of two Null-terminated ASCII strings,
794 and returns the difference between the first mismatched ASCII characters.
795
796 This function performs a case insensitive comparison of the Null-terminated
797 ASCII string FirstString to the Null-terminated ASCII string SecondString. If
798 FirstString is identical to SecondString, then 0 is returned. Otherwise, the
799 value returned is the first mismatched lower case ASCII character in
800 SecondString subtracted from the first mismatched lower case ASCII character
801 in FirstString.
802
803 If FirstString is NULL, then ASSERT().
804 If SecondString is NULL, then ASSERT().
805 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
806 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
807 then ASSERT().
808 If PcdMaximumAsciiStringLength is not zero and SecondString contains more
809 than PcdMaximumAsciiStringLength ASCII characters not including the
810 Null-terminator, then ASSERT().
811
812 @param FirstString Pointer to a Null-terminated ASCII string.
813 @param SecondString Pointer to a Null-terminated ASCII string.
814
815 @retval ==0 FirstString is identical to SecondString using case insensitive
816 comparisons.
817 @retval !=0 FirstString is not identical to SecondString using case
818 insensitive comparisons.
819
820 **/
821 INTN
822 EFIAPI
823 AsciiStriCmp (
824 IN CONST CHAR8 *FirstString,
825 IN CONST CHAR8 *SecondString
826 );
827
828
829 /**
830 Compares two Null-terminated ASCII strings with maximum lengths, and returns
831 the difference between the first mismatched ASCII characters.
832
833 This function compares the Null-terminated ASCII string FirstString to the
834 Null-terminated ASCII string SecondString. At most, Length ASCII characters
835 will be compared. If Length is 0, then 0 is returned. If FirstString is
836 identical to SecondString, then 0 is returned. Otherwise, the value returned
837 is the first mismatched ASCII character in SecondString subtracted from the
838 first mismatched ASCII character in FirstString.
839
840 If Length > 0 and FirstString is NULL, then ASSERT().
841 If Length > 0 and SecondString is NULL, then ASSERT().
842 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
843 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
844 then ASSERT().
845 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
846 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
847 then ASSERT().
848
849 @param FirstString Pointer to a Null-terminated ASCII string.
850 @param SecondString Pointer to a Null-terminated ASCII string.
851 @param Length Maximum number of ASCII characters for compare.
852
853 @retval ==0 FirstString is identical to SecondString.
854 @retval !=0 FirstString is not identical to SecondString.
855
856 **/
857 INTN
858 EFIAPI
859 AsciiStrnCmp (
860 IN CONST CHAR8 *FirstString,
861 IN CONST CHAR8 *SecondString,
862 IN UINTN Length
863 );
864
865
866 /**
867 Concatenates one Null-terminated ASCII string to another Null-terminated
868 ASCII string, and returns the concatenated ASCII string.
869
870 This function concatenates two Null-terminated ASCII strings. The contents of
871 Null-terminated ASCII string Source are concatenated to the end of Null-
872 terminated ASCII string Destination. The Null-terminated concatenated ASCII
873 String is returned.
874
875 If Destination is NULL, then ASSERT().
876 If Source is NULL, then ASSERT().
877 If PcdMaximumAsciiStringLength is not zero and Destination contains more than
878 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
879 then ASSERT().
880 If PcdMaximumAsciiStringLength is not zero and Source contains more than
881 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
882 then ASSERT().
883 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
884 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
885 ASCII characters, then ASSERT().
886
887 @param Destination Pointer to a Null-terminated ASCII string.
888 @param Source Pointer to a Null-terminated ASCII string.
889
890 @return Destination
891
892 **/
893 CHAR8 *
894 EFIAPI
895 AsciiStrCat (
896 IN OUT CHAR8 *Destination,
897 IN CONST CHAR8 *Source
898 );
899
900
901 /**
902 Concatenates up to a specified length one Null-terminated ASCII string to
903 the end of another Null-terminated ASCII string, and returns the
904 concatenated ASCII string.
905
906 This function concatenates two Null-terminated ASCII strings. The contents
907 of Null-terminated ASCII string Source are concatenated to the end of Null-
908 terminated ASCII string Destination, and Destination is returned. At most,
909 Length ASCII characters are concatenated from Source to the end of
910 Destination, and Destination is always Null-terminated. If Length is 0, then
911 Destination is returned unmodified. If Source and Destination overlap, then
912 the results are undefined.
913
914 If Length > 0 and Destination is NULL, then ASSERT().
915 If Length > 0 and Source is NULL, then ASSERT().
916 If Source and Destination overlap, then ASSERT().
917 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
918 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
919 then ASSERT().
920 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
921 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
922 then ASSERT().
923 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
924 Source results in a ASCII string with more than PcdMaximumAsciiStringLength
925 ASCII characters not including the Null-terminator, then ASSERT().
926
927 @param Destination Pointer to a Null-terminated ASCII string.
928 @param Source Pointer to a Null-terminated ASCII string.
929 @param Length Maximum number of ASCII characters to concatenate from
930 Source.
931
932 @return Destination
933
934 **/
935 CHAR8 *
936 EFIAPI
937 AsciiStrnCat (
938 IN OUT CHAR8 *Destination,
939 IN CONST CHAR8 *Source,
940 IN UINTN Length
941 );
942
943
944 /**
945 Returns the first occurrence of a Null-terminated ASCII sub-string
946 in a Null-terminated ASCII string.
947
948 This function scans the contents of the ASCII string specified by String
949 and returns the first occurrence of SearchString. If SearchString is not
950 found in String, then NULL is returned. If the length of SearchString is zero,
951 then String is returned.
952
953 If String is NULL, then ASSERT().
954 If SearchString is NULL, then ASSERT().
955
956 If PcdMaximumAsciiStringLength is not zero, and SearchString or
957 String contains more than PcdMaximumAsciiStringLength Unicode characters
958 not including the Null-terminator, then ASSERT().
959
960 @param String Pointer to a Null-terminated ASCII string.
961 @param SearchString Pointer to a Null-terminated ASCII string to search for.
962
963 @retval NULL If the SearchString does not appear in String.
964 @retval others If there is a match return the first occurrence of SearchingString.
965 If the length of SearchString is zero,return String.
966
967 **/
968 CHAR8 *
969 EFIAPI
970 AsciiStrStr (
971 IN CONST CHAR8 *String,
972 IN CONST CHAR8 *SearchString
973 );
974
975
976 /**
977 Convert a Null-terminated ASCII decimal string to a value of type
978 UINTN.
979
980 This function returns a value of type UINTN by interpreting the contents
981 of the ASCII string String as a decimal number. The format of the input
982 ASCII string String is:
983
984 [spaces] [decimal digits].
985
986 The valid decimal digit character is in the range [0-9]. The function will
987 ignore the pad space, which includes spaces or tab characters, before the digits.
988 The running zero in the beginning of [decimal digits] will be ignored. Then, the
989 function stops at the first character that is a not a valid decimal character or
990 Null-terminator, whichever on comes first.
991
992 If String has only pad spaces, then 0 is returned.
993 If String has no pad spaces or valid decimal digits, then 0 is returned.
994 If the number represented by String overflows according to the range defined by
995 UINTN, then ASSERT().
996 If String is NULL, then ASSERT().
997 If PcdMaximumAsciiStringLength is not zero, and String contains more than
998 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
999 then ASSERT().
1000
1001 @param String Pointer to a Null-terminated ASCII string.
1002
1003 @retval Value translated from String.
1004
1005 **/
1006 UINTN
1007 EFIAPI
1008 AsciiStrDecimalToUintn (
1009 IN CONST CHAR8 *String
1010 );
1011
1012
1013 /**
1014 Convert a Null-terminated ASCII decimal string to a value of type
1015 UINT64.
1016
1017 This function returns a value of type UINT64 by interpreting the contents
1018 of the ASCII string String as a decimal number. The format of the input
1019 ASCII string String is:
1020
1021 [spaces] [decimal digits].
1022
1023 The valid decimal digit character is in the range [0-9]. The function will
1024 ignore the pad space, which includes spaces or tab characters, before the digits.
1025 The running zero in the beginning of [decimal digits] will be ignored. Then, the
1026 function stops at the first character that is a not a valid decimal character or
1027 Null-terminator, whichever on comes first.
1028
1029 If String has only pad spaces, then 0 is returned.
1030 If String has no pad spaces or valid decimal digits, then 0 is returned.
1031 If the number represented by String overflows according to the range defined by
1032 UINT64, then ASSERT().
1033 If String is NULL, then ASSERT().
1034 If PcdMaximumAsciiStringLength is not zero, and String contains more than
1035 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1036 then ASSERT().
1037
1038 @param String Pointer to a Null-terminated ASCII string.
1039
1040 @retval Value translated from String.
1041
1042 **/
1043 UINT64
1044 EFIAPI
1045 AsciiStrDecimalToUint64 (
1046 IN CONST CHAR8 *String
1047 );
1048
1049
1050 /**
1051 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
1052
1053 This function returns a value of type UINTN by interpreting the contents of
1054 the ASCII string String as a hexadecimal number. The format of the input ASCII
1055 string String is:
1056
1057 [spaces][zeros][x][hexadecimal digits].
1058
1059 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1060 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1061 appears in the input string, it must be prefixed with at least one 0. The function
1062 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1063 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1064 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1065 digit. Then, the function stops at the first character that is a not a valid
1066 hexadecimal character or Null-terminator, whichever on comes first.
1067
1068 If String has only pad spaces, then 0 is returned.
1069 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1070 0 is returned.
1071
1072 If the number represented by String overflows according to the range defined by UINTN,
1073 then ASSERT().
1074 If String is NULL, then ASSERT().
1075 If PcdMaximumAsciiStringLength is not zero,
1076 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1077 the Null-terminator, then ASSERT().
1078
1079 @param String Pointer to a Null-terminated ASCII string.
1080
1081 @retval Value translated from String.
1082
1083 **/
1084 UINTN
1085 EFIAPI
1086 AsciiStrHexToUintn (
1087 IN CONST CHAR8 *String
1088 );
1089
1090
1091 /**
1092 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
1093
1094 This function returns a value of type UINT64 by interpreting the contents of
1095 the ASCII string String as a hexadecimal number. The format of the input ASCII
1096 string String is:
1097
1098 [spaces][zeros][x][hexadecimal digits].
1099
1100 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
1101 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
1102 appears in the input string, it must be prefixed with at least one 0. The function
1103 will ignore the pad space, which includes spaces or tab characters, before [zeros],
1104 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
1105 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
1106 digit. Then, the function stops at the first character that is a not a valid
1107 hexadecimal character or Null-terminator, whichever on comes first.
1108
1109 If String has only pad spaces, then 0 is returned.
1110 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
1111 0 is returned.
1112
1113 If the number represented by String overflows according to the range defined by UINT64,
1114 then ASSERT().
1115 If String is NULL, then ASSERT().
1116 If PcdMaximumAsciiStringLength is not zero,
1117 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
1118 the Null-terminator, then ASSERT().
1119
1120 @param String Pointer to a Null-terminated ASCII string.
1121
1122 @retval Value translated from String.
1123
1124 **/
1125 UINT64
1126 EFIAPI
1127 AsciiStrHexToUint64 (
1128 IN CONST CHAR8 *String
1129 );
1130
1131
1132 /**
1133 Convert one Null-terminated ASCII string to a Null-terminated
1134 Unicode string and returns the Unicode string.
1135
1136 This function converts the contents of the ASCII string Source to the Unicode
1137 string Destination, and returns Destination. The function terminates the
1138 Unicode string Destination by appending a Null-terminator character at the end.
1139 The caller is responsible to make sure Destination points to a buffer with size
1140 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
1141
1142 If Destination is NULL, then ASSERT().
1143 If Destination is not aligned on a 16-bit boundary, then ASSERT().
1144 If Source is NULL, then ASSERT().
1145 If Source and Destination overlap, then ASSERT().
1146 If PcdMaximumAsciiStringLength is not zero, and Source contains more than
1147 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
1148 then ASSERT().
1149 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
1150 PcdMaximumUnicodeStringLength ASCII characters not including the
1151 Null-terminator, then ASSERT().
1152
1153 @param Source Pointer to a Null-terminated ASCII string.
1154 @param Destination Pointer to a Null-terminated Unicode string.
1155
1156 @return Destination.
1157
1158 **/
1159 CHAR16 *
1160 EFIAPI
1161 AsciiStrToUnicodeStr (
1162 IN CONST CHAR8 *Source,
1163 OUT CHAR16 *Destination
1164 );
1165
1166
1167 /**
1168 Converts an 8-bit value to an 8-bit BCD value.
1169
1170 Converts the 8-bit value specified by Value to BCD. The BCD value is
1171 returned.
1172
1173 If Value >= 100, then ASSERT().
1174
1175 @param Value The 8-bit value to convert to BCD. Range 0..99.
1176
1177 @return The BCD value.
1178
1179 **/
1180 UINT8
1181 EFIAPI
1182 DecimalToBcd8 (
1183 IN UINT8 Value
1184 );
1185
1186
1187 /**
1188 Converts an 8-bit BCD value to an 8-bit value.
1189
1190 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
1191 value is returned.
1192
1193 If Value >= 0xA0, then ASSERT().
1194 If (Value & 0x0F) >= 0x0A, then ASSERT().
1195
1196 @param Value The 8-bit BCD value to convert to an 8-bit value.
1197
1198 @return The 8-bit value is returned.
1199
1200 **/
1201 UINT8
1202 EFIAPI
1203 BcdToDecimal8 (
1204 IN UINT8 Value
1205 );
1206
1207
1208 //
1209 // Linked List Functions and Macros
1210 //
1211
1212 /**
1213 Initializes the head node of a doubly linked list that is declared as a
1214 global variable in a module.
1215
1216 Initializes the forward and backward links of a new linked list. After
1217 initializing a linked list with this macro, the other linked list functions
1218 may be used to add and remove nodes from the linked list. This macro results
1219 in smaller executables by initializing the linked list in the data section,
1220 instead if calling the InitializeListHead() function to perform the
1221 equivalent operation.
1222
1223 @param ListHead The head note of a list to initiailize.
1224
1225 **/
1226 #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}
1227
1228
1229 /**
1230 Initializes the head node of a doubly linked list, and returns the pointer to
1231 the head node of the doubly linked list.
1232
1233 Initializes the forward and backward links of a new linked list. After
1234 initializing a linked list with this function, the other linked list
1235 functions may be used to add and remove nodes from the linked list. It is up
1236 to the caller of this function to allocate the memory for ListHead.
1237
1238 If ListHead is NULL, then ASSERT().
1239
1240 @param ListHead A pointer to the head node of a new doubly linked list.
1241
1242 @return ListHead
1243
1244 **/
1245 LIST_ENTRY *
1246 EFIAPI
1247 InitializeListHead (
1248 IN OUT LIST_ENTRY *ListHead
1249 );
1250
1251
1252 /**
1253 Adds a node to the beginning of a doubly linked list, and returns the pointer
1254 to the head node of the doubly linked list.
1255
1256 Adds the node Entry at the beginning of the doubly linked list denoted by
1257 ListHead, and returns ListHead.
1258
1259 If ListHead is NULL, then ASSERT().
1260 If Entry is NULL, then ASSERT().
1261 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1262 InitializeListHead(), then ASSERT().
1263 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1264 of nodes in ListHead, including the ListHead node, is greater than or
1265 equal to PcdMaximumLinkedListLength, then ASSERT().
1266
1267 @param ListHead A pointer to the head node of a doubly linked list.
1268 @param Entry A pointer to a node that is to be inserted at the beginning
1269 of a doubly linked list.
1270
1271 @return ListHead
1272
1273 **/
1274 LIST_ENTRY *
1275 EFIAPI
1276 InsertHeadList (
1277 IN OUT LIST_ENTRY *ListHead,
1278 IN OUT LIST_ENTRY *Entry
1279 );
1280
1281
1282 /**
1283 Adds a node to the end of a doubly linked list, and returns the pointer to
1284 the head node of the doubly linked list.
1285
1286 Adds the node Entry to the end of the doubly linked list denoted by ListHead,
1287 and returns ListHead.
1288
1289 If ListHead is NULL, then ASSERT().
1290 If Entry is NULL, then ASSERT().
1291 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1292 InitializeListHead(), then ASSERT().
1293 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
1294 of nodes in ListHead, including the ListHead node, is greater than or
1295 equal to PcdMaximumLinkedListLength, then ASSERT().
1296
1297 @param ListHead A pointer to the head node of a doubly linked list.
1298 @param Entry A pointer to a node that is to be added at the end of the
1299 doubly linked list.
1300
1301 @return ListHead
1302
1303 **/
1304 LIST_ENTRY *
1305 EFIAPI
1306 InsertTailList (
1307 IN OUT LIST_ENTRY *ListHead,
1308 IN OUT LIST_ENTRY *Entry
1309 );
1310
1311
1312 /**
1313 Retrieves the first node of a doubly linked list.
1314
1315 Returns the first node of a doubly linked list. List must have been
1316 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1317 If List is empty, then List is returned.
1318
1319 If List is NULL, then ASSERT().
1320 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1321 InitializeListHead(), then ASSERT().
1322 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1323 in List, including the List node, is greater than or equal to
1324 PcdMaximumLinkedListLength, then ASSERT().
1325
1326 @param List A pointer to the head node of a doubly linked list.
1327
1328 @return The first node of a doubly linked list.
1329 @retval NULL The list is empty.
1330
1331 **/
1332 LIST_ENTRY *
1333 EFIAPI
1334 GetFirstNode (
1335 IN CONST LIST_ENTRY *List
1336 );
1337
1338
1339 /**
1340 Retrieves the next node of a doubly linked list.
1341
1342 Returns the node of a doubly linked list that follows Node.
1343 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
1344 or InitializeListHead(). If List is empty, then List is returned.
1345
1346 If List is NULL, then ASSERT().
1347 If Node is NULL, then ASSERT().
1348 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1349 InitializeListHead(), then ASSERT().
1350 If PcdMaximumLinkedListLenth is not zero, and List contains more than
1351 PcdMaximumLinkedListLenth nodes, then ASSERT().
1352 If Node is not a node in List, then ASSERT().
1353
1354 @param List A pointer to the head node of a doubly linked list.
1355 @param Node A pointer to a node in the doubly linked list.
1356
1357 @return Pointer to the next node if one exists. Otherwise a null value which
1358 is actually List is returned.
1359
1360 **/
1361 LIST_ENTRY *
1362 EFIAPI
1363 GetNextNode (
1364 IN CONST LIST_ENTRY *List,
1365 IN CONST LIST_ENTRY *Node
1366 );
1367
1368
1369 /**
1370 Checks to see if a doubly linked list is empty or not.
1371
1372 Checks to see if the doubly linked list is empty. If the linked list contains
1373 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
1374
1375 If ListHead is NULL, then ASSERT().
1376 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1377 InitializeListHead(), then ASSERT().
1378 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1379 in List, including the List node, is greater than or equal to
1380 PcdMaximumLinkedListLength, then ASSERT().
1381
1382 @param ListHead A pointer to the head node of a doubly linked list.
1383
1384 @retval TRUE The linked list is empty.
1385 @retval FALSE The linked list is not empty.
1386
1387 **/
1388 BOOLEAN
1389 EFIAPI
1390 IsListEmpty (
1391 IN CONST LIST_ENTRY *ListHead
1392 );
1393
1394
1395 /**
1396 Determines if a node in a doubly linked list is the head node of a the same
1397 doubly linked list. This function is typically used to terminate a loop that
1398 traverses all the nodes in a doubly linked list starting with the head node.
1399
1400 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the
1401 nodes in the doubly linked list specified by List. List must have been
1402 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1403
1404 If List is NULL, then ASSERT().
1405 If Node is NULL, then ASSERT().
1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
1407 then ASSERT().
1408 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1409 in List, including the List node, is greater than or equal to
1410 PcdMaximumLinkedListLength, then ASSERT().
1411 If Node is not a node in List and Node is not equal to List, then ASSERT().
1412
1413 @param List A pointer to the head node of a doubly linked list.
1414 @param Node A pointer to a node in the doubly linked list.
1415
1416 @retval TRUE Node is one of the nodes in the doubly linked list.
1417 @retval FALSE Node is not one of the nodes in the doubly linked list.
1418
1419 **/
1420 BOOLEAN
1421 EFIAPI
1422 IsNull (
1423 IN CONST LIST_ENTRY *List,
1424 IN CONST LIST_ENTRY *Node
1425 );
1426
1427
1428 /**
1429 Determines if a node the last node in a doubly linked list.
1430
1431 Returns TRUE if Node is the last node in the doubly linked list specified by
1432 List. Otherwise, FALSE is returned. List must have been initialized with
1433 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1434
1435 If List is NULL, then ASSERT().
1436 If Node is NULL, then ASSERT().
1437 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
1438 InitializeListHead(), then ASSERT().
1439 If PcdMaximumLinkedListLenth is not zero, and the number of nodes
1440 in List, including the List node, is greater than or equal to
1441 PcdMaximumLinkedListLength, then ASSERT().
1442 If Node is not a node in List, then ASSERT().
1443
1444 @param List A pointer to the head node of a doubly linked list.
1445 @param Node A pointer to a node in the doubly linked list.
1446
1447 @retval TRUE Node is the last node in the linked list.
1448 @retval FALSE Node is not the last node in the linked list.
1449
1450 **/
1451 BOOLEAN
1452 EFIAPI
1453 IsNodeAtEnd (
1454 IN CONST LIST_ENTRY *List,
1455 IN CONST LIST_ENTRY *Node
1456 );
1457
1458
1459 /**
1460 Swaps the location of two nodes in a doubly linked list, and returns the
1461 first node after the swap.
1462
1463 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
1464 Otherwise, the location of the FirstEntry node is swapped with the location
1465 of the SecondEntry node in a doubly linked list. SecondEntry must be in the
1466 same double linked list as FirstEntry and that double linked list must have
1467 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
1468 SecondEntry is returned after the nodes are swapped.
1469
1470 If FirstEntry is NULL, then ASSERT().
1471 If SecondEntry is NULL, then ASSERT().
1472 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
1473 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1474 linked list containing the FirstEntry and SecondEntry nodes, including
1475 the FirstEntry and SecondEntry nodes, is greater than or equal to
1476 PcdMaximumLinkedListLength, then ASSERT().
1477
1478 @param FirstEntry A pointer to a node in a linked list.
1479 @param SecondEntry A pointer to another node in the same linked list.
1480
1481 @return SecondEntry.
1482
1483 **/
1484 LIST_ENTRY *
1485 EFIAPI
1486 SwapListEntries (
1487 IN OUT LIST_ENTRY *FirstEntry,
1488 IN OUT LIST_ENTRY *SecondEntry
1489 );
1490
1491
1492 /**
1493 Removes a node from a doubly linked list, and returns the node that follows
1494 the removed node.
1495
1496 Removes the node Entry from a doubly linked list. It is up to the caller of
1497 this function to release the memory used by this node if that is required. On
1498 exit, the node following Entry in the doubly linked list is returned. If
1499 Entry is the only node in the linked list, then the head node of the linked
1500 list is returned.
1501
1502 If Entry is NULL, then ASSERT().
1503 If Entry is the head node of an empty list, then ASSERT().
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
1505 linked list containing Entry, including the Entry node, is greater than
1506 or equal to PcdMaximumLinkedListLength, then ASSERT().
1507
1508 @param Entry A pointer to a node in a linked list.
1509
1510 @return Entry.
1511
1512 **/
1513 LIST_ENTRY *
1514 EFIAPI
1515 RemoveEntryList (
1516 IN CONST LIST_ENTRY *Entry
1517 );
1518
1519 //
1520 // Math Services
1521 //
1522
1523 /**
1524 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
1525 with zeros. The shifted value is returned.
1526
1527 This function shifts the 64-bit value Operand to the left by Count bits. The
1528 low Count bits are set to zero. The shifted value is returned.
1529
1530 If Count is greater than 63, then ASSERT().
1531
1532 @param Operand The 64-bit operand to shift left.
1533 @param Count The number of bits to shift left.
1534
1535 @return Operand << Count.
1536
1537 **/
1538 UINT64
1539 EFIAPI
1540 LShiftU64 (
1541 IN UINT64 Operand,
1542 IN UINTN Count
1543 );
1544
1545
1546 /**
1547 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
1548 filled with zeros. The shifted value is returned.
1549
1550 This function shifts the 64-bit value Operand to the right by Count bits. The
1551 high Count bits are set to zero. The shifted value is returned.
1552
1553 If Count is greater than 63, then ASSERT().
1554
1555 @param Operand The 64-bit operand to shift right.
1556 @param Count The number of bits to shift right.
1557
1558 @return Operand >> Count
1559
1560 **/
1561 UINT64
1562 EFIAPI
1563 RShiftU64 (
1564 IN UINT64 Operand,
1565 IN UINTN Count
1566 );
1567
1568
1569 /**
1570 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
1571 with original integer's bit 63. The shifted value is returned.
1572
1573 This function shifts the 64-bit value Operand to the right by Count bits. The
1574 high Count bits are set to bit 63 of Operand. The shifted value is returned.
1575
1576 If Count is greater than 63, then ASSERT().
1577
1578 @param Operand The 64-bit operand to shift right.
1579 @param Count The number of bits to shift right.
1580
1581 @return Operand >> Count
1582
1583 **/
1584 UINT64
1585 EFIAPI
1586 ARShiftU64 (
1587 IN UINT64 Operand,
1588 IN UINTN Count
1589 );
1590
1591
1592 /**
1593 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
1594 with the high bits that were rotated.
1595
1596 This function rotates the 32-bit value Operand to the left by Count bits. The
1597 low Count bits are fill with the high Count bits of Operand. The rotated
1598 value is returned.
1599
1600 If Count is greater than 31, then ASSERT().
1601
1602 @param Operand The 32-bit operand to rotate left.
1603 @param Count The number of bits to rotate left.
1604
1605 @return Operand << Count
1606
1607 **/
1608 UINT32
1609 EFIAPI
1610 LRotU32 (
1611 IN UINT32 Operand,
1612 IN UINTN Count
1613 );
1614
1615
1616 /**
1617 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
1618 with the low bits that were rotated.
1619
1620 This function rotates the 32-bit value Operand to the right by Count bits.
1621 The high Count bits are fill with the low Count bits of Operand. The rotated
1622 value is returned.
1623
1624 If Count is greater than 31, then ASSERT().
1625
1626 @param Operand The 32-bit operand to rotate right.
1627 @param Count The number of bits to rotate right.
1628
1629 @return Operand >>> Count
1630
1631 **/
1632 UINT32
1633 EFIAPI
1634 RRotU32 (
1635 IN UINT32 Operand,
1636 IN UINTN Count
1637 );
1638
1639
1640 /**
1641 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
1642 with the high bits that were rotated.
1643
1644 This function rotates the 64-bit value Operand to the left by Count bits. The
1645 low Count bits are fill with the high Count bits of Operand. The rotated
1646 value is returned.
1647
1648 If Count is greater than 63, then ASSERT().
1649
1650 @param Operand The 64-bit operand to rotate left.
1651 @param Count The number of bits to rotate left.
1652
1653 @return Operand << Count
1654
1655 **/
1656 UINT64
1657 EFIAPI
1658 LRotU64 (
1659 IN UINT64 Operand,
1660 IN UINTN Count
1661 );
1662
1663
1664 /**
1665 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
1666 with the high low bits that were rotated.
1667
1668 This function rotates the 64-bit value Operand to the right by Count bits.
1669 The high Count bits are fill with the low Count bits of Operand. The rotated
1670 value is returned.
1671
1672 If Count is greater than 63, then ASSERT().
1673
1674 @param Operand The 64-bit operand to rotate right.
1675 @param Count The number of bits to rotate right.
1676
1677 @return Operand >> Count
1678
1679 **/
1680 UINT64
1681 EFIAPI
1682 RRotU64 (
1683 IN UINT64 Operand,
1684 IN UINTN Count
1685 );
1686
1687
1688 /**
1689 Returns the bit position of the lowest bit set in a 32-bit value.
1690
1691 This function computes the bit position of the lowest bit set in the 32-bit
1692 value specified by Operand. If Operand is zero, then -1 is returned.
1693 Otherwise, a value between 0 and 31 is returned.
1694
1695 @param Operand The 32-bit operand to evaluate.
1696
1697 @retval 0..31 The lowest bit set in Operand was found.
1698 @retval -1 Operand is zero.
1699
1700 **/
1701 INTN
1702 EFIAPI
1703 LowBitSet32 (
1704 IN UINT32 Operand
1705 );
1706
1707
1708 /**
1709 Returns the bit position of the lowest bit set in a 64-bit value.
1710
1711 This function computes the bit position of the lowest bit set in the 64-bit
1712 value specified by Operand. If Operand is zero, then -1 is returned.
1713 Otherwise, a value between 0 and 63 is returned.
1714
1715 @param Operand The 64-bit operand to evaluate.
1716
1717 @retval 0..63 The lowest bit set in Operand was found.
1718 @retval -1 Operand is zero.
1719
1720
1721 **/
1722 INTN
1723 EFIAPI
1724 LowBitSet64 (
1725 IN UINT64 Operand
1726 );
1727
1728
1729 /**
1730 Returns the bit position of the highest bit set in a 32-bit value. Equivalent
1731 to log2(x).
1732
1733 This function computes the bit position of the highest bit set in the 32-bit
1734 value specified by Operand. If Operand is zero, then -1 is returned.
1735 Otherwise, a value between 0 and 31 is returned.
1736
1737 @param Operand The 32-bit operand to evaluate.
1738
1739 @retval 0..31 Position of the highest bit set in Operand if found.
1740 @retval -1 Operand is zero.
1741
1742 **/
1743 INTN
1744 EFIAPI
1745 HighBitSet32 (
1746 IN UINT32 Operand
1747 );
1748
1749
1750 /**
1751 Returns the bit position of the highest bit set in a 64-bit value. Equivalent
1752 to log2(x).
1753
1754 This function computes the bit position of the highest bit set in the 64-bit
1755 value specified by Operand. If Operand is zero, then -1 is returned.
1756 Otherwise, a value between 0 and 63 is returned.
1757
1758 @param Operand The 64-bit operand to evaluate.
1759
1760 @retval 0..63 Position of the highest bit set in Operand if found.
1761 @retval -1 Operand is zero.
1762
1763 **/
1764 INTN
1765 EFIAPI
1766 HighBitSet64 (
1767 IN UINT64 Operand
1768 );
1769
1770
1771 /**
1772 Returns the value of the highest bit set in a 32-bit value. Equivalent to
1773 1 << log2(x).
1774
1775 This function computes the value of the highest bit set in the 32-bit value
1776 specified by Operand. If Operand is zero, then zero is returned.
1777
1778 @param Operand The 32-bit operand to evaluate.
1779
1780 @return 1 << HighBitSet32(Operand)
1781 @retval 0 Operand is zero.
1782
1783 **/
1784 UINT32
1785 EFIAPI
1786 GetPowerOfTwo32 (
1787 IN UINT32 Operand
1788 );
1789
1790
1791 /**
1792 Returns the value of the highest bit set in a 64-bit value. Equivalent to
1793 1 << log2(x).
1794
1795 This function computes the value of the highest bit set in the 64-bit value
1796 specified by Operand. If Operand is zero, then zero is returned.
1797
1798 @param Operand The 64-bit operand to evaluate.
1799
1800 @return 1 << HighBitSet64(Operand)
1801 @retval 0 Operand is zero.
1802
1803 **/
1804 UINT64
1805 EFIAPI
1806 GetPowerOfTwo64 (
1807 IN UINT64 Operand
1808 );
1809
1810
1811 /**
1812 Switches the endianess of a 16-bit integer.
1813
1814 This function swaps the bytes in a 16-bit unsigned value to switch the value
1815 from little endian to big endian or vice versa. The byte swapped value is
1816 returned.
1817
1818 @param Value Operand A 16-bit unsigned value.
1819
1820 @return The byte swapped Operand.
1821
1822 **/
1823 UINT16
1824 EFIAPI
1825 SwapBytes16 (
1826 IN UINT16 Value
1827 );
1828
1829
1830 /**
1831 Switches the endianess of a 32-bit integer.
1832
1833 This function swaps the bytes in a 32-bit unsigned value to switch the value
1834 from little endian to big endian or vice versa. The byte swapped value is
1835 returned.
1836
1837 @param Value Operand A 32-bit unsigned value.
1838
1839 @return The byte swapped Operand.
1840
1841 **/
1842 UINT32
1843 EFIAPI
1844 SwapBytes32 (
1845 IN UINT32 Value
1846 );
1847
1848
1849 /**
1850 Switches the endianess of a 64-bit integer.
1851
1852 This function swaps the bytes in a 64-bit unsigned value to switch the value
1853 from little endian to big endian or vice versa. The byte swapped value is
1854 returned.
1855
1856 @param Value Operand A 64-bit unsigned value.
1857
1858 @return The byte swapped Operand.
1859
1860 **/
1861 UINT64
1862 EFIAPI
1863 SwapBytes64 (
1864 IN UINT64 Value
1865 );
1866
1867
1868 /**
1869 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
1870 generates a 64-bit unsigned result.
1871
1872 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
1873 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1874 bit unsigned result is returned.
1875
1876 @param Multiplicand A 64-bit unsigned value.
1877 @param Multiplier A 32-bit unsigned value.
1878
1879 @return Multiplicand * Multiplier
1880
1881 **/
1882 UINT64
1883 EFIAPI
1884 MultU64x32 (
1885 IN UINT64 Multiplicand,
1886 IN UINT32 Multiplier
1887 );
1888
1889
1890 /**
1891 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
1892 generates a 64-bit unsigned result.
1893
1894 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
1895 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
1896 bit unsigned result is returned.
1897
1898 If the result overflows, then ASSERT().
1899
1900 @param Multiplicand A 64-bit unsigned value.
1901 @param Multiplier A 64-bit unsigned value.
1902
1903 @return Multiplicand * Multiplier
1904
1905 **/
1906 UINT64
1907 EFIAPI
1908 MultU64x64 (
1909 IN UINT64 Multiplicand,
1910 IN UINT64 Multiplier
1911 );
1912
1913
1914 /**
1915 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
1916 64-bit signed result.
1917
1918 This function multiples the 64-bit signed value Multiplicand by the 64-bit
1919 signed value Multiplier and generates a 64-bit signed result. This 64-bit
1920 signed result is returned.
1921
1922 @param Multiplicand A 64-bit signed value.
1923 @param Multiplier A 64-bit signed value.
1924
1925 @return Multiplicand * Multiplier
1926
1927 **/
1928 INT64
1929 EFIAPI
1930 MultS64x64 (
1931 IN INT64 Multiplicand,
1932 IN INT64 Multiplier
1933 );
1934
1935
1936 /**
1937 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1938 a 64-bit unsigned result.
1939
1940 This function divides the 64-bit unsigned value Dividend by the 32-bit
1941 unsigned value Divisor and generates a 64-bit unsigned quotient. This
1942 function returns the 64-bit unsigned quotient.
1943
1944 If Divisor is 0, then ASSERT().
1945
1946 @param Dividend A 64-bit unsigned value.
1947 @param Divisor A 32-bit unsigned value.
1948
1949 @return Dividend / Divisor
1950
1951 **/
1952 UINT64
1953 EFIAPI
1954 DivU64x32 (
1955 IN UINT64 Dividend,
1956 IN UINT32 Divisor
1957 );
1958
1959
1960 /**
1961 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1962 a 32-bit unsigned remainder.
1963
1964 This function divides the 64-bit unsigned value Dividend by the 32-bit
1965 unsigned value Divisor and generates a 32-bit remainder. This function
1966 returns the 32-bit unsigned remainder.
1967
1968 If Divisor is 0, then ASSERT().
1969
1970 @param Dividend A 64-bit unsigned value.
1971 @param Divisor A 32-bit unsigned value.
1972
1973 @return Dividend % Divisor
1974
1975 **/
1976 UINT32
1977 EFIAPI
1978 ModU64x32 (
1979 IN UINT64 Dividend,
1980 IN UINT32 Divisor
1981 );
1982
1983
1984 /**
1985 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
1986 a 64-bit unsigned result and an optional 32-bit unsigned remainder.
1987
1988 This function divides the 64-bit unsigned value Dividend by the 32-bit
1989 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
1990 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
1991 This function returns the 64-bit unsigned quotient.
1992
1993 If Divisor is 0, then ASSERT().
1994
1995 @param Dividend A 64-bit unsigned value.
1996 @param Divisor A 32-bit unsigned value.
1997 @param Remainder A pointer to a 32-bit unsigned value. This parameter is
1998 optional and may be NULL.
1999
2000 @return Dividend / Divisor
2001
2002 **/
2003 UINT64
2004 EFIAPI
2005 DivU64x32Remainder (
2006 IN UINT64 Dividend,
2007 IN UINT32 Divisor,
2008 OUT UINT32 *Remainder OPTIONAL
2009 );
2010
2011
2012 /**
2013 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
2014 a 64-bit unsigned result and an optional 64-bit unsigned remainder.
2015
2016 This function divides the 64-bit unsigned value Dividend by the 64-bit
2017 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
2018 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
2019 This function returns the 64-bit unsigned quotient.
2020
2021 If Divisor is 0, then ASSERT().
2022
2023 @param Dividend A 64-bit unsigned value.
2024 @param Divisor A 64-bit unsigned value.
2025 @param Remainder A pointer to a 64-bit unsigned value. This parameter is
2026 optional and may be NULL.
2027
2028 @return Dividend / Divisor
2029
2030 **/
2031 UINT64
2032 EFIAPI
2033 DivU64x64Remainder (
2034 IN UINT64 Dividend,
2035 IN UINT64 Divisor,
2036 OUT UINT64 *Remainder OPTIONAL
2037 );
2038
2039
2040 /**
2041 Divides a 64-bit signed integer by a 64-bit signed integer and generates a
2042 64-bit signed result and a optional 64-bit signed remainder.
2043
2044 This function divides the 64-bit signed value Dividend by the 64-bit signed
2045 value Divisor and generates a 64-bit signed quotient. If Remainder is not
2046 NULL, then the 64-bit signed remainder is returned in Remainder. This
2047 function returns the 64-bit signed quotient.
2048
2049 It is the caller's responsibility to not call this function with a Divisor of 0.
2050 If Divisor is 0, then the quotient and remainder should be assumed to be
2051 the largest negative integer.
2052
2053 If Divisor is 0, then ASSERT().
2054
2055 @param Dividend A 64-bit signed value.
2056 @param Divisor A 64-bit signed value.
2057 @param Remainder A pointer to a 64-bit signed value. This parameter is
2058 optional and may be NULL.
2059
2060 @return Dividend / Divisor
2061
2062 **/
2063 INT64
2064 EFIAPI
2065 DivS64x64Remainder (
2066 IN INT64 Dividend,
2067 IN INT64 Divisor,
2068 OUT INT64 *Remainder OPTIONAL
2069 );
2070
2071
2072 /**
2073 Reads a 16-bit value from memory that may be unaligned.
2074
2075 This function returns the 16-bit value pointed to by Buffer. The function
2076 guarantees that the read operation does not produce an alignment fault.
2077
2078 If the Buffer is NULL, then ASSERT().
2079
2080 @param Buffer Pointer to a 16-bit value that may be unaligned.
2081
2082 @return The 16-bit value read from Buffer.
2083
2084 **/
2085 UINT16
2086 EFIAPI
2087 ReadUnaligned16 (
2088 IN CONST UINT16 *Buffer
2089 );
2090
2091
2092 /**
2093 Writes a 16-bit value to memory that may be unaligned.
2094
2095 This function writes the 16-bit value specified by Value to Buffer. Value is
2096 returned. The function guarantees that the write operation does not produce
2097 an alignment fault.
2098
2099 If the Buffer is NULL, then ASSERT().
2100
2101 @param Buffer Pointer to a 16-bit value that may be unaligned.
2102 @param Value 16-bit value to write to Buffer.
2103
2104 @return The 16-bit value to write to Buffer.
2105
2106 **/
2107 UINT16
2108 EFIAPI
2109 WriteUnaligned16 (
2110 OUT UINT16 *Buffer,
2111 IN UINT16 Value
2112 );
2113
2114
2115 /**
2116 Reads a 24-bit value from memory that may be unaligned.
2117
2118 This function returns the 24-bit value pointed to by Buffer. The function
2119 guarantees that the read operation does not produce an alignment fault.
2120
2121 If the Buffer is NULL, then ASSERT().
2122
2123 @param Buffer Pointer to a 24-bit value that may be unaligned.
2124
2125 @return The 24-bit value read from Buffer.
2126
2127 **/
2128 UINT32
2129 EFIAPI
2130 ReadUnaligned24 (
2131 IN CONST UINT32 *Buffer
2132 );
2133
2134
2135 /**
2136 Writes a 24-bit value to memory that may be unaligned.
2137
2138 This function writes the 24-bit value specified by Value to Buffer. Value is
2139 returned. The function guarantees that the write operation does not produce
2140 an alignment fault.
2141
2142 If the Buffer is NULL, then ASSERT().
2143
2144 @param Buffer Pointer to a 24-bit value that may be unaligned.
2145 @param Value 24-bit value to write to Buffer.
2146
2147 @return The 24-bit value to write to Buffer.
2148
2149 **/
2150 UINT32
2151 EFIAPI
2152 WriteUnaligned24 (
2153 OUT UINT32 *Buffer,
2154 IN UINT32 Value
2155 );
2156
2157
2158 /**
2159 Reads a 32-bit value from memory that may be unaligned.
2160
2161 This function returns the 32-bit value pointed to by Buffer. The function
2162 guarantees that the read operation does not produce an alignment fault.
2163
2164 If the Buffer is NULL, then ASSERT().
2165
2166 @param Buffer Pointer to a 32-bit value that may be unaligned.
2167
2168 @return The 32-bit value read from Buffer.
2169
2170 **/
2171 UINT32
2172 EFIAPI
2173 ReadUnaligned32 (
2174 IN CONST UINT32 *Buffer
2175 );
2176
2177
2178 /**
2179 Writes a 32-bit value to memory that may be unaligned.
2180
2181 This function writes the 32-bit value specified by Value to Buffer. Value is
2182 returned. The function guarantees that the write operation does not produce
2183 an alignment fault.
2184
2185 If the Buffer is NULL, then ASSERT().
2186
2187 @param Buffer Pointer to a 32-bit value that may be unaligned.
2188 @param Value 32-bit value to write to Buffer.
2189
2190 @return The 32-bit value to write to Buffer.
2191
2192 **/
2193 UINT32
2194 EFIAPI
2195 WriteUnaligned32 (
2196 OUT UINT32 *Buffer,
2197 IN UINT32 Value
2198 );
2199
2200
2201 /**
2202 Reads a 64-bit value from memory that may be unaligned.
2203
2204 This function returns the 64-bit value pointed to by Buffer. The function
2205 guarantees that the read operation does not produce an alignment fault.
2206
2207 If the Buffer is NULL, then ASSERT().
2208
2209 @param Buffer Pointer to a 64-bit value that may be unaligned.
2210
2211 @return The 64-bit value read from Buffer.
2212
2213 **/
2214 UINT64
2215 EFIAPI
2216 ReadUnaligned64 (
2217 IN CONST UINT64 *Buffer
2218 );
2219
2220
2221 /**
2222 Writes a 64-bit value to memory that may be unaligned.
2223
2224 This function writes the 64-bit value specified by Value to Buffer. Value is
2225 returned. The function guarantees that the write operation does not produce
2226 an alignment fault.
2227
2228 If the Buffer is NULL, then ASSERT().
2229
2230 @param Buffer Pointer to a 64-bit value that may be unaligned.
2231 @param Value 64-bit value to write to Buffer.
2232
2233 @return The 64-bit value to write to Buffer.
2234
2235 **/
2236 UINT64
2237 EFIAPI
2238 WriteUnaligned64 (
2239 OUT UINT64 *Buffer,
2240 IN UINT64 Value
2241 );
2242
2243
2244 //
2245 // Bit Field Functions
2246 //
2247
2248 /**
2249 Returns a bit field from an 8-bit value.
2250
2251 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2252
2253 If 8-bit operations are not supported, then ASSERT().
2254 If StartBit is greater than 7, then ASSERT().
2255 If EndBit is greater than 7, then ASSERT().
2256 If EndBit is less than StartBit, then ASSERT().
2257
2258 @param Operand Operand on which to perform the bitfield operation.
2259 @param StartBit The ordinal of the least significant bit in the bit field.
2260 Range 0..7.
2261 @param EndBit The ordinal of the most significant bit in the bit field.
2262 Range 0..7.
2263
2264 @return The bit field read.
2265
2266 **/
2267 UINT8
2268 EFIAPI
2269 BitFieldRead8 (
2270 IN UINT8 Operand,
2271 IN UINTN StartBit,
2272 IN UINTN EndBit
2273 );
2274
2275
2276 /**
2277 Writes a bit field to an 8-bit value, and returns the result.
2278
2279 Writes Value to the bit field specified by the StartBit and the EndBit in
2280 Operand. All other bits in Operand are preserved. The new 8-bit value is
2281 returned.
2282
2283 If 8-bit operations are not supported, then ASSERT().
2284 If StartBit is greater than 7, then ASSERT().
2285 If EndBit is greater than 7, then ASSERT().
2286 If EndBit is less than StartBit, then ASSERT().
2287
2288 @param Operand Operand on which to perform the bitfield operation.
2289 @param StartBit The ordinal of the least significant bit in the bit field.
2290 Range 0..7.
2291 @param EndBit The ordinal of the most significant bit in the bit field.
2292 Range 0..7.
2293 @param Value New value of the bit field.
2294
2295 @return The new 8-bit value.
2296
2297 **/
2298 UINT8
2299 EFIAPI
2300 BitFieldWrite8 (
2301 IN UINT8 Operand,
2302 IN UINTN StartBit,
2303 IN UINTN EndBit,
2304 IN UINT8 Value
2305 );
2306
2307
2308 /**
2309 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
2310 result.
2311
2312 Performs a bitwise OR between the bit field specified by StartBit
2313 and EndBit in Operand and the value specified by OrData. All other bits in
2314 Operand are preserved. The new 8-bit value is returned.
2315
2316 If 8-bit operations are not supported, then ASSERT().
2317 If StartBit is greater than 7, then ASSERT().
2318 If EndBit is greater than 7, then ASSERT().
2319 If EndBit is less than StartBit, then ASSERT().
2320
2321 @param Operand Operand on which to perform the bitfield operation.
2322 @param StartBit The ordinal of the least significant bit in the bit field.
2323 Range 0..7.
2324 @param EndBit The ordinal of the most significant bit in the bit field.
2325 Range 0..7.
2326 @param OrData The value to OR with the read value from the value
2327
2328 @return The new 8-bit value.
2329
2330 **/
2331 UINT8
2332 EFIAPI
2333 BitFieldOr8 (
2334 IN UINT8 Operand,
2335 IN UINTN StartBit,
2336 IN UINTN EndBit,
2337 IN UINT8 OrData
2338 );
2339
2340
2341 /**
2342 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
2343 the result.
2344
2345 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2346 in Operand and the value specified by AndData. All other bits in Operand are
2347 preserved. The new 8-bit value is returned.
2348
2349 If 8-bit operations are not supported, then ASSERT().
2350 If StartBit is greater than 7, then ASSERT().
2351 If EndBit is greater than 7, then ASSERT().
2352 If EndBit is less than StartBit, then ASSERT().
2353
2354 @param Operand Operand on which to perform the bitfield operation.
2355 @param StartBit The ordinal of the least significant bit in the bit field.
2356 Range 0..7.
2357 @param EndBit The ordinal of the most significant bit in the bit field.
2358 Range 0..7.
2359 @param AndData The value to AND with the read value from the value.
2360
2361 @return The new 8-bit value.
2362
2363 **/
2364 UINT8
2365 EFIAPI
2366 BitFieldAnd8 (
2367 IN UINT8 Operand,
2368 IN UINTN StartBit,
2369 IN UINTN EndBit,
2370 IN UINT8 AndData
2371 );
2372
2373
2374 /**
2375 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
2376 bitwise OR, and returns the result.
2377
2378 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2379 in Operand and the value specified by AndData, followed by a bitwise
2380 OR with value specified by OrData. All other bits in Operand are
2381 preserved. The new 8-bit value is returned.
2382
2383 If 8-bit operations are not supported, then ASSERT().
2384 If StartBit is greater than 7, then ASSERT().
2385 If EndBit is greater than 7, then ASSERT().
2386 If EndBit is less than StartBit, then ASSERT().
2387
2388 @param Operand Operand on which to perform the bitfield operation.
2389 @param StartBit The ordinal of the least significant bit in the bit field.
2390 Range 0..7.
2391 @param EndBit The ordinal of the most significant bit in the bit field.
2392 Range 0..7.
2393 @param AndData The value to AND with the read value from the value.
2394 @param OrData The value to OR with the result of the AND operation.
2395
2396 @return The new 8-bit value.
2397
2398 **/
2399 UINT8
2400 EFIAPI
2401 BitFieldAndThenOr8 (
2402 IN UINT8 Operand,
2403 IN UINTN StartBit,
2404 IN UINTN EndBit,
2405 IN UINT8 AndData,
2406 IN UINT8 OrData
2407 );
2408
2409
2410 /**
2411 Returns a bit field from a 16-bit value.
2412
2413 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2414
2415 If 16-bit operations are not supported, then ASSERT().
2416 If StartBit is greater than 15, then ASSERT().
2417 If EndBit is greater than 15, then ASSERT().
2418 If EndBit is less than StartBit, then ASSERT().
2419
2420 @param Operand Operand on which to perform the bitfield operation.
2421 @param StartBit The ordinal of the least significant bit in the bit field.
2422 Range 0..15.
2423 @param EndBit The ordinal of the most significant bit in the bit field.
2424 Range 0..15.
2425
2426 @return The bit field read.
2427
2428 **/
2429 UINT16
2430 EFIAPI
2431 BitFieldRead16 (
2432 IN UINT16 Operand,
2433 IN UINTN StartBit,
2434 IN UINTN EndBit
2435 );
2436
2437
2438 /**
2439 Writes a bit field to a 16-bit value, and returns the result.
2440
2441 Writes Value to the bit field specified by the StartBit and the EndBit in
2442 Operand. All other bits in Operand are preserved. The new 16-bit value is
2443 returned.
2444
2445 If 16-bit operations are not supported, then ASSERT().
2446 If StartBit is greater than 15, then ASSERT().
2447 If EndBit is greater than 15, then ASSERT().
2448 If EndBit is less than StartBit, then ASSERT().
2449
2450 @param Operand Operand on which to perform the bitfield operation.
2451 @param StartBit The ordinal of the least significant bit in the bit field.
2452 Range 0..15.
2453 @param EndBit The ordinal of the most significant bit in the bit field.
2454 Range 0..15.
2455 @param Value New value of the bit field.
2456
2457 @return The new 16-bit value.
2458
2459 **/
2460 UINT16
2461 EFIAPI
2462 BitFieldWrite16 (
2463 IN UINT16 Operand,
2464 IN UINTN StartBit,
2465 IN UINTN EndBit,
2466 IN UINT16 Value
2467 );
2468
2469
2470 /**
2471 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
2472 result.
2473
2474 Performs a bitwise OR between the bit field specified by StartBit
2475 and EndBit in Operand and the value specified by OrData. All other bits in
2476 Operand are preserved. The new 16-bit value is returned.
2477
2478 If 16-bit operations are not supported, then ASSERT().
2479 If StartBit is greater than 15, then ASSERT().
2480 If EndBit is greater than 15, then ASSERT().
2481 If EndBit is less than StartBit, then ASSERT().
2482
2483 @param Operand Operand on which to perform the bitfield operation.
2484 @param StartBit The ordinal of the least significant bit in the bit field.
2485 Range 0..15.
2486 @param EndBit The ordinal of the most significant bit in the bit field.
2487 Range 0..15.
2488 @param OrData The value to OR with the read value from the value
2489
2490 @return The new 16-bit value.
2491
2492 **/
2493 UINT16
2494 EFIAPI
2495 BitFieldOr16 (
2496 IN UINT16 Operand,
2497 IN UINTN StartBit,
2498 IN UINTN EndBit,
2499 IN UINT16 OrData
2500 );
2501
2502
2503 /**
2504 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
2505 the result.
2506
2507 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2508 in Operand and the value specified by AndData. All other bits in Operand are
2509 preserved. The new 16-bit value is returned.
2510
2511 If 16-bit operations are not supported, then ASSERT().
2512 If StartBit is greater than 15, then ASSERT().
2513 If EndBit is greater than 15, then ASSERT().
2514 If EndBit is less than StartBit, then ASSERT().
2515
2516 @param Operand Operand on which to perform the bitfield operation.
2517 @param StartBit The ordinal of the least significant bit in the bit field.
2518 Range 0..15.
2519 @param EndBit The ordinal of the most significant bit in the bit field.
2520 Range 0..15.
2521 @param AndData The value to AND with the read value from the value
2522
2523 @return The new 16-bit value.
2524
2525 **/
2526 UINT16
2527 EFIAPI
2528 BitFieldAnd16 (
2529 IN UINT16 Operand,
2530 IN UINTN StartBit,
2531 IN UINTN EndBit,
2532 IN UINT16 AndData
2533 );
2534
2535
2536 /**
2537 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
2538 bitwise OR, and returns the result.
2539
2540 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2541 in Operand and the value specified by AndData, followed by a bitwise
2542 OR with value specified by OrData. All other bits in Operand are
2543 preserved. The new 16-bit value is returned.
2544
2545 If 16-bit operations are not supported, then ASSERT().
2546 If StartBit is greater than 15, then ASSERT().
2547 If EndBit is greater than 15, then ASSERT().
2548 If EndBit is less than StartBit, then ASSERT().
2549
2550 @param Operand Operand on which to perform the bitfield operation.
2551 @param StartBit The ordinal of the least significant bit in the bit field.
2552 Range 0..15.
2553 @param EndBit The ordinal of the most significant bit in the bit field.
2554 Range 0..15.
2555 @param AndData The value to AND with the read value from the value.
2556 @param OrData The value to OR with the result of the AND operation.
2557
2558 @return The new 16-bit value.
2559
2560 **/
2561 UINT16
2562 EFIAPI
2563 BitFieldAndThenOr16 (
2564 IN UINT16 Operand,
2565 IN UINTN StartBit,
2566 IN UINTN EndBit,
2567 IN UINT16 AndData,
2568 IN UINT16 OrData
2569 );
2570
2571
2572 /**
2573 Returns a bit field from a 32-bit value.
2574
2575 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2576
2577 If 32-bit operations are not supported, then ASSERT().
2578 If StartBit is greater than 31, then ASSERT().
2579 If EndBit is greater than 31, then ASSERT().
2580 If EndBit is less than StartBit, then ASSERT().
2581
2582 @param Operand Operand on which to perform the bitfield operation.
2583 @param StartBit The ordinal of the least significant bit in the bit field.
2584 Range 0..31.
2585 @param EndBit The ordinal of the most significant bit in the bit field.
2586 Range 0..31.
2587
2588 @return The bit field read.
2589
2590 **/
2591 UINT32
2592 EFIAPI
2593 BitFieldRead32 (
2594 IN UINT32 Operand,
2595 IN UINTN StartBit,
2596 IN UINTN EndBit
2597 );
2598
2599
2600 /**
2601 Writes a bit field to a 32-bit value, and returns the result.
2602
2603 Writes Value to the bit field specified by the StartBit and the EndBit in
2604 Operand. All other bits in Operand are preserved. The new 32-bit value is
2605 returned.
2606
2607 If 32-bit operations are not supported, then ASSERT().
2608 If StartBit is greater than 31, then ASSERT().
2609 If EndBit is greater than 31, then ASSERT().
2610 If EndBit is less than StartBit, then ASSERT().
2611
2612 @param Operand Operand on which to perform the bitfield operation.
2613 @param StartBit The ordinal of the least significant bit in the bit field.
2614 Range 0..31.
2615 @param EndBit The ordinal of the most significant bit in the bit field.
2616 Range 0..31.
2617 @param Value New value of the bit field.
2618
2619 @return The new 32-bit value.
2620
2621 **/
2622 UINT32
2623 EFIAPI
2624 BitFieldWrite32 (
2625 IN UINT32 Operand,
2626 IN UINTN StartBit,
2627 IN UINTN EndBit,
2628 IN UINT32 Value
2629 );
2630
2631
2632 /**
2633 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
2634 result.
2635
2636 Performs a bitwise OR between the bit field specified by StartBit
2637 and EndBit in Operand and the value specified by OrData. All other bits in
2638 Operand are preserved. The new 32-bit value is returned.
2639
2640 If 32-bit operations are not supported, then ASSERT().
2641 If StartBit is greater than 31, then ASSERT().
2642 If EndBit is greater than 31, then ASSERT().
2643 If EndBit is less than StartBit, then ASSERT().
2644
2645 @param Operand Operand on which to perform the bitfield operation.
2646 @param StartBit The ordinal of the least significant bit in the bit field.
2647 Range 0..31.
2648 @param EndBit The ordinal of the most significant bit in the bit field.
2649 Range 0..31.
2650 @param OrData The value to OR with the read value from the value
2651
2652 @return The new 32-bit value.
2653
2654 **/
2655 UINT32
2656 EFIAPI
2657 BitFieldOr32 (
2658 IN UINT32 Operand,
2659 IN UINTN StartBit,
2660 IN UINTN EndBit,
2661 IN UINT32 OrData
2662 );
2663
2664
2665 /**
2666 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
2667 the result.
2668
2669 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2670 in Operand and the value specified by AndData. All other bits in Operand are
2671 preserved. The new 32-bit value is returned.
2672
2673 If 32-bit operations are not supported, then ASSERT().
2674 If StartBit is greater than 31, then ASSERT().
2675 If EndBit is greater than 31, then ASSERT().
2676 If EndBit is less than StartBit, then ASSERT().
2677
2678 @param Operand Operand on which to perform the bitfield operation.
2679 @param StartBit The ordinal of the least significant bit in the bit field.
2680 Range 0..31.
2681 @param EndBit The ordinal of the most significant bit in the bit field.
2682 Range 0..31.
2683 @param AndData The value to AND with the read value from the value
2684
2685 @return The new 32-bit value.
2686
2687 **/
2688 UINT32
2689 EFIAPI
2690 BitFieldAnd32 (
2691 IN UINT32 Operand,
2692 IN UINTN StartBit,
2693 IN UINTN EndBit,
2694 IN UINT32 AndData
2695 );
2696
2697
2698 /**
2699 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
2700 bitwise OR, and returns the result.
2701
2702 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2703 in Operand and the value specified by AndData, followed by a bitwise
2704 OR with value specified by OrData. All other bits in Operand are
2705 preserved. The new 32-bit value is returned.
2706
2707 If 32-bit operations are not supported, then ASSERT().
2708 If StartBit is greater than 31, then ASSERT().
2709 If EndBit is greater than 31, then ASSERT().
2710 If EndBit is less than StartBit, then ASSERT().
2711
2712 @param Operand Operand on which to perform the bitfield operation.
2713 @param StartBit The ordinal of the least significant bit in the bit field.
2714 Range 0..31.
2715 @param EndBit The ordinal of the most significant bit in the bit field.
2716 Range 0..31.
2717 @param AndData The value to AND with the read value from the value.
2718 @param OrData The value to OR with the result of the AND operation.
2719
2720 @return The new 32-bit value.
2721
2722 **/
2723 UINT32
2724 EFIAPI
2725 BitFieldAndThenOr32 (
2726 IN UINT32 Operand,
2727 IN UINTN StartBit,
2728 IN UINTN EndBit,
2729 IN UINT32 AndData,
2730 IN UINT32 OrData
2731 );
2732
2733
2734 /**
2735 Returns a bit field from a 64-bit value.
2736
2737 Returns the bitfield specified by the StartBit and the EndBit from Operand.
2738
2739 If 64-bit operations are not supported, then ASSERT().
2740 If StartBit is greater than 63, then ASSERT().
2741 If EndBit is greater than 63, then ASSERT().
2742 If EndBit is less than StartBit, then ASSERT().
2743
2744 @param Operand Operand on which to perform the bitfield operation.
2745 @param StartBit The ordinal of the least significant bit in the bit field.
2746 Range 0..63.
2747 @param EndBit The ordinal of the most significant bit in the bit field.
2748 Range 0..63.
2749
2750 @return The bit field read.
2751
2752 **/
2753 UINT64
2754 EFIAPI
2755 BitFieldRead64 (
2756 IN UINT64 Operand,
2757 IN UINTN StartBit,
2758 IN UINTN EndBit
2759 );
2760
2761
2762 /**
2763 Writes a bit field to a 64-bit value, and returns the result.
2764
2765 Writes Value to the bit field specified by the StartBit and the EndBit in
2766 Operand. All other bits in Operand are preserved. The new 64-bit value is
2767 returned.
2768
2769 If 64-bit operations are not supported, then ASSERT().
2770 If StartBit is greater than 63, then ASSERT().
2771 If EndBit is greater than 63, then ASSERT().
2772 If EndBit is less than StartBit, then ASSERT().
2773
2774 @param Operand Operand on which to perform the bitfield operation.
2775 @param StartBit The ordinal of the least significant bit in the bit field.
2776 Range 0..63.
2777 @param EndBit The ordinal of the most significant bit in the bit field.
2778 Range 0..63.
2779 @param Value New value of the bit field.
2780
2781 @return The new 64-bit value.
2782
2783 **/
2784 UINT64
2785 EFIAPI
2786 BitFieldWrite64 (
2787 IN UINT64 Operand,
2788 IN UINTN StartBit,
2789 IN UINTN EndBit,
2790 IN UINT64 Value
2791 );
2792
2793
2794 /**
2795 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
2796 result.
2797
2798 Performs a bitwise OR between the bit field specified by StartBit
2799 and EndBit in Operand and the value specified by OrData. All other bits in
2800 Operand are preserved. The new 64-bit value is returned.
2801
2802 If 64-bit operations are not supported, then ASSERT().
2803 If StartBit is greater than 63, then ASSERT().
2804 If EndBit is greater than 63, then ASSERT().
2805 If EndBit is less than StartBit, then ASSERT().
2806
2807 @param Operand Operand on which to perform the bitfield operation.
2808 @param StartBit The ordinal of the least significant bit in the bit field.
2809 Range 0..63.
2810 @param EndBit The ordinal of the most significant bit in the bit field.
2811 Range 0..63.
2812 @param OrData The value to OR with the read value from the value
2813
2814 @return The new 64-bit value.
2815
2816 **/
2817 UINT64
2818 EFIAPI
2819 BitFieldOr64 (
2820 IN UINT64 Operand,
2821 IN UINTN StartBit,
2822 IN UINTN EndBit,
2823 IN UINT64 OrData
2824 );
2825
2826
2827 /**
2828 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
2829 the result.
2830
2831 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2832 in Operand and the value specified by AndData. All other bits in Operand are
2833 preserved. The new 64-bit value is returned.
2834
2835 If 64-bit operations are not supported, then ASSERT().
2836 If StartBit is greater than 63, then ASSERT().
2837 If EndBit is greater than 63, then ASSERT().
2838 If EndBit is less than StartBit, then ASSERT().
2839
2840 @param Operand Operand on which to perform the bitfield operation.
2841 @param StartBit The ordinal of the least significant bit in the bit field.
2842 Range 0..63.
2843 @param EndBit The ordinal of the most significant bit in the bit field.
2844 Range 0..63.
2845 @param AndData The value to AND with the read value from the value
2846
2847 @return The new 64-bit value.
2848
2849 **/
2850 UINT64
2851 EFIAPI
2852 BitFieldAnd64 (
2853 IN UINT64 Operand,
2854 IN UINTN StartBit,
2855 IN UINTN EndBit,
2856 IN UINT64 AndData
2857 );
2858
2859
2860 /**
2861 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
2862 bitwise OR, and returns the result.
2863
2864 Performs a bitwise AND between the bit field specified by StartBit and EndBit
2865 in Operand and the value specified by AndData, followed by a bitwise
2866 OR with value specified by OrData. All other bits in Operand are
2867 preserved. The new 64-bit value is returned.
2868
2869 If 64-bit operations are not supported, then ASSERT().
2870 If StartBit is greater than 63, then ASSERT().
2871 If EndBit is greater than 63, then ASSERT().
2872 If EndBit is less than StartBit, then ASSERT().
2873
2874 @param Operand Operand on which to perform the bitfield operation.
2875 @param StartBit The ordinal of the least significant bit in the bit field.
2876 Range 0..63.
2877 @param EndBit The ordinal of the most significant bit in the bit field.
2878 Range 0..63.
2879 @param AndData The value to AND with the read value from the value.
2880 @param OrData The value to OR with the result of the AND operation.
2881
2882 @return The new 64-bit value.
2883
2884 **/
2885 UINT64
2886 EFIAPI
2887 BitFieldAndThenOr64 (
2888 IN UINT64 Operand,
2889 IN UINTN StartBit,
2890 IN UINTN EndBit,
2891 IN UINT64 AndData,
2892 IN UINT64 OrData
2893 );
2894
2895
2896 //
2897 // Base Library Synchronization Functions
2898 //
2899
2900 /**
2901 Retrieves the architecture specific spin lock alignment requirements for
2902 optimal spin lock performance.
2903
2904 This function retrieves the spin lock alignment requirements for optimal
2905 performance on a given CPU architecture. The spin lock alignment must be a
2906 power of two and is returned by this function. If there are no alignment
2907 requirements, then 1 must be returned. The spin lock synchronization
2908 functions must function correctly if the spin lock size and alignment values
2909 returned by this function are not used at all. These values are hints to the
2910 consumers of the spin lock synchronization functions to obtain optimal spin
2911 lock performance.
2912
2913 @return The architecture specific spin lock alignment.
2914
2915 **/
2916 UINTN
2917 EFIAPI
2918 GetSpinLockProperties (
2919 VOID
2920 );
2921
2922
2923 /**
2924 Initializes a spin lock to the released state and returns the spin lock.
2925
2926 This function initializes the spin lock specified by SpinLock to the released
2927 state, and returns SpinLock. Optimal performance can be achieved by calling
2928 GetSpinLockProperties() to determine the size and alignment requirements for
2929 SpinLock.
2930
2931 If SpinLock is NULL, then ASSERT().
2932
2933 @param SpinLock A pointer to the spin lock to initialize to the released
2934 state.
2935
2936 @return SpinLock in release state.
2937
2938 **/
2939 SPIN_LOCK *
2940 EFIAPI
2941 InitializeSpinLock (
2942 OUT SPIN_LOCK *SpinLock
2943 );
2944
2945
2946 /**
2947 Waits until a spin lock can be placed in the acquired state.
2948
2949 This function checks the state of the spin lock specified by SpinLock. If
2950 SpinLock is in the released state, then this function places SpinLock in the
2951 acquired state and returns SpinLock. Otherwise, this function waits
2952 indefinitely for the spin lock to be released, and then places it in the
2953 acquired state and returns SpinLock. All state transitions of SpinLock must
2954 be performed using MP safe mechanisms.
2955
2956 If SpinLock is NULL, then ASSERT().
2957 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2958 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
2959 PcdSpinLockTimeout microseconds, then ASSERT().
2960
2961 @param SpinLock A pointer to the spin lock to place in the acquired state.
2962
2963 @return SpinLock acquired lock.
2964
2965 **/
2966 SPIN_LOCK *
2967 EFIAPI
2968 AcquireSpinLock (
2969 IN OUT SPIN_LOCK *SpinLock
2970 );
2971
2972
2973 /**
2974 Attempts to place a spin lock in the acquired state.
2975
2976 This function checks the state of the spin lock specified by SpinLock. If
2977 SpinLock is in the released state, then this function places SpinLock in the
2978 acquired state and returns TRUE. Otherwise, FALSE is returned. All state
2979 transitions of SpinLock must be performed using MP safe mechanisms.
2980
2981 If SpinLock is NULL, then ASSERT().
2982 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
2983
2984 @param SpinLock A pointer to the spin lock to place in the acquired state.
2985
2986 @retval TRUE SpinLock was placed in the acquired state.
2987 @retval FALSE SpinLock could not be acquired.
2988
2989 **/
2990 BOOLEAN
2991 EFIAPI
2992 AcquireSpinLockOrFail (
2993 IN OUT SPIN_LOCK *SpinLock
2994 );
2995
2996
2997 /**
2998 Releases a spin lock.
2999
3000 This function places the spin lock specified by SpinLock in the release state
3001 and returns SpinLock.
3002
3003 If SpinLock is NULL, then ASSERT().
3004 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
3005
3006 @param SpinLock A pointer to the spin lock to release.
3007
3008 @return SpinLock released lock.
3009
3010 **/
3011 SPIN_LOCK *
3012 EFIAPI
3013 ReleaseSpinLock (
3014 IN OUT SPIN_LOCK *SpinLock
3015 );
3016
3017
3018 /**
3019 Performs an atomic increment of an 32-bit unsigned integer.
3020
3021 Performs an atomic increment of the 32-bit unsigned integer specified by
3022 Value and returns the incremented value. The increment operation must be
3023 performed using MP safe mechanisms. The state of the return value is not
3024 guaranteed to be MP safe.
3025
3026 If Value is NULL, then ASSERT().
3027
3028 @param Value A pointer to the 32-bit value to increment.
3029
3030 @return The incremented value.
3031
3032 **/
3033 UINT32
3034 EFIAPI
3035 InterlockedIncrement (
3036 IN UINT32 *Value
3037 );
3038
3039
3040 /**
3041 Performs an atomic decrement of an 32-bit unsigned integer.
3042
3043 Performs an atomic decrement of the 32-bit unsigned integer specified by
3044 Value and returns the decremented value. The decrement operation must be
3045 performed using MP safe mechanisms. The state of the return value is not
3046 guaranteed to be MP safe.
3047
3048 If Value is NULL, then ASSERT().
3049
3050 @param Value A pointer to the 32-bit value to decrement.
3051
3052 @return The decremented value.
3053
3054 **/
3055 UINT32
3056 EFIAPI
3057 InterlockedDecrement (
3058 IN UINT32 *Value
3059 );
3060
3061
3062 /**
3063 Performs an atomic compare exchange operation on a 32-bit unsigned integer.
3064
3065 Performs an atomic compare exchange operation on the 32-bit unsigned integer
3066 specified by Value. If Value is equal to CompareValue, then Value is set to
3067 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
3068 then Value is returned. The compare exchange operation must be performed using
3069 MP safe mechanisms.
3070
3071 If Value is NULL, then ASSERT().
3072
3073 @param Value A pointer to the 32-bit value for the compare exchange
3074 operation.
3075 @param CompareValue 32-bit value used in compare operation.
3076 @param ExchangeValue 32-bit value used in exchange operation.
3077
3078 @return The original *Value before exchange.
3079
3080 **/
3081 UINT32
3082 EFIAPI
3083 InterlockedCompareExchange32 (
3084 IN OUT UINT32 *Value,
3085 IN UINT32 CompareValue,
3086 IN UINT32 ExchangeValue
3087 );
3088
3089
3090 /**
3091 Performs an atomic compare exchange operation on a 64-bit unsigned integer.
3092
3093 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
3094 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
3095 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
3096 The compare exchange operation must be performed using MP safe mechanisms.
3097
3098 If Value is NULL, then ASSERT().
3099
3100 @param Value A pointer to the 64-bit value for the compare exchange
3101 operation.
3102 @param CompareValue 64-bit value used in compare operation.
3103 @param ExchangeValue 64-bit value used in exchange operation.
3104
3105 @return The original *Value before exchange.
3106
3107 **/
3108 UINT64
3109 EFIAPI
3110 InterlockedCompareExchange64 (
3111 IN OUT UINT64 *Value,
3112 IN UINT64 CompareValue,
3113 IN UINT64 ExchangeValue
3114 );
3115
3116
3117 /**
3118 Performs an atomic compare exchange operation on a pointer value.
3119
3120 Performs an atomic compare exchange operation on the pointer value specified
3121 by Value. If Value is equal to CompareValue, then Value is set to
3122 ExchangeValue and CompareValue is returned. If Value is not equal to
3123 CompareValue, then Value is returned. The compare exchange operation must be
3124 performed using MP safe mechanisms.
3125
3126 If Value is NULL, then ASSERT().
3127
3128 @param Value A pointer to the pointer value for the compare exchange
3129 operation.
3130 @param CompareValue Pointer value used in compare operation.
3131 @param ExchangeValue Pointer value used in exchange operation.
3132
3133 @return The original *Value before exchange.
3134 **/
3135 VOID *
3136 EFIAPI
3137 InterlockedCompareExchangePointer (
3138 IN OUT VOID **Value,
3139 IN VOID *CompareValue,
3140 IN VOID *ExchangeValue
3141 );
3142
3143
3144 //
3145 // Base Library Checksum Functions
3146 //
3147
3148 /**
3149 Returns the sum of all elements in a buffer in unit of UINT8.
3150 During calculation, the carry bits are dropped.
3151
3152 This function calculates the sum of all elements in a buffer
3153 in unit of UINT8. The carry bits in result of addition are dropped.
3154 The result is returned as UINT8. If Length is Zero, then Zero is
3155 returned.
3156
3157 If Buffer is NULL, then ASSERT().
3158 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3159
3160 @param Buffer Pointer to the buffer to carry out the sum operation.
3161 @param Length The size, in bytes, of Buffer.
3162
3163 @return Sum The sum of Buffer with carry bits dropped during additions.
3164
3165 **/
3166 UINT8
3167 EFIAPI
3168 CalculateSum8 (
3169 IN CONST UINT8 *Buffer,
3170 IN UINTN Length
3171 );
3172
3173
3174 /**
3175 Returns the two's complement checksum of all elements in a buffer
3176 of 8-bit values.
3177
3178 This function first calculates the sum of the 8-bit values in the
3179 buffer specified by Buffer and Length. The carry bits in the result
3180 of addition are dropped. Then, the two's complement of the sum is
3181 returned. If Length is 0, then 0 is returned.
3182
3183 If Buffer is NULL, then ASSERT().
3184 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3185
3186 @param Buffer Pointer to the buffer to carry out the checksum operation.
3187 @param Length The size, in bytes, of Buffer.
3188
3189 @return Checksum The 2's complement checksum of Buffer.
3190
3191 **/
3192 UINT8
3193 EFIAPI
3194 CalculateCheckSum8 (
3195 IN CONST UINT8 *Buffer,
3196 IN UINTN Length
3197 );
3198
3199
3200 /**
3201 Returns the sum of all elements in a buffer of 16-bit values. During
3202 calculation, the carry bits are dropped.
3203
3204 This function calculates the sum of the 16-bit values in the buffer
3205 specified by Buffer and Length. The carry bits in result of addition are dropped.
3206 The 16-bit result is returned. If Length is 0, then 0 is returned.
3207
3208 If Buffer is NULL, then ASSERT().
3209 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3210 If Length is not aligned on a 16-bit boundary, then ASSERT().
3211 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3212
3213 @param Buffer Pointer to the buffer to carry out the sum operation.
3214 @param Length The size, in bytes, of Buffer.
3215
3216 @return Sum The sum of Buffer with carry bits dropped during additions.
3217
3218 **/
3219 UINT16
3220 EFIAPI
3221 CalculateSum16 (
3222 IN CONST UINT16 *Buffer,
3223 IN UINTN Length
3224 );
3225
3226
3227 /**
3228 Returns the two's complement checksum of all elements in a buffer of
3229 16-bit values.
3230
3231 This function first calculates the sum of the 16-bit values in the buffer
3232 specified by Buffer and Length. The carry bits in the result of addition
3233 are dropped. Then, the two's complement of the sum is returned. If Length
3234 is 0, then 0 is returned.
3235
3236 If Buffer is NULL, then ASSERT().
3237 If Buffer is not aligned on a 16-bit boundary, then ASSERT().
3238 If Length is not aligned on a 16-bit boundary, then ASSERT().
3239 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3240
3241 @param Buffer Pointer to the buffer to carry out the checksum operation.
3242 @param Length The size, in bytes, of Buffer.
3243
3244 @return Checksum The 2's complement checksum of Buffer.
3245
3246 **/
3247 UINT16
3248 EFIAPI
3249 CalculateCheckSum16 (
3250 IN CONST UINT16 *Buffer,
3251 IN UINTN Length
3252 );
3253
3254
3255 /**
3256 Returns the sum of all elements in a buffer of 32-bit values. During
3257 calculation, the carry bits are dropped.
3258
3259 This function calculates the sum of the 32-bit values in the buffer
3260 specified by Buffer and Length. The carry bits in result of addition are dropped.
3261 The 32-bit result is returned. If Length is 0, then 0 is returned.
3262
3263 If Buffer is NULL, then ASSERT().
3264 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3265 If Length is not aligned on a 32-bit boundary, then ASSERT().
3266 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3267
3268 @param Buffer Pointer to the buffer to carry out the sum operation.
3269 @param Length The size, in bytes, of Buffer.
3270
3271 @return Sum The sum of Buffer with carry bits dropped during additions.
3272
3273 **/
3274 UINT32
3275 EFIAPI
3276 CalculateSum32 (
3277 IN CONST UINT32 *Buffer,
3278 IN UINTN Length
3279 );
3280
3281
3282 /**
3283 Returns the two's complement checksum of all elements in a buffer of
3284 32-bit values.
3285
3286 This function first calculates the sum of the 32-bit values in the buffer
3287 specified by Buffer and Length. The carry bits in the result of addition
3288 are dropped. Then, the two's complement of the sum is returned. If Length
3289 is 0, then 0 is returned.
3290
3291 If Buffer is NULL, then ASSERT().
3292 If Buffer is not aligned on a 32-bit boundary, then ASSERT().
3293 If Length is not aligned on a 32-bit boundary, then ASSERT().
3294 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3295
3296 @param Buffer Pointer to the buffer to carry out the checksum operation.
3297 @param Length The size, in bytes, of Buffer.
3298
3299 @return Checksum The 2's complement checksum of Buffer.
3300
3301 **/
3302 UINT32
3303 EFIAPI
3304 CalculateCheckSum32 (
3305 IN CONST UINT32 *Buffer,
3306 IN UINTN Length
3307 );
3308
3309
3310 /**
3311 Returns the sum of all elements in a buffer of 64-bit values. During
3312 calculation, the carry bits are dropped.
3313
3314 This function calculates the sum of the 64-bit values in the buffer
3315 specified by Buffer and Length. The carry bits in result of addition are dropped.
3316 The 64-bit result is returned. If Length is 0, then 0 is returned.
3317
3318 If Buffer is NULL, then ASSERT().
3319 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3320 If Length is not aligned on a 64-bit boundary, then ASSERT().
3321 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3322
3323 @param Buffer Pointer to the buffer to carry out the sum operation.
3324 @param Length The size, in bytes, of Buffer.
3325
3326 @return Sum The sum of Buffer with carry bits dropped during additions.
3327
3328 **/
3329 UINT64
3330 EFIAPI
3331 CalculateSum64 (
3332 IN CONST UINT64 *Buffer,
3333 IN UINTN Length
3334 );
3335
3336
3337 /**
3338 Returns the two's complement checksum of all elements in a buffer of
3339 64-bit values.
3340
3341 This function first calculates the sum of the 64-bit values in the buffer
3342 specified by Buffer and Length. The carry bits in the result of addition
3343 are dropped. Then, the two's complement of the sum is returned. If Length
3344 is 0, then 0 is returned.
3345
3346 If Buffer is NULL, then ASSERT().
3347 If Buffer is not aligned on a 64-bit boundary, then ASSERT().
3348 If Length is not aligned on a 64-bit boundary, then ASSERT().
3349 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
3350
3351 @param Buffer Pointer to the buffer to carry out the checksum operation.
3352 @param Length The size, in bytes, of Buffer.
3353
3354 @return Checksum The 2's complement checksum of Buffer.
3355
3356 **/
3357 UINT64
3358 EFIAPI
3359 CalculateCheckSum64 (
3360 IN CONST UINT64 *Buffer,
3361 IN UINTN Length
3362 );
3363
3364
3365 //
3366 // Base Library CPU Functions
3367 //
3368
3369 /**
3370 Function entry point used when a stack switch is requested with SwitchStack()
3371
3372 @param Context1 Context1 parameter passed into SwitchStack().
3373 @param Context2 Context2 parameter passed into SwitchStack().
3374
3375 **/
3376 typedef
3377 VOID
3378 (EFIAPI *SWITCH_STACK_ENTRY_POINT)(
3379 IN VOID *Context1, OPTIONAL
3380 IN VOID *Context2 OPTIONAL
3381 );
3382
3383
3384 /**
3385 Used to serialize load and store operations.
3386
3387 All loads and stores that proceed calls to this function are guaranteed to be
3388 globally visible when this function returns.
3389
3390 **/
3391 VOID
3392 EFIAPI
3393 MemoryFence (
3394 VOID
3395 );
3396
3397
3398 /**
3399 Saves the current CPU context that can be restored with a call to LongJump()
3400 and returns 0.
3401
3402 Saves the current CPU context in the buffer specified by JumpBuffer and
3403 returns 0. The initial call to SetJump() must always return 0. Subsequent
3404 calls to LongJump() cause a non-zero value to be returned by SetJump().
3405
3406 If JumpBuffer is NULL, then ASSERT().
3407 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3408
3409 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
3410 The same structure must never be used for more than one CPU architecture context.
3411 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
3412 SetJump()/LongJump() is not currently supported for the EBC processor type.
3413
3414 @param JumpBuffer A pointer to CPU context buffer.
3415
3416 @retval 0 Indicates a return from SetJump().
3417
3418 **/
3419 UINTN
3420 EFIAPI
3421 SetJump (
3422 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
3423 );
3424
3425
3426 /**
3427 Restores the CPU context that was saved with SetJump().
3428
3429 Restores the CPU context from the buffer specified by JumpBuffer. This
3430 function never returns to the caller. Instead is resumes execution based on
3431 the state of JumpBuffer.
3432
3433 If JumpBuffer is NULL, then ASSERT().
3434 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
3435 If Value is 0, then ASSERT().
3436
3437 @param JumpBuffer A pointer to CPU context buffer.
3438 @param Value The value to return when the SetJump() context is
3439 restored and must be non-zero.
3440
3441 **/
3442 VOID
3443 EFIAPI
3444 LongJump (
3445 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
3446 IN UINTN Value
3447 );
3448
3449
3450 /**
3451 Enables CPU interrupts.
3452
3453 **/
3454 VOID
3455 EFIAPI
3456 EnableInterrupts (
3457 VOID
3458 );
3459
3460
3461 /**
3462 Disables CPU interrupts.
3463
3464 **/
3465 VOID
3466 EFIAPI
3467 DisableInterrupts (
3468 VOID
3469 );
3470
3471
3472 /**
3473 Disables CPU interrupts and returns the interrupt state prior to the disable
3474 operation.
3475
3476 @retval TRUE CPU interrupts were enabled on entry to this call.
3477 @retval FALSE CPU interrupts were disabled on entry to this call.
3478
3479 **/
3480 BOOLEAN
3481 EFIAPI
3482 SaveAndDisableInterrupts (
3483 VOID
3484 );
3485
3486
3487 /**
3488 Enables CPU interrupts for the smallest window required to capture any
3489 pending interrupts.
3490
3491 **/
3492 VOID
3493 EFIAPI
3494 EnableDisableInterrupts (
3495 VOID
3496 );
3497
3498
3499 /**
3500 Retrieves the current CPU interrupt state.
3501
3502 Returns TRUE is interrupts are currently enabled. Otherwise
3503 returns FALSE.
3504
3505 @retval TRUE CPU interrupts are enabled.
3506 @retval FALSE CPU interrupts are disabled.
3507
3508 **/
3509 BOOLEAN
3510 EFIAPI
3511 GetInterruptState (
3512 VOID
3513 );
3514
3515
3516 /**
3517 Set the current CPU interrupt state.
3518
3519 Sets the current CPU interrupt state to the state specified by
3520 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
3521 InterruptState is FALSE, then interrupts are disabled. InterruptState is
3522 returned.
3523
3524 @param InterruptState TRUE if interrupts should enabled. FALSE if
3525 interrupts should be disabled.
3526
3527 @return InterruptState
3528
3529 **/
3530 BOOLEAN
3531 EFIAPI
3532 SetInterruptState (
3533 IN BOOLEAN InterruptState
3534 );
3535
3536
3537 /**
3538 Requests CPU to pause for a short period of time.
3539
3540 Requests CPU to pause for a short period of time. Typically used in MP
3541 systems to prevent memory starvation while waiting for a spin lock.
3542
3543 **/
3544 VOID
3545 EFIAPI
3546 CpuPause (
3547 VOID
3548 );
3549
3550
3551 /**
3552 Transfers control to a function starting with a new stack.
3553
3554 Transfers control to the function specified by EntryPoint using the
3555 new stack specified by NewStack and passing in the parameters specified
3556 by Context1 and Context2. Context1 and Context2 are optional and may
3557 be NULL. The function EntryPoint must never return. This function
3558 supports a variable number of arguments following the NewStack parameter.
3559 These additional arguments are ignored on IA-32, x64, and EBC.
3560 IPF CPUs expect one additional parameter of type VOID * that specifies
3561 the new backing store pointer.
3562
3563 If EntryPoint is NULL, then ASSERT().
3564 If NewStack is NULL, then ASSERT().
3565
3566 @param EntryPoint A pointer to function to call with the new stack.
3567 @param Context1 A pointer to the context to pass into the EntryPoint
3568 function.
3569 @param Context2 A pointer to the context to pass into the EntryPoint
3570 function.
3571 @param NewStack A pointer to the new stack to use for the EntryPoint
3572 function.
3573 @param ... This variable argument list is ignored for IA32, x64, and EBC.
3574 For IPF, this variable argument list is expected to contain
3575 a single parameter of type VOID * that specifies the new backing
3576 store pointer.
3577
3578
3579 **/
3580 VOID
3581 EFIAPI
3582 SwitchStack (
3583 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
3584 IN VOID *Context1, OPTIONAL
3585 IN VOID *Context2, OPTIONAL
3586 IN VOID *NewStack,
3587 ...
3588 );
3589
3590
3591 /**
3592 Generates a breakpoint on the CPU.
3593
3594 Generates a breakpoint on the CPU. The breakpoint must be implemented such
3595 that code can resume normal execution after the breakpoint.
3596
3597 **/
3598 VOID
3599 EFIAPI
3600 CpuBreakpoint (
3601 VOID
3602 );
3603
3604
3605 /**
3606 Executes an infinite loop.
3607
3608 Forces the CPU to execute an infinite loop. A debugger may be used to skip
3609 past the loop and the code that follows the loop must execute properly. This
3610 implies that the infinite loop must not cause the code that follow it to be
3611 optimized away.
3612
3613 **/
3614 VOID
3615 EFIAPI
3616 CpuDeadLoop (
3617 VOID
3618 );
3619 #if defined (MDE_CPU_IPF)
3620
3621 /**
3622 Flush a range of cache lines in the cache coherency domain of the calling
3623 CPU.
3624
3625 Flushes the cache lines specified by Address and Length. If Address is not aligned
3626 on a cache line boundary, then entire cache line containing Address is flushed.
3627 If Address + Length is not aligned on a cache line boundary, then the entire cache
3628 line containing Address + Length - 1 is flushed. This function may choose to flush
3629 the entire cache if that is more efficient than flushing the specified range. If
3630 Length is 0, the no cache lines are flushed. Address is returned.
3631 This function is only available on IPF.
3632
3633 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
3634
3635 @param Address The base address of the instruction lines to invalidate. If
3636 the CPU is in a physical addressing mode, then Address is a
3637 physical address. If the CPU is in a virtual addressing mode,
3638 then Address is a virtual address.
3639
3640 @param Length The number of bytes to invalidate from the instruction cache.
3641
3642 @return Address.
3643
3644 **/
3645 VOID *
3646 EFIAPI
3647 AsmFlushCacheRange (
3648 IN VOID *Address,
3649 IN UINTN Length
3650 );
3651
3652
3653 /**
3654 Executes a FC instruction
3655 Executes a FC instruction on the cache line specified by Address.
3656 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3657 An implementation may flush a larger region. This function is only available on IPF.
3658
3659 @param Address The Address of cache line to be flushed.
3660
3661 @return The address of FC instruction executed.
3662
3663 **/
3664 UINT64
3665 EFIAPI
3666 AsmFc (
3667 IN UINT64 Address
3668 );
3669
3670
3671 /**
3672 Executes a FC.I instruction.
3673 Executes a FC.I instruction on the cache line specified by Address.
3674 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
3675 An implementation may flush a larger region. This function is only available on IPF.
3676
3677 @param Address The Address of cache line to be flushed.
3678
3679 @return The address of FC.I instruction executed.
3680
3681 **/
3682 UINT64
3683 EFIAPI
3684 AsmFci (
3685 IN UINT64 Address
3686 );
3687
3688
3689 /**
3690 Reads the current value of a Processor Identifier Register (CPUID).
3691
3692 Reads and returns the current value of Processor Identifier Register specified by Index.
3693 The Index of largest implemented CPUID (One less than the number of implemented CPUID
3694 registers) is determined by CPUID [3] bits {7:0}.
3695 No parameter checking is performed on Index. If the Index value is beyond the
3696 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
3697 must either guarantee that Index is valid, or the caller must set up fault handlers to
3698 catch the faults. This function is only available on IPF.
3699
3700 @param Index The 8-bit Processor Identifier Register index to read.
3701
3702 @return The current value of Processor Identifier Register specified by Index.
3703
3704 **/
3705 UINT64
3706 EFIAPI
3707 AsmReadCpuid (
3708 IN UINT8 Index
3709 );
3710
3711
3712 /**
3713 Reads the current value of 64-bit Processor Status Register (PSR).
3714 This function is only available on IPF.
3715
3716 @return The current value of PSR.
3717
3718 **/
3719 UINT64
3720 EFIAPI
3721 AsmReadPsr (
3722 VOID
3723 );
3724
3725
3726 /**
3727 Writes the current value of 64-bit Processor Status Register (PSR).
3728
3729 No parameter checking is performed on Value. All bits of Value corresponding to
3730 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
3731 The caller must either guarantee that Value is valid, or the caller must set up
3732 fault handlers to catch the faults. This function is only available on IPF.
3733
3734 @param Value The 64-bit value to write to PSR.
3735
3736 @return The 64-bit value written to the PSR.
3737
3738 **/
3739 UINT64
3740 EFIAPI
3741 AsmWritePsr (
3742 IN UINT64 Value
3743 );
3744
3745
3746 /**
3747 Reads the current value of 64-bit Kernel Register #0 (KR0).
3748 This function is only available on IPF.
3749
3750 @return The current value of KR0.
3751
3752 **/
3753 UINT64
3754 EFIAPI
3755 AsmReadKr0 (
3756 VOID
3757 );
3758
3759
3760 /**
3761 Reads the current value of 64-bit Kernel Register #1 (KR1).
3762 This function is only available on IPF.
3763
3764 @return The current value of KR1.
3765
3766 **/
3767 UINT64
3768 EFIAPI
3769 AsmReadKr1 (
3770 VOID
3771 );
3772
3773
3774 /**
3775 Reads the current value of 64-bit Kernel Register #2 (KR2).
3776 This function is only available on IPF.
3777
3778 @return The current value of KR2.
3779
3780 **/
3781 UINT64
3782 EFIAPI
3783 AsmReadKr2 (
3784 VOID
3785 );
3786
3787
3788 /**
3789 Reads the current value of 64-bit Kernel Register #3 (KR3).
3790 This function is only available on IPF.
3791
3792 @return The current value of KR3.
3793
3794 **/
3795 UINT64
3796 EFIAPI
3797 AsmReadKr3 (
3798 VOID
3799 );
3800
3801
3802 /**
3803 Reads the current value of 64-bit Kernel Register #4 (KR4).
3804 This function is only available on IPF.
3805
3806 @return The current value of KR4.
3807
3808 **/
3809 UINT64
3810 EFIAPI
3811 AsmReadKr4 (
3812 VOID
3813 );
3814
3815
3816 /**
3817 Reads the current value of 64-bit Kernel Register #5 (KR5).
3818 This function is only available on IPF.
3819
3820 @return The current value of KR5.
3821
3822 **/
3823 UINT64
3824 EFIAPI
3825 AsmReadKr5 (
3826 VOID
3827 );
3828
3829
3830 /**
3831 Reads the current value of 64-bit Kernel Register #6 (KR6).
3832 This function is only available on IPF.
3833
3834 @return The current value of KR6.
3835
3836 **/
3837 UINT64
3838 EFIAPI
3839 AsmReadKr6 (
3840 VOID
3841 );
3842
3843
3844 /**
3845 Reads the current value of 64-bit Kernel Register #7 (KR7).
3846 This function is only available on IPF.
3847
3848 @return The current value of KR7.
3849
3850 **/
3851 UINT64
3852 EFIAPI
3853 AsmReadKr7 (
3854 VOID
3855 );
3856
3857
3858 /**
3859 Write the current value of 64-bit Kernel Register #0 (KR0).
3860 This function is only available on IPF.
3861
3862 @param Value The 64-bit value to write to KR0.
3863
3864 @return The 64-bit value written to the KR0.
3865
3866 **/
3867 UINT64
3868 EFIAPI
3869 AsmWriteKr0 (
3870 IN UINT64 Value
3871 );
3872
3873
3874 /**
3875 Write the current value of 64-bit Kernel Register #1 (KR1).
3876 This function is only available on IPF.
3877
3878 @param Value The 64-bit value to write to KR1.
3879
3880 @return The 64-bit value written to the KR1.
3881
3882 **/
3883 UINT64
3884 EFIAPI
3885 AsmWriteKr1 (
3886 IN UINT64 Value
3887 );
3888
3889
3890 /**
3891 Write the current value of 64-bit Kernel Register #2 (KR2).
3892 This function is only available on IPF.
3893
3894 @param Value The 64-bit value to write to KR2.
3895
3896 @return The 64-bit value written to the KR2.
3897
3898 **/
3899 UINT64
3900 EFIAPI
3901 AsmWriteKr2 (
3902 IN UINT64 Value
3903 );
3904
3905
3906 /**
3907 Write the current value of 64-bit Kernel Register #3 (KR3).
3908 This function is only available on IPF.
3909
3910 @param Value The 64-bit value to write to KR3.
3911
3912 @return The 64-bit value written to the KR3.
3913
3914 **/
3915 UINT64
3916 EFIAPI
3917 AsmWriteKr3 (
3918 IN UINT64 Value
3919 );
3920
3921
3922 /**
3923 Write the current value of 64-bit Kernel Register #4 (KR4).
3924 This function is only available on IPF.
3925
3926 @param Value The 64-bit value to write to KR4.
3927
3928 @return The 64-bit value written to the KR4.
3929
3930 **/
3931 UINT64
3932 EFIAPI
3933 AsmWriteKr4 (
3934 IN UINT64 Value
3935 );
3936
3937
3938 /**
3939 Write the current value of 64-bit Kernel Register #5 (KR5).
3940 This function is only available on IPF.
3941
3942 @param Value The 64-bit value to write to KR5.
3943
3944 @return The 64-bit value written to the KR5.
3945
3946 **/
3947 UINT64
3948 EFIAPI
3949 AsmWriteKr5 (
3950 IN UINT64 Value
3951 );
3952
3953
3954 /**
3955 Write the current value of 64-bit Kernel Register #6 (KR6).
3956 This function is only available on IPF.
3957
3958 @param Value The 64-bit value to write to KR6.
3959
3960 @return The 64-bit value written to the KR6.
3961
3962 **/
3963 UINT64
3964 EFIAPI
3965 AsmWriteKr6 (
3966 IN UINT64 Value
3967 );
3968
3969
3970 /**
3971 Write the current value of 64-bit Kernel Register #7 (KR7).
3972 This function is only available on IPF.
3973
3974 @param Value The 64-bit value to write to KR7.
3975
3976 @return The 64-bit value written to the KR7.
3977
3978 **/
3979 UINT64
3980 EFIAPI
3981 AsmWriteKr7 (
3982 IN UINT64 Value
3983 );
3984
3985
3986 /**
3987 Reads the current value of Interval Timer Counter Register (ITC).
3988 This function is only available on IPF.
3989
3990 @return The current value of ITC.
3991
3992 **/
3993 UINT64
3994 EFIAPI
3995 AsmReadItc (
3996 VOID
3997 );
3998
3999
4000 /**
4001 Reads the current value of Interval Timer Vector Register (ITV).
4002 This function is only available on IPF.
4003
4004 @return The current value of ITV.
4005
4006 **/
4007 UINT64
4008 EFIAPI
4009 AsmReadItv (
4010 VOID
4011 );
4012
4013
4014 /**
4015 Reads the current value of Interval Timer Match Register (ITM).
4016 This function is only available on IPF.
4017
4018 @return The current value of ITM.
4019 **/
4020 UINT64
4021 EFIAPI
4022 AsmReadItm (
4023 VOID
4024 );
4025
4026
4027 /**
4028 Writes the current value of 64-bit Interval Timer Counter Register (ITC).
4029 This function is only available on IPF.
4030
4031 @param Value The 64-bit value to write to ITC.
4032
4033 @return The 64-bit value written to the ITC.
4034
4035 **/
4036 UINT64
4037 EFIAPI
4038 AsmWriteItc (
4039 IN UINT64 Value
4040 );
4041
4042
4043 /**
4044 Writes the current value of 64-bit Interval Timer Match Register (ITM).
4045 This function is only available on IPF.
4046
4047 @param Value The 64-bit value to write to ITM.
4048
4049 @return The 64-bit value written to the ITM.
4050
4051 **/
4052 UINT64
4053 EFIAPI
4054 AsmWriteItm (
4055 IN UINT64 Value
4056 );
4057
4058
4059 /**
4060 Writes the current value of 64-bit Interval Timer Vector Register (ITV).
4061 No parameter checking is performed on Value. All bits of Value corresponding to
4062 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
4063 The caller must either guarantee that Value is valid, or the caller must set up
4064 fault handlers to catch the faults.
4065 This function is only available on IPF.
4066
4067 @param Value The 64-bit value to write to ITV.
4068
4069 @return The 64-bit value written to the ITV.
4070
4071 **/
4072 UINT64
4073 EFIAPI
4074 AsmWriteItv (
4075 IN UINT64 Value
4076 );
4077
4078
4079 /**
4080 Reads the current value of Default Control Register (DCR).
4081 This function is only available on IPF.
4082
4083 @return The current value of DCR.
4084
4085 **/
4086 UINT64
4087 EFIAPI
4088 AsmReadDcr (
4089 VOID
4090 );
4091
4092
4093 /**
4094 Reads the current value of Interruption Vector Address Register (IVA).
4095 This function is only available on IPF.
4096
4097 @return The current value of IVA.
4098 **/
4099 UINT64
4100 EFIAPI
4101 AsmReadIva (
4102 VOID
4103 );
4104
4105
4106 /**
4107 Reads the current value of Page Table Address Register (PTA).
4108 This function is only available on IPF.
4109
4110 @return The current value of PTA.
4111
4112 **/
4113 UINT64
4114 EFIAPI
4115 AsmReadPta (
4116 VOID
4117 );
4118
4119
4120 /**
4121 Writes the current value of 64-bit Default Control Register (DCR).
4122 No parameter checking is performed on Value. All bits of Value corresponding to
4123 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4124 The caller must either guarantee that Value is valid, or the caller must set up
4125 fault handlers to catch the faults.
4126 This function is only available on IPF.
4127
4128 @param Value The 64-bit value to write to DCR.
4129
4130 @return The 64-bit value written to the DCR.
4131
4132 **/
4133 UINT64
4134 EFIAPI
4135 AsmWriteDcr (
4136 IN UINT64 Value
4137 );
4138
4139
4140 /**
4141 Writes the current value of 64-bit Interruption Vector Address Register (IVA).
4142 The size of vector table is 32 K bytes and is 32 K bytes aligned
4143 the low 15 bits of Value is ignored when written.
4144 This function is only available on IPF.
4145
4146 @param Value The 64-bit value to write to IVA.
4147
4148 @return The 64-bit value written to the IVA.
4149
4150 **/
4151 UINT64
4152 EFIAPI
4153 AsmWriteIva (
4154 IN UINT64 Value
4155 );
4156
4157
4158 /**
4159 Writes the current value of 64-bit Page Table Address Register (PTA).
4160 No parameter checking is performed on Value. All bits of Value corresponding to
4161 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
4162 The caller must either guarantee that Value is valid, or the caller must set up
4163 fault handlers to catch the faults.
4164 This function is only available on IPF.
4165
4166 @param Value The 64-bit value to write to PTA.
4167
4168 @return The 64-bit value written to the PTA.
4169 **/
4170 UINT64
4171 EFIAPI
4172 AsmWritePta (
4173 IN UINT64 Value
4174 );
4175
4176
4177 /**
4178 Reads the current value of Local Interrupt ID Register (LID).
4179 This function is only available on IPF.
4180
4181 @return The current value of LID.
4182
4183 **/
4184 UINT64
4185 EFIAPI
4186 AsmReadLid (
4187 VOID
4188 );
4189
4190
4191 /**
4192 Reads the current value of External Interrupt Vector Register (IVR).
4193 This function is only available on IPF.
4194
4195 @return The current value of IVR.
4196
4197 **/
4198 UINT64
4199 EFIAPI
4200 AsmReadIvr (
4201 VOID
4202 );
4203
4204
4205 /**
4206 Reads the current value of Task Priority Register (TPR).
4207 This function is only available on IPF.
4208
4209 @return The current value of TPR.
4210
4211 **/
4212 UINT64
4213 EFIAPI
4214 AsmReadTpr (
4215 VOID
4216 );
4217
4218
4219 /**
4220 Reads the current value of External Interrupt Request Register #0 (IRR0).
4221 This function is only available on IPF.
4222
4223 @return The current value of IRR0.
4224
4225 **/
4226 UINT64
4227 EFIAPI
4228 AsmReadIrr0 (
4229 VOID
4230 );
4231
4232
4233 /**
4234 Reads the current value of External Interrupt Request Register #1 (IRR1).
4235 This function is only available on IPF.
4236
4237 @return The current value of IRR1.
4238
4239 **/
4240 UINT64
4241 EFIAPI
4242 AsmReadIrr1 (
4243 VOID
4244 );
4245
4246
4247 /**
4248 Reads the current value of External Interrupt Request Register #2 (IRR2).
4249 This function is only available on IPF.
4250
4251 @return The current value of IRR2.
4252
4253 **/
4254 UINT64
4255 EFIAPI
4256 AsmReadIrr2 (
4257 VOID
4258 );
4259
4260
4261 /**
4262 Reads the current value of External Interrupt Request Register #3 (IRR3).
4263 This function is only available on IPF.
4264
4265 @return The current value of IRR3.
4266
4267 **/
4268 UINT64
4269 EFIAPI
4270 AsmReadIrr3 (
4271 VOID
4272 );
4273
4274
4275 /**
4276 Reads the current value of Performance Monitor Vector Register (PMV).
4277 This function is only available on IPF.
4278
4279 @return The current value of PMV.
4280
4281 **/
4282 UINT64
4283 EFIAPI
4284 AsmReadPmv (
4285 VOID
4286 );
4287
4288
4289 /**
4290 Reads the current value of Corrected Machine Check Vector Register (CMCV).
4291 This function is only available on IPF.
4292
4293 @return The current value of CMCV.
4294
4295 **/
4296 UINT64
4297 EFIAPI
4298 AsmReadCmcv (
4299 VOID
4300 );
4301
4302
4303 /**
4304 Reads the current value of Local Redirection Register #0 (LRR0).
4305 This function is only available on IPF.
4306
4307 @return The current value of LRR0.
4308
4309 **/
4310 UINT64
4311 EFIAPI
4312 AsmReadLrr0 (
4313 VOID
4314 );
4315
4316
4317 /**
4318 Reads the current value of Local Redirection Register #1 (LRR1).
4319 This function is only available on IPF.
4320
4321 @return The current value of LRR1.
4322
4323 **/
4324 UINT64
4325 EFIAPI
4326 AsmReadLrr1 (
4327 VOID
4328 );
4329
4330
4331 /**
4332 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
4333 No parameter checking is performed on Value. All bits of Value corresponding to
4334 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
4335 The caller must either guarantee that Value is valid, or the caller must set up
4336 fault handlers to catch the faults.
4337 This function is only available on IPF.
4338
4339 @param Value The 64-bit value to write to LID.
4340
4341 @return The 64-bit value written to the LID.
4342
4343 **/
4344 UINT64
4345 EFIAPI
4346 AsmWriteLid (
4347 IN UINT64 Value
4348 );
4349
4350
4351 /**
4352 Writes the current value of 64-bit Task Priority Register (TPR).
4353 No parameter checking is performed on Value. All bits of Value corresponding to
4354 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
4355 The caller must either guarantee that Value is valid, or the caller must set up
4356 fault handlers to catch the faults.
4357 This function is only available on IPF.
4358
4359 @param Value The 64-bit value to write to TPR.
4360
4361 @return The 64-bit value written to the TPR.
4362
4363 **/
4364 UINT64
4365 EFIAPI
4366 AsmWriteTpr (
4367 IN UINT64 Value
4368 );
4369
4370
4371 /**
4372 Performs a write operation on End OF External Interrupt Register (EOI).
4373 Writes a value of 0 to the EOI Register. This function is only available on IPF.
4374
4375 **/
4376 VOID
4377 EFIAPI
4378 AsmWriteEoi (
4379 VOID
4380 );
4381
4382
4383 /**
4384 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
4385 No parameter checking is performed on Value. All bits of Value corresponding
4386 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
4387 The caller must either guarantee that Value is valid, or the caller must set up
4388 fault handlers to catch the faults.
4389 This function is only available on IPF.
4390
4391 @param Value The 64-bit value to write to PMV.
4392
4393 @return The 64-bit value written to the PMV.
4394
4395 **/
4396 UINT64
4397 EFIAPI
4398 AsmWritePmv (
4399 IN UINT64 Value
4400 );
4401
4402
4403 /**
4404 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
4405 No parameter checking is performed on Value. All bits of Value corresponding
4406 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
4407 The caller must either guarantee that Value is valid, or the caller must set up
4408 fault handlers to catch the faults.
4409 This function is only available on IPF.
4410
4411 @param Value The 64-bit value to write to CMCV.
4412
4413 @return The 64-bit value written to the CMCV.
4414
4415 **/
4416 UINT64
4417 EFIAPI
4418 AsmWriteCmcv (
4419 IN UINT64 Value
4420 );
4421
4422
4423 /**
4424 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
4425 No parameter checking is performed on Value. All bits of Value corresponding
4426 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
4427 The caller must either guarantee that Value is valid, or the caller must set up
4428 fault handlers to catch the faults.
4429 This function is only available on IPF.
4430
4431 @param Value The 64-bit value to write to LRR0.
4432
4433 @return The 64-bit value written to the LRR0.
4434
4435 **/
4436 UINT64
4437 EFIAPI
4438 AsmWriteLrr0 (
4439 IN UINT64 Value
4440 );
4441
4442
4443 /**
4444 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
4445 No parameter checking is performed on Value. All bits of Value corresponding
4446 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
4447 The caller must either guarantee that Value is valid, or the caller must
4448 set up fault handlers to catch the faults.
4449 This function is only available on IPF.
4450
4451 @param Value The 64-bit value to write to LRR1.
4452
4453 @return The 64-bit value written to the LRR1.
4454
4455 **/
4456 UINT64
4457 EFIAPI
4458 AsmWriteLrr1 (
4459 IN UINT64 Value
4460 );
4461
4462
4463 /**
4464 Reads the current value of Instruction Breakpoint Register (IBR).
4465
4466 The Instruction Breakpoint Registers are used in pairs. The even numbered
4467 registers contain breakpoint addresses, and the odd numbered registers contain
4468 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4469 on all processor models. Implemented registers are contiguous starting with
4470 register 0. No parameter checking is performed on Index, and if the Index value
4471 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4472 occur. The caller must either guarantee that Index is valid, or the caller must
4473 set up fault handlers to catch the faults.
4474 This function is only available on IPF.
4475
4476 @param Index The 8-bit Instruction Breakpoint Register index to read.
4477
4478 @return The current value of Instruction Breakpoint Register specified by Index.
4479
4480 **/
4481 UINT64
4482 EFIAPI
4483 AsmReadIbr (
4484 IN UINT8 Index
4485 );
4486
4487
4488 /**
4489 Reads the current value of Data Breakpoint Register (DBR).
4490
4491 The Data Breakpoint Registers are used in pairs. The even numbered registers
4492 contain breakpoint addresses, and odd numbered registers contain breakpoint
4493 mask conditions. At least 4 data registers pairs are implemented on all processor
4494 models. Implemented registers are contiguous starting with register 0.
4495 No parameter checking is performed on Index. If the Index value is beyond
4496 the implemented DBR register range, a Reserved Register/Field fault may occur.
4497 The caller must either guarantee that Index is valid, or the caller must set up
4498 fault handlers to catch the faults.
4499 This function is only available on IPF.
4500
4501 @param Index The 8-bit Data Breakpoint Register index to read.
4502
4503 @return The current value of Data Breakpoint Register specified by Index.
4504
4505 **/
4506 UINT64
4507 EFIAPI
4508 AsmReadDbr (
4509 IN UINT8 Index
4510 );
4511
4512
4513 /**
4514 Reads the current value of Performance Monitor Configuration Register (PMC).
4515
4516 All processor implementations provide at least 4 performance counters
4517 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4518 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4519 additional implementation-dependent PMC and PMD to increase the number of
4520 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4521 register set is implementation dependent. No parameter checking is performed
4522 on Index. If the Index value is beyond the implemented PMC register range,
4523 zero value will be returned.
4524 This function is only available on IPF.
4525
4526 @param Index The 8-bit Performance Monitor Configuration Register index to read.
4527
4528 @return The current value of Performance Monitor Configuration Register
4529 specified by Index.
4530
4531 **/
4532 UINT64
4533 EFIAPI
4534 AsmReadPmc (
4535 IN UINT8 Index
4536 );
4537
4538
4539 /**
4540 Reads the current value of Performance Monitor Data Register (PMD).
4541
4542 All processor implementations provide at least 4 performance counters
4543 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
4544 overflow status registers (PMC [0]... PMC [3]). Processor implementations may
4545 provide additional implementation-dependent PMC and PMD to increase the number
4546 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD
4547 register set is implementation dependent. No parameter checking is performed
4548 on Index. If the Index value is beyond the implemented PMD register range,
4549 zero value will be returned.
4550 This function is only available on IPF.
4551
4552 @param Index The 8-bit Performance Monitor Data Register index to read.
4553
4554 @return The current value of Performance Monitor Data Register specified by Index.
4555
4556 **/
4557 UINT64
4558 EFIAPI
4559 AsmReadPmd (
4560 IN UINT8 Index
4561 );
4562
4563
4564 /**
4565 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
4566
4567 Writes current value of Instruction Breakpoint Register specified by Index.
4568 The Instruction Breakpoint Registers are used in pairs. The even numbered
4569 registers contain breakpoint addresses, and odd numbered registers contain
4570 breakpoint mask conditions. At least 4 instruction registers pairs are implemented
4571 on all processor models. Implemented registers are contiguous starting with
4572 register 0. No parameter checking is performed on Index. If the Index value
4573 is beyond the implemented IBR register range, a Reserved Register/Field fault may
4574 occur. The caller must either guarantee that Index is valid, or the caller must
4575 set up fault handlers to catch the faults.
4576 This function is only available on IPF.
4577
4578 @param Index The 8-bit Instruction Breakpoint Register index to write.
4579 @param Value The 64-bit value to write to IBR.
4580
4581 @return The 64-bit value written to the IBR.
4582
4583 **/
4584 UINT64
4585 EFIAPI
4586 AsmWriteIbr (
4587 IN UINT8 Index,
4588 IN UINT64 Value
4589 );
4590
4591
4592 /**
4593 Writes the current value of 64-bit Data Breakpoint Register (DBR).
4594
4595 Writes current value of Data Breakpoint Register specified by Index.
4596 The Data Breakpoint Registers are used in pairs. The even numbered registers
4597 contain breakpoint addresses, and odd numbered registers contain breakpoint
4598 mask conditions. At least 4 data registers pairs are implemented on all processor
4599 models. Implemented registers are contiguous starting with register 0. No parameter
4600 checking is performed on Index. If the Index value is beyond the implemented
4601 DBR register range, a Reserved Register/Field fault may occur. The caller must
4602 either guarantee that Index is valid, or the caller must set up fault handlers to
4603 catch the faults.
4604 This function is only available on IPF.
4605
4606 @param Index The 8-bit Data Breakpoint Register index to write.
4607 @param Value The 64-bit value to write to DBR.
4608
4609 @return The 64-bit value written to the DBR.
4610
4611 **/
4612 UINT64
4613 EFIAPI
4614 AsmWriteDbr (
4615 IN UINT8 Index,
4616 IN UINT64 Value
4617 );
4618
4619
4620 /**
4621 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
4622
4623 Writes current value of Performance Monitor Configuration Register specified by Index.
4624 All processor implementations provide at least 4 performance counters
4625 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
4626 registers (PMC [0]... PMC [3]). Processor implementations may provide additional
4627 implementation-dependent PMC and PMD to increase the number of 'generic' performance
4628 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
4629 dependent. No parameter checking is performed on Index. If the Index value is
4630 beyond the implemented PMC register range, the write is ignored.
4631 This function is only available on IPF.
4632
4633 @param Index The 8-bit Performance Monitor Configuration Register index to write.
4634 @param Value The 64-bit value to write to PMC.
4635
4636 @return The 64-bit value written to the PMC.
4637
4638 **/
4639 UINT64
4640 EFIAPI
4641 AsmWritePmc (
4642 IN UINT8 Index,
4643 IN UINT64 Value
4644 );
4645
4646
4647 /**
4648 Writes the current value of 64-bit Performance Monitor Data Register (PMD).
4649
4650 Writes current value of Performance Monitor Data Register specified by Index.
4651 All processor implementations provide at least 4 performance counters
4652 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
4653 status registers (PMC [0]... PMC [3]). Processor implementations may provide
4654 additional implementation-dependent PMC and PMD to increase the number of 'generic'
4655 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
4656 is implementation dependent. No parameter checking is performed on Index. If the
4657 Index value is beyond the implemented PMD register range, the write is ignored.
4658 This function is only available on IPF.
4659
4660 @param Index The 8-bit Performance Monitor Data Register index to write.
4661 @param Value The 64-bit value to write to PMD.
4662
4663 @return The 64-bit value written to the PMD.
4664
4665 **/
4666 UINT64
4667 EFIAPI
4668 AsmWritePmd (
4669 IN UINT8 Index,
4670 IN UINT64 Value
4671 );
4672
4673
4674 /**
4675 Reads the current value of 64-bit Global Pointer (GP).
4676
4677 Reads and returns the current value of GP.
4678 This function is only available on IPF.
4679
4680 @return The current value of GP.
4681
4682 **/
4683 UINT64
4684 EFIAPI
4685 AsmReadGp (
4686 VOID
4687 );
4688
4689
4690 /**
4691 Write the current value of 64-bit Global Pointer (GP).
4692
4693 Writes the current value of GP. The 64-bit value written to the GP is returned.
4694 No parameter checking is performed on Value.
4695 This function is only available on IPF.
4696
4697 @param Value The 64-bit value to write to GP.
4698
4699 @return The 64-bit value written to the GP.
4700
4701 **/
4702 UINT64
4703 EFIAPI
4704 AsmWriteGp (
4705 IN UINT64 Value
4706 );
4707
4708
4709 /**
4710 Reads the current value of 64-bit Stack Pointer (SP).
4711
4712 Reads and returns the current value of SP.
4713 This function is only available on IPF.
4714
4715 @return The current value of SP.
4716
4717 **/
4718 UINT64
4719 EFIAPI
4720 AsmReadSp (
4721 VOID
4722 );
4723
4724
4725 ///
4726 /// Valid Index value for AsmReadControlRegister()
4727 ///
4728 #define IPF_CONTROL_REGISTER_DCR 0
4729 #define IPF_CONTROL_REGISTER_ITM 1
4730 #define IPF_CONTROL_REGISTER_IVA 2
4731 #define IPF_CONTROL_REGISTER_PTA 8
4732 #define IPF_CONTROL_REGISTER_IPSR 16
4733 #define IPF_CONTROL_REGISTER_ISR 17
4734 #define IPF_CONTROL_REGISTER_IIP 19
4735 #define IPF_CONTROL_REGISTER_IFA 20
4736 #define IPF_CONTROL_REGISTER_ITIR 21
4737 #define IPF_CONTROL_REGISTER_IIPA 22
4738 #define IPF_CONTROL_REGISTER_IFS 23
4739 #define IPF_CONTROL_REGISTER_IIM 24
4740 #define IPF_CONTROL_REGISTER_IHA 25
4741 #define IPF_CONTROL_REGISTER_LID 64
4742 #define IPF_CONTROL_REGISTER_IVR 65
4743 #define IPF_CONTROL_REGISTER_TPR 66
4744 #define IPF_CONTROL_REGISTER_EOI 67
4745 #define IPF_CONTROL_REGISTER_IRR0 68
4746 #define IPF_CONTROL_REGISTER_IRR1 69
4747 #define IPF_CONTROL_REGISTER_IRR2 70
4748 #define IPF_CONTROL_REGISTER_IRR3 71
4749 #define IPF_CONTROL_REGISTER_ITV 72
4750 #define IPF_CONTROL_REGISTER_PMV 73
4751 #define IPF_CONTROL_REGISTER_CMCV 74
4752 #define IPF_CONTROL_REGISTER_LRR0 80
4753 #define IPF_CONTROL_REGISTER_LRR1 81
4754
4755 /**
4756 Reads a 64-bit control register.
4757
4758 Reads and returns the control register specified by Index. The valid Index valued are defined
4759 above in "Related Definitions".
4760 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4761
4762 @param Index The index of the control register to read.
4763
4764 @return The control register specified by Index.
4765
4766 **/
4767 UINT64
4768 EFIAPI
4769 AsmReadControlRegister (
4770 IN UINT64 Index
4771 );
4772
4773
4774 ///
4775 /// Valid Index value for AsmReadApplicationRegister()
4776 ///
4777 #define IPF_APPLICATION_REGISTER_K0 0
4778 #define IPF_APPLICATION_REGISTER_K1 1
4779 #define IPF_APPLICATION_REGISTER_K2 2
4780 #define IPF_APPLICATION_REGISTER_K3 3
4781 #define IPF_APPLICATION_REGISTER_K4 4
4782 #define IPF_APPLICATION_REGISTER_K5 5
4783 #define IPF_APPLICATION_REGISTER_K6 6
4784 #define IPF_APPLICATION_REGISTER_K7 7
4785 #define IPF_APPLICATION_REGISTER_RSC 16
4786 #define IPF_APPLICATION_REGISTER_BSP 17
4787 #define IPF_APPLICATION_REGISTER_BSPSTORE 18
4788 #define IPF_APPLICATION_REGISTER_RNAT 19
4789 #define IPF_APPLICATION_REGISTER_FCR 21
4790 #define IPF_APPLICATION_REGISTER_EFLAG 24
4791 #define IPF_APPLICATION_REGISTER_CSD 25
4792 #define IPF_APPLICATION_REGISTER_SSD 26
4793 #define IPF_APPLICATION_REGISTER_CFLG 27
4794 #define IPF_APPLICATION_REGISTER_FSR 28
4795 #define IPF_APPLICATION_REGISTER_FIR 29
4796 #define IPF_APPLICATION_REGISTER_FDR 30
4797 #define IPF_APPLICATION_REGISTER_CCV 32
4798 #define IPF_APPLICATION_REGISTER_UNAT 36
4799 #define IPF_APPLICATION_REGISTER_FPSR 40
4800 #define IPF_APPLICATION_REGISTER_ITC 44
4801 #define IPF_APPLICATION_REGISTER_PFS 64
4802 #define IPF_APPLICATION_REGISTER_LC 65
4803 #define IPF_APPLICATION_REGISTER_EC 66
4804
4805 /**
4806 Reads a 64-bit application register.
4807
4808 Reads and returns the application register specified by Index. The valid Index valued are defined
4809 above in "Related Definitions".
4810 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
4811
4812 @param Index The index of the application register to read.
4813
4814 @return The application register specified by Index.
4815
4816 **/
4817 UINT64
4818 EFIAPI
4819 AsmReadApplicationRegister (
4820 IN UINT64 Index
4821 );
4822
4823
4824 /**
4825 Determines if the CPU is currently executing in virtual, physical, or mixed mode.
4826
4827 Determines the current execution mode of the CPU.
4828 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
4829 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
4830 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
4831 and -1 is returned.
4832 This function is only available on IPF.
4833
4834 @retval 1 The CPU is in virtual mode.
4835 @retval 0 The CPU is in physical mode.
4836 @retval -1 The CPU is in mixed mode.
4837
4838 **/
4839 INT64
4840 EFIAPI
4841 AsmCpuVirtual (
4842 VOID
4843 );
4844
4845
4846 /**
4847 Makes a PAL procedure call.
4848
4849 This is a wrapper function to make a PAL procedure call. Based on the Index
4850 value this API will make static or stacked PAL call. The following table
4851 describes the usage of PAL Procedure Index Assignment. Architected procedures
4852 may be designated as required or optional. If a PAL procedure is specified
4853 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
4854 Status field of the PAL_CALL_RETURN structure.
4855 This indicates that the procedure is not present in this PAL implementation.
4856 It is the caller's responsibility to check for this return code after calling
4857 any optional PAL procedure.
4858 No parameter checking is performed on the 5 input parameters, but there are
4859 some common rules that the caller should follow when making a PAL call. Any
4860 address passed to PAL as buffers for return parameters must be 8-byte aligned.
4861 Unaligned addresses may cause undefined results. For those parameters defined
4862 as reserved or some fields defined as reserved must be zero filled or the invalid
4863 argument return value may be returned or undefined result may occur during the
4864 execution of the procedure. If the PalEntryPoint does not point to a valid
4865 PAL entry point then the system behavior is undefined. This function is only
4866 available on IPF.
4867
4868 @param PalEntryPoint The PAL procedure calls entry point.
4869 @param Index The PAL procedure Index number.
4870 @param Arg2 The 2nd parameter for PAL procedure calls.
4871 @param Arg3 The 3rd parameter for PAL procedure calls.
4872 @param Arg4 The 4th parameter for PAL procedure calls.
4873
4874 @return structure returned from the PAL Call procedure, including the status and return value.
4875
4876 **/
4877 PAL_CALL_RETURN
4878 EFIAPI
4879 AsmPalCall (
4880 IN UINT64 PalEntryPoint,
4881 IN UINT64 Index,
4882 IN UINT64 Arg2,
4883 IN UINT64 Arg3,
4884 IN UINT64 Arg4
4885 );
4886
4887
4888 #elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
4889 ///
4890 /// IA32 and x64 Specific Functions
4891 /// Byte packed structure for 16-bit Real Mode EFLAGS
4892 ///
4893 typedef union {
4894 struct {
4895 UINT32 CF:1; /// Carry Flag
4896 UINT32 Reserved_0:1; /// Reserved
4897 UINT32 PF:1; /// Parity Flag
4898 UINT32 Reserved_1:1; /// Reserved
4899 UINT32 AF:1; /// Auxiliary Carry Flag
4900 UINT32 Reserved_2:1; /// Reserved
4901 UINT32 ZF:1; /// Zero Flag
4902 UINT32 SF:1; /// Sign Flag
4903 UINT32 TF:1; /// Trap Flag
4904 UINT32 IF:1; /// Interrupt Enable Flag
4905 UINT32 DF:1; /// Direction Flag
4906 UINT32 OF:1; /// Overflow Flag
4907 UINT32 IOPL:2; /// I/O Privilege Level
4908 UINT32 NT:1; /// Nested Task
4909 UINT32 Reserved_3:1; /// Reserved
4910 } Bits;
4911 UINT16 Uint16;
4912 } IA32_FLAGS16;
4913
4914 ///
4915 /// Byte packed structure for EFLAGS/RFLAGS
4916 /// 32-bits on IA-32
4917 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4918 ///
4919 typedef union {
4920 struct {
4921 UINT32 CF:1; /// Carry Flag
4922 UINT32 Reserved_0:1; /// Reserved
4923 UINT32 PF:1; /// Parity Flag
4924 UINT32 Reserved_1:1; /// Reserved
4925 UINT32 AF:1; /// Auxiliary Carry Flag
4926 UINT32 Reserved_2:1; /// Reserved
4927 UINT32 ZF:1; /// Zero Flag
4928 UINT32 SF:1; /// Sign Flag
4929 UINT32 TF:1; /// Trap Flag
4930 UINT32 IF:1; /// Interrupt Enable Flag
4931 UINT32 DF:1; /// Direction Flag
4932 UINT32 OF:1; /// Overflow Flag
4933 UINT32 IOPL:2; /// I/O Privilege Level
4934 UINT32 NT:1; /// Nested Task
4935 UINT32 Reserved_3:1; /// Reserved
4936 UINT32 RF:1; /// Resume Flag
4937 UINT32 VM:1; /// Virtual 8086 Mode
4938 UINT32 AC:1; /// Alignment Check
4939 UINT32 VIF:1; /// Virtual Interrupt Flag
4940 UINT32 VIP:1; /// Virtual Interrupt Pending
4941 UINT32 ID:1; /// ID Flag
4942 UINT32 Reserved_4:10; /// Reserved
4943 } Bits;
4944 UINTN UintN;
4945 } IA32_EFLAGS32;
4946
4947 ///
4948 /// Byte packed structure for Control Register 0 (CR0)
4949 /// 32-bits on IA-32
4950 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4951 ///
4952 typedef union {
4953 struct {
4954 UINT32 PE:1; /// Protection Enable
4955 UINT32 MP:1; /// Monitor Coprocessor
4956 UINT32 EM:1; /// Emulation
4957 UINT32 TS:1; /// Task Switched
4958 UINT32 ET:1; /// Extension Type
4959 UINT32 NE:1; /// Numeric Error
4960 UINT32 Reserved_0:10; /// Reserved
4961 UINT32 WP:1; /// Write Protect
4962 UINT32 Reserved_1:1; /// Reserved
4963 UINT32 AM:1; /// Alignment Mask
4964 UINT32 Reserved_2:10; /// Reserved
4965 UINT32 NW:1; /// Mot Write-through
4966 UINT32 CD:1; /// Cache Disable
4967 UINT32 PG:1; /// Paging
4968 } Bits;
4969 UINTN UintN;
4970 } IA32_CR0;
4971
4972 ///
4973 /// Byte packed structure for Control Register 4 (CR4)
4974 /// 32-bits on IA-32
4975 /// 64-bits on x64. The upper 32-bits on x64 are reserved
4976 ///
4977 typedef union {
4978 struct {
4979 UINT32 VME:1; /// Virtual-8086 Mode Extensions
4980 UINT32 PVI:1; /// Protected-Mode Virtual Interrupts
4981 UINT32 TSD:1; /// Time Stamp Disable
4982 UINT32 DE:1; /// Debugging Extensions
4983 UINT32 PSE:1; /// Page Size Extensions
4984 UINT32 PAE:1; /// Physical Address Extension
4985 UINT32 MCE:1; /// Machine Check Enable
4986 UINT32 PGE:1; /// Page Global Enable
4987 UINT32 PCE:1; /// Performance Monitoring Counter
4988 /// Enable
4989 UINT32 OSFXSR:1; /// Operating System Support for
4990 /// FXSAVE and FXRSTOR instructions
4991 UINT32 OSXMMEXCPT:1; /// Operating System Support for
4992 /// Unmasked SIMD Floating Point
4993 /// Exceptions
4994 UINT32 Reserved_0:2; /// Reserved
4995 UINT32 VMXE:1; /// VMX Enable
4996 UINT32 Reserved_1:18; /// Reseved
4997 } Bits;
4998 UINTN UintN;
4999 } IA32_CR4;
5000
5001 ///
5002 /// Byte packed structure for an IDTR, GDTR, LDTR descriptor
5003 ///
5004 #pragma pack (1)
5005 typedef struct {
5006 UINT16 Limit;
5007 UINTN Base;
5008 } IA32_DESCRIPTOR;
5009 #pragma pack ()
5010
5011 #define IA32_IDT_GATE_TYPE_TASK 0x85
5012 #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
5013 #define IA32_IDT_GATE_TYPE_TRAP_16 0x87
5014 #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
5015 #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
5016
5017 ///
5018 /// Byte packed structure for an Interrupt Gate Descriptor
5019 ///
5020 #if defined (MDE_CPU_IA32)
5021
5022 typedef union {
5023 struct {
5024 UINT32 OffsetLow:16; // Offset bits 15..0
5025 UINT32 Selector:16; // Selector
5026 UINT32 Reserved_0:8; // Reserved
5027 UINT32 GateType:8; // Gate Type. See #defines above
5028 UINT32 OffsetHigh:16; // Offset bits 31..16
5029 } Bits;
5030 UINT64 Uint64;
5031 } IA32_IDT_GATE_DESCRIPTOR;
5032
5033 #endif
5034
5035 #if defined (MDE_CPU_X64)
5036
5037 typedef union {
5038 struct {
5039 UINT32 OffsetLow:16; // Offset bits 15..0
5040 UINT32 Selector:16; // Selector
5041 UINT32 Reserved_0:8; // Reserved
5042 UINT32 GateType:8; // Gate Type. See #defines above
5043 UINT32 OffsetHigh:16; // Offset bits 31..16
5044 UINT32 OffsetUpper:32; // Offset bits 63..32
5045 UINT32 Reserved_1:32; // Reserved
5046 } Bits;
5047 UINT64 Uint64;
5048 UINT64 Uint64_1;
5049 } IA32_IDT_GATE_DESCRIPTOR;
5050
5051 #endif
5052
5053 ///
5054 /// Byte packed structure for an FP/SSE/SSE2 context
5055 ///
5056 typedef struct {
5057 UINT8 Buffer[512];
5058 } IA32_FX_BUFFER;
5059
5060 ///
5061 /// Structures for the 16-bit real mode thunks
5062 ///
5063 typedef struct {
5064 UINT32 Reserved1;
5065 UINT32 Reserved2;
5066 UINT32 Reserved3;
5067 UINT32 Reserved4;
5068 UINT8 BL;
5069 UINT8 BH;
5070 UINT16 Reserved5;
5071 UINT8 DL;
5072 UINT8 DH;
5073 UINT16 Reserved6;
5074 UINT8 CL;
5075 UINT8 CH;
5076 UINT16 Reserved7;
5077 UINT8 AL;
5078 UINT8 AH;
5079 UINT16 Reserved8;
5080 } IA32_BYTE_REGS;
5081
5082 typedef struct {
5083 UINT16 DI;
5084 UINT16 Reserved1;
5085 UINT16 SI;
5086 UINT16 Reserved2;
5087 UINT16 BP;
5088 UINT16 Reserved3;
5089 UINT16 SP;
5090 UINT16 Reserved4;
5091 UINT16 BX;
5092 UINT16 Reserved5;
5093 UINT16 DX;
5094 UINT16 Reserved6;
5095 UINT16 CX;
5096 UINT16 Reserved7;
5097 UINT16 AX;
5098 UINT16 Reserved8;
5099 } IA32_WORD_REGS;
5100
5101 typedef struct {
5102 UINT32 EDI;
5103 UINT32 ESI;
5104 UINT32 EBP;
5105 UINT32 ESP;
5106 UINT32 EBX;
5107 UINT32 EDX;
5108 UINT32 ECX;
5109 UINT32 EAX;
5110 UINT16 DS;
5111 UINT16 ES;
5112 UINT16 FS;
5113 UINT16 GS;
5114 IA32_EFLAGS32 EFLAGS;
5115 UINT32 Eip;
5116 UINT16 CS;
5117 UINT16 SS;
5118 } IA32_DWORD_REGS;
5119
5120 typedef union {
5121 IA32_DWORD_REGS E;
5122 IA32_WORD_REGS X;
5123 IA32_BYTE_REGS H;
5124 } IA32_REGISTER_SET;
5125
5126 ///
5127 /// Byte packed structure for an 16-bit real mode thunks
5128 ///
5129 typedef struct {
5130 IA32_REGISTER_SET *RealModeState;
5131 VOID *RealModeBuffer;
5132 UINT32 RealModeBufferSize;
5133 UINT32 ThunkAttributes;
5134 } THUNK_CONTEXT;
5135
5136 #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
5137 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
5138 #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
5139
5140 /**
5141 Retrieves CPUID information.
5142
5143 Executes the CPUID instruction with EAX set to the value specified by Index.
5144 This function always returns Index.
5145 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5146 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5147 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5148 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5149 This function is only available on IA-32 and x64.
5150
5151 @param Index The 32-bit value to load into EAX prior to invoking the CPUID
5152 instruction.
5153 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5154 instruction. This is an optional parameter that may be NULL.
5155 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5156 instruction. This is an optional parameter that may be NULL.
5157 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5158 instruction. This is an optional parameter that may be NULL.
5159 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5160 instruction. This is an optional parameter that may be NULL.
5161
5162 @return Index
5163
5164 **/
5165 UINT32
5166 EFIAPI
5167 AsmCpuid (
5168 IN UINT32 Index,
5169 OUT UINT32 *Eax, OPTIONAL
5170 OUT UINT32 *Ebx, OPTIONAL
5171 OUT UINT32 *Ecx, OPTIONAL
5172 OUT UINT32 *Edx OPTIONAL
5173 );
5174
5175
5176 /**
5177 Retrieves CPUID information using an extended leaf identifier.
5178
5179 Executes the CPUID instruction with EAX set to the value specified by Index
5180 and ECX set to the value specified by SubIndex. This function always returns
5181 Index. This function is only available on IA-32 and x64.
5182
5183 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
5184 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
5185 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
5186 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
5187
5188 @param Index The 32-bit value to load into EAX prior to invoking the
5189 CPUID instruction.
5190 @param SubIndex The 32-bit value to load into ECX prior to invoking the
5191 CPUID instruction.
5192 @param Eax Pointer to the 32-bit EAX value returned by the CPUID
5193 instruction. This is an optional parameter that may be
5194 NULL.
5195 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
5196 instruction. This is an optional parameter that may be
5197 NULL.
5198 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
5199 instruction. This is an optional parameter that may be
5200 NULL.
5201 @param Edx Pointer to the 32-bit EDX value returned by the CPUID
5202 instruction. This is an optional parameter that may be
5203 NULL.
5204
5205 @return Index
5206
5207 **/
5208 UINT32
5209 EFIAPI
5210 AsmCpuidEx (
5211 IN UINT32 Index,
5212 IN UINT32 SubIndex,
5213 OUT UINT32 *Eax, OPTIONAL
5214 OUT UINT32 *Ebx, OPTIONAL
5215 OUT UINT32 *Ecx, OPTIONAL
5216 OUT UINT32 *Edx OPTIONAL
5217 );
5218
5219
5220 /**
5221 Set CD bit and clear NW bit of CR0 followed by a WBINVD.
5222
5223 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
5224 and executing a WBINVD instruction. This function is only available on IA-32 and x64.
5225
5226 **/
5227 VOID
5228 EFIAPI
5229 AsmDisableCache (
5230 VOID
5231 );
5232
5233
5234 /**
5235 Perform a WBINVD and clear both the CD and NW bits of CR0.
5236
5237 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
5238 bits of CR0 to 0. This function is only available on IA-32 and x64.
5239
5240 **/
5241 VOID
5242 EFIAPI
5243 AsmEnableCache (
5244 VOID
5245 );
5246
5247
5248 /**
5249 Returns the lower 32-bits of a Machine Specific Register(MSR).
5250
5251 Reads and returns the lower 32-bits of the MSR specified by Index.
5252 No parameter checking is performed on Index, and some Index values may cause
5253 CPU exceptions. The caller must either guarantee that Index is valid, or the
5254 caller must set up exception handlers to catch the exceptions. This function
5255 is only available on IA-32 and x64.
5256
5257 @param Index The 32-bit MSR index to read.
5258
5259 @return The lower 32 bits of the MSR identified by Index.
5260
5261 **/
5262 UINT32
5263 EFIAPI
5264 AsmReadMsr32 (
5265 IN UINT32 Index
5266 );
5267
5268
5269 /**
5270 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
5271 The upper 32-bits of the MSR are set to zero.
5272
5273 Writes the 32-bit value specified by Value to the MSR specified by Index. The
5274 upper 32-bits of the MSR write are set to zero. The 32-bit value written to
5275 the MSR is returned. No parameter checking is performed on Index or Value,
5276 and some of these may cause CPU exceptions. The caller must either guarantee
5277 that Index and Value are valid, or the caller must establish proper exception
5278 handlers. This function is only available on IA-32 and x64.
5279
5280 @param Index The 32-bit MSR index to write.
5281 @param Value The 32-bit value to write to the MSR.
5282
5283 @return Value
5284
5285 **/
5286 UINT32
5287 EFIAPI
5288 AsmWriteMsr32 (
5289 IN UINT32 Index,
5290 IN UINT32 Value
5291 );
5292
5293
5294 /**
5295 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
5296 writes the result back to the 64-bit MSR.
5297
5298 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5299 between the lower 32-bits of the read result and the value specified by
5300 OrData, and writes the result to the 64-bit MSR specified by Index. The lower
5301 32-bits of the value written to the MSR is returned. No parameter checking is
5302 performed on Index or OrData, and some of these may cause CPU exceptions. The
5303 caller must either guarantee that Index and OrData are valid, or the caller
5304 must establish proper exception handlers. This function is only available on
5305 IA-32 and x64.
5306
5307 @param Index The 32-bit MSR index to write.
5308 @param OrData The value to OR with the read value from the MSR.
5309
5310 @return The lower 32-bit value written to the MSR.
5311
5312 **/
5313 UINT32
5314 EFIAPI
5315 AsmMsrOr32 (
5316 IN UINT32 Index,
5317 IN UINT32 OrData
5318 );
5319
5320
5321 /**
5322 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
5323 the result back to the 64-bit MSR.
5324
5325 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5326 lower 32-bits of the read result and the value specified by AndData, and
5327 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
5328 the value written to the MSR is returned. No parameter checking is performed
5329 on Index or AndData, and some of these may cause CPU exceptions. The caller
5330 must either guarantee that Index and AndData are valid, or the caller must
5331 establish proper exception handlers. This function is only available on IA-32
5332 and x64.
5333
5334 @param Index The 32-bit MSR index to write.
5335 @param AndData The value to AND with the read value from the MSR.
5336
5337 @return The lower 32-bit value written to the MSR.
5338
5339 **/
5340 UINT32
5341 EFIAPI
5342 AsmMsrAnd32 (
5343 IN UINT32 Index,
5344 IN UINT32 AndData
5345 );
5346
5347
5348 /**
5349 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
5350 on the lower 32-bits, and writes the result back to the 64-bit MSR.
5351
5352 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5353 lower 32-bits of the read result and the value specified by AndData
5354 preserving the upper 32-bits, performs a bitwise OR between the
5355 result of the AND operation and the value specified by OrData, and writes the
5356 result to the 64-bit MSR specified by Address. The lower 32-bits of the value
5357 written to the MSR is returned. No parameter checking is performed on Index,
5358 AndData, or OrData, and some of these may cause CPU exceptions. The caller
5359 must either guarantee that Index, AndData, and OrData are valid, or the
5360 caller must establish proper exception handlers. This function is only
5361 available on IA-32 and x64.
5362
5363 @param Index The 32-bit MSR index to write.
5364 @param AndData The value to AND with the read value from the MSR.
5365 @param OrData The value to OR with the result of the AND operation.
5366
5367 @return The lower 32-bit value written to the MSR.
5368
5369 **/
5370 UINT32
5371 EFIAPI
5372 AsmMsrAndThenOr32 (
5373 IN UINT32 Index,
5374 IN UINT32 AndData,
5375 IN UINT32 OrData
5376 );
5377
5378
5379 /**
5380 Reads a bit field of an MSR.
5381
5382 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
5383 specified by the StartBit and the EndBit. The value of the bit field is
5384 returned. The caller must either guarantee that Index is valid, or the caller
5385 must set up exception handlers to catch the exceptions. This function is only
5386 available on IA-32 and x64.
5387
5388 If StartBit is greater than 31, then ASSERT().
5389 If EndBit is greater than 31, then ASSERT().
5390 If EndBit is less than StartBit, then ASSERT().
5391
5392 @param Index The 32-bit MSR index to read.
5393 @param StartBit The ordinal of the least significant bit in the bit field.
5394 Range 0..31.
5395 @param EndBit The ordinal of the most significant bit in the bit field.
5396 Range 0..31.
5397
5398 @return The bit field read from the MSR.
5399
5400 **/
5401 UINT32
5402 EFIAPI
5403 AsmMsrBitFieldRead32 (
5404 IN UINT32 Index,
5405 IN UINTN StartBit,
5406 IN UINTN EndBit
5407 );
5408
5409
5410 /**
5411 Writes a bit field to an MSR.
5412
5413 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
5414 field is specified by the StartBit and the EndBit. All other bits in the
5415 destination MSR are preserved. The lower 32-bits of the MSR written is
5416 returned. The caller must either guarantee that Index and the data written
5417 is valid, or the caller must set up exception handlers to catch the exceptions.
5418 This function is only available on IA-32 and x64.
5419
5420 If StartBit is greater than 31, then ASSERT().
5421 If EndBit is greater than 31, then ASSERT().
5422 If EndBit is less than StartBit, then ASSERT().
5423
5424 @param Index The 32-bit MSR index to write.
5425 @param StartBit The ordinal of the least significant bit in the bit field.
5426 Range 0..31.
5427 @param EndBit The ordinal of the most significant bit in the bit field.
5428 Range 0..31.
5429 @param Value New value of the bit field.
5430
5431 @return The lower 32-bit of the value written to the MSR.
5432
5433 **/
5434 UINT32
5435 EFIAPI
5436 AsmMsrBitFieldWrite32 (
5437 IN UINT32 Index,
5438 IN UINTN StartBit,
5439 IN UINTN EndBit,
5440 IN UINT32 Value
5441 );
5442
5443
5444 /**
5445 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
5446 result back to the bit field in the 64-bit MSR.
5447
5448 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5449 between the read result and the value specified by OrData, and writes the
5450 result to the 64-bit MSR specified by Index. The lower 32-bits of the value
5451 written to the MSR are returned. Extra left bits in OrData are stripped. The
5452 caller must either guarantee that Index and the data written is valid, or
5453 the caller must set up exception handlers to catch the exceptions. This
5454 function is only available on IA-32 and x64.
5455
5456 If StartBit is greater than 31, then ASSERT().
5457 If EndBit is greater than 31, then ASSERT().
5458 If EndBit is less than StartBit, then ASSERT().
5459
5460 @param Index The 32-bit MSR index to write.
5461 @param StartBit The ordinal of the least significant bit in the bit field.
5462 Range 0..31.
5463 @param EndBit The ordinal of the most significant bit in the bit field.
5464 Range 0..31.
5465 @param OrData The value to OR with the read value from the MSR.
5466
5467 @return The lower 32-bit of the value written to the MSR.
5468
5469 **/
5470 UINT32
5471 EFIAPI
5472 AsmMsrBitFieldOr32 (
5473 IN UINT32 Index,
5474 IN UINTN StartBit,
5475 IN UINTN EndBit,
5476 IN UINT32 OrData
5477 );
5478
5479
5480 /**
5481 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5482 result back to the bit field in the 64-bit MSR.
5483
5484 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5485 read result and the value specified by AndData, and writes the result to the
5486 64-bit MSR specified by Index. The lower 32-bits of the value written to the
5487 MSR are returned. Extra left bits in AndData are stripped. The caller must
5488 either guarantee that Index and the data written is valid, or the caller must
5489 set up exception handlers to catch the exceptions. This function is only
5490 available on IA-32 and x64.
5491
5492 If StartBit is greater than 31, then ASSERT().
5493 If EndBit is greater than 31, then ASSERT().
5494 If EndBit is less than StartBit, then ASSERT().
5495
5496 @param Index The 32-bit MSR index to write.
5497 @param StartBit The ordinal of the least significant bit in the bit field.
5498 Range 0..31.
5499 @param EndBit The ordinal of the most significant bit in the bit field.
5500 Range 0..31.
5501 @param AndData The value to AND with the read value from the MSR.
5502
5503 @return The lower 32-bit of the value written to the MSR.
5504
5505 **/
5506 UINT32
5507 EFIAPI
5508 AsmMsrBitFieldAnd32 (
5509 IN UINT32 Index,
5510 IN UINTN StartBit,
5511 IN UINTN EndBit,
5512 IN UINT32 AndData
5513 );
5514
5515
5516 /**
5517 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5518 bitwise OR, and writes the result back to the bit field in the
5519 64-bit MSR.
5520
5521 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
5522 bitwise OR between the read result and the value specified by
5523 AndData, and writes the result to the 64-bit MSR specified by Index. The
5524 lower 32-bits of the value written to the MSR are returned. Extra left bits
5525 in both AndData and OrData are stripped. The caller must either guarantee
5526 that Index and the data written is valid, or the caller must set up exception
5527 handlers to catch the exceptions. This function is only available on IA-32
5528 and x64.
5529
5530 If StartBit is greater than 31, then ASSERT().
5531 If EndBit is greater than 31, then ASSERT().
5532 If EndBit is less than StartBit, then ASSERT().
5533
5534 @param Index The 32-bit MSR index to write.
5535 @param StartBit The ordinal of the least significant bit in the bit field.
5536 Range 0..31.
5537 @param EndBit The ordinal of the most significant bit in the bit field.
5538 Range 0..31.
5539 @param AndData The value to AND with the read value from the MSR.
5540 @param OrData The value to OR with the result of the AND operation.
5541
5542 @return The lower 32-bit of the value written to the MSR.
5543
5544 **/
5545 UINT32
5546 EFIAPI
5547 AsmMsrBitFieldAndThenOr32 (
5548 IN UINT32 Index,
5549 IN UINTN StartBit,
5550 IN UINTN EndBit,
5551 IN UINT32 AndData,
5552 IN UINT32 OrData
5553 );
5554
5555
5556 /**
5557 Returns a 64-bit Machine Specific Register(MSR).
5558
5559 Reads and returns the 64-bit MSR specified by Index. No parameter checking is
5560 performed on Index, and some Index values may cause CPU exceptions. The
5561 caller must either guarantee that Index is valid, or the caller must set up
5562 exception handlers to catch the exceptions. This function is only available
5563 on IA-32 and x64.
5564
5565 @param Index The 32-bit MSR index to read.
5566
5567 @return The value of the MSR identified by Index.
5568
5569 **/
5570 UINT64
5571 EFIAPI
5572 AsmReadMsr64 (
5573 IN UINT32 Index
5574 );
5575
5576
5577 /**
5578 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
5579 value.
5580
5581 Writes the 64-bit value specified by Value to the MSR specified by Index. The
5582 64-bit value written to the MSR is returned. No parameter checking is
5583 performed on Index or Value, and some of these may cause CPU exceptions. The
5584 caller must either guarantee that Index and Value are valid, or the caller
5585 must establish proper exception handlers. This function is only available on
5586 IA-32 and x64.
5587
5588 @param Index The 32-bit MSR index to write.
5589 @param Value The 64-bit value to write to the MSR.
5590
5591 @return Value
5592
5593 **/
5594 UINT64
5595 EFIAPI
5596 AsmWriteMsr64 (
5597 IN UINT32 Index,
5598 IN UINT64 Value
5599 );
5600
5601
5602 /**
5603 Reads a 64-bit MSR, performs a bitwise OR, and writes the result
5604 back to the 64-bit MSR.
5605
5606 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5607 between the read result and the value specified by OrData, and writes the
5608 result to the 64-bit MSR specified by Index. The value written to the MSR is
5609 returned. No parameter checking is performed on Index or OrData, and some of
5610 these may cause CPU exceptions. The caller must either guarantee that Index
5611 and OrData are valid, or the caller must establish proper exception handlers.
5612 This function is only available on IA-32 and x64.
5613
5614 @param Index The 32-bit MSR index to write.
5615 @param OrData The value to OR with the read value from the MSR.
5616
5617 @return The value written back to the MSR.
5618
5619 **/
5620 UINT64
5621 EFIAPI
5622 AsmMsrOr64 (
5623 IN UINT32 Index,
5624 IN UINT64 OrData
5625 );
5626
5627
5628 /**
5629 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
5630 64-bit MSR.
5631
5632 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5633 read result and the value specified by OrData, and writes the result to the
5634 64-bit MSR specified by Index. The value written to the MSR is returned. No
5635 parameter checking is performed on Index or OrData, and some of these may
5636 cause CPU exceptions. The caller must either guarantee that Index and OrData
5637 are valid, or the caller must establish proper exception handlers. This
5638 function is only available on IA-32 and x64.
5639
5640 @param Index The 32-bit MSR index to write.
5641 @param AndData The value to AND with the read value from the MSR.
5642
5643 @return The value written back to the MSR.
5644
5645 **/
5646 UINT64
5647 EFIAPI
5648 AsmMsrAnd64 (
5649 IN UINT32 Index,
5650 IN UINT64 AndData
5651 );
5652
5653
5654 /**
5655 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
5656 OR, and writes the result back to the 64-bit MSR.
5657
5658 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
5659 result and the value specified by AndData, performs a bitwise OR
5660 between the result of the AND operation and the value specified by OrData,
5661 and writes the result to the 64-bit MSR specified by Index. The value written
5662 to the MSR is returned. No parameter checking is performed on Index, AndData,
5663 or OrData, and some of these may cause CPU exceptions. The caller must either
5664 guarantee that Index, AndData, and OrData are valid, or the caller must
5665 establish proper exception handlers. This function is only available on IA-32
5666 and x64.
5667
5668 @param Index The 32-bit MSR index to write.
5669 @param AndData The value to AND with the read value from the MSR.
5670 @param OrData The value to OR with the result of the AND operation.
5671
5672 @return The value written back to the MSR.
5673
5674 **/
5675 UINT64
5676 EFIAPI
5677 AsmMsrAndThenOr64 (
5678 IN UINT32 Index,
5679 IN UINT64 AndData,
5680 IN UINT64 OrData
5681 );
5682
5683
5684 /**
5685 Reads a bit field of an MSR.
5686
5687 Reads the bit field in the 64-bit MSR. The bit field is specified by the
5688 StartBit and the EndBit. The value of the bit field is returned. The caller
5689 must either guarantee that Index is valid, or the caller must set up
5690 exception handlers to catch the exceptions. This function is only available
5691 on IA-32 and x64.
5692
5693 If StartBit is greater than 63, then ASSERT().
5694 If EndBit is greater than 63, then ASSERT().
5695 If EndBit is less than StartBit, then ASSERT().
5696
5697 @param Index The 32-bit MSR index to read.
5698 @param StartBit The ordinal of the least significant bit in the bit field.
5699 Range 0..63.
5700 @param EndBit The ordinal of the most significant bit in the bit field.
5701 Range 0..63.
5702
5703 @return The value read from the MSR.
5704
5705 **/
5706 UINT64
5707 EFIAPI
5708 AsmMsrBitFieldRead64 (
5709 IN UINT32 Index,
5710 IN UINTN StartBit,
5711 IN UINTN EndBit
5712 );
5713
5714
5715 /**
5716 Writes a bit field to an MSR.
5717
5718 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
5719 the StartBit and the EndBit. All other bits in the destination MSR are
5720 preserved. The MSR written is returned. The caller must either guarantee
5721 that Index and the data written is valid, or the caller must set up exception
5722 handlers to catch the exceptions. This function is only available on IA-32 and x64.
5723
5724 If StartBit is greater than 63, then ASSERT().
5725 If EndBit is greater than 63, then ASSERT().
5726 If EndBit is less than StartBit, then ASSERT().
5727
5728 @param Index The 32-bit MSR index to write.
5729 @param StartBit The ordinal of the least significant bit in the bit field.
5730 Range 0..63.
5731 @param EndBit The ordinal of the most significant bit in the bit field.
5732 Range 0..63.
5733 @param Value New value of the bit field.
5734
5735 @return The value written back to the MSR.
5736
5737 **/
5738 UINT64
5739 EFIAPI
5740 AsmMsrBitFieldWrite64 (
5741 IN UINT32 Index,
5742 IN UINTN StartBit,
5743 IN UINTN EndBit,
5744 IN UINT64 Value
5745 );
5746
5747
5748 /**
5749 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
5750 writes the result back to the bit field in the 64-bit MSR.
5751
5752 Reads the 64-bit MSR specified by Index, performs a bitwise OR
5753 between the read result and the value specified by OrData, and writes the
5754 result to the 64-bit MSR specified by Index. The value written to the MSR is
5755 returned. Extra left bits in OrData are stripped. The caller must either
5756 guarantee that Index and the data written is valid, or the caller must set up
5757 exception handlers to catch the exceptions. This function is only available
5758 on IA-32 and x64.
5759
5760 If StartBit is greater than 63, then ASSERT().
5761 If EndBit is greater than 63, then ASSERT().
5762 If EndBit is less than StartBit, then ASSERT().
5763
5764 @param Index The 32-bit MSR index to write.
5765 @param StartBit The ordinal of the least significant bit in the bit field.
5766 Range 0..63.
5767 @param EndBit The ordinal of the most significant bit in the bit field.
5768 Range 0..63.
5769 @param OrData The value to OR with the read value from the bit field.
5770
5771 @return The value written back to the MSR.
5772
5773 **/
5774 UINT64
5775 EFIAPI
5776 AsmMsrBitFieldOr64 (
5777 IN UINT32 Index,
5778 IN UINTN StartBit,
5779 IN UINTN EndBit,
5780 IN UINT64 OrData
5781 );
5782
5783
5784 /**
5785 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
5786 result back to the bit field in the 64-bit MSR.
5787
5788 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
5789 read result and the value specified by AndData, and writes the result to the
5790 64-bit MSR specified by Index. The value written to the MSR is returned.
5791 Extra left bits in AndData are stripped. The caller must either guarantee
5792 that Index and the data written is valid, or the caller must set up exception
5793 handlers to catch the exceptions. This function is only available on IA-32
5794 and x64.
5795
5796 If StartBit is greater than 63, then ASSERT().
5797 If EndBit is greater than 63, then ASSERT().
5798 If EndBit is less than StartBit, then ASSERT().
5799
5800 @param Index The 32-bit MSR index to write.
5801 @param StartBit The ordinal of the least significant bit in the bit field.
5802 Range 0..63.
5803 @param EndBit The ordinal of the most significant bit in the bit field.
5804 Range 0..63.
5805 @param AndData The value to AND with the read value from the bit field.
5806
5807 @return The value written back to the MSR.
5808
5809 **/
5810 UINT64
5811 EFIAPI
5812 AsmMsrBitFieldAnd64 (
5813 IN UINT32 Index,
5814 IN UINTN StartBit,
5815 IN UINTN EndBit,
5816 IN UINT64 AndData
5817 );
5818
5819
5820 /**
5821 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
5822 bitwise OR, and writes the result back to the bit field in the
5823 64-bit MSR.
5824
5825 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
5826 a bitwise OR between the read result and the value specified by
5827 AndData, and writes the result to the 64-bit MSR specified by Index. The
5828 value written to the MSR is returned. Extra left bits in both AndData and
5829 OrData are stripped. The caller must either guarantee that Index and the data
5830 written is valid, or the caller must set up exception handlers to catch the
5831 exceptions. This function is only available on IA-32 and x64.
5832
5833 If StartBit is greater than 63, then ASSERT().
5834 If EndBit is greater than 63, then ASSERT().
5835 If EndBit is less than StartBit, then ASSERT().
5836
5837 @param Index The 32-bit MSR index to write.
5838 @param StartBit The ordinal of the least significant bit in the bit field.
5839 Range 0..63.
5840 @param EndBit The ordinal of the most significant bit in the bit field.
5841 Range 0..63.
5842 @param AndData The value to AND with the read value from the bit field.
5843 @param OrData The value to OR with the result of the AND operation.
5844
5845 @return The value written back to the MSR.
5846
5847 **/
5848 UINT64
5849 EFIAPI
5850 AsmMsrBitFieldAndThenOr64 (
5851 IN UINT32 Index,
5852 IN UINTN StartBit,
5853 IN UINTN EndBit,
5854 IN UINT64 AndData,
5855 IN UINT64 OrData
5856 );
5857
5858
5859 /**
5860 Reads the current value of the EFLAGS register.
5861
5862 Reads and returns the current value of the EFLAGS register. This function is
5863 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
5864 64-bit value on x64.
5865
5866 @return EFLAGS on IA-32 or RFLAGS on x64.
5867
5868 **/
5869 UINTN
5870 EFIAPI
5871 AsmReadEflags (
5872 VOID
5873 );
5874
5875
5876 /**
5877 Reads the current value of the Control Register 0 (CR0).
5878
5879 Reads and returns the current value of CR0. This function is only available
5880 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5881 x64.
5882
5883 @return The value of the Control Register 0 (CR0).
5884
5885 **/
5886 UINTN
5887 EFIAPI
5888 AsmReadCr0 (
5889 VOID
5890 );
5891
5892
5893 /**
5894 Reads the current value of the Control Register 2 (CR2).
5895
5896 Reads and returns the current value of CR2. This function is only available
5897 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5898 x64.
5899
5900 @return The value of the Control Register 2 (CR2).
5901
5902 **/
5903 UINTN
5904 EFIAPI
5905 AsmReadCr2 (
5906 VOID
5907 );
5908
5909
5910 /**
5911 Reads the current value of the Control Register 3 (CR3).
5912
5913 Reads and returns the current value of CR3. This function is only available
5914 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5915 x64.
5916
5917 @return The value of the Control Register 3 (CR3).
5918
5919 **/
5920 UINTN
5921 EFIAPI
5922 AsmReadCr3 (
5923 VOID
5924 );
5925
5926
5927 /**
5928 Reads the current value of the Control Register 4 (CR4).
5929
5930 Reads and returns the current value of CR4. This function is only available
5931 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
5932 x64.
5933
5934 @return The value of the Control Register 4 (CR4).
5935
5936 **/
5937 UINTN
5938 EFIAPI
5939 AsmReadCr4 (
5940 VOID
5941 );
5942
5943
5944 /**
5945 Writes a value to Control Register 0 (CR0).
5946
5947 Writes and returns a new value to CR0. This function is only available on
5948 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5949
5950 @param Cr0 The value to write to CR0.
5951
5952 @return The value written to CR0.
5953
5954 **/
5955 UINTN
5956 EFIAPI
5957 AsmWriteCr0 (
5958 UINTN Cr0
5959 );
5960
5961
5962 /**
5963 Writes a value to Control Register 2 (CR2).
5964
5965 Writes and returns a new value to CR2. This function is only available on
5966 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5967
5968 @param Cr2 The value to write to CR2.
5969
5970 @return The value written to CR2.
5971
5972 **/
5973 UINTN
5974 EFIAPI
5975 AsmWriteCr2 (
5976 UINTN Cr2
5977 );
5978
5979
5980 /**
5981 Writes a value to Control Register 3 (CR3).
5982
5983 Writes and returns a new value to CR3. This function is only available on
5984 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
5985
5986 @param Cr3 The value to write to CR3.
5987
5988 @return The value written to CR3.
5989
5990 **/
5991 UINTN
5992 EFIAPI
5993 AsmWriteCr3 (
5994 UINTN Cr3
5995 );
5996
5997
5998 /**
5999 Writes a value to Control Register 4 (CR4).
6000
6001 Writes and returns a new value to CR4. This function is only available on
6002 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6003
6004 @param Cr4 The value to write to CR4.
6005
6006 @return The value written to CR4.
6007
6008 **/
6009 UINTN
6010 EFIAPI
6011 AsmWriteCr4 (
6012 UINTN Cr4
6013 );
6014
6015
6016 /**
6017 Reads the current value of Debug Register 0 (DR0).
6018
6019 Reads and returns the current value of DR0. This function is only available
6020 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6021 x64.
6022
6023 @return The value of Debug Register 0 (DR0).
6024
6025 **/
6026 UINTN
6027 EFIAPI
6028 AsmReadDr0 (
6029 VOID
6030 );
6031
6032
6033 /**
6034 Reads the current value of Debug Register 1 (DR1).
6035
6036 Reads and returns the current value of DR1. This function is only available
6037 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6038 x64.
6039
6040 @return The value of Debug Register 1 (DR1).
6041
6042 **/
6043 UINTN
6044 EFIAPI
6045 AsmReadDr1 (
6046 VOID
6047 );
6048
6049
6050 /**
6051 Reads the current value of Debug Register 2 (DR2).
6052
6053 Reads and returns the current value of DR2. This function is only available
6054 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6055 x64.
6056
6057 @return The value of Debug Register 2 (DR2).
6058
6059 **/
6060 UINTN
6061 EFIAPI
6062 AsmReadDr2 (
6063 VOID
6064 );
6065
6066
6067 /**
6068 Reads the current value of Debug Register 3 (DR3).
6069
6070 Reads and returns the current value of DR3. This function is only available
6071 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6072 x64.
6073
6074 @return The value of Debug Register 3 (DR3).
6075
6076 **/
6077 UINTN
6078 EFIAPI
6079 AsmReadDr3 (
6080 VOID
6081 );
6082
6083
6084 /**
6085 Reads the current value of Debug Register 4 (DR4).
6086
6087 Reads and returns the current value of DR4. This function is only available
6088 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6089 x64.
6090
6091 @return The value of Debug Register 4 (DR4).
6092
6093 **/
6094 UINTN
6095 EFIAPI
6096 AsmReadDr4 (
6097 VOID
6098 );
6099
6100
6101 /**
6102 Reads the current value of Debug Register 5 (DR5).
6103
6104 Reads and returns the current value of DR5. This function is only available
6105 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6106 x64.
6107
6108 @return The value of Debug Register 5 (DR5).
6109
6110 **/
6111 UINTN
6112 EFIAPI
6113 AsmReadDr5 (
6114 VOID
6115 );
6116
6117
6118 /**
6119 Reads the current value of Debug Register 6 (DR6).
6120
6121 Reads and returns the current value of DR6. This function is only available
6122 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6123 x64.
6124
6125 @return The value of Debug Register 6 (DR6).
6126
6127 **/
6128 UINTN
6129 EFIAPI
6130 AsmReadDr6 (
6131 VOID
6132 );
6133
6134
6135 /**
6136 Reads the current value of Debug Register 7 (DR7).
6137
6138 Reads and returns the current value of DR7. This function is only available
6139 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
6140 x64.
6141
6142 @return The value of Debug Register 7 (DR7).
6143
6144 **/
6145 UINTN
6146 EFIAPI
6147 AsmReadDr7 (
6148 VOID
6149 );
6150
6151
6152 /**
6153 Writes a value to Debug Register 0 (DR0).
6154
6155 Writes and returns a new value to DR0. This function is only available on
6156 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6157
6158 @param Dr0 The value to write to Dr0.
6159
6160 @return The value written to Debug Register 0 (DR0).
6161
6162 **/
6163 UINTN
6164 EFIAPI
6165 AsmWriteDr0 (
6166 UINTN Dr0
6167 );
6168
6169
6170 /**
6171 Writes a value to Debug Register 1 (DR1).
6172
6173 Writes and returns a new value to DR1. This function is only available on
6174 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6175
6176 @param Dr1 The value to write to Dr1.
6177
6178 @return The value written to Debug Register 1 (DR1).
6179
6180 **/
6181 UINTN
6182 EFIAPI
6183 AsmWriteDr1 (
6184 UINTN Dr1
6185 );
6186
6187
6188 /**
6189 Writes a value to Debug Register 2 (DR2).
6190
6191 Writes and returns a new value to DR2. This function is only available on
6192 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6193
6194 @param Dr2 The value to write to Dr2.
6195
6196 @return The value written to Debug Register 2 (DR2).
6197
6198 **/
6199 UINTN
6200 EFIAPI
6201 AsmWriteDr2 (
6202 UINTN Dr2
6203 );
6204
6205
6206 /**
6207 Writes a value to Debug Register 3 (DR3).
6208
6209 Writes and returns a new value to DR3. This function is only available on
6210 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6211
6212 @param Dr3 The value to write to Dr3.
6213
6214 @return The value written to Debug Register 3 (DR3).
6215
6216 **/
6217 UINTN
6218 EFIAPI
6219 AsmWriteDr3 (
6220 UINTN Dr3
6221 );
6222
6223
6224 /**
6225 Writes a value to Debug Register 4 (DR4).
6226
6227 Writes and returns a new value to DR4. This function is only available on
6228 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6229
6230 @param Dr4 The value to write to Dr4.
6231
6232 @return The value written to Debug Register 4 (DR4).
6233
6234 **/
6235 UINTN
6236 EFIAPI
6237 AsmWriteDr4 (
6238 UINTN Dr4
6239 );
6240
6241
6242 /**
6243 Writes a value to Debug Register 5 (DR5).
6244
6245 Writes and returns a new value to DR5. This function is only available on
6246 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6247
6248 @param Dr5 The value to write to Dr5.
6249
6250 @return The value written to Debug Register 5 (DR5).
6251
6252 **/
6253 UINTN
6254 EFIAPI
6255 AsmWriteDr5 (
6256 UINTN Dr5
6257 );
6258
6259
6260 /**
6261 Writes a value to Debug Register 6 (DR6).
6262
6263 Writes and returns a new value to DR6. This function is only available on
6264 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6265
6266 @param Dr6 The value to write to Dr6.
6267
6268 @return The value written to Debug Register 6 (DR6).
6269
6270 **/
6271 UINTN
6272 EFIAPI
6273 AsmWriteDr6 (
6274 UINTN Dr6
6275 );
6276
6277
6278 /**
6279 Writes a value to Debug Register 7 (DR7).
6280
6281 Writes and returns a new value to DR7. This function is only available on
6282 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
6283
6284 @param Dr7 The value to write to Dr7.
6285
6286 @return The value written to Debug Register 7 (DR7).
6287
6288 **/
6289 UINTN
6290 EFIAPI
6291 AsmWriteDr7 (
6292 UINTN Dr7
6293 );
6294
6295
6296 /**
6297 Reads the current value of Code Segment Register (CS).
6298
6299 Reads and returns the current value of CS. This function is only available on
6300 IA-32 and x64.
6301
6302 @return The current value of CS.
6303
6304 **/
6305 UINT16
6306 EFIAPI
6307 AsmReadCs (
6308 VOID
6309 );
6310
6311
6312 /**
6313 Reads the current value of Data Segment Register (DS).
6314
6315 Reads and returns the current value of DS. This function is only available on
6316 IA-32 and x64.
6317
6318 @return The current value of DS.
6319
6320 **/
6321 UINT16
6322 EFIAPI
6323 AsmReadDs (
6324 VOID
6325 );
6326
6327
6328 /**
6329 Reads the current value of Extra Segment Register (ES).
6330
6331 Reads and returns the current value of ES. This function is only available on
6332 IA-32 and x64.
6333
6334 @return The current value of ES.
6335
6336 **/
6337 UINT16
6338 EFIAPI
6339 AsmReadEs (
6340 VOID
6341 );
6342
6343
6344 /**
6345 Reads the current value of FS Data Segment Register (FS).
6346
6347 Reads and returns the current value of FS. This function is only available on
6348 IA-32 and x64.
6349
6350 @return The current value of FS.
6351
6352 **/
6353 UINT16
6354 EFIAPI
6355 AsmReadFs (
6356 VOID
6357 );
6358
6359
6360 /**
6361 Reads the current value of GS Data Segment Register (GS).
6362
6363 Reads and returns the current value of GS. This function is only available on
6364 IA-32 and x64.
6365
6366 @return The current value of GS.
6367
6368 **/
6369 UINT16
6370 EFIAPI
6371 AsmReadGs (
6372 VOID
6373 );
6374
6375
6376 /**
6377 Reads the current value of Stack Segment Register (SS).
6378
6379 Reads and returns the current value of SS. This function is only available on
6380 IA-32 and x64.
6381
6382 @return The current value of SS.
6383
6384 **/
6385 UINT16
6386 EFIAPI
6387 AsmReadSs (
6388 VOID
6389 );
6390
6391
6392 /**
6393 Reads the current value of Task Register (TR).
6394
6395 Reads and returns the current value of TR. This function is only available on
6396 IA-32 and x64.
6397
6398 @return The current value of TR.
6399
6400 **/
6401 UINT16
6402 EFIAPI
6403 AsmReadTr (
6404 VOID
6405 );
6406
6407
6408 /**
6409 Reads the current Global Descriptor Table Register(GDTR) descriptor.
6410
6411 Reads and returns the current GDTR descriptor and returns it in Gdtr. This
6412 function is only available on IA-32 and x64.
6413
6414 If Gdtr is NULL, then ASSERT().
6415
6416 @param Gdtr Pointer to a GDTR descriptor.
6417
6418 **/
6419 VOID
6420 EFIAPI
6421 AsmReadGdtr (
6422 OUT IA32_DESCRIPTOR *Gdtr
6423 );
6424
6425
6426 /**
6427 Writes the current Global Descriptor Table Register (GDTR) descriptor.
6428
6429 Writes and the current GDTR descriptor specified by Gdtr. This function is
6430 only available on IA-32 and x64.
6431
6432 If Gdtr is NULL, then ASSERT().
6433
6434 @param Gdtr Pointer to a GDTR descriptor.
6435
6436 **/
6437 VOID
6438 EFIAPI
6439 AsmWriteGdtr (
6440 IN CONST IA32_DESCRIPTOR *Gdtr
6441 );
6442
6443
6444 /**
6445 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
6446
6447 Reads and returns the current IDTR descriptor and returns it in Idtr. This
6448 function is only available on IA-32 and x64.
6449
6450 If Idtr is NULL, then ASSERT().
6451
6452 @param Idtr Pointer to a IDTR descriptor.
6453
6454 **/
6455 VOID
6456 EFIAPI
6457 AsmReadIdtr (
6458 OUT IA32_DESCRIPTOR *Idtr
6459 );
6460
6461
6462 /**
6463 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
6464
6465 Writes the current IDTR descriptor and returns it in Idtr. This function is
6466 only available on IA-32 and x64.
6467
6468 If Idtr is NULL, then ASSERT().
6469
6470 @param Idtr Pointer to a IDTR descriptor.
6471
6472 **/
6473 VOID
6474 EFIAPI
6475 AsmWriteIdtr (
6476 IN CONST IA32_DESCRIPTOR *Idtr
6477 );
6478
6479
6480 /**
6481 Reads the current Local Descriptor Table Register(LDTR) selector.
6482
6483 Reads and returns the current 16-bit LDTR descriptor value. This function is
6484 only available on IA-32 and x64.
6485
6486 @return The current selector of LDT.
6487
6488 **/
6489 UINT16
6490 EFIAPI
6491 AsmReadLdtr (
6492 VOID
6493 );
6494
6495
6496 /**
6497 Writes the current Local Descriptor Table Register (LDTR) selector.
6498
6499 Writes and the current LDTR descriptor specified by Ldtr. This function is
6500 only available on IA-32 and x64.
6501
6502 @param Ldtr 16-bit LDTR selector value.
6503
6504 **/
6505 VOID
6506 EFIAPI
6507 AsmWriteLdtr (
6508 IN UINT16 Ldtr
6509 );
6510
6511
6512 /**
6513 Save the current floating point/SSE/SSE2 context to a buffer.
6514
6515 Saves the current floating point/SSE/SSE2 state to the buffer specified by
6516 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
6517 available on IA-32 and x64.
6518
6519 If Buffer is NULL, then ASSERT().
6520 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6521
6522 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6523
6524 **/
6525 VOID
6526 EFIAPI
6527 AsmFxSave (
6528 OUT IA32_FX_BUFFER *Buffer
6529 );
6530
6531
6532 /**
6533 Restores the current floating point/SSE/SSE2 context from a buffer.
6534
6535 Restores the current floating point/SSE/SSE2 state from the buffer specified
6536 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
6537 only available on IA-32 and x64.
6538
6539 If Buffer is NULL, then ASSERT().
6540 If Buffer is not aligned on a 16-byte boundary, then ASSERT().
6541 If Buffer was not saved with AsmFxSave(), then ASSERT().
6542
6543 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
6544
6545 **/
6546 VOID
6547 EFIAPI
6548 AsmFxRestore (
6549 IN CONST IA32_FX_BUFFER *Buffer
6550 );
6551
6552
6553 /**
6554 Reads the current value of 64-bit MMX Register #0 (MM0).
6555
6556 Reads and returns the current value of MM0. This function is only available
6557 on IA-32 and x64.
6558
6559 @return The current value of MM0.
6560
6561 **/
6562 UINT64
6563 EFIAPI
6564 AsmReadMm0 (
6565 VOID
6566 );
6567
6568
6569 /**
6570 Reads the current value of 64-bit MMX Register #1 (MM1).
6571
6572 Reads and returns the current value of MM1. This function is only available
6573 on IA-32 and x64.
6574
6575 @return The current value of MM1.
6576
6577 **/
6578 UINT64
6579 EFIAPI
6580 AsmReadMm1 (
6581 VOID
6582 );
6583
6584
6585 /**
6586 Reads the current value of 64-bit MMX Register #2 (MM2).
6587
6588 Reads and returns the current value of MM2. This function is only available
6589 on IA-32 and x64.
6590
6591 @return The current value of MM2.
6592
6593 **/
6594 UINT64
6595 EFIAPI
6596 AsmReadMm2 (
6597 VOID
6598 );
6599
6600
6601 /**
6602 Reads the current value of 64-bit MMX Register #3 (MM3).
6603
6604 Reads and returns the current value of MM3. This function is only available
6605 on IA-32 and x64.
6606
6607 @return The current value of MM3.
6608
6609 **/
6610 UINT64
6611 EFIAPI
6612 AsmReadMm3 (
6613 VOID
6614 );
6615
6616
6617 /**
6618 Reads the current value of 64-bit MMX Register #4 (MM4).
6619
6620 Reads and returns the current value of MM4. This function is only available
6621 on IA-32 and x64.
6622
6623 @return The current value of MM4.
6624
6625 **/
6626 UINT64
6627 EFIAPI
6628 AsmReadMm4 (
6629 VOID
6630 );
6631
6632
6633 /**
6634 Reads the current value of 64-bit MMX Register #5 (MM5).
6635
6636 Reads and returns the current value of MM5. This function is only available
6637 on IA-32 and x64.
6638
6639 @return The current value of MM5.
6640
6641 **/
6642 UINT64
6643 EFIAPI
6644 AsmReadMm5 (
6645 VOID
6646 );
6647
6648
6649 /**
6650 Reads the current value of 64-bit MMX Register #6 (MM6).
6651
6652 Reads and returns the current value of MM6. This function is only available
6653 on IA-32 and x64.
6654
6655 @return The current value of MM6.
6656
6657 **/
6658 UINT64
6659 EFIAPI
6660 AsmReadMm6 (
6661 VOID
6662 );
6663
6664
6665 /**
6666 Reads the current value of 64-bit MMX Register #7 (MM7).
6667
6668 Reads and returns the current value of MM7. This function is only available
6669 on IA-32 and x64.
6670
6671 @return The current value of MM7.
6672
6673 **/
6674 UINT64
6675 EFIAPI
6676 AsmReadMm7 (
6677 VOID
6678 );
6679
6680
6681 /**
6682 Writes the current value of 64-bit MMX Register #0 (MM0).
6683
6684 Writes the current value of MM0. This function is only available on IA32 and
6685 x64.
6686
6687 @param Value The 64-bit value to write to MM0.
6688
6689 **/
6690 VOID
6691 EFIAPI
6692 AsmWriteMm0 (
6693 IN UINT64 Value
6694 );
6695
6696
6697 /**
6698 Writes the current value of 64-bit MMX Register #1 (MM1).
6699
6700 Writes the current value of MM1. This function is only available on IA32 and
6701 x64.
6702
6703 @param Value The 64-bit value to write to MM1.
6704
6705 **/
6706 VOID
6707 EFIAPI
6708 AsmWriteMm1 (
6709 IN UINT64 Value
6710 );
6711
6712
6713 /**
6714 Writes the current value of 64-bit MMX Register #2 (MM2).
6715
6716 Writes the current value of MM2. This function is only available on IA32 and
6717 x64.
6718
6719 @param Value The 64-bit value to write to MM2.
6720
6721 **/
6722 VOID
6723 EFIAPI
6724 AsmWriteMm2 (
6725 IN UINT64 Value
6726 );
6727
6728
6729 /**
6730 Writes the current value of 64-bit MMX Register #3 (MM3).
6731
6732 Writes the current value of MM3. This function is only available on IA32 and
6733 x64.
6734
6735 @param Value The 64-bit value to write to MM3.
6736
6737 **/
6738 VOID
6739 EFIAPI
6740 AsmWriteMm3 (
6741 IN UINT64 Value
6742 );
6743
6744
6745 /**
6746 Writes the current value of 64-bit MMX Register #4 (MM4).
6747
6748 Writes the current value of MM4. This function is only available on IA32 and
6749 x64.
6750
6751 @param Value The 64-bit value to write to MM4.
6752
6753 **/
6754 VOID
6755 EFIAPI
6756 AsmWriteMm4 (
6757 IN UINT64 Value
6758 );
6759
6760
6761 /**
6762 Writes the current value of 64-bit MMX Register #5 (MM5).
6763
6764 Writes the current value of MM5. This function is only available on IA32 and
6765 x64.
6766
6767 @param Value The 64-bit value to write to MM5.
6768
6769 **/
6770 VOID
6771 EFIAPI
6772 AsmWriteMm5 (
6773 IN UINT64 Value
6774 );
6775
6776
6777 /**
6778 Writes the current value of 64-bit MMX Register #6 (MM6).
6779
6780 Writes the current value of MM6. This function is only available on IA32 and
6781 x64.
6782
6783 @param Value The 64-bit value to write to MM6.
6784
6785 **/
6786 VOID
6787 EFIAPI
6788 AsmWriteMm6 (
6789 IN UINT64 Value
6790 );
6791
6792
6793 /**
6794 Writes the current value of 64-bit MMX Register #7 (MM7).
6795
6796 Writes the current value of MM7. This function is only available on IA32 and
6797 x64.
6798
6799 @param Value The 64-bit value to write to MM7.
6800
6801 **/
6802 VOID
6803 EFIAPI
6804 AsmWriteMm7 (
6805 IN UINT64 Value
6806 );
6807
6808
6809 /**
6810 Reads the current value of Time Stamp Counter (TSC).
6811
6812 Reads and returns the current value of TSC. This function is only available
6813 on IA-32 and x64.
6814
6815 @return The current value of TSC
6816
6817 **/
6818 UINT64
6819 EFIAPI
6820 AsmReadTsc (
6821 VOID
6822 );
6823
6824
6825 /**
6826 Reads the current value of a Performance Counter (PMC).
6827
6828 Reads and returns the current value of performance counter specified by
6829 Index. This function is only available on IA-32 and x64.
6830
6831 @param Index The 32-bit Performance Counter index to read.
6832
6833 @return The value of the PMC specified by Index.
6834
6835 **/
6836 UINT64
6837 EFIAPI
6838 AsmReadPmc (
6839 IN UINT32 Index
6840 );
6841
6842
6843 /**
6844 Sets up a monitor buffer that is used by AsmMwait().
6845
6846 Executes a MONITOR instruction with the register state specified by Eax, Ecx
6847 and Edx. Returns Eax. This function is only available on IA-32 and x64.
6848
6849 @param Eax The value to load into EAX or RAX before executing the MONITOR
6850 instruction.
6851 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6852 instruction.
6853 @param Edx The value to load into EDX or RDX before executing the MONITOR
6854 instruction.
6855
6856 @return Eax
6857
6858 **/
6859 UINTN
6860 EFIAPI
6861 AsmMonitor (
6862 IN UINTN Eax,
6863 IN UINTN Ecx,
6864 IN UINTN Edx
6865 );
6866
6867
6868 /**
6869 Executes an MWAIT instruction.
6870
6871 Executes an MWAIT instruction with the register state specified by Eax and
6872 Ecx. Returns Eax. This function is only available on IA-32 and x64.
6873
6874 @param Eax The value to load into EAX or RAX before executing the MONITOR
6875 instruction.
6876 @param Ecx The value to load into ECX or RCX before executing the MONITOR
6877 instruction.
6878
6879 @return Eax
6880
6881 **/
6882 UINTN
6883 EFIAPI
6884 AsmMwait (
6885 IN UINTN Eax,
6886 IN UINTN Ecx
6887 );
6888
6889
6890 /**
6891 Executes a WBINVD instruction.
6892
6893 Executes a WBINVD instruction. This function is only available on IA-32 and
6894 x64.
6895
6896 **/
6897 VOID
6898 EFIAPI
6899 AsmWbinvd (
6900 VOID
6901 );
6902
6903
6904 /**
6905 Executes a INVD instruction.
6906
6907 Executes a INVD instruction. This function is only available on IA-32 and
6908 x64.
6909
6910 **/
6911 VOID
6912 EFIAPI
6913 AsmInvd (
6914 VOID
6915 );
6916
6917
6918 /**
6919 Flushes a cache line from all the instruction and data caches within the
6920 coherency domain of the CPU.
6921
6922 Flushed the cache line specified by LinearAddress, and returns LinearAddress.
6923 This function is only available on IA-32 and x64.
6924
6925 @param LinearAddress The address of the cache line to flush. If the CPU is
6926 in a physical addressing mode, then LinearAddress is a
6927 physical address. If the CPU is in a virtual
6928 addressing mode, then LinearAddress is a virtual
6929 address.
6930
6931 @return LinearAddress
6932 **/
6933 VOID *
6934 EFIAPI
6935 AsmFlushCacheLine (
6936 IN VOID *LinearAddress
6937 );
6938
6939
6940 /**
6941 Enables the 32-bit paging mode on the CPU.
6942
6943 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
6944 must be properly initialized prior to calling this service. This function
6945 assumes the current execution mode is 32-bit protected mode. This function is
6946 only available on IA-32. After the 32-bit paging mode is enabled, control is
6947 transferred to the function specified by EntryPoint using the new stack
6948 specified by NewStack and passing in the parameters specified by Context1 and
6949 Context2. Context1 and Context2 are optional and may be NULL. The function
6950 EntryPoint must never return.
6951
6952 If the current execution mode is not 32-bit protected mode, then ASSERT().
6953 If EntryPoint is NULL, then ASSERT().
6954 If NewStack is NULL, then ASSERT().
6955
6956 There are a number of constraints that must be followed before calling this
6957 function:
6958 1) Interrupts must be disabled.
6959 2) The caller must be in 32-bit protected mode with flat descriptors. This
6960 means all descriptors must have a base of 0 and a limit of 4GB.
6961 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
6962 descriptors.
6963 4) CR3 must point to valid page tables that will be used once the transition
6964 is complete, and those page tables must guarantee that the pages for this
6965 function and the stack are identity mapped.
6966
6967 @param EntryPoint A pointer to function to call with the new stack after
6968 paging is enabled.
6969 @param Context1 A pointer to the context to pass into the EntryPoint
6970 function as the first parameter after paging is enabled.
6971 @param Context2 A pointer to the context to pass into the EntryPoint
6972 function as the second parameter after paging is enabled.
6973 @param NewStack A pointer to the new stack to use for the EntryPoint
6974 function after paging is enabled.
6975
6976 **/
6977 VOID
6978 EFIAPI
6979 AsmEnablePaging32 (
6980 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
6981 IN VOID *Context1, OPTIONAL
6982 IN VOID *Context2, OPTIONAL
6983 IN VOID *NewStack
6984 );
6985
6986
6987 /**
6988 Disables the 32-bit paging mode on the CPU.
6989
6990 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
6991 mode. This function assumes the current execution mode is 32-paged protected
6992 mode. This function is only available on IA-32. After the 32-bit paging mode
6993 is disabled, control is transferred to the function specified by EntryPoint
6994 using the new stack specified by NewStack and passing in the parameters
6995 specified by Context1 and Context2. Context1 and Context2 are optional and
6996 may be NULL. The function EntryPoint must never return.
6997
6998 If the current execution mode is not 32-bit paged mode, then ASSERT().
6999 If EntryPoint is NULL, then ASSERT().
7000 If NewStack is NULL, then ASSERT().
7001
7002 There are a number of constraints that must be followed before calling this
7003 function:
7004 1) Interrupts must be disabled.
7005 2) The caller must be in 32-bit paged mode.
7006 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
7007 4) CR3 must point to valid page tables that guarantee that the pages for
7008 this function and the stack are identity mapped.
7009
7010 @param EntryPoint A pointer to function to call with the new stack after
7011 paging is disabled.
7012 @param Context1 A pointer to the context to pass into the EntryPoint
7013 function as the first parameter after paging is disabled.
7014 @param Context2 A pointer to the context to pass into the EntryPoint
7015 function as the second parameter after paging is
7016 disabled.
7017 @param NewStack A pointer to the new stack to use for the EntryPoint
7018 function after paging is disabled.
7019
7020 **/
7021 VOID
7022 EFIAPI
7023 AsmDisablePaging32 (
7024 IN SWITCH_STACK_ENTRY_POINT EntryPoint,
7025 IN VOID *Context1, OPTIONAL
7026 IN VOID *Context2, OPTIONAL
7027 IN VOID *NewStack
7028 );
7029
7030
7031 /**
7032 Enables the 64-bit paging mode on the CPU.
7033
7034 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
7035 must be properly initialized prior to calling this service. This function
7036 assumes the current execution mode is 32-bit protected mode with flat
7037 descriptors. This function is only available on IA-32. After the 64-bit
7038 paging mode is enabled, control is transferred to the function specified by
7039 EntryPoint using the new stack specified by NewStack and passing in the
7040 parameters specified by Context1 and Context2. Context1 and Context2 are
7041 optional and may be 0. The function EntryPoint must never return.
7042
7043 If the current execution mode is not 32-bit protected mode with flat
7044 descriptors, then ASSERT().
7045 If EntryPoint is 0, then ASSERT().
7046 If NewStack is 0, then ASSERT().
7047
7048 @param Cs The 16-bit selector to load in the CS before EntryPoint
7049 is called. The descriptor in the GDT that this selector
7050 references must be setup for long mode.
7051 @param EntryPoint The 64-bit virtual address of the function to call with
7052 the new stack after paging is enabled.
7053 @param Context1 The 64-bit virtual address of the context to pass into
7054 the EntryPoint function as the first parameter after
7055 paging is enabled.
7056 @param Context2 The 64-bit virtual address of the context to pass into
7057 the EntryPoint function as the second parameter after
7058 paging is enabled.
7059 @param NewStack The 64-bit virtual address of the new stack to use for
7060 the EntryPoint function after paging is enabled.
7061
7062 **/
7063 VOID
7064 EFIAPI
7065 AsmEnablePaging64 (
7066 IN UINT16 Cs,
7067 IN UINT64 EntryPoint,
7068 IN UINT64 Context1, OPTIONAL
7069 IN UINT64 Context2, OPTIONAL
7070 IN UINT64 NewStack
7071 );
7072
7073
7074 /**
7075 Disables the 64-bit paging mode on the CPU.
7076
7077 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
7078 mode. This function assumes the current execution mode is 64-paging mode.
7079 This function is only available on x64. After the 64-bit paging mode is
7080 disabled, control is transferred to the function specified by EntryPoint
7081 using the new stack specified by NewStack and passing in the parameters
7082 specified by Context1 and Context2. Context1 and Context2 are optional and
7083 may be 0. The function EntryPoint must never return.
7084
7085 If the current execution mode is not 64-bit paged mode, then ASSERT().
7086 If EntryPoint is 0, then ASSERT().
7087 If NewStack is 0, then ASSERT().
7088
7089 @param Cs The 16-bit selector to load in the CS before EntryPoint
7090 is called. The descriptor in the GDT that this selector
7091 references must be setup for 32-bit protected mode.
7092 @param EntryPoint The 64-bit virtual address of the function to call with
7093 the new stack after paging is disabled.
7094 @param Context1 The 64-bit virtual address of the context to pass into
7095 the EntryPoint function as the first parameter after
7096 paging is disabled.
7097 @param Context2 The 64-bit virtual address of the context to pass into
7098 the EntryPoint function as the second parameter after
7099 paging is disabled.
7100 @param NewStack The 64-bit virtual address of the new stack to use for
7101 the EntryPoint function after paging is disabled.
7102
7103 **/
7104 VOID
7105 EFIAPI
7106 AsmDisablePaging64 (
7107 IN UINT16 Cs,
7108 IN UINT32 EntryPoint,
7109 IN UINT32 Context1, OPTIONAL
7110 IN UINT32 Context2, OPTIONAL
7111 IN UINT32 NewStack
7112 );
7113
7114
7115 //
7116 // 16-bit thunking services
7117 //
7118
7119 /**
7120 Retrieves the properties for 16-bit thunk functions.
7121
7122 Computes the size of the buffer and stack below 1MB required to use the
7123 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
7124 buffer size is returned in RealModeBufferSize, and the stack size is returned
7125 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
7126 then the actual minimum stack size is ExtraStackSize plus the maximum number
7127 of bytes that need to be passed to the 16-bit real mode code.
7128
7129 If RealModeBufferSize is NULL, then ASSERT().
7130 If ExtraStackSize is NULL, then ASSERT().
7131
7132 @param RealModeBufferSize A pointer to the size of the buffer below 1MB
7133 required to use the 16-bit thunk functions.
7134 @param ExtraStackSize A pointer to the extra size of stack below 1MB
7135 that the 16-bit thunk functions require for
7136 temporary storage in the transition to and from
7137 16-bit real mode.
7138
7139 **/
7140 VOID
7141 EFIAPI
7142 AsmGetThunk16Properties (
7143 OUT UINT32 *RealModeBufferSize,
7144 OUT UINT32 *ExtraStackSize
7145 );
7146
7147
7148 /**
7149 Prepares all structures a code required to use AsmThunk16().
7150
7151 Prepares all structures and code required to use AsmThunk16().
7152
7153 If ThunkContext is NULL, then ASSERT().
7154
7155 @param ThunkContext A pointer to the context structure that describes the
7156 16-bit real mode code to call.
7157
7158 **/
7159 VOID
7160 EFIAPI
7161 AsmPrepareThunk16 (
7162 OUT THUNK_CONTEXT *ThunkContext
7163 );
7164
7165
7166 /**
7167 Transfers control to a 16-bit real mode entry point and returns the results.
7168
7169 Transfers control to a 16-bit real mode entry point and returns the results.
7170 AsmPrepareThunk16() must be called with ThunkContext before this function is used.
7171 This function must be called with interrupts disabled.
7172
7173 The register state from the RealModeState field of ThunkContext is restored just prior
7174 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState,
7175 which is used to set the interrupt state when a 16-bit real mode entry point is called.
7176 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
7177 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to
7178 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
7179 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
7180 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
7181 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
7182 point must exit with a RETF instruction. The register state is captured into RealModeState immediately
7183 after the RETF instruction is executed.
7184
7185 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7186 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
7187 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
7188
7189 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
7190 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
7191 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
7192
7193 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
7194 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
7195
7196 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7197 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
7198 disable the A20 mask.
7199
7200 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
7201 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails,
7202 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7203
7204 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
7205 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
7206
7207 If ThunkContext is NULL, then ASSERT().
7208 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
7209 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
7210 ThunkAttributes, then ASSERT().
7211
7212 @param ThunkContext A pointer to the context structure that describes the
7213 16-bit real mode code to call.
7214
7215 **/
7216 VOID
7217 EFIAPI
7218 AsmThunk16 (
7219 IN OUT THUNK_CONTEXT *ThunkContext
7220 );
7221
7222
7223 /**
7224 Prepares all structures and code for a 16-bit real mode thunk, transfers
7225 control to a 16-bit real mode entry point, and returns the results.
7226
7227 Prepares all structures and code for a 16-bit real mode thunk, transfers
7228 control to a 16-bit real mode entry point, and returns the results. If the
7229 caller only need to perform a single 16-bit real mode thunk, then this
7230 service should be used. If the caller intends to make more than one 16-bit
7231 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
7232 once and AsmThunk16() can be called for each 16-bit real mode thunk.
7233
7234 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
7235
7236 @param ThunkContext A pointer to the context structure that describes the
7237 16-bit real mode code to call.
7238
7239 **/
7240 VOID
7241 EFIAPI
7242 AsmPrepareAndThunk16 (
7243 IN OUT THUNK_CONTEXT *ThunkContext
7244 );
7245
7246 #endif
7247 #endif
7248
7249