2 EFI MM Configuration PPI as defined in PI 1.5 specification.
5 1) report the portions of MMRAM regions which cannot be used for the MMRAM heap.
6 2) register the MM Foundation entry point with the processor code. The entry
7 point will be invoked by the MM processor entry code.
9 Copyright (c) Microsoft Corporation.
10 SPDX-License-Identifier: BSD-2-Clause-Patent
14 #ifndef MM_CONFIGURATION_PPI_H_
15 #define MM_CONFIGURATION_PPI_H_
17 #include <Pi/PiMultiPhase.h>
19 #define EFI_PEI_MM_CONFIGURATION_PPI_GUID \
21 0xc109319, 0xc149, 0x450e, { 0xa3, 0xe3, 0xb9, 0xba, 0xdd, 0x9d, 0xc3, 0xa4 } \
24 typedef struct _EFI_PEI_MM_CONFIGURATION_PPI EFI_PEI_MM_CONFIGURATION_PPI
;
27 This function registers the MM Foundation entry point with the processor code. This entry point will be
28 invoked by the MM Processor entry code as defined in PI specification.
30 @param[in] This The EFI_PEI_MM_CONFIGURATION_PPI instance.
31 @param[in] MmEntryPoint MM Foundation entry point.
33 @retval EFI_SUCCESS The entry-point was successfully registered.
38 (EFIAPI
*EFI_PEI_MM_REGISTER_MM_ENTRY
)(
39 IN CONST EFI_PEI_MM_CONFIGURATION_PPI
*This
,
40 IN EFI_MM_ENTRY_POINT MmEntryPoint
44 /// This PPI is a PPI published by a CPU PEIM to indicate which areas within MMRAM are reserved for use by
45 /// the CPU for any purpose, such as stack, save state or MM entry point. If a platform chooses to let a CPU
46 /// PEIM do MMRAM relocation, this PPI must be produced by this CPU PEIM.
48 /// The MmramReservedRegions points to an array of one or more EFI_MM_RESERVED_MMRAM_REGION structures, with
49 /// the last structure having the MmramReservedSize set to 0. An empty array would contain only the last
52 /// The RegisterMmEntry() function allows the MM IPL PEIM to register the MM Foundation entry point with the
53 /// MM entry vector code.
55 struct _EFI_PEI_MM_CONFIGURATION_PPI
{
56 EFI_MM_RESERVED_MMRAM_REGION
*MmramReservedRegions
;
57 EFI_PEI_MM_REGISTER_MM_ENTRY RegisterMmEntry
;
60 extern EFI_GUID gEfiPeiMmConfigurationPpi
;