MdePkg/Include/Ppi/MmControl.h

   1 /** @file
   2   EFI MM Control PPI definition.
   3
   4   This PPI is used initiate synchronous MMI activations. This PPI could be published by a processor
   5   driver to abstract the MMI IPI or a driver which abstracts the ASIC that is supporting the APM port.
   6   Because of the possibility of performing MMI IPI transactions, the ability to generate this event
   7   from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
   8
   9   Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
  10   SPDX-License-Identifier: BSD-2-Clause-Patent
  11
  12   @par Revision Reference:
  13   This PPI is introduced in PI Version 1.5.
  14
  15 **/
  16
  17 #ifndef _MM_CONTROL_PPI_H_
  18 #define _MM_CONTROL_PPI_H_
  19
  20 #define EFI_PEI_MM_CONTROL_PPI_GUID \
  21   { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }
  22
  23 typedef struct _EFI_PEI_MM_CONTROL_PPI EFI_PEI_MM_CONTROL_PPI;
  24
  25 /**
  26   Invokes PPI activation from the PI PEI environment.
  27
  28   @param  PeiServices           An indirect pointer to the PEI Services Table published by the PEI Foundation.
  29   @param  This                  The PEI_MM_CONTROL_PPI instance.
  30   @param  ArgumentBuffer        The value passed to the MMI handler. This value corresponds to the
  31                                 SwMmiInputValue in the RegisterContext parameter for the Register()
  32                                 function in the EFI_MM_SW_DISPATCH_PROTOCOL and in the Context parameter
  33                                 in the call to the DispatchFunction
  34   @param  ArgumentBufferSize    The size of the data passed in ArgumentBuffer or NULL if ArgumentBuffer is NULL.
  35   @param  Periodic              An optional mechanism to periodically repeat activation.
  36   @param  ActivationInterval    An optional parameter to repeat at this period one
  37                                 time or, if the Periodic Boolean is set, periodically.
  38
  39   @retval EFI_SUCCESS           The MMI has been engendered.
  40   @retval EFI_DEVICE_ERROR      The timing is unsupported.
  41   @retval EFI_INVALID_PARAMETER The activation period is unsupported.
  42   @retval EFI_NOT_STARTED       The MM base service has not been initialized.
  43
  44 **/
  45 typedef
  46 EFI_STATUS
  47 (EFIAPI *EFI_PEI_MM_ACTIVATE)(
  48   IN EFI_PEI_SERVICES                                **PeiServices,
  49   IN EFI_PEI_MM_CONTROL_PPI                          *This,
  50   IN OUT INT8                                        *ArgumentBuffer OPTIONAL,
  51   IN OUT UINTN                                       *ArgumentBufferSize OPTIONAL,
  52   IN BOOLEAN                                         Periodic OPTIONAL,
  53   IN UINTN                                           ActivationInterval OPTIONAL
  54   );
  55
  56 /**
  57   Clears any system state that was created in response to the Trigger() call.
  58
  59   @param  PeiServices           General purpose services available to every PEIM.
  60   @param  This                  The PEI_MM_CONTROL_PPI instance.
  61   @param  Periodic              Optional parameter to repeat at this period one
  62                                 time or, if the Periodic Boolean is set, periodically.
  63
  64   @retval EFI_SUCCESS           The MMI has been engendered.
  65   @retval EFI_DEVICE_ERROR      The source could not be cleared.
  66   @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
  67
  68 **/
  69 typedef
  70 EFI_STATUS
  71 (EFIAPI *EFI_PEI_MM_DEACTIVATE)(
  72   IN EFI_PEI_SERVICES                      **PeiServices,
  73   IN EFI_PEI_MM_CONTROL_PPI                *This,
  74   IN BOOLEAN                               Periodic OPTIONAL
  75   );
  76
  77 ///
  78 ///  The EFI_PEI_MM_CONTROL_PPI is produced by a PEIM. It provides an abstraction of the
  79 ///  platform hardware that generates an MMI. There are often I/O ports that, when accessed, will
  80 ///  generate the MMI. Also, the hardware optionally supports the periodic generation of these signals.
  81 ///
  82 struct _EFI_PEI_MM_CONTROL_PPI {
  83   EFI_PEI_MM_ACTIVATE      Trigger;
  84   EFI_PEI_MM_DEACTIVATE    Clear;
  85 };
  86
  87 extern EFI_GUID  gEfiPeiMmControlPpiGuid;
  88
  89 #endif