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1 /** @file
2 This file declares Sec Platform Information PPI.
3
4 This service is the primary handoff state into the PEI Foundation.
5 The Security (SEC) component creates the early, transitory memory
6 environment and also encapsulates knowledge of at least the
7 location of the Boot Firmware Volume (BFV).
8
9 Copyright (c) 2006 - 2008, Intel Corporation
10 All rights reserved. This program and the accompanying materials
11 are licensed and made available under the terms and conditions of the BSD License
12 which accompanies this distribution. The full text of the license may be found at
13 http://opensource.org/licenses/bsd-license.php
14
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17
18 @par Revision Reference:
19 This PPI is introduced in PI Version 1.0.
20
21 **/
22
23 #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
24 #define __SEC_PLATFORM_INFORMATION_PPI_H__
25
26 #define EFI_SEC_PLATFORM_INFORMATION_GUID \
27 { \
28 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
29 }
30
31 typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
32
33
34 ///
35 /// EFI_HEALTH_FLAGS
36 /// Contains information generated by microcode, hardware, and/or the Itanium
37 /// processor PAL code about the state of the processor upon reset.
38 ///
39 typedef union {
40 struct {
41 ///
42 /// A 2-bit field indicating self-test state after reset.
43 ///
44 UINT32 Status : 2;
45 ///
46 /// A 1-bit field indicating whether testing has occurred.
47 /// If this field is zero, the processor has not been tested,
48 /// and no further fields in the self-test State parameter are valid.
49 ///
50 UINT32 Tested : 1;
51 ///
52 /// Reserved 13 bits.
53 ///
54 UINT32 Reserved1 :13;
55 ///
56 /// A 1-bit field. If set to 1, indicates that virtual
57 /// memory features are not available.
58 ///
59 UINT32 VirtualMemoryUnavailable : 1;
60 ///
61 /// A 1-bit field. If set to 1, indicates that IA-32 execution
62 /// is not available.
63 ///
64 UINT32 Ia32ExecutionUnavailable : 1;
65 ///
66 /// A 1-bit field. If set to 1, indicates that the floating
67 /// point unit is not available.
68 ///
69 UINT32 FloatingPointUnavailable : 1;
70 ///
71 /// A 1-bit field. If set to 1, indicates miscellaneous
72 /// functional failure other than vm, ia, or fp.
73 /// The test status field provides additional information on
74 /// test failures when the State field returns a value of
75 /// performance restricted or functionally restricted.
76 /// The value returned is implementation dependent.
77 ///
78 UINT32 MiscFeaturesUnavailable : 1;
79 ///
80 /// Reserved 12 bits.
81 ///
82 UINT32 Reserved2 :12;
83 } Bits;
84 UINT32 Uint32;
85 } EFI_HEALTH_FLAGS;
86
87 #define NORMAL_BOOT_CALL 0x0
88 #define RECOVERY_CHECK_CALL 0x3
89
90 typedef struct {
91 UINT8 BootPhase;
92 UINT8 FWStatus;
93 UINT16 Reserved1;
94 UINT32 Reserved2;
95
96 UINT16 ProcId;
97 UINT16 Reserved3;
98 UINT8 IdMask;
99 UINT8 EidMask;
100 UINT16 Reserved4;
101
102 UINT64 PalCallAddress;
103 UINT64 PalSpecialAddress;
104 UINT64 SelfTestStatus;
105 UINT64 SelfTestControl;
106 UINT64 MemoryBufferRequired;
107
108 } IPF_HANDOFF_STATUS;
109
110 ///
111 /// EFI_SEC_PLATFORM_INFORMATION_RECORD
112 ///
113 typedef struct {
114 ///
115 /// Contains information generated by microcode, hardware,
116 /// and/or the Itanium processor PAL code about the state
117 /// of the processor upon reset.
118 ///
119 EFI_HEALTH_FLAGS HealthFlags;
120 } EFI_SEC_PLATFORM_INFORMATION_RECORD;
121
122
123
124 /**
125 This interface conveys state information out of the Security (SEC) phase into PEI.
126
127 This service is published by the SEC phase. The SEC phase handoff has an optional
128 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
129 PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
130 architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
131 into the data structure abstracted by this service. This information is collected for the boot-strap
132 processor (BSP) on IA-32, and for Itanium architecture, it is available on all processors that execute
133 the PEI Foundation.
134
135 @param PeiServices Pointer to the PEI Services Table.
136 @param StructureSize Pointer to the variable describing size of the input buffer.
137 @param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
138
139 @retval EFI_SUCCESS The data was successfully returned.
140 @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
141
142 **/
143 typedef
144 EFI_STATUS
145 (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
146 IN CONST EFI_PEI_SERVICES **PeiServices,
147 IN OUT UINT64 *StructureSize,
148 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
149 );
150
151
152 ///
153 /// This service abstracts platform-specific information. It is necessary
154 /// to convey this information to the PEI Foundation so that it can
155 /// discover where to begin dispatching PEIMs.
156 ///
157 struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
158 EFI_SEC_PLATFORM_INFORMATION PlatformInformation;
159 };
160
161
162 extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
163
164 #endif