MdePkg/Include/Ppi/SuperIo.h

   1 /** @file
   2   This PPI provides the super I/O register access functionality.
   3
   4   Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7   @par Revision Reference:
   8   This PPI is from PI Version 1.2.1.
   9
  10 **/
  11
  12 #ifndef __EFI_SUPER_IO_PPI_H__
  13 #define __EFI_SUPER_IO_PPI_H__
  14
  15 #include <Protocol/SuperIo.h>
  16
  17 #define EFI_SIO_PPI_GUID \
  18   { \
  19     0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \
  20   }
  21
  22 typedef struct _EFI_SIO_PPI EFI_SIO_PPI;
  23 typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;
  24
  25 typedef UINT16 EFI_SIO_REGISTER;
  26 #define EFI_SIO_REG(ldn,reg)    (EFI_SIO_REGISTER) (((ldn) << 8) | reg)
  27 #define EFI_SIO_LDN_GLOBAL      0xFF
  28
  29 /**
  30   Read a Super I/O register.
  31
  32   The register is specified as an 8-bit logical device number and an 8-bit
  33   register value. The logical device numbers for specific SIO devices can be
  34   determined using the Info member of the PPI structure.
  35
  36   @param PeiServices  A pointer to a pointer to the PEI Services.
  37   @param This         A pointer to this instance of the EFI_SIO_PPI.
  38   @param ExitCfgMode  A boolean specifying whether the driver should turn on
  39                       configuration mode (FALSE) or turn off configuration mode
  40                       (TRUE) after completing the read operation. The driver must
  41                       track the current state of the configuration mode (if any)
  42                       and turn on configuration mode (if necessary) prior to
  43                       register access.
  44   @param Register     A value specifying the logical device number (bits 15:8)
  45                       and the register to read (bits 7:0). The logical device
  46                       number of EFI_SIO_LDN_GLOBAL indicates that global
  47                       registers will be used.
  48   @param IoData       A pointer to the returned register value.
  49
  50   @retval EFI_SUCCESS            Success.
  51   @retval EFI_TIMEOUT            The register could not be read in the a reasonable
  52                                  amount of time. The exact time is device-specific.
  53   @retval EFI_INVALID_PARAMETERS Register was out of range for this device.
  54   @retval EFI_INVALID_PARAMETERS IoData was NULL
  55   @retval EFI_DEVICE_ERROR       There was a device fault or the device was not present.
  56 **/
  57 typedef
  58 EFI_STATUS
  59 (EFIAPI *EFI_PEI_SIO_REGISTER_READ)(
  60   IN EFI_PEI_SERVICES       **PeiServices,
  61   IN CONST EFI_SIO_PPI      *This,
  62   IN BOOLEAN                ExitCfgMode,
  63   IN EFI_SIO_REGISTER       Register,
  64   OUT UINT8                 *IoData
  65   );
  66
  67 /**
  68   Write a Super I/O register.
  69
  70   The register is specified as an 8-bit logical device number and an 8-bit register
  71   value. The logical device numbers for specific SIO devices can be determined
  72   using the Info member of the PPI structure.
  73
  74   @param PeiServices  A pointer to a pointer to the PEI Services.
  75   @param This         A pointer to this instance of the EFI_SIO_PPI.
  76   @param ExitCfgMode  A boolean specifying whether the driver should turn on
  77                       configuration mode (FALSE) or turn off configuration mode
  78                       (TRUE) after completing the read operation. The driver must
  79                       track the current state of the configuration mode (if any)
  80                       and turn on configuration mode (if necessary) prior to
  81                       register access.
  82   @param Register     A value specifying the logical device number (bits 15:8)
  83                       and the register to read (bits 7:0). The logical device
  84                       number of EFI_SIO_LDN_GLOBAL indicates that global
  85                       registers will be used.
  86   @param IoData       A pointer to the returned register value.
  87
  88   @retval EFI_SUCCESS            Success.
  89   @retval EFI_TIMEOUT            The register could not be read in the a reasonable
  90                                  amount of time. The exact time is device-specific.
  91   @retval EFI_INVALID_PARAMETERS Register was out of range for this device.
  92   @retval EFI_INVALID_PARAMETERS IoData was NULL
  93   @retval EFI_DEVICE_ERROR       There was a device fault or the device was not present.
  94 **/
  95 typedef
  96 EFI_STATUS
  97 (EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(
  98   IN EFI_PEI_SERVICES       **PeiServices,
  99   IN CONST EFI_SIO_PPI      *This,
 100   IN BOOLEAN                ExitCfgMode,
 101   IN EFI_SIO_REGISTER       Register,
 102   IN UINT8                  IoData
 103   );
 104
 105 /**
 106   Provides an interface for a table based programming of the Super I/O registers.
 107
 108   The Modify() function provides an interface for table based programming of the
 109   Super I/O registers. This function can be used to perform programming of
 110   multiple Super I/O registers with a single function call. For each table entry,
 111   the Register is read, its content is bitwise ANDed with AndMask, and then ORed
 112   with OrMask before being written back to the Register. The Super I/O driver
 113   must track the current state of the Super I/O and enable the configuration mode
 114   of Super I/O if necessary prior to table processing. Once the table is processed,
 115   the Super I/O device must be returned to the original state.
 116
 117   @param PeiServices      A pointer to a pointer to the PEI Services.
 118   @param This             A pointer to this instance of the EFI_SIO_PPI.
 119   @param Command          A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY
 120                           structures. Each structure specifies a single Super I/O register
 121                           modify operation.
 122   @param NumberOfCommands The number of elements in the Command array.
 123
 124   @retval EFI_SUCCESS             The operation completed successfully.
 125   @retval EFI_INVALID_PARAMETERS  Command is NULL.
 126 **/
 127 typedef
 128 EFI_STATUS
 129 (EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(
 130   IN EFI_PEI_SERVICES              **PeiServices,
 131   IN CONST EFI_SIO_PPI             *This,
 132   IN CONST EFI_SIO_REGISTER_MODIFY *Command,
 133   IN UINTN                         NumberOfCommands
 134   );
 135
 136 ///
 137 /// Specifies the end of the information list.
 138 ///
 139 #define EFI_ACPI_PNP_HID_END       EFI_PNP_ID (0x0000)
 140
 141 typedef UINT32                     EFI_ACPI_HID;
 142 typedef UINT32                     EFI_ACPI_UID;
 143 #pragma pack(1)
 144 typedef struct _EFI_SIO_INFO {
 145   EFI_ACPI_HID                     Hid;
 146   EFI_ACPI_UID                     Uid;
 147   UINT8                            Ldn;
 148 } EFI_SIO_INFO, *PEFI_SIO_INFO;
 149 #pragma pack()
 150
 151 ///
 152 /// This PPI provides low-level access to Super I/O registers using Read() and
 153 /// Write(). It also uniquely identifies this Super I/O controller using a GUID
 154 /// and provides mappings between ACPI style PNP IDs and the logical device numbers.
 155 /// There is one instance of this PPI per Super I/O device.
 156 ///
 157 struct _EFI_SIO_PPI {
 158   ///
 159   /// This function reads a register's value from the Super I/O controller.
 160   ///
 161   EFI_PEI_SIO_REGISTER_READ   Read;
 162   ///
 163   /// This function writes a value to a register in the Super I/O controller.
 164   ///
 165   EFI_PEI_SIO_REGISTER_WRITE  Write;
 166   ///
 167   /// This function modifies zero or more registers in the Super I/O controller
 168   /// using a table.
 169   ///
 170   EFI_PEI_SIO_REGISTER_MODIFY Modify;
 171   ///
 172   /// This GUID uniquely identifies the Super I/O controller.
 173   ///
 174   EFI_GUID                    SioGuid;
 175   ///
 176   /// This pointer is to an array which maps EISA identifiers to logical devices numbers.
 177   ///
 178   PEFI_SIO_INFO               Info;
 179 };
 180
 181 extern EFI_GUID gEfiSioPpiGuid;
 182
 183 #endif