MdePkg/Include/Protocol/CpuIo2.h

   1 /** @file
   2   This files describes the CPU I/O 2 Protocol.
   3
   4   This protocol provides an I/O abstraction for a system processor. This protocol
   5   is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
   6   The I/O or memory primitives can be used by the consumer of the protocol to materialize
   7   bus-specific configuration cycles, such as the transitional configuration address and data
   8   ports for PCI. Only drivers that require direct access to the entire system should use this
   9   protocol.
  10
  11   Note: This is a boot-services only protocol and it may not be used by runtime drivers after
  12   ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime
  13   protocol and can be used by runtime drivers after ExitBootServices().
  14
  15   Copyright (c) 2007 - 2009, Intel Corporation
  16   All rights reserved. This program and the accompanying materials
  17   are licensed and made available under the terms and conditions of the BSD License
  18   which accompanies this distribution.  The full text of the license may be found at
  19   http://opensource.org/licenses/bsd-license.php
  20
  21   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  22   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  23
  24   @par Revision Reference:
  25   This Protocol is defined in UEFI Platform Initialization Specification 1.2
  26   Volume 5: Standards
  27
  28 **/
  29
  30 #ifndef __CPU_IO2_H__
  31 #define __CPU_IO2_H__
  32
  33
  34 #define EFI_CPU_IO2_PROTOCOL_GUID \
  35   { \
  36     0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \
  37   }
  38
  39 typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL;
  40
  41
  42 ///
  43 /// Enumeration that defines the width of the I/O operation.
  44 ///
  45 typedef enum {
  46   EfiCpuIoWidthUint8,
  47   EfiCpuIoWidthUint16,
  48   EfiCpuIoWidthUint32,
  49   EfiCpuIoWidthUint64,
  50   EfiCpuIoWidthFifoUint8,
  51   EfiCpuIoWidthFifoUint16,
  52   EfiCpuIoWidthFifoUint32,
  53   EfiCpuIoWidthFifoUint64,
  54   EfiCpuIoWidthFillUint8,
  55   EfiCpuIoWidthFillUint16,
  56   EfiCpuIoWidthFillUint32,
  57   EfiCpuIoWidthFillUint64,
  58   EfiCpuIoWidthMaximum
  59 } EFI_CPU_IO_PROTOCOL_WIDTH;
  60
  61
  62 /**
  63   Enables a driver to access registers in the PI CPU I/O space.
  64
  65   The Io.Read() and Io.Write() functions enable a driver to access PCI controller registers in
  66   the PI CPU I/O space.
  67
  68   The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any
  69   alignment and I/O width restrictions that a PI System on a platform might require. For example on
  70   some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on
  71   the other hand, will be handled by the driver.
  72
  73   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  74   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the
  75   Count operations that is performed.
  76
  77   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  78   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  79   incremented for each of the Count operations that is performed. The read or write operation is
  80   performed Count times on the same Address.
  81
  82   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  83   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  84   incremented for each of the Count operations that is performed. The read or write operation is
  85   performed Count times from the first element of Buffer.
  86
  87   @param[in]       This         A pointer to the EFI_CPU_IO2_PROTOCOL instance.
  88   @param[in]       Width        Signifies the width of the I/O or Memory operation.
  89   @param[in]       Address      The base address of the I/O operation. The caller is responsible
  90                                 for aligning the Address if required.
  91   @param[in]       Count        The number of I/O operations to perform. The number of bytes moved
  92                                 is Width size * Count, starting at Address.
  93   @param[in, out]  Buffer       For read operations, the destination buffer to store the results.
  94                                 For write operations, the source buffer from which to write data.
  95
  96   @retval EFI_SUCCESS           The data was read from or written to the EFI system.
  97   @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system. Or Buffer is NULL.
  98   @retval EFI_UNSUPPORTED       The Buffer is not aligned for the given Width.
  99                                 Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
 100
 101 **/
 102 typedef
 103 EFI_STATUS
 104 (EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)(
 105   IN     EFI_CPU_IO2_PROTOCOL              *This,
 106   IN     EFI_CPU_IO_PROTOCOL_WIDTH         Width,
 107   IN     UINT64                            Address,
 108   IN     UINTN                             Count,
 109   IN OUT VOID                              *Buffer
 110   );
 111
 112
 113 ///
 114 /// Service for read and write accesses.
 115 ///
 116 typedef struct {
 117   ///
 118   /// This service provides the various modalities of memory and I/O read.
 119   ///
 120   EFI_CPU_IO_PROTOCOL_IO_MEM  Read;
 121   ///
 122   /// This service provides the various modalities of memory and I/O write.
 123   ///
 124   EFI_CPU_IO_PROTOCOL_IO_MEM  Write;
 125 } EFI_CPU_IO_PROTOCOL_ACCESS;
 126
 127
 128 ///
 129 /// Provides the basic memory and I/O interfaces that are used to abstract
 130 /// accesses to devices in a system.
 131 ///
 132 struct _EFI_CPU_IO2_PROTOCOL {
 133   ///
 134   /// Enables a driver to access memory-mapped registers in the EFI system memory space.
 135   ///
 136   EFI_CPU_IO_PROTOCOL_ACCESS  Mem;
 137   ///
 138   /// Enables a driver to access registers in the EFI CPU I/O space.
 139   ///
 140   EFI_CPU_IO_PROTOCOL_ACCESS  Io;
 141 };
 142
 143 extern EFI_GUID gEfiCpuIo2ProtocolGuid;
 144
 145 #endif