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1 /** @file
2 MM CPU I/O 2 protocol as defined in the PI 1.5 specification.
3
4 This protocol provides CPU I/O and memory access within MM.
5
6 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef _MM_CPU_IO_H_
12 #define _MM_CPU_IO_H_
13
14 #define EFI_MM_CPU_IO_PROTOCOL_GUID \
15 { \
16 0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \
17 }
18
19 typedef struct _EFI_MM_CPU_IO_PROTOCOL EFI_MM_CPU_IO_PROTOCOL;
20
21 ///
22 /// Width of the MM CPU I/O operations
23 ///
24 typedef enum {
25 MM_IO_UINT8 = 0,
26 MM_IO_UINT16 = 1,
27 MM_IO_UINT32 = 2,
28 MM_IO_UINT64 = 3
29 } EFI_MM_IO_WIDTH;
30
31 /**
32 Provides the basic memory and I/O interfaces used toabstract accesses to devices.
33
34 The I/O operations are carried out exactly as requested. The caller is
35 responsible for any alignment and I/O width issues that the bus, device,
36 platform, or type of I/O might require.
37
38 @param[in] This The EFI_MM_CPU_IO_PROTOCOL instance.
39 @param[in] Width Signifies the width of the I/O operations.
40 @param[in] Address The base address of the I/O operations. The caller is
41 responsible for aligning the Address if required.
42 @param[in] Count The number of I/O operations to perform.
43 @param[in,out] Buffer For read operations, the destination buffer to store
44 the results. For write operations, the source buffer
45 from which to write data.
46
47 @retval EFI_SUCCESS The data was read from or written to the device.
48 @retval EFI_UNSUPPORTED The Address is not valid for this system.
49 @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
50 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack
51 of resources.
52 **/
53 typedef
54 EFI_STATUS
55 (EFIAPI *EFI_MM_CPU_IO)(
56 IN CONST EFI_MM_CPU_IO_PROTOCOL *This,
57 IN EFI_MM_IO_WIDTH Width,
58 IN UINT64 Address,
59 IN UINTN Count,
60 IN OUT VOID *Buffer
61 );
62
63 typedef struct {
64 ///
65 /// This service provides the various modalities of memory and I/O read.
66 ///
67 EFI_MM_CPU_IO Read;
68 ///
69 /// This service provides the various modalities of memory and I/O write.
70 ///
71 EFI_MM_CPU_IO Write;
72 } EFI_MM_IO_ACCESS;
73
74 ///
75 /// MM CPU I/O Protocol provides CPU I/O and memory access within MM.
76 ///
77 struct _EFI_MM_CPU_IO_PROTOCOL {
78 ///
79 /// Allows reads and writes to memory-mapped I/O space.
80 ///
81 EFI_MM_IO_ACCESS Mem;
82 ///
83 /// Allows reads and writes to I/O space.
84 ///
85 EFI_MM_IO_ACCESS Io;
86 };
87
88 extern EFI_GUID gEfiMmCpuIoProtocolGuid;
89
90 #endif