MdePkg/Include/Protocol/PciIo.h

   1 /** @file
   2   EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
   3   and DMA interfaces that a driver uses to access its PCI controller.
   4
   5   Copyright (c) 2006 - 2008, Intel Corporation
   6   All rights reserved. This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __PCI_IO_H__
  17 #define __PCI_IO_H__
  18
  19 ///
  20 /// Global ID for the PCI I/O Protocol
  21 ///
  22 #define EFI_PCI_IO_PROTOCOL_GUID \
  23   { \
  24     0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
  25   }
  26
  27 typedef struct _EFI_PCI_IO_PROTOCOL  EFI_PCI_IO_PROTOCOL;
  28
  29 ///
  30 /// *******************************************************
  31 /// EFI_PCI_IO_PROTOCOL_WIDTH
  32 /// *******************************************************
  33 ///
  34 typedef enum {
  35   EfiPciIoWidthUint8      = 0,
  36   EfiPciIoWidthUint16,
  37   EfiPciIoWidthUint32,
  38   EfiPciIoWidthUint64,
  39   EfiPciIoWidthFifoUint8,
  40   EfiPciIoWidthFifoUint16,
  41   EfiPciIoWidthFifoUint32,
  42   EfiPciIoWidthFifoUint64,
  43   EfiPciIoWidthFillUint8,
  44   EfiPciIoWidthFillUint16,
  45   EfiPciIoWidthFillUint32,
  46   EfiPciIoWidthFillUint64,
  47   EfiPciIoWidthMaximum
  48 } EFI_PCI_IO_PROTOCOL_WIDTH;
  49
  50 //
  51 // Complete PCI address generater
  52 //
  53 #define EFI_PCI_IO_PASS_THROUGH_BAR               0xff    ///< Special BAR that passes a memory or I/O cycle through unchanged
  54 #define EFI_PCI_IO_ATTRIBUTE_MASK                 0x077f  ///< All the following I/O and Memory cycles
  55 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO   0x0001  ///< I/O cycles 0x0000-0x00FF (10 bit decode)
  56 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO               0x0002  ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
  57 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO       0x0004  ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
  58 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY           0x0008  ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
  59 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO               0x0010  ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
  60 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO       0x0020  ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
  61 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO     0x0040  ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
  62 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080  ///< Map a memory range so write are combined
  63 #define EFI_PCI_IO_ATTRIBUTE_IO                   0x0100  ///< Enable the I/O decode bit in the PCI Config Header
  64 #define EFI_PCI_IO_ATTRIBUTE_MEMORY               0x0200  ///< Enable the Memory decode bit in the PCI Config Header
  65 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER           0x0400  ///< Enable the DMA bit in the PCI Config Header
  66 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED        0x0800  ///< Map a memory range so all r/w accesses are cached
  67 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE       0x1000  ///< Disable a memory range
  68 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE      0x2000  ///< Clear for an add-in PCI Device
  69 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM         0x4000  ///< Clear for a physical PCI Option ROM accessed through ROM BAR
  70 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE   0x8000  ///< Clear for PCI controllers that can not genrate a DAC
  71 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16            0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
  72 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16    0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
  73 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16            0x30000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
  74
  75 #define EFI_PCI_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
  76 #define EFI_VGA_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
  77
  78 ///
  79 /// *******************************************************
  80 /// EFI_PCI_IO_PROTOCOL_OPERATION
  81 /// *******************************************************
  82 ///
  83 typedef enum {
  84   EfiPciIoOperationBusMasterRead,
  85   EfiPciIoOperationBusMasterWrite,
  86   EfiPciIoOperationBusMasterCommonBuffer,
  87   EfiPciIoOperationMaximum
  88 } EFI_PCI_IO_PROTOCOL_OPERATION;
  89
  90 ///
  91 /// *******************************************************
  92 /// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
  93 /// *******************************************************
  94 ///
  95 typedef enum {
  96   EfiPciIoAttributeOperationGet,
  97   EfiPciIoAttributeOperationSet,
  98   EfiPciIoAttributeOperationEnable,
  99   EfiPciIoAttributeOperationDisable,
 100   EfiPciIoAttributeOperationSupported,
 101   EfiPciIoAttributeOperationMaximum
 102 } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
 103
 104 /**
 105   Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is
 106   satisfied or after a defined duration.
 107
 108   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 109   @param  Width                 Signifies the width of the memory or I/O operations.
 110   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 111                                 base address for the memory operation to perform.
 112   @param  Offset                The offset within the selected BAR to start the memory operation.
 113   @param  Mask                  Mask used for the polling criteria.
 114   @param  Value                 The comparison value used for the polling exit criteria.
 115   @param  Delay                 The number of 100 ns units to poll.
 116   @param  Result                Pointer to the last value read from the memory location.
 117
 118   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
 119   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 120   @retval EFI_UNSUPPORTED       Offset is not valid for the BarIndex of this PCI controller.
 121   @retval EFI_TIMEOUT           Delay expired before a match occurred.
 122   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 123   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 124
 125 **/
 126 typedef
 127 EFI_STATUS
 128 (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)(
 129   IN EFI_PCI_IO_PROTOCOL           *This,
 130   IN  EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 131   IN  UINT8                        BarIndex,
 132   IN  UINT64                       Offset,
 133   IN  UINT64                       Mask,
 134   IN  UINT64                       Value,
 135   IN  UINT64                       Delay,
 136   OUT UINT64                       *Result
 137   );
 138
 139 /**
 140   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
 141
 142   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 143   @param  Width                 Signifies the width of the memory or I/O operations.
 144   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 145                                 base address for the memory or I/O operation to perform.
 146   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
 147   @param  Count                 The number of memory or I/O operations to perform.
 148   @param  Buffer                For read operations, the destination buffer to store the results. For write
 149                                 operations, the source buffer to write data from.
 150
 151   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 152   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 153   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 154                                 valid for the PCI BAR specified by BarIndex.
 155   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 156   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 157
 158 **/
 159 typedef
 160 EFI_STATUS
 161 (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM)(
 162   IN EFI_PCI_IO_PROTOCOL              *This,
 163   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 164   IN     UINT8                        BarIndex,
 165   IN     UINT64                       Offset,
 166   IN     UINTN                        Count,
 167   IN OUT VOID                         *Buffer
 168   );
 169
 170 typedef struct {
 171   EFI_PCI_IO_PROTOCOL_IO_MEM  Read;
 172   EFI_PCI_IO_PROTOCOL_IO_MEM  Write;
 173 } EFI_PCI_IO_PROTOCOL_ACCESS;
 174
 175 /**
 176   Enable a PCI driver to access PCI controller registers in PCI configuration space.
 177
 178   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 179   @param  Width                 Signifies the width of the memory operations.
 180   @param  Offset                The offset within the PCI configuration space for the PCI controller.
 181   @param  Count                 The number of PCI configuration operations to perform.
 182   @param  Buffer                For read operations, the destination buffer to store the results. For write
 183                                 operations, the source buffer to write data from.
 184
 185
 186   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
 187   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
 188                                 valid for the PCI configuration header of the PCI controller.
 189   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 190   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
 191
 192 **/
 193 typedef
 194 EFI_STATUS
 195 (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG)(
 196   IN EFI_PCI_IO_PROTOCOL              *This,
 197   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 198   IN     UINT32                       Offset,
 199   IN     UINTN                        Count,
 200   IN OUT VOID                         *Buffer
 201   );
 202
 203 typedef struct {
 204   EFI_PCI_IO_PROTOCOL_CONFIG  Read;
 205   EFI_PCI_IO_PROTOCOL_CONFIG  Write;
 206 } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
 207
 208 /**
 209   Enables a PCI driver to copy one region of PCI memory space to another region of PCI
 210   memory space.
 211
 212   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 213   @param  Width                 Signifies the width of the memory operations.
 214   @param  DestBarIndex          The BAR index in the standard PCI Configuration header to use as the
 215                                 base address for the memory operation to perform.
 216   @param  DestOffset            The destination offset within the BAR specified by DestBarIndex to
 217                                 start the memory writes for the copy operation.
 218   @param  SrcBarIndex           The BAR index in the standard PCI Configuration header to use as the
 219                                 base address for the memory operation to perform.
 220   @param  SrcOffset             The source offset within the BAR specified by SrcBarIndex to start
 221                                 the memory reads for the copy operation.
 222   @param  Count                 The number of memory operations to perform. Bytes moved is Width
 223                                 size * Count, starting at DestOffset and SrcOffset.
 224
 225   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
 226   @retval EFI_UNSUPPORTED       DestBarIndex not valid for this PCI controller.
 227   @retval EFI_UNSUPPORTED       SrcBarIndex not valid for this PCI controller.
 228   @retval EFI_UNSUPPORTED       The address range specified by DestOffset, Width, and Count
 229                                 is not valid for the PCI BAR specified by DestBarIndex.
 230   @retval EFI_UNSUPPORTED       The address range specified by SrcOffset, Width, and Count is
 231                                 not valid for the PCI BAR specified by SrcBarIndex.
 232   @retval EFI_INVALID_PARAMETER Width is invalid.
 233   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 234
 235 **/
 236 typedef
 237 EFI_STATUS
 238 (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM)(
 239   IN EFI_PCI_IO_PROTOCOL              *This,
 240   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
 241   IN     UINT8                        DestBarIndex,
 242   IN     UINT64                       DestOffset,
 243   IN     UINT8                        SrcBarIndex,
 244   IN     UINT64                       SrcOffset,
 245   IN     UINTN                        Count
 246   );
 247
 248 /**
 249   Provides the PCI controller-Cspecific addresses needed to access system memory.
 250
 251   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 252   @param  Operation             Indicates if the bus master is going to read or write to system memory.
 253   @param  HostAddress           The system memory address to map to the PCI controller.
 254   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
 255                                 that were mapped.
 256   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
 257                                 access the hosts HostAddress.
 258   @param  Mapping               A resulting value to pass to Unmap().
 259
 260   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
 261   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
 262   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 263   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
 264   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
 265
 266 **/
 267 typedef
 268 EFI_STATUS
 269 (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP)(
 270   IN EFI_PCI_IO_PROTOCOL                *This,
 271   IN     EFI_PCI_IO_PROTOCOL_OPERATION  Operation,
 272   IN     VOID                           *HostAddress,
 273   IN OUT UINTN                          *NumberOfBytes,
 274   OUT    EFI_PHYSICAL_ADDRESS           *DeviceAddress,
 275   OUT    VOID                           **Mapping
 276   );
 277
 278 /**
 279   Completes the Map() operation and releases any corresponding resources.
 280
 281   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 282   @param  Mapping               The mapping value returned from Map().
 283
 284   @retval EFI_SUCCESS           The range was unmapped.
 285   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
 286
 287 **/
 288 typedef
 289 EFI_STATUS
 290 (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP)(
 291   IN EFI_PCI_IO_PROTOCOL           *This,
 292   IN  VOID                         *Mapping
 293   );
 294
 295 /**
 296   Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
 297   mapping.
 298
 299   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 300   @param  Type                  This parameter is not used and must be ignored.
 301   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
 302                                 EfiRuntimeServicesData.
 303   @param  Pages                 The number of pages to allocate.
 304   @param  HostAddress           A pointer to store the base system memory address of the
 305                                 allocated range.
 306   @param  Attributes            The requested bit mask of attributes for the allocated range.
 307
 308   @retval EFI_SUCCESS           The requested memory pages were allocated.
 309   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
 310                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
 311   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 312   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
 313
 314 **/
 315 typedef
 316 EFI_STATUS
 317 (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)(
 318   IN EFI_PCI_IO_PROTOCOL           *This,
 319   IN  EFI_ALLOCATE_TYPE            Type,
 320   IN  EFI_MEMORY_TYPE              MemoryType,
 321   IN  UINTN                        Pages,
 322   OUT VOID                         **HostAddress,
 323   IN  UINT64                       Attributes
 324   );
 325
 326 /**
 327   Frees memory that was allocated with AllocateBuffer().
 328
 329   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 330   @param  Pages                 The number of pages to free.
 331   @param  HostAddress           The base system memory address of the allocated range.
 332
 333   @retval EFI_SUCCESS           The requested memory pages were freed.
 334   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
 335                                 was not allocated with AllocateBuffer().
 336
 337 **/
 338 typedef
 339 EFI_STATUS
 340 (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER)(
 341   IN EFI_PCI_IO_PROTOCOL           *This,
 342   IN  UINTN                        Pages,
 343   IN  VOID                         *HostAddress
 344   );
 345
 346 /**
 347   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
 348
 349   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 350
 351   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
 352                                 bridge to system memory.
 353   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
 354                                 host bridge due to a hardware error.
 355
 356 **/
 357 typedef
 358 EFI_STATUS
 359 (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH)(
 360   IN EFI_PCI_IO_PROTOCOL  *This
 361   );
 362
 363 /**
 364   Retrieves this PCI controller's current PCI bus number, device number, and function number.
 365
 366   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 367   @param  SegmentNumber         The PCI controller's current PCI segment number.
 368   @param  BusNumber             The PCI controller's current PCI bus number.
 369   @param  DeviceNumber          The PCI controller's current PCI device number.
 370   @param  FunctionNumber        The PCI controller's current PCI function number.
 371
 372   @retval EFI_SUCCESS           The PCI controller location was returned.
 373   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 374
 375 **/
 376 typedef
 377 EFI_STATUS
 378 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION)(
 379   IN EFI_PCI_IO_PROTOCOL          *This,
 380   OUT UINTN                       *SegmentNumber,
 381   OUT UINTN                       *BusNumber,
 382   OUT UINTN                       *DeviceNumber,
 383   OUT UINTN                       *FunctionNumber
 384   );
 385
 386 /**
 387   Performs an operation on the attributes that this PCI controller supports. The operations include
 388   getting the set of supported attributes, retrieving the current attributes, setting the current
 389   attributes, enabling attributes, and disabling attributes.
 390
 391   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 392   @param  Operation             The operation to perform on the attributes for this PCI controller.
 393   @param  Attributes            The mask of attributes that are used for Set, Enable, and Disable
 394                                 operations.
 395   @param  Result                A pointer to the result mask of attributes that are returned for the Get
 396                                 and Supported operations.
 397
 398   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
 399   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
 400   @retval EFI_UNSUPPORTED       one or more of the bits set in
 401                                 Attributes are not supported by this PCI controller or one of
 402                                 its parent bridges when Operation is Set, Enable or Disable.
 403
 404 **/
 405 typedef
 406 EFI_STATUS
 407 (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES)(
 408   IN EFI_PCI_IO_PROTOCOL                       *This,
 409   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
 410   IN  UINT64                                   Attributes,
 411   OUT UINT64                                   *Result OPTIONAL
 412   );
 413
 414 /**
 415   Gets the attributes that this PCI controller supports setting on a BAR using
 416   SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
 417
 418   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 419   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 420                                 base address for resource range. The legal range for this field is 0..5.
 421   @param  Supports              A pointer to the mask of attributes that this PCI controller supports
 422                                 setting for this BAR with SetBarAttributes().
 423   @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current
 424                                 configuration of this BAR of the PCI controller.
 425
 426   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI
 427                                 controller supports are returned in Supports. If Resources
 428                                 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
 429                                 controller is currently using are returned in Resources.
 430   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
 431   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 432   @retval EFI_OUT_OF_RESOURCES  There are not enough resources available to allocate
 433                                 Resources.
 434
 435 **/
 436 typedef
 437 EFI_STATUS
 438 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(
 439   IN EFI_PCI_IO_PROTOCOL             *This,
 440   IN  UINT8                          BarIndex,
 441   OUT UINT64                         *Supports, OPTIONAL
 442   OUT VOID                           **Resources OPTIONAL
 443   );
 444
 445 /**
 446   Sets the attributes for a range of a BAR on a PCI controller.
 447
 448   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
 449   @param  Attributes            The mask of attributes to set for the resource range specified by
 450                                 BarIndex, Offset, and Length.
 451   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
 452                                 base address for resource range. The legal range for this field is 0..5.
 453   @param  Offset                A pointer to the BAR relative base address of the resource range to be
 454                                 modified by the attributes specified by Attributes.
 455   @param  Length                A pointer to the length of the resource range to be modified by the
 456                                 attributes specified by Attributes.
 457
 458   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
 459                                 range specified by BarIndex, Offset, and Length were
 460                                 set on the PCI controller, and the actual resource range is returned
 461                                 in Offset and Length.
 462   @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
 463   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
 464   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
 465                                 resource range specified by BarIndex, Offset, and
 466                                 Length.
 467
 468 **/
 469 typedef
 470 EFI_STATUS
 471 (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)(
 472   IN EFI_PCI_IO_PROTOCOL              *This,
 473   IN     UINT64                       Attributes,
 474   IN     UINT8                        BarIndex,
 475   IN OUT UINT64                       *Offset,
 476   IN OUT UINT64                       *Length
 477   );
 478
 479 ///
 480 /// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
 481 /// and DMA interfaces that are used to abstract accesses to PCI controllers.
 482 /// There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus.
 483 /// A device driver that wishes to manage a PCI controller in a system will have to
 484 /// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
 485 ///
 486 struct _EFI_PCI_IO_PROTOCOL {
 487   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollMem;
 488   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollIo;
 489   EFI_PCI_IO_PROTOCOL_ACCESS              Mem;
 490   EFI_PCI_IO_PROTOCOL_ACCESS              Io;
 491   EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS       Pci;
 492   EFI_PCI_IO_PROTOCOL_COPY_MEM            CopyMem;
 493   EFI_PCI_IO_PROTOCOL_MAP                 Map;
 494   EFI_PCI_IO_PROTOCOL_UNMAP               Unmap;
 495   EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER     AllocateBuffer;
 496   EFI_PCI_IO_PROTOCOL_FREE_BUFFER         FreeBuffer;
 497   EFI_PCI_IO_PROTOCOL_FLUSH               Flush;
 498   EFI_PCI_IO_PROTOCOL_GET_LOCATION        GetLocation;
 499   EFI_PCI_IO_PROTOCOL_ATTRIBUTES          Attributes;
 500   EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES  GetBarAttributes;
 501   EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES  SetBarAttributes;
 502
 503   ///
 504   /// The size, in bytes, of the ROM image.
 505   ///
 506   UINT64                                  RomSize;
 507
 508   ///
 509   /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
 510   /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.
 511   /// The contents of this buffer are either from the PCI option ROM that can be accessed
 512   /// through the ROM BAR of the PCI controller, or it is from a platform-specific location.
 513   /// The Attributes() function can be used to determine from which of these two sources
 514   /// the RomImage buffer was initialized.
 515   ///
 516   VOID                                    *RomImage;
 517 };
 518
 519 extern EFI_GUID gEfiPciIoProtocolGuid;
 520
 521 #endif