2 PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
4 PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
5 and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
6 defferent types of bus mastering DMA
8 Copyright (c) 2006 - 2008, Intel Corporation
9 All rights reserved. This program and the accompanying materials
10 are licensed and made available under the terms and conditions of the BSD License
11 which accompanies this distribution. The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #ifndef __PCI_ROOT_BRIDGE_IO_H__
20 #define __PCI_ROOT_BRIDGE_IO_H__
22 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
24 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
27 typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
;
30 /// *******************************************************
31 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
32 /// *******************************************************
40 EfiPciWidthFifoUint16
,
41 EfiPciWidthFifoUint32
,
42 EfiPciWidthFifoUint64
,
44 EfiPciWidthFillUint16
,
45 EfiPciWidthFillUint32
,
46 EfiPciWidthFillUint64
,
48 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
;
51 /// *******************************************************
52 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
53 /// *******************************************************
57 /// A read operation from system memory by a bus master that is not capable of producing
58 /// PCI dual address cycles.
60 EfiPciOperationBusMasterRead
,
62 /// A write operation from system memory by a bus master that is not capable of producing
63 /// PCI dual address cycles.
65 EfiPciOperationBusMasterWrite
,
67 /// Provides both read and write access to system memory by both the processor and a bus
68 /// master that is not capable of producing PCI dual address cycles.
70 EfiPciOperationBusMasterCommonBuffer
,
72 /// A read operation from system memory by a bus master that is capable of producing PCI
73 /// dual address cycles.
75 EfiPciOperationBusMasterRead64
,
77 /// A write operation to system memory by a bus master that is capable of producing PCI
78 /// dual address cycles.
80 EfiPciOperationBusMasterWrite64
,
82 /// Provides both read and write access to system memory by both the processor and a bus
83 /// master that is capable of producing PCI dual address cycles.
85 EfiPciOperationBusMasterCommonBuffer64
,
86 EfiPciOperationMaximum
87 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
;
89 #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
90 #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
91 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
92 #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
93 #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
94 #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
95 #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
96 #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
97 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
98 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
99 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
101 #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
103 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
105 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
106 ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))
113 UINT32 ExtendedRegister
;
114 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS
;
117 Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
118 satisfied or after a defined duration.
120 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
121 @param Width Signifies the width of the memory or I/O operations.
122 @param Address The base address of the memory or I/O operations.
123 @param Mask Mask used for the polling criteria.
124 @param Value The comparison value used for the polling exit criteria.
125 @param Delay The number of 100 ns units to poll.
126 @param Result Pointer to the last value read from the memory location.
128 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
129 @retval EFI_TIMEOUT Delay expired before a match occurred.
130 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
131 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
136 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM
)(
137 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
138 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
147 Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
149 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
150 @param Width Signifies the width of the memory operations.
151 @param Address The base address of the memory operations.
152 @param Count The number of memory operations to perform.
153 @param Buffer For read operations, the destination buffer to store the results. For write
154 operations, the source buffer to write data from.
156 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
157 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
158 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
163 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM
)(
164 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
165 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
172 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read
;
173 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write
;
174 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS
;
177 Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
178 root bridge memory space.
180 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
181 @param Width Signifies the width of the memory operations.
182 @param DestAddress The destination address of the memory operation.
183 @param SrcAddress The source address of the memory operation.
184 @param Count The number of memory operations to perform.
186 @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
187 @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
188 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
193 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM
)(
194 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
195 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
196 IN UINT64 DestAddress
,
197 IN UINT64 SrcAddress
,
202 Provides the PCI controller-Cspecific addresses required to access system memory from a
205 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
206 @param Operation Indicates if the bus master is going to read or write to system memory.
207 @param HostAddress The system memory address to map to the PCI controller.
208 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
210 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
211 access the hosts HostAddress.
212 @param Mapping A resulting value to pass to Unmap().
214 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
215 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
216 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
217 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
218 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
223 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP
)(
224 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
225 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation
,
226 IN VOID
*HostAddress
,
227 IN OUT UINTN
*NumberOfBytes
,
228 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
233 Completes the Map() operation and releases any corresponding resources.
235 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
236 @param Mapping The mapping value returned from Map().
238 @retval EFI_SUCCESS The range was unmapped.
239 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
240 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
245 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP
)(
246 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
251 Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
252 EfiPciOperationBusMasterCommonBuffer64 mapping.
254 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
255 @param Type This parameter is not used and must be ignored.
256 @param MemoryType The type of memory to allocate, EfiBootServicesData or
257 EfiRuntimeServicesData.
258 @param Pages The number of pages to allocate.
259 @param HostAddress A pointer to store the base system memory address of the
261 @param Attributes The requested bit mask of attributes for the allocated range.
263 @retval EFI_SUCCESS The requested memory pages were allocated.
264 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
265 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
266 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
267 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
272 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER
)(
273 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
274 IN EFI_ALLOCATE_TYPE Type
,
275 IN EFI_MEMORY_TYPE MemoryType
,
277 IN OUT VOID
**HostAddress
,
282 Frees memory that was allocated with AllocateBuffer().
284 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
285 @param Pages The number of pages to free.
286 @param HostAddress The base system memory address of the allocated range.
288 @retval EFI_SUCCESS The requested memory pages were freed.
289 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
290 was not allocated with AllocateBuffer().
295 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER
)(
296 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
302 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
304 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
306 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
307 bridge to system memory.
308 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
309 host bridge due to a hardware error.
314 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH
)(
315 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
319 Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
320 attributes that a PCI root bridge is currently using.
322 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
323 @param Supports A pointer to the mask of attributes that this PCI root bridge supports
324 setting with SetAttributes().
325 @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
328 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
329 bridge supports is returned in Supports. If Attributes is
330 not NULL, then the attributes that the PCI root bridge is currently
331 using is returned in Attributes.
332 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
338 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES
)(
339 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
340 OUT UINT64
*Supports
,
341 OUT UINT64
*Attributes
345 Sets attributes for a resource range on a PCI root bridge.
347 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
348 @param Attributes The mask of attributes to set.
349 @param ResourceBase A pointer to the base address of the resource range to be modified by the
350 attributes specified by Attributes.
351 @param ResourceLength A pointer to the length of the resource range to be modified by the
352 attributes specified by Attributes.
354 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
355 range specified by ResourceBase and ResourceLength
356 were set on the PCI root bridge, and the actual resource range is
357 returned in ResuourceBase and ResourceLength.
358 @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
360 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
361 resource range specified by BaseAddress and Length.
362 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
367 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES
)(
368 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
369 IN UINT64 Attributes
,
370 IN OUT UINT64
*ResourceBase
,
371 IN OUT UINT64
*ResourceLength
375 Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0
376 resource descriptors.
378 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
379 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
380 configuration of this PCI root bridge.
382 @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
384 @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
390 (EFIAPI
*EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION
)(
391 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*This
,
396 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
397 /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
399 struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
{
401 /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
403 EFI_HANDLE ParentHandle
;
404 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem
;
405 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo
;
406 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem
;
407 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io
;
408 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci
;
409 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem
;
410 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map
;
411 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap
;
412 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer
;
413 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer
;
414 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush
;
415 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes
;
416 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes
;
417 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration
;
420 /// The segment number that this PCI root bridge resides.
422 UINT32 SegmentNumber
;
425 extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid
;