2 EFI SMM Control2 Protocol as defined in the PI 1.2 specification.
4 This protocol is used initiate synchronous SMI activations. This protocol could be published by a
5 processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the
6 APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this
7 event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
9 The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an
10 abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when
11 accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of
14 Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
15 SPDX-License-Identifier: BSD-2-Clause-Patent
19 #ifndef _SMM_CONTROL2_H_
20 #define _SMM_CONTROL2_H_
22 #include <Protocol/MmControl.h>
24 #define EFI_SMM_CONTROL2_PROTOCOL_GUID EFI_MM_CONTROL_PROTOCOL_GUID
26 typedef EFI_MM_CONTROL_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL
;
27 typedef EFI_MM_PERIOD EFI_SMM_PERIOD
;
29 typedef EFI_MM_ACTIVATE EFI_SMM_ACTIVATE2
;
31 typedef EFI_MM_DEACTIVATE EFI_SMM_DEACTIVATE2
;
32 extern EFI_GUID gEfiSmmControl2ProtocolGuid
;