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1 /** @file
2 MSR Definitions.
3
4 Provides defines for Machine Specific Registers(MSR) indexes. Data structures
5 are provided for MSRs that contain one or more bit fields. If the MSR value
6 returned is a single 32-bit or 64-bit value, then a data structure is not
7 provided for that MSR.
8
9 Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
11
12 @par Specification Reference:
13 AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34
14
15 **/
16
17 #ifndef __FAM17_MSR_H__
18 #define __FAM17_MSR_H__
19
20 /**
21 Secure Encrypted Virtualization (SEV) status register
22
23 **/
24 #define MSR_SEV_STATUS 0xc0010131
25
26 /**
27 MSR information returned for #MSR_SEV_STATUS
28 **/
29 typedef union {
30 ///
31 /// Individual bit fields
32 ///
33 struct {
34 ///
35 /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
36 ///
37 UINT32 SevBit:1;
38
39 ///
40 /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled
41 ///
42 UINT32 SevEsBit:1;
43
44 UINT32 Reserved:30;
45 } Bits;
46 ///
47 /// All bit fields as a 32-bit value
48 ///
49 UINT32 Uint32;
50 ///
51 /// All bit fields as a 64-bit value
52 ///
53 UINT64 Uint64;
54 } MSR_SEV_STATUS_REGISTER;
55
56 #endif