2 /// IPF specific application register reading functions
4 /// Copyright (c) 2008, Intel Corporation
5 /// All rights reserved. This program and the accompanying materials
6 /// are licensed and made available under the terms and conditions of the BSD License
7 /// which accompanies this distribution. The full text of the license may be found at
8 /// http://opensource.org/licenses/bsd-license.php
10 /// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 /// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 //---------------------------------------------------------------------------------
20 // AsmReadApplicationRegister
22 // Reads a 64-bit application register.
24 // Reads and returns the application register specified by Index.
25 // If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.
29 // On Entry : The index of the application register to read.
31 // Return Value: The application register specified by Index.
34 //----------------------------------------------------------------------------------
36 .type AsmReadApplicationRegister, @function
37 .proc AsmReadApplicationRegister
40 AsmReadApplicationRegister::
42 // ARs are defined in the ranges 0-44 and 64-66 (with some holes).
43 // Compact this list by subtracting 16 from the top range.
44 // 0-44, 64-66 -> 0-44, 48-50
47 mov r14=pr // save predicates
48 cmp.leu p6,p7=64,in0 // p6 = AR# >= 64
50 (p7) cmp.leu p7,p0=48,in0 // p7 = 32 <= AR# < 64
51 (p6) add in0=-16,in0 // if (AR >= 64) AR# -= 16
53 (p7) mov r15=0 // if bad range (48-63)
55 mov ret0=-1 // in case of illegal AR #
56 shl r15=r15,in0 // r15 = 0x2 << AR#
61 // At this point the predicates contain a bit field of the
62 // AR desired. (The bit is the AR+1, since pr0 is always 1.)
64 .pred.rel "mutex",p1,p2,p3,p4,p5,p6,p7,p8,p17,p18,p19,p20,p22,p25,\
65 p26,p27,p28,p29,p30,p31,p33,p37,p41,p45,p49,p50,p51
66 (p1) mov ret0=ar.k0 // ar0
67 (p2) mov ret0=ar.k1 // ar1
68 (p3) mov ret0=ar.k2 // ar2
69 (p4) mov ret0=ar.k3 // ar3
70 (p5) mov ret0=ar.k4 // ar4
71 (p6) mov ret0=ar.k5 // ar5
72 (p7) mov ret0=ar.k6 // ar6
73 (p8) mov ret0=ar.k7 // ar7
75 (p17) mov ret0=ar.rsc // ar16
76 (p18) mov ret0=ar.bsp // ar17
77 (p19) mov ret0=ar.bspstore // ar18
78 (p20) mov ret0=ar.rnat // ar19
80 (p22) mov ret0=ar.fcr // ar21 [iA32]
82 (p25) mov ret0=ar.eflag // ar24 [iA32]
83 (p26) mov ret0=ar.csd // ar25 [iA32]
84 (p27) mov ret0=ar.ssd // ar26 [iA32]
85 (p28) mov ret0=ar.cflg // ar27 [iA32]
86 (p29) mov ret0=ar.fsr // ar28 [iA32]
87 (p30) mov ret0=ar.fir // ar29 [iA32]
88 (p31) mov ret0=ar.fdr // ar30 [iA32]
90 (p33) mov ret0=ar.ccv // ar32
92 (p37) mov ret0=ar.unat // ar36
94 (p41) mov ret0=ar.fpsr // ar40
96 (p45) mov ret0=ar.itc // ar44
99 // This is the translated (-16) range.
101 (p49) mov ret0=ar.pfs // ar64
102 (p50) mov ret0=ar.lc // ar65
103 (p51) mov ret0=ar.ec // ar66
105 // Restore predicates and return.