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1 ;------------------------------------------------------------------------------
2 ;
3 ; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
5 ;
6 ; Module Name:
7 ;
8 ; DisableCache.Asm
9 ;
10 ; Abstract:
11 ;
12 ; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
13 ; WBINVD instruction.
14 ;
15 ; Notes:
16 ;
17 ;------------------------------------------------------------------------------
18
19 DEFAULT REL
20 SECTION .text
21
22 ;------------------------------------------------------------------------------
23 ; VOID
24 ; EFIAPI
25 ; AsmDisableCache (
26 ; VOID
27 ; );
28 ;------------------------------------------------------------------------------
29 global ASM_PFX(AsmDisableCache)
30 ASM_PFX(AsmDisableCache):
31 mov rax, cr0
32 bts rax, 30
33 btr rax, 29
34 mov cr0, rax
35 wbinvd
36 ret
37