MdePkg/Library/BaseLib/X64/Thunk16.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   4 # This program and the accompanying materials
   5 # are licensed and made available under the terms and conditions of the BSD License
   6 # which accompanies this distribution.  The full text of the license may be found at
   7 # http://opensource.org/licenses/bsd-license.php.
   8 #
   9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 # Module Name:
  13 #
  14 #   Thunk16.S
  15 #
  16 # Abstract:
  17 #
  18 #   Real mode thunk
  19 #
  20 #------------------------------------------------------------------------------
  21
  22 #include <Library/BaseLib.h>
  23
  24 ASM_GLOBAL ASM_PFX(m16Start)
  25 ASM_GLOBAL ASM_PFX(m16Size)
  26 ASM_GLOBAL ASM_PFX(mThunk16Attr)
  27 ASM_GLOBAL ASM_PFX(m16Gdt)
  28 ASM_GLOBAL ASM_PFX(m16GdtrBase)
  29 ASM_GLOBAL ASM_PFX(mTransition)
  30 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
  31
  32 # define the structure of IA32_REGS
  33 .set  _EDI, 0       #size 4
  34 .set  _ESI, 4       #size 4
  35 .set  _EBP, 8       #size 4
  36 .set  _ESP, 12      #size 4
  37 .set  _EBX, 16      #size 4
  38 .set  _EDX, 20      #size 4
  39 .set  _ECX, 24      #size 4
  40 .set  _EAX, 28      #size 4
  41 .set  _DS,  32      #size 2
  42 .set  _ES,  34      #size 2
  43 .set  _FS,  36      #size 2
  44 .set  _GS,  38      #size 2
  45 .set  _EFLAGS, 40   #size 8
  46 .set  _EIP, 48      #size 4
  47 .set  _CS, 52       #size 2
  48 .set  _SS, 54       #size 2
  49 .set  IA32_REGS_SIZE, 56
  50
  51     .data
  52
  53 .set Lm16Size, ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
  54 ASM_PFX(m16Size):         .word      Lm16Size
  55 .set  LmThunk16Attr, L_ThunkAttr - ASM_PFX(m16Start)
  56 ASM_PFX(mThunk16Attr):    .word      LmThunk16Attr
  57 .set Lm16Gdt, ASM_PFX(NullSeg) - ASM_PFX(m16Start)
  58 ASM_PFX(m16Gdt):          .word      Lm16Gdt
  59 .set Lm16GdtrBase, _16GdtrBase - ASM_PFX(m16Start)
  60 ASM_PFX(m16GdtrBase):     .word      Lm16GdtrBase
  61 .set LmTransition, _EntryPoint - ASM_PFX(m16Start)
  62 ASM_PFX(mTransition):     .word      LmTransition
  63
  64     .text
  65
  66 ASM_PFX(m16Start):
  67
  68 SavedGdt:    .space 10
  69
  70 #------------------------------------------------------------------------------
  71 # _BackFromUserCode() takes control in real mode after 'retf' has been executed
  72 # by user code. It will be shadowed to somewhere in memory below 1MB.
  73 #------------------------------------------------------------------------------
  74 ASM_GLOBAL ASM_PFX(BackFromUserCode)
  75 ASM_PFX(BackFromUserCode):
  76     #
  77     # The order of saved registers on the stack matches the order they appears
  78     # in IA32_REGS structure. This facilitates wrapper function to extract them
  79     # into that structure.
  80     #
  81     # Some instructions for manipulation of segment registers have to be written
  82     # in opcode since 64-bit MASM prevents accesses to those registers.
  83     #
  84     .byte 0x16                          # push ss
  85     .byte 0xe                           # push cs
  86     .byte 0x66
  87     call    L_Base                       # push eip
  88 L_Base:
  89     .byte 0x66
  90     pushq   $0                          # reserved high order 32 bits of EFlags
  91     .byte 0x66, 0x9c                    # pushfd actually
  92     cli                                 # disable interrupts
  93     push    %gs
  94     push    %fs
  95     .byte 6                             # push es
  96     .byte 0x1e                          # push ds
  97     .byte 0x66,0x60                     # pushad
  98     .byte 0x66,0xba                     # mov edx, imm32
  99 L_ThunkAttr:  .space  4
 100     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
 101     jz      L_1
 102     movl    $0x15cd2401,%eax            # mov ax, 2401h & int 15h
 103     cli                                 # disable interrupts
 104     jnc     L_2
 105 L_1:
 106     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
 107     jz      L_2
 108     inb     $0x92,%al
 109     orb     $2,%al
 110     outb    %al, $0x92                   # deactivate A20M#
 111 L_2:
 112     movw    %ss,%ax
 113     lea     IA32_REGS_SIZE(%esp), %bp
 114     #
 115     # rsi in the following 2 instructions is indeed bp in 16-bit code
 116     #
 117     movw    %bp, (_ESP - IA32_REGS_SIZE)(%rsi)
 118     .byte 0x66
 119     movl    (_EIP - IA32_REGS_SIZE)(%rsi), %ebx
 120     shlw    $4,%ax                      # shl eax, 4
 121     addw    %ax,%bp                     # add ebp, eax
 122     movw    %cs,%ax
 123     shlw    $4,%ax
 124     lea     (L_64BitCode - L_Base)(%ebx, %eax), %ax
 125     .byte 0x66,0x2e,0x89,0x87           # mov cs:[bx + (L_64Eip - L_Base)], eax
 126     .word   L_64Eip - L_Base
 127     .byte 0x66,0xb8                     # mov eax, imm32
 128 L_SavedCr4: .space      4
 129     movq    %rax, %cr4
 130     #
 131     # rdi in the instruction below is indeed bx in 16-bit code
 132     #
 133     .byte 0x66,0x2e                     # 2eh is "cs:" segment override
 134     lgdt    (SavedGdt - L_Base)(%rdi)
 135     .byte 0x66
 136     movl    $0xc0000080,%ecx
 137     rdmsr
 138     orb     $1,%ah
 139     wrmsr
 140     .byte 0x66,0xb8                     # mov eax, imm32
 141 L_SavedCr0: .space      4
 142     movq    %rax, %cr0
 143     .byte 0x66,0xea                     # jmp far cs:L_64Bit
 144 L_64Eip:    .space      4
 145 L_SavedCs:  .space      2
 146 L_64BitCode:
 147     .byte   0x90
 148     .byte   0x67,0xbc                  # mov esp, imm32
 149 L_SavedSp:  .space      4              # restore stack
 150     nop
 151     ret
 152
 153 _EntryPoint: .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
 154              .word      CODE16
 155 _16Gdtr:     .word      GDT_SIZE - 1
 156 _16GdtrBase: .quad      ASM_PFX(NullSeg)
 157 _16Idtr:     .word      0x3ff
 158              .long      0
 159
 160 #------------------------------------------------------------------------------
 161 # _ToUserCode() takes control in real mode before passing control to user code.
 162 # It will be shadowed to somewhere in memory below 1MB.
 163 #------------------------------------------------------------------------------
 164 ASM_GLOBAL ASM_PFX(ToUserCode)
 165 ASM_PFX(ToUserCode):
 166     movl    %edx,%ss                    # set new segment selectors
 167     movl    %edx,%ds
 168     movl    %edx,%es
 169     movl    %edx,%fs
 170     movl    %edx,%gs
 171     .byte 0x66
 172     movl    $0xc0000080,%ecx
 173     movq    %rax, %cr0
 174     rdmsr
 175     andb    $0xfe, %ah                  # $0b11111110
 176     wrmsr
 177     movq    %rbp, %cr4
 178     movl    %esi,%ss                    # set up 16-bit stack segment
 179     movw    %bx,%sp                     # set up 16-bit stack pointer
 180     .byte 0x66                          # make the following call 32-bit
 181     call    L_Base1                       # push eip
 182 L_Base1:
 183     popw    %bp                         # ebp <- address of L_Base1
 184     pushq   (IA32_REGS_SIZE + 2)(%esp)
 185     lea     0x0c(%rsi), %eax
 186     pushq   %rax
 187     lret                                # execution begins at next instruction
 188 L_RealMode:
 189     .byte 0x66,0x2e                     # CS and operand size override
 190     lidt    (_16Idtr - L_Base1)(%rsi)
 191     .byte 0x66,0x61                     # popad
 192     .byte 0x1f                          # pop ds
 193     .byte 0x7                           # pop es
 194     .byte 0x0f, 0xa1                    # pop fs
 195     .byte 0x0f, 0xa9                    # pop gs
 196     .byte 0x66, 0x9d                    # popfd
 197     leaw    4(%esp),%sp                 # skip high order 32 bits of EFlags
 198     .byte 0x66                          # make the following retf 32-bit
 199     lret                                # transfer control to user code
 200
 201 .set  CODE16,  ASM_PFX(_16Code) - .
 202 .set  DATA16,  ASM_PFX(_16Data) - .
 203 .set  DATA32,  ASM_PFX(_32Data) - .
 204
 205 ASM_PFX(NullSeg):   .quad      0
 206 ASM_PFX(_16Code):
 207             .word -1
 208             .word 0
 209             .byte 0
 210             .byte 0x9b
 211             .byte 0x8f                  # 16-bit segment, 4GB limit
 212             .byte 0
 213 ASM_PFX(_16Data):
 214             .word -1
 215             .word 0
 216             .byte 0
 217             .byte 0x93
 218             .byte 0x8f                  # 16-bit segment, 4GB limit
 219             .byte 0
 220 ASM_PFX(_32Data):
 221             .word -1
 222             .word 0
 223             .byte 0
 224             .byte 0x93
 225             .byte 0xcf                  # 16-bit segment, 4GB limit
 226             .byte 0
 227
 228 .set  GDT_SIZE, . - ASM_PFX(NullSeg)
 229
 230 #------------------------------------------------------------------------------
 231 # IA32_REGISTER_SET *
 232 # EFIAPI
 233 # InternalAsmThunk16 (
 234 #   IN      IA32_REGISTER_SET         *RegisterSet,
 235 #   IN OUT  VOID                      *Transition
 236 #   );
 237 #------------------------------------------------------------------------------
 238
 239 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
 240 ASM_PFX(InternalAsmThunk16):
 241     pushq   %rbp
 242     pushq   %rbx
 243     pushq   %rsi
 244     pushq   %rdi
 245
 246     movl    %ds, %ebx
 247     pushq   %rbx      # Save ds segment register on the stack
 248     movl    %es, %ebx
 249     pushq   %rbx      # Save es segment register on the stack
 250     movl    %ss, %ebx
 251     pushq   %rbx      # Save ss segment register on the stack
 252
 253     .byte   0x0f, 0xa0                  #push   fs
 254     .byte   0x0f, 0xa8                  #push   gs
 255     movq    %rcx, %rsi
 256     movzwl  _SS(%rsi), %r8d
 257     movl    _ESP(%rsi), %edi
 258     lea     -(IA32_REGS_SIZE + 4)(%edi), %rdi
 259     imul    $16, %r8d, %eax
 260     movl    %edi,%ebx                   # ebx <- stack for 16-bit code
 261     pushq   $(IA32_REGS_SIZE / 4)
 262     addl    %eax,%edi                   # edi <- linear address of 16-bit stack
 263     popq    %rcx
 264     rep
 265     movsl                               # copy RegSet
 266     lea     (L_SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx
 267     movl    %edx,%eax                   # eax <- transition code address
 268     andl    $0xf,%edx
 269     shll    $12,%eax                    # segment address in high order 16 bits
 270     .set LBackFromUserCodeDelta, ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start)
 271     lea     (LBackFromUserCodeDelta)(%rdx), %ax
 272     stosl                               # [edi] <- return address of user code
 273     sgdt    0x60(%rsp)                  # save GDT stack in argument space
 274     movzwq  0x60(%rsp), %r10            # r10 <- GDT limit
 275     lea     ((ASM_PFX(InternalAsmThunk16) - L_SavedCr4) + 0xf)(%rcx), %r11
 276     andq    $0xfffffffffffffff0, %r11   # r11 <- 16-byte aligned shadowed GDT table in real mode buffer
 277
 278     movw    %r10w, (SavedGdt - L_SavedCr4)(%rcx)       # save the limit of shadowed GDT table
 279     movq    %r11, (SavedGdt - L_SavedCr4 + 0x2)(%rcx)  # save the base address of shadowed GDT table
 280
 281     movq    0x62(%rsp) ,%rsi            # rsi <- the original GDT base address
 282     xchg   %r10, %rcx                   # save rcx to r10 and initialize rcx to be the limit of GDT table
 283     incq   %rcx                         # rcx <- the size of memory to copy
 284     xchg   %r11, %rdi                   # save rdi to r11 and initialize rdi to the base address of shadowed GDT table
 285     rep
 286     movsb                               # perform memory copy to shadow GDT table
 287     movq   %r10, %rcx                   # restore the orignal rcx before memory copy
 288     movq   %r11, %rdi                   # restore the original rdi before memory copy
 289
 290     sidt    0x50(%rsp)
 291     movq    %cr0, %rax
 292     .set LSavedCrDelta, L_SavedCr0 - L_SavedCr4
 293     movl    %eax, (LSavedCrDelta)(%rcx)
 294     andl    $0x7ffffffe,%eax            # clear PE, PG bits
 295     movq    %cr4, %rbp
 296     movl    %ebp, (%rcx)                # save CR4 in SavedCr4
 297     andl    $0x300,%ebp                 # clear all but PCE and OSFXSR bits
 298     movl    %r8d, %esi                  # esi <- 16-bit stack segment
 299     .byte      0x6a, DATA32
 300     popq    %rdx
 301     lgdt    (_16Gdtr - L_SavedCr4)(%rcx)
 302     movl    %edx,%ss
 303     pushfq
 304     lea     -8(%rdx), %edx
 305     lea     L_RetFromRealMode(%rip), %r8
 306     pushq   %r8
 307     movl    %cs, %r8d
 308     movw    %r8w, (L_SavedCs - L_SavedCr4)(%rcx)
 309     movl    %esp, (L_SavedSp - L_SavedCr4)(%rcx)
 310     .byte   0xff, 0x69                  #  jmp (_EntryPoint - L_SavedCr4)(%rcx)
 311     .set    Ltemp1, _EntryPoint - L_SavedCr4
 312     .byte   Ltemp1
 313 L_RetFromRealMode:
 314     popfq
 315     lgdt    0x60(%rsp)                  # restore protected mode GDTR
 316     lidt    0x50(%rsp)                  # restore protected mode IDTR
 317     lea     -IA32_REGS_SIZE(%rbp), %eax
 318     .byte 0x0f, 0xa9                    # pop gs
 319     .byte 0x0f, 0xa1                    # pop fs
 320
 321     popq     %rbx
 322     movl     %ebx, %ss
 323     popq     %rbx
 324     movl     %ebx, %es
 325     popq     %rbx
 326     movl     %ebx, %ds
 327
 328     popq    %rdi
 329     popq    %rsi
 330     popq    %rbx
 331     popq    %rbp
 332
 333     ret