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2 PCI Library using Port CF8/CFC access.
4 Copyright (c) 2006, Intel Corporation<BR>
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 // The package level header files this module uses
20 // The protocols, PPI and GUID defintions for this module
23 // The Library classes this module consumes
25 #include <Library/PciLib.h>
26 #include <Library/PciCf8Lib.h>
29 Reads an 8-bit PCI configuration register.
31 Reads and returns the 8-bit PCI configuration register specified by Address.
32 This function must guarantee that all PCI read and write operations are
35 If Address > 0x0FFFFFFF, then ASSERT().
37 @param Address Address that encodes the PCI Bus, Device, Function and
40 @return The read value from the PCI configuration register.
49 return PciCf8Read8 (Address
);
53 Writes an 8-bit PCI configuration register.
55 Writes the 8-bit PCI configuration register specified by Address with the
56 value specified by Value. Value is returned. This function must guarantee
57 that all PCI read and write operations are serialized.
59 If Address > 0x0FFFFFFF, then ASSERT().
61 @param Address Address that encodes the PCI Bus, Device, Function and
63 @param Value The value to write.
65 @return The value written to the PCI configuration register.
75 return PciCf8Write8 (Address
, Data
);
79 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
82 Reads the 8-bit PCI configuration register specified by Address, performs a
83 bitwise inclusive OR between the read result and the value specified by
84 OrData, and writes the result to the 8-bit PCI configuration register
85 specified by Address. The value written to the PCI configuration register is
86 returned. This function must guarantee that all PCI read and write operations
89 If Address > 0x0FFFFFFF, then ASSERT().
91 @param Address Address that encodes the PCI Bus, Device, Function and
93 @param OrData The value to OR with the PCI configuration register.
95 @return The value written back to the PCI configuration register.
105 return PciCf8Or8 (Address
, OrData
);
109 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
112 Reads the 8-bit PCI configuration register specified by Address, performs a
113 bitwise AND between the read result and the value specified by AndData, and
114 writes the result to the 8-bit PCI configuration register specified by
115 Address. The value written to the PCI configuration register is returned.
116 This function must guarantee that all PCI read and write operations are
119 If Address > 0x0FFFFFFF, then ASSERT().
121 @param Address Address that encodes the PCI Bus, Device, Function and
123 @param AndData The value to AND with the PCI configuration register.
125 @return The value written back to the PCI configuration register.
135 return PciCf8And8 (Address
, AndData
);
139 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
140 value, followed a bitwise inclusive OR with another 8-bit value.
142 Reads the 8-bit PCI configuration register specified by Address, performs a
143 bitwise AND between the read result and the value specified by AndData,
144 performs a bitwise inclusive OR between the result of the AND operation and
145 the value specified by OrData, and writes the result to the 8-bit PCI
146 configuration register specified by Address. The value written to the PCI
147 configuration register is returned. This function must guarantee that all PCI
148 read and write operations are serialized.
150 If Address > 0x0FFFFFFF, then ASSERT().
152 @param Address Address that encodes the PCI Bus, Device, Function and
154 @param AndData The value to AND with the PCI configuration register.
155 @param OrData The value to OR with the result of the AND operation.
157 @return The value written back to the PCI configuration register.
168 return PciCf8AndThenOr8 (Address
, AndData
, OrData
);
172 Reads a bit field of a PCI configuration register.
174 Reads the bit field in an 8-bit PCI configuration register. The bit field is
175 specified by the StartBit and the EndBit. The value of the bit field is
178 If Address > 0x0FFFFFFF, then ASSERT().
179 If StartBit is greater than 7, then ASSERT().
180 If EndBit is greater than 7, then ASSERT().
181 If EndBit is less than StartBit, then ASSERT().
183 @param Address PCI configuration register to read.
184 @param StartBit The ordinal of the least significant bit in the bit field.
186 @param EndBit The ordinal of the most significant bit in the bit field.
189 @return The value of the bit field read from the PCI configuration register.
200 return PciCf8BitFieldRead8 (Address
, StartBit
, EndBit
);
204 Writes a bit field to a PCI configuration register.
206 Writes Value to the bit field of the PCI configuration register. The bit
207 field is specified by the StartBit and the EndBit. All other bits in the
208 destination PCI configuration register are preserved. The new value of the
209 8-bit register is returned.
211 If Address > 0x0FFFFFFF, then ASSERT().
212 If StartBit is greater than 7, then ASSERT().
213 If EndBit is greater than 7, then ASSERT().
214 If EndBit is less than StartBit, then ASSERT().
216 @param Address PCI configuration register to write.
217 @param StartBit The ordinal of the least significant bit in the bit field.
219 @param EndBit The ordinal of the most significant bit in the bit field.
221 @param Value New value of the bit field.
223 @return The value written back to the PCI configuration register.
235 return PciCf8BitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
239 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
240 writes the result back to the bit field in the 8-bit port.
242 Reads the 8-bit PCI configuration register specified by Address, performs a
243 bitwise inclusive OR between the read result and the value specified by
244 OrData, and writes the result to the 8-bit PCI configuration register
245 specified by Address. The value written to the PCI configuration register is
246 returned. This function must guarantee that all PCI read and write operations
247 are serialized. Extra left bits in OrData are stripped.
249 If Address > 0x0FFFFFFF, then ASSERT().
250 If StartBit is greater than 7, then ASSERT().
251 If EndBit is greater than 7, then ASSERT().
252 If EndBit is less than StartBit, then ASSERT().
254 @param Address PCI configuration register to write.
255 @param StartBit The ordinal of the least significant bit in the bit field.
257 @param EndBit The ordinal of the most significant bit in the bit field.
259 @param OrData The value to OR with the PCI configuration register.
261 @return The value written back to the PCI configuration register.
273 return PciCf8BitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
277 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
278 AND, and writes the result back to the bit field in the 8-bit register.
280 Reads the 8-bit PCI configuration register specified by Address, performs a
281 bitwise AND between the read result and the value specified by AndData, and
282 writes the result to the 8-bit PCI configuration register specified by
283 Address. The value written to the PCI configuration register is returned.
284 This function must guarantee that all PCI read and write operations are
285 serialized. Extra left bits in AndData are stripped.
287 If Address > 0x0FFFFFFF, then ASSERT().
288 If StartBit is greater than 7, then ASSERT().
289 If EndBit is greater than 7, then ASSERT().
290 If EndBit is less than StartBit, then ASSERT().
292 @param Address PCI configuration register to write.
293 @param StartBit The ordinal of the least significant bit in the bit field.
295 @param EndBit The ordinal of the most significant bit in the bit field.
297 @param AndData The value to AND with the PCI configuration register.
299 @return The value written back to the PCI configuration register.
311 return PciCf8BitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
315 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
316 bitwise inclusive OR, and writes the result back to the bit field in the
319 Reads the 8-bit PCI configuration register specified by Address, performs a
320 bitwise AND followed by a bitwise inclusive OR between the read result and
321 the value specified by AndData, and writes the result to the 8-bit PCI
322 configuration register specified by Address. The value written to the PCI
323 configuration register is returned. This function must guarantee that all PCI
324 read and write operations are serialized. Extra left bits in both AndData and
327 If Address > 0x0FFFFFFF, then ASSERT().
328 If StartBit is greater than 7, then ASSERT().
329 If EndBit is greater than 7, then ASSERT().
330 If EndBit is less than StartBit, then ASSERT().
332 @param Address PCI configuration register to write.
333 @param StartBit The ordinal of the least significant bit in the bit field.
335 @param EndBit The ordinal of the most significant bit in the bit field.
337 @param AndData The value to AND with the PCI configuration register.
338 @param OrData The value to OR with the result of the AND operation.
340 @return The value written back to the PCI configuration register.
345 PciBitFieldAndThenOr8 (
353 return PciCf8BitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
357 Reads a 16-bit PCI configuration register.
359 Reads and returns the 16-bit PCI configuration register specified by Address.
360 This function must guarantee that all PCI read and write operations are
363 If Address > 0x0FFFFFFF, then ASSERT().
365 @param Address Address that encodes the PCI Bus, Device, Function and
368 @return The read value from the PCI configuration register.
377 return PciCf8Read16 (Address
);
381 Writes a 16-bit PCI configuration register.
383 Writes the 16-bit PCI configuration register specified by Address with the
384 value specified by Value. Value is returned. This function must guarantee
385 that all PCI read and write operations are serialized.
387 If Address > 0x0FFFFFFF, then ASSERT().
389 @param Address Address that encodes the PCI Bus, Device, Function and
391 @param Value The value to write.
393 @return The value written to the PCI configuration register.
403 return PciCf8Write16 (Address
, Data
);
407 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
410 Reads the 16-bit PCI configuration register specified by Address, performs a
411 bitwise inclusive OR between the read result and the value specified by
412 OrData, and writes the result to the 16-bit PCI configuration register
413 specified by Address. The value written to the PCI configuration register is
414 returned. This function must guarantee that all PCI read and write operations
417 If Address > 0x0FFFFFFF, then ASSERT().
419 @param Address Address that encodes the PCI Bus, Device, Function and
421 @param OrData The value to OR with the PCI configuration register.
423 @return The value written back to the PCI configuration register.
433 return PciCf8Or16 (Address
, OrData
);
437 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
440 Reads the 16-bit PCI configuration register specified by Address, performs a
441 bitwise AND between the read result and the value specified by AndData, and
442 writes the result to the 16-bit PCI configuration register specified by
443 Address. The value written to the PCI configuration register is returned.
444 This function must guarantee that all PCI read and write operations are
447 If Address > 0x0FFFFFFF, then ASSERT().
449 @param Address Address that encodes the PCI Bus, Device, Function and
451 @param AndData The value to AND with the PCI configuration register.
453 @return The value written back to the PCI configuration register.
463 return PciCf8And16 (Address
, AndData
);
467 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
468 value, followed a bitwise inclusive OR with another 16-bit value.
470 Reads the 16-bit PCI configuration register specified by Address, performs a
471 bitwise AND between the read result and the value specified by AndData,
472 performs a bitwise inclusive OR between the result of the AND operation and
473 the value specified by OrData, and writes the result to the 16-bit PCI
474 configuration register specified by Address. The value written to the PCI
475 configuration register is returned. This function must guarantee that all PCI
476 read and write operations are serialized.
478 If Address > 0x0FFFFFFF, then ASSERT().
480 @param Address Address that encodes the PCI Bus, Device, Function and
482 @param AndData The value to AND with the PCI configuration register.
483 @param OrData The value to OR with the result of the AND operation.
485 @return The value written back to the PCI configuration register.
496 return PciCf8AndThenOr16 (Address
, AndData
, OrData
);
500 Reads a bit field of a PCI configuration register.
502 Reads the bit field in a 16-bit PCI configuration register. The bit field is
503 specified by the StartBit and the EndBit. The value of the bit field is
506 If Address > 0x0FFFFFFF, then ASSERT().
507 If StartBit is greater than 15, then ASSERT().
508 If EndBit is greater than 15, then ASSERT().
509 If EndBit is less than StartBit, then ASSERT().
511 @param Address PCI configuration register to read.
512 @param StartBit The ordinal of the least significant bit in the bit field.
514 @param EndBit The ordinal of the most significant bit in the bit field.
517 @return The value of the bit field read from the PCI configuration register.
528 return PciCf8BitFieldRead16 (Address
, StartBit
, EndBit
);
532 Writes a bit field to a PCI configuration register.
534 Writes Value to the bit field of the PCI configuration register. The bit
535 field is specified by the StartBit and the EndBit. All other bits in the
536 destination PCI configuration register are preserved. The new value of the
537 16-bit register is returned.
539 If Address > 0x0FFFFFFF, then ASSERT().
540 If StartBit is greater than 15, then ASSERT().
541 If EndBit is greater than 15, then ASSERT().
542 If EndBit is less than StartBit, then ASSERT().
544 @param Address PCI configuration register to write.
545 @param StartBit The ordinal of the least significant bit in the bit field.
547 @param EndBit The ordinal of the most significant bit in the bit field.
549 @param Value New value of the bit field.
551 @return The value written back to the PCI configuration register.
563 return PciCf8BitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
567 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
568 writes the result back to the bit field in the 16-bit port.
570 Reads the 16-bit PCI configuration register specified by Address, performs a
571 bitwise inclusive OR between the read result and the value specified by
572 OrData, and writes the result to the 16-bit PCI configuration register
573 specified by Address. The value written to the PCI configuration register is
574 returned. This function must guarantee that all PCI read and write operations
575 are serialized. Extra left bits in OrData are stripped.
577 If Address > 0x0FFFFFFF, then ASSERT().
578 If StartBit is greater than 15, then ASSERT().
579 If EndBit is greater than 15, then ASSERT().
580 If EndBit is less than StartBit, then ASSERT().
582 @param Address PCI configuration register to write.
583 @param StartBit The ordinal of the least significant bit in the bit field.
585 @param EndBit The ordinal of the most significant bit in the bit field.
587 @param OrData The value to OR with the PCI configuration register.
589 @return The value written back to the PCI configuration register.
601 return PciCf8BitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
605 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
606 AND, and writes the result back to the bit field in the 16-bit register.
608 Reads the 16-bit PCI configuration register specified by Address, performs a
609 bitwise AND between the read result and the value specified by AndData, and
610 writes the result to the 16-bit PCI configuration register specified by
611 Address. The value written to the PCI configuration register is returned.
612 This function must guarantee that all PCI read and write operations are
613 serialized. Extra left bits in AndData are stripped.
615 If Address > 0x0FFFFFFF, then ASSERT().
616 If StartBit is greater than 15, then ASSERT().
617 If EndBit is greater than 15, then ASSERT().
618 If EndBit is less than StartBit, then ASSERT().
620 @param Address PCI configuration register to write.
621 @param StartBit The ordinal of the least significant bit in the bit field.
623 @param EndBit The ordinal of the most significant bit in the bit field.
625 @param AndData The value to AND with the PCI configuration register.
627 @return The value written back to the PCI configuration register.
639 return PciCf8BitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
643 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
644 bitwise inclusive OR, and writes the result back to the bit field in the
647 Reads the 16-bit PCI configuration register specified by Address, performs a
648 bitwise AND followed by a bitwise inclusive OR between the read result and
649 the value specified by AndData, and writes the result to the 16-bit PCI
650 configuration register specified by Address. The value written to the PCI
651 configuration register is returned. This function must guarantee that all PCI
652 read and write operations are serialized. Extra left bits in both AndData and
655 If Address > 0x0FFFFFFF, then ASSERT().
656 If StartBit is greater than 15, then ASSERT().
657 If EndBit is greater than 15, then ASSERT().
658 If EndBit is less than StartBit, then ASSERT().
660 @param Address PCI configuration register to write.
661 @param StartBit The ordinal of the least significant bit in the bit field.
663 @param EndBit The ordinal of the most significant bit in the bit field.
665 @param AndData The value to AND with the PCI configuration register.
666 @param OrData The value to OR with the result of the AND operation.
668 @return The value written back to the PCI configuration register.
673 PciBitFieldAndThenOr16 (
681 return PciCf8BitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
685 Reads a 32-bit PCI configuration register.
687 Reads and returns the 32-bit PCI configuration register specified by Address.
688 This function must guarantee that all PCI read and write operations are
691 If Address > 0x0FFFFFFF, then ASSERT().
693 @param Address Address that encodes the PCI Bus, Device, Function and
696 @return The read value from the PCI configuration register.
705 return PciCf8Read32 (Address
);
709 Writes a 32-bit PCI configuration register.
711 Writes the 32-bit PCI configuration register specified by Address with the
712 value specified by Value. Value is returned. This function must guarantee
713 that all PCI read and write operations are serialized.
715 If Address > 0x0FFFFFFF, then ASSERT().
717 @param Address Address that encodes the PCI Bus, Device, Function and
719 @param Value The value to write.
721 @return The value written to the PCI configuration register.
731 return PciCf8Write32 (Address
, Data
);
735 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
738 Reads the 32-bit PCI configuration register specified by Address, performs a
739 bitwise inclusive OR between the read result and the value specified by
740 OrData, and writes the result to the 32-bit PCI configuration register
741 specified by Address. The value written to the PCI configuration register is
742 returned. This function must guarantee that all PCI read and write operations
745 If Address > 0x0FFFFFFF, then ASSERT().
747 @param Address Address that encodes the PCI Bus, Device, Function and
749 @param OrData The value to OR with the PCI configuration register.
751 @return The value written back to the PCI configuration register.
761 return PciCf8Or32 (Address
, OrData
);
765 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
768 Reads the 32-bit PCI configuration register specified by Address, performs a
769 bitwise AND between the read result and the value specified by AndData, and
770 writes the result to the 32-bit PCI configuration register specified by
771 Address. The value written to the PCI configuration register is returned.
772 This function must guarantee that all PCI read and write operations are
775 If Address > 0x0FFFFFFF, then ASSERT().
777 @param Address Address that encodes the PCI Bus, Device, Function and
779 @param AndData The value to AND with the PCI configuration register.
781 @return The value written back to the PCI configuration register.
791 return PciCf8And32 (Address
, AndData
);
795 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
796 value, followed a bitwise inclusive OR with another 32-bit value.
798 Reads the 32-bit PCI configuration register specified by Address, performs a
799 bitwise AND between the read result and the value specified by AndData,
800 performs a bitwise inclusive OR between the result of the AND operation and
801 the value specified by OrData, and writes the result to the 32-bit PCI
802 configuration register specified by Address. The value written to the PCI
803 configuration register is returned. This function must guarantee that all PCI
804 read and write operations are serialized.
806 If Address > 0x0FFFFFFF, then ASSERT().
808 @param Address Address that encodes the PCI Bus, Device, Function and
810 @param AndData The value to AND with the PCI configuration register.
811 @param OrData The value to OR with the result of the AND operation.
813 @return The value written back to the PCI configuration register.
824 return PciCf8AndThenOr32 (Address
, AndData
, OrData
);
828 Reads a bit field of a PCI configuration register.
830 Reads the bit field in a 32-bit PCI configuration register. The bit field is
831 specified by the StartBit and the EndBit. The value of the bit field is
834 If Address > 0x0FFFFFFF, then ASSERT().
835 If StartBit is greater than 31, then ASSERT().
836 If EndBit is greater than 31, then ASSERT().
837 If EndBit is less than StartBit, then ASSERT().
839 @param Address PCI configuration register to read.
840 @param StartBit The ordinal of the least significant bit in the bit field.
842 @param EndBit The ordinal of the most significant bit in the bit field.
845 @return The value of the bit field read from the PCI configuration register.
856 return PciCf8BitFieldRead32 (Address
, StartBit
, EndBit
);
860 Writes a bit field to a PCI configuration register.
862 Writes Value to the bit field of the PCI configuration register. The bit
863 field is specified by the StartBit and the EndBit. All other bits in the
864 destination PCI configuration register are preserved. The new value of the
865 32-bit register is returned.
867 If Address > 0x0FFFFFFF, then ASSERT().
868 If StartBit is greater than 31, then ASSERT().
869 If EndBit is greater than 31, then ASSERT().
870 If EndBit is less than StartBit, then ASSERT().
872 @param Address PCI configuration register to write.
873 @param StartBit The ordinal of the least significant bit in the bit field.
875 @param EndBit The ordinal of the most significant bit in the bit field.
877 @param Value New value of the bit field.
879 @return The value written back to the PCI configuration register.
891 return PciCf8BitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
895 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
896 writes the result back to the bit field in the 32-bit port.
898 Reads the 32-bit PCI configuration register specified by Address, performs a
899 bitwise inclusive OR between the read result and the value specified by
900 OrData, and writes the result to the 32-bit PCI configuration register
901 specified by Address. The value written to the PCI configuration register is
902 returned. This function must guarantee that all PCI read and write operations
903 are serialized. Extra left bits in OrData are stripped.
905 If Address > 0x0FFFFFFF, then ASSERT().
906 If StartBit is greater than 31, then ASSERT().
907 If EndBit is greater than 31, then ASSERT().
908 If EndBit is less than StartBit, then ASSERT().
910 @param Address PCI configuration register to write.
911 @param StartBit The ordinal of the least significant bit in the bit field.
913 @param EndBit The ordinal of the most significant bit in the bit field.
915 @param OrData The value to OR with the PCI configuration register.
917 @return The value written back to the PCI configuration register.
929 return PciCf8BitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
933 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
934 AND, and writes the result back to the bit field in the 32-bit register.
936 Reads the 32-bit PCI configuration register specified by Address, performs a
937 bitwise AND between the read result and the value specified by AndData, and
938 writes the result to the 32-bit PCI configuration register specified by
939 Address. The value written to the PCI configuration register is returned.
940 This function must guarantee that all PCI read and write operations are
941 serialized. Extra left bits in AndData are stripped.
943 If Address > 0x0FFFFFFF, then ASSERT().
944 If StartBit is greater than 31, then ASSERT().
945 If EndBit is greater than 31, then ASSERT().
946 If EndBit is less than StartBit, then ASSERT().
948 @param Address PCI configuration register to write.
949 @param StartBit The ordinal of the least significant bit in the bit field.
951 @param EndBit The ordinal of the most significant bit in the bit field.
953 @param AndData The value to AND with the PCI configuration register.
955 @return The value written back to the PCI configuration register.
967 return PciCf8BitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
971 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
972 bitwise inclusive OR, and writes the result back to the bit field in the
975 Reads the 32-bit PCI configuration register specified by Address, performs a
976 bitwise AND followed by a bitwise inclusive OR between the read result and
977 the value specified by AndData, and writes the result to the 32-bit PCI
978 configuration register specified by Address. The value written to the PCI
979 configuration register is returned. This function must guarantee that all PCI
980 read and write operations are serialized. Extra left bits in both AndData and
983 If Address > 0x0FFFFFFF, then ASSERT().
984 If StartBit is greater than 31, then ASSERT().
985 If EndBit is greater than 31, then ASSERT().
986 If EndBit is less than StartBit, then ASSERT().
988 @param Address PCI configuration register to write.
989 @param StartBit The ordinal of the least significant bit in the bit field.
991 @param EndBit The ordinal of the most significant bit in the bit field.
993 @param AndData The value to AND with the PCI configuration register.
994 @param OrData The value to OR with the result of the AND operation.
996 @return The value written back to the PCI configuration register.
1001 PciBitFieldAndThenOr32 (
1009 return PciCf8BitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1013 Reads a range of PCI configuration registers into a caller supplied buffer.
1015 Reads the range of PCI configuration registers specified by StartAddress and
1016 Size into the buffer specified by Buffer. This function only allows the PCI
1017 configuration registers from a single PCI function to be read. Size is
1018 returned. When possible 32-bit PCI configuration read cycles are used to read
1019 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1020 and 16-bit PCI configuration read cycles may be used at the beginning and the
1023 If StartAddress > 0x0FFFFFFF, then ASSERT().
1024 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1025 If Size > 0 and Buffer is NULL, then ASSERT().
1027 @param StartAddress Starting address that encodes the PCI Bus, Device,
1028 Function and Register.
1029 @param Size Size in bytes of the transfer.
1030 @param Buffer Pointer to a buffer receiving the data read.
1038 IN UINTN StartAddress
,
1043 return PciCf8ReadBuffer (StartAddress
, Size
, Buffer
);
1047 Copies the data in a caller supplied buffer to a specified range of PCI
1048 configuration space.
1050 Writes the range of PCI configuration registers specified by StartAddress and
1051 Size from the buffer specified by Buffer. This function only allows the PCI
1052 configuration registers from a single PCI function to be written. Size is
1053 returned. When possible 32-bit PCI configuration write cycles are used to
1054 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1055 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1056 and the end of the range.
1058 If StartAddress > 0x0FFFFFFF, then ASSERT().
1059 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1060 If Size > 0 and Buffer is NULL, then ASSERT().
1062 @param StartAddress Starting address that encodes the PCI Bus, Device,
1063 Function and Register.
1064 @param Size Size in bytes of the transfer.
1065 @param Buffer Pointer to a buffer containing the data to write.
1073 IN UINTN StartAddress
,
1078 return PciCf8WriteBuffer (StartAddress
, Size
, Buffer
);