]>
git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibPciExpress/PciLib.c
2 PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
3 Configuration cycles. Layers on PCI Express Library.
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/PciLib.h>
20 #include <Library/PciExpressLib.h>
23 Register a PCI device so PCI configuration registers may be accessed after
24 SetVirtualAddressMap().
26 If Address > 0x0FFFFFFF, then ASSERT().
28 @param Address Address that encodes the PCI Bus, Device, Function and
31 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
32 @retval RETURN_UNSUPPORTED An attempt was made to call this function
33 after ExitBootServices().
34 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
35 at runtime could not be mapped.
36 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
37 complete the registration.
42 PciRegisterForRuntimeAccess (
46 return PciExpressRegisterForRuntimeAccess (Address
);
50 Reads an 8-bit PCI configuration register.
52 Reads and returns the 8-bit PCI configuration register specified by Address.
53 This function must guarantee that all PCI read and write operations are
56 If Address > 0x0FFFFFFF, then ASSERT().
58 @param Address Address that encodes the PCI Bus, Device, Function and
61 @return The read value from the PCI configuration register.
70 return PciExpressRead8 (Address
);
74 Writes an 8-bit PCI configuration register.
76 Writes the 8-bit PCI configuration register specified by Address with the
77 value specified by Value. Value is returned. This function must guarantee
78 that all PCI read and write operations are serialized.
80 If Address > 0x0FFFFFFF, then ASSERT().
82 @param Address Address that encodes the PCI Bus, Device, Function and
84 @param Value The value to write.
86 @return The value written to the PCI configuration register.
96 return PciExpressWrite8 (Address
, Value
);
100 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
103 Reads the 8-bit PCI configuration register specified by Address, performs a
104 bitwise inclusive OR between the read result and the value specified by
105 OrData, and writes the result to the 8-bit PCI configuration register
106 specified by Address. The value written to the PCI configuration register is
107 returned. This function must guarantee that all PCI read and write operations
110 If Address > 0x0FFFFFFF, then ASSERT().
112 @param Address Address that encodes the PCI Bus, Device, Function and
114 @param OrData The value to OR with the PCI configuration register.
116 @return The value written back to the PCI configuration register.
126 return PciExpressOr8 (Address
, OrData
);
130 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
133 Reads the 8-bit PCI configuration register specified by Address, performs a
134 bitwise AND between the read result and the value specified by AndData, and
135 writes the result to the 8-bit PCI configuration register specified by
136 Address. The value written to the PCI configuration register is returned.
137 This function must guarantee that all PCI read and write operations are
140 If Address > 0x0FFFFFFF, then ASSERT().
142 @param Address Address that encodes the PCI Bus, Device, Function and
144 @param AndData The value to AND with the PCI configuration register.
146 @return The value written back to the PCI configuration register.
156 return PciExpressAnd8 (Address
, AndData
);
160 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
161 value, followed a bitwise inclusive OR with another 8-bit value.
163 Reads the 8-bit PCI configuration register specified by Address, performs a
164 bitwise AND between the read result and the value specified by AndData,
165 performs a bitwise inclusive OR between the result of the AND operation and
166 the value specified by OrData, and writes the result to the 8-bit PCI
167 configuration register specified by Address. The value written to the PCI
168 configuration register is returned. This function must guarantee that all PCI
169 read and write operations are serialized.
171 If Address > 0x0FFFFFFF, then ASSERT().
173 @param Address Address that encodes the PCI Bus, Device, Function and
175 @param AndData The value to AND with the PCI configuration register.
176 @param OrData The value to OR with the result of the AND operation.
178 @return The value written back to the PCI configuration register.
189 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
193 Reads a bit field of a PCI configuration register.
195 Reads the bit field in an 8-bit PCI configuration register. The bit field is
196 specified by the StartBit and the EndBit. The value of the bit field is
199 If Address > 0x0FFFFFFF, then ASSERT().
200 If StartBit is greater than 7, then ASSERT().
201 If EndBit is greater than 7, then ASSERT().
202 If EndBit is less than StartBit, then ASSERT().
204 @param Address PCI configuration register to read.
205 @param StartBit The ordinal of the least significant bit in the bit field.
207 @param EndBit The ordinal of the most significant bit in the bit field.
210 @return The value of the bit field read from the PCI configuration register.
221 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
225 Writes a bit field to a PCI configuration register.
227 Writes Value to the bit field of the PCI configuration register. The bit
228 field is specified by the StartBit and the EndBit. All other bits in the
229 destination PCI configuration register are preserved. The new value of the
230 8-bit register is returned.
232 If Address > 0x0FFFFFFF, then ASSERT().
233 If StartBit is greater than 7, then ASSERT().
234 If EndBit is greater than 7, then ASSERT().
235 If EndBit is less than StartBit, then ASSERT().
237 @param Address PCI configuration register to write.
238 @param StartBit The ordinal of the least significant bit in the bit field.
240 @param EndBit The ordinal of the most significant bit in the bit field.
242 @param Value New value of the bit field.
244 @return The value written back to the PCI configuration register.
256 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
260 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
261 writes the result back to the bit field in the 8-bit port.
263 Reads the 8-bit PCI configuration register specified by Address, performs a
264 bitwise inclusive OR between the read result and the value specified by
265 OrData, and writes the result to the 8-bit PCI configuration register
266 specified by Address. The value written to the PCI configuration register is
267 returned. This function must guarantee that all PCI read and write operations
268 are serialized. Extra left bits in OrData are stripped.
270 If Address > 0x0FFFFFFF, then ASSERT().
271 If StartBit is greater than 7, then ASSERT().
272 If EndBit is greater than 7, then ASSERT().
273 If EndBit is less than StartBit, then ASSERT().
275 @param Address PCI configuration register to write.
276 @param StartBit The ordinal of the least significant bit in the bit field.
278 @param EndBit The ordinal of the most significant bit in the bit field.
280 @param OrData The value to OR with the PCI configuration register.
282 @return The value written back to the PCI configuration register.
294 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
298 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
299 AND, and writes the result back to the bit field in the 8-bit register.
301 Reads the 8-bit PCI configuration register specified by Address, performs a
302 bitwise AND between the read result and the value specified by AndData, and
303 writes the result to the 8-bit PCI configuration register specified by
304 Address. The value written to the PCI configuration register is returned.
305 This function must guarantee that all PCI read and write operations are
306 serialized. Extra left bits in AndData are stripped.
308 If Address > 0x0FFFFFFF, then ASSERT().
309 If StartBit is greater than 7, then ASSERT().
310 If EndBit is greater than 7, then ASSERT().
311 If EndBit is less than StartBit, then ASSERT().
313 @param Address PCI configuration register to write.
314 @param StartBit The ordinal of the least significant bit in the bit field.
316 @param EndBit The ordinal of the most significant bit in the bit field.
318 @param AndData The value to AND with the PCI configuration register.
320 @return The value written back to the PCI configuration register.
332 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
336 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
337 bitwise inclusive OR, and writes the result back to the bit field in the
340 Reads the 8-bit PCI configuration register specified by Address, performs a
341 bitwise AND followed by a bitwise inclusive OR between the read result and
342 the value specified by AndData, and writes the result to the 8-bit PCI
343 configuration register specified by Address. The value written to the PCI
344 configuration register is returned. This function must guarantee that all PCI
345 read and write operations are serialized. Extra left bits in both AndData and
348 If Address > 0x0FFFFFFF, then ASSERT().
349 If StartBit is greater than 7, then ASSERT().
350 If EndBit is greater than 7, then ASSERT().
351 If EndBit is less than StartBit, then ASSERT().
353 @param Address PCI configuration register to write.
354 @param StartBit The ordinal of the least significant bit in the bit field.
356 @param EndBit The ordinal of the most significant bit in the bit field.
358 @param AndData The value to AND with the PCI configuration register.
359 @param OrData The value to OR with the result of the AND operation.
361 @return The value written back to the PCI configuration register.
366 PciBitFieldAndThenOr8 (
374 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
378 Reads a 16-bit PCI configuration register.
380 Reads and returns the 16-bit PCI configuration register specified by Address.
381 This function must guarantee that all PCI read and write operations are
384 If Address > 0x0FFFFFFF, then ASSERT().
386 @param Address Address that encodes the PCI Bus, Device, Function and
389 @return The read value from the PCI configuration register.
398 return PciExpressRead16 (Address
);
402 Writes a 16-bit PCI configuration register.
404 Writes the 16-bit PCI configuration register specified by Address with the
405 value specified by Value. Value is returned. This function must guarantee
406 that all PCI read and write operations are serialized.
408 If Address > 0x0FFFFFFF, then ASSERT().
410 @param Address Address that encodes the PCI Bus, Device, Function and
412 @param Value The value to write.
414 @return The value written to the PCI configuration register.
424 return PciExpressWrite16 (Address
, Value
);
428 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
431 Reads the 16-bit PCI configuration register specified by Address, performs a
432 bitwise inclusive OR between the read result and the value specified by
433 OrData, and writes the result to the 16-bit PCI configuration register
434 specified by Address. The value written to the PCI configuration register is
435 returned. This function must guarantee that all PCI read and write operations
438 If Address > 0x0FFFFFFF, then ASSERT().
440 @param Address Address that encodes the PCI Bus, Device, Function and
442 @param OrData The value to OR with the PCI configuration register.
444 @return The value written back to the PCI configuration register.
454 return PciExpressOr16 (Address
, OrData
);
458 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
461 Reads the 16-bit PCI configuration register specified by Address, performs a
462 bitwise AND between the read result and the value specified by AndData, and
463 writes the result to the 16-bit PCI configuration register specified by
464 Address. The value written to the PCI configuration register is returned.
465 This function must guarantee that all PCI read and write operations are
468 If Address > 0x0FFFFFFF, then ASSERT().
470 @param Address Address that encodes the PCI Bus, Device, Function and
472 @param AndData The value to AND with the PCI configuration register.
474 @return The value written back to the PCI configuration register.
484 return PciExpressAnd16 (Address
, AndData
);
488 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
489 value, followed a bitwise inclusive OR with another 16-bit value.
491 Reads the 16-bit PCI configuration register specified by Address, performs a
492 bitwise AND between the read result and the value specified by AndData,
493 performs a bitwise inclusive OR between the result of the AND operation and
494 the value specified by OrData, and writes the result to the 16-bit PCI
495 configuration register specified by Address. The value written to the PCI
496 configuration register is returned. This function must guarantee that all PCI
497 read and write operations are serialized.
499 If Address > 0x0FFFFFFF, then ASSERT().
501 @param Address Address that encodes the PCI Bus, Device, Function and
503 @param AndData The value to AND with the PCI configuration register.
504 @param OrData The value to OR with the result of the AND operation.
506 @return The value written back to the PCI configuration register.
517 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
521 Reads a bit field of a PCI configuration register.
523 Reads the bit field in a 16-bit PCI configuration register. The bit field is
524 specified by the StartBit and the EndBit. The value of the bit field is
527 If Address > 0x0FFFFFFF, then ASSERT().
528 If StartBit is greater than 15, then ASSERT().
529 If EndBit is greater than 15, then ASSERT().
530 If EndBit is less than StartBit, then ASSERT().
532 @param Address PCI configuration register to read.
533 @param StartBit The ordinal of the least significant bit in the bit field.
535 @param EndBit The ordinal of the most significant bit in the bit field.
538 @return The value of the bit field read from the PCI configuration register.
549 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
553 Writes a bit field to a PCI configuration register.
555 Writes Value to the bit field of the PCI configuration register. The bit
556 field is specified by the StartBit and the EndBit. All other bits in the
557 destination PCI configuration register are preserved. The new value of the
558 16-bit register is returned.
560 If Address > 0x0FFFFFFF, then ASSERT().
561 If StartBit is greater than 15, then ASSERT().
562 If EndBit is greater than 15, then ASSERT().
563 If EndBit is less than StartBit, then ASSERT().
565 @param Address PCI configuration register to write.
566 @param StartBit The ordinal of the least significant bit in the bit field.
568 @param EndBit The ordinal of the most significant bit in the bit field.
570 @param Value New value of the bit field.
572 @return The value written back to the PCI configuration register.
584 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
588 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
589 writes the result back to the bit field in the 16-bit port.
591 Reads the 16-bit PCI configuration register specified by Address, performs a
592 bitwise inclusive OR between the read result and the value specified by
593 OrData, and writes the result to the 16-bit PCI configuration register
594 specified by Address. The value written to the PCI configuration register is
595 returned. This function must guarantee that all PCI read and write operations
596 are serialized. Extra left bits in OrData are stripped.
598 If Address > 0x0FFFFFFF, then ASSERT().
599 If StartBit is greater than 15, then ASSERT().
600 If EndBit is greater than 15, then ASSERT().
601 If EndBit is less than StartBit, then ASSERT().
603 @param Address PCI configuration register to write.
604 @param StartBit The ordinal of the least significant bit in the bit field.
606 @param EndBit The ordinal of the most significant bit in the bit field.
608 @param OrData The value to OR with the PCI configuration register.
610 @return The value written back to the PCI configuration register.
622 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
626 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
627 AND, and writes the result back to the bit field in the 16-bit register.
629 Reads the 16-bit PCI configuration register specified by Address, performs a
630 bitwise AND between the read result and the value specified by AndData, and
631 writes the result to the 16-bit PCI configuration register specified by
632 Address. The value written to the PCI configuration register is returned.
633 This function must guarantee that all PCI read and write operations are
634 serialized. Extra left bits in AndData are stripped.
636 If Address > 0x0FFFFFFF, then ASSERT().
637 If StartBit is greater than 15, then ASSERT().
638 If EndBit is greater than 15, then ASSERT().
639 If EndBit is less than StartBit, then ASSERT().
641 @param Address PCI configuration register to write.
642 @param StartBit The ordinal of the least significant bit in the bit field.
644 @param EndBit The ordinal of the most significant bit in the bit field.
646 @param AndData The value to AND with the PCI configuration register.
648 @return The value written back to the PCI configuration register.
660 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
664 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
665 bitwise inclusive OR, and writes the result back to the bit field in the
668 Reads the 16-bit PCI configuration register specified by Address, performs a
669 bitwise AND followed by a bitwise inclusive OR between the read result and
670 the value specified by AndData, and writes the result to the 16-bit PCI
671 configuration register specified by Address. The value written to the PCI
672 configuration register is returned. This function must guarantee that all PCI
673 read and write operations are serialized. Extra left bits in both AndData and
676 If Address > 0x0FFFFFFF, then ASSERT().
677 If StartBit is greater than 15, then ASSERT().
678 If EndBit is greater than 15, then ASSERT().
679 If EndBit is less than StartBit, then ASSERT().
681 @param Address PCI configuration register to write.
682 @param StartBit The ordinal of the least significant bit in the bit field.
684 @param EndBit The ordinal of the most significant bit in the bit field.
686 @param AndData The value to AND with the PCI configuration register.
687 @param OrData The value to OR with the result of the AND operation.
689 @return The value written back to the PCI configuration register.
694 PciBitFieldAndThenOr16 (
702 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
706 Reads a 32-bit PCI configuration register.
708 Reads and returns the 32-bit PCI configuration register specified by Address.
709 This function must guarantee that all PCI read and write operations are
712 If Address > 0x0FFFFFFF, then ASSERT().
714 @param Address Address that encodes the PCI Bus, Device, Function and
717 @return The read value from the PCI configuration register.
726 return PciExpressRead32 (Address
);
730 Writes a 32-bit PCI configuration register.
732 Writes the 32-bit PCI configuration register specified by Address with the
733 value specified by Value. Value is returned. This function must guarantee
734 that all PCI read and write operations are serialized.
736 If Address > 0x0FFFFFFF, then ASSERT().
738 @param Address Address that encodes the PCI Bus, Device, Function and
740 @param Value The value to write.
742 @return The value written to the PCI configuration register.
752 return PciExpressWrite32 (Address
, Value
);
756 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
759 Reads the 32-bit PCI configuration register specified by Address, performs a
760 bitwise inclusive OR between the read result and the value specified by
761 OrData, and writes the result to the 32-bit PCI configuration register
762 specified by Address. The value written to the PCI configuration register is
763 returned. This function must guarantee that all PCI read and write operations
766 If Address > 0x0FFFFFFF, then ASSERT().
768 @param Address Address that encodes the PCI Bus, Device, Function and
770 @param OrData The value to OR with the PCI configuration register.
772 @return The value written back to the PCI configuration register.
782 return PciExpressOr32 (Address
, OrData
);
786 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
789 Reads the 32-bit PCI configuration register specified by Address, performs a
790 bitwise AND between the read result and the value specified by AndData, and
791 writes the result to the 32-bit PCI configuration register specified by
792 Address. The value written to the PCI configuration register is returned.
793 This function must guarantee that all PCI read and write operations are
796 If Address > 0x0FFFFFFF, then ASSERT().
798 @param Address Address that encodes the PCI Bus, Device, Function and
800 @param AndData The value to AND with the PCI configuration register.
802 @return The value written back to the PCI configuration register.
812 return PciExpressAnd32 (Address
, AndData
);
816 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
817 value, followed a bitwise inclusive OR with another 32-bit value.
819 Reads the 32-bit PCI configuration register specified by Address, performs a
820 bitwise AND between the read result and the value specified by AndData,
821 performs a bitwise inclusive OR between the result of the AND operation and
822 the value specified by OrData, and writes the result to the 32-bit PCI
823 configuration register specified by Address. The value written to the PCI
824 configuration register is returned. This function must guarantee that all PCI
825 read and write operations are serialized.
827 If Address > 0x0FFFFFFF, then ASSERT().
829 @param Address Address that encodes the PCI Bus, Device, Function and
831 @param AndData The value to AND with the PCI configuration register.
832 @param OrData The value to OR with the result of the AND operation.
834 @return The value written back to the PCI configuration register.
845 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
849 Reads a bit field of a PCI configuration register.
851 Reads the bit field in a 32-bit PCI configuration register. The bit field is
852 specified by the StartBit and the EndBit. The value of the bit field is
855 If Address > 0x0FFFFFFF, then ASSERT().
856 If StartBit is greater than 31, then ASSERT().
857 If EndBit is greater than 31, then ASSERT().
858 If EndBit is less than StartBit, then ASSERT().
860 @param Address PCI configuration register to read.
861 @param StartBit The ordinal of the least significant bit in the bit field.
863 @param EndBit The ordinal of the most significant bit in the bit field.
866 @return The value of the bit field read from the PCI configuration register.
877 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
881 Writes a bit field to a PCI configuration register.
883 Writes Value to the bit field of the PCI configuration register. The bit
884 field is specified by the StartBit and the EndBit. All other bits in the
885 destination PCI configuration register are preserved. The new value of the
886 32-bit register is returned.
888 If Address > 0x0FFFFFFF, then ASSERT().
889 If StartBit is greater than 31, then ASSERT().
890 If EndBit is greater than 31, then ASSERT().
891 If EndBit is less than StartBit, then ASSERT().
893 @param Address PCI configuration register to write.
894 @param StartBit The ordinal of the least significant bit in the bit field.
896 @param EndBit The ordinal of the most significant bit in the bit field.
898 @param Value New value of the bit field.
900 @return The value written back to the PCI configuration register.
912 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
916 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
917 writes the result back to the bit field in the 32-bit port.
919 Reads the 32-bit PCI configuration register specified by Address, performs a
920 bitwise inclusive OR between the read result and the value specified by
921 OrData, and writes the result to the 32-bit PCI configuration register
922 specified by Address. The value written to the PCI configuration register is
923 returned. This function must guarantee that all PCI read and write operations
924 are serialized. Extra left bits in OrData are stripped.
926 If Address > 0x0FFFFFFF, then ASSERT().
927 If StartBit is greater than 31, then ASSERT().
928 If EndBit is greater than 31, then ASSERT().
929 If EndBit is less than StartBit, then ASSERT().
931 @param Address PCI configuration register to write.
932 @param StartBit The ordinal of the least significant bit in the bit field.
934 @param EndBit The ordinal of the most significant bit in the bit field.
936 @param OrData The value to OR with the PCI configuration register.
938 @return The value written back to the PCI configuration register.
950 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
954 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
955 AND, and writes the result back to the bit field in the 32-bit register.
957 Reads the 32-bit PCI configuration register specified by Address, performs a
958 bitwise AND between the read result and the value specified by AndData, and
959 writes the result to the 32-bit PCI configuration register specified by
960 Address. The value written to the PCI configuration register is returned.
961 This function must guarantee that all PCI read and write operations are
962 serialized. Extra left bits in AndData are stripped.
964 If Address > 0x0FFFFFFF, then ASSERT().
965 If StartBit is greater than 31, then ASSERT().
966 If EndBit is greater than 31, then ASSERT().
967 If EndBit is less than StartBit, then ASSERT().
969 @param Address PCI configuration register to write.
970 @param StartBit The ordinal of the least significant bit in the bit field.
972 @param EndBit The ordinal of the most significant bit in the bit field.
974 @param AndData The value to AND with the PCI configuration register.
976 @return The value written back to the PCI configuration register.
988 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
992 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
993 bitwise inclusive OR, and writes the result back to the bit field in the
996 Reads the 32-bit PCI configuration register specified by Address, performs a
997 bitwise AND followed by a bitwise inclusive OR between the read result and
998 the value specified by AndData, and writes the result to the 32-bit PCI
999 configuration register specified by Address. The value written to the PCI
1000 configuration register is returned. This function must guarantee that all PCI
1001 read and write operations are serialized. Extra left bits in both AndData and
1002 OrData are stripped.
1004 If Address > 0x0FFFFFFF, then ASSERT().
1005 If StartBit is greater than 31, then ASSERT().
1006 If EndBit is greater than 31, then ASSERT().
1007 If EndBit is less than StartBit, then ASSERT().
1009 @param Address PCI configuration register to write.
1010 @param StartBit The ordinal of the least significant bit in the bit field.
1012 @param EndBit The ordinal of the most significant bit in the bit field.
1014 @param AndData The value to AND with the PCI configuration register.
1015 @param OrData The value to OR with the result of the AND operation.
1017 @return The value written back to the PCI configuration register.
1022 PciBitFieldAndThenOr32 (
1030 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1034 Reads a range of PCI configuration registers into a caller supplied buffer.
1036 Reads the range of PCI configuration registers specified by StartAddress and
1037 Size into the buffer specified by Buffer. This function only allows the PCI
1038 configuration registers from a single PCI function to be read. Size is
1039 returned. When possible 32-bit PCI configuration read cycles are used to read
1040 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1041 and 16-bit PCI configuration read cycles may be used at the beginning and the
1044 If StartAddress > 0x0FFFFFFF, then ASSERT().
1045 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1046 If Size > 0 and Buffer is NULL, then ASSERT().
1048 @param StartAddress Starting address that encodes the PCI Bus, Device,
1049 Function and Register.
1050 @param Size Size in bytes of the transfer.
1051 @param Buffer Pointer to a buffer receiving the data read.
1059 IN UINTN StartAddress
,
1064 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1068 Copies the data in a caller supplied buffer to a specified range of PCI
1069 configuration space.
1071 Writes the range of PCI configuration registers specified by StartAddress and
1072 Size from the buffer specified by Buffer. This function only allows the PCI
1073 configuration registers from a single PCI function to be written. Size is
1074 returned. When possible 32-bit PCI configuration write cycles are used to
1075 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1076 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1077 and the end of the range.
1079 If StartAddress > 0x0FFFFFFF, then ASSERT().
1080 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1081 If Size > 0 and Buffer is NULL, then ASSERT().
1083 @param StartAddress Starting address that encodes the PCI Bus, Device,
1084 Function and Register.
1085 @param Size Size in bytes of the transfer.
1086 @param Buffer Pointer to a buffer containing the data to write.
1094 IN UINTN StartAddress
,
1099 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);