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git.proxmox.com Git - mirror_edk2.git/blob - MdePkg/Library/BasePciLibPciExpress/PciLib.c
2 PCI Library functions that use the 256 MB PCI Express MMIO window to perform PCI
3 Configuration cycles. Layers on PCI Express Library.
5 Copyright (c) 2006 - 2008, Intel Corporation<BR>
6 All rights reserved. This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 #include <Library/PciLib.h>
20 #include <Library/PciExpressLib.h>
23 Register a PCI device so PCI configuration registers may be accessed after
24 SetVirtualAddressMap().
26 If Address > 0x0FFFFFFF, then ASSERT().
28 @param Address Address that encodes the PCI Bus, Device, Function and
31 @retval RETURN_SUCCESS The PCI device was registered for runtime access.
32 @retval RETURN_UNSUPPORTED An attempt was made to call this function
33 after ExitBootServices().
34 @retval RETURN_UNSUPPORTED The resources required to access the PCI device
35 at runtime could not be mapped.
36 @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
37 complete the registration.
42 PciRegisterForRuntimeAccess (
46 return PciExpressRegisterForRuntimeAccess (Address
);
50 Reads an 8-bit PCI configuration register.
52 Reads and returns the 8-bit PCI configuration register specified by Address.
53 This function must guarantee that all PCI read and write operations are
56 If Address > 0x0FFFFFFF, then ASSERT().
58 @param Address Address that encodes the PCI Bus, Device, Function and
61 @return The read value from the PCI configuration register.
70 return PciExpressRead8 (Address
);
74 Writes an 8-bit PCI configuration register.
76 Writes the 8-bit PCI configuration register specified by Address with the
77 value specified by Value. Value is returned. This function must guarantee
78 that all PCI read and write operations are serialized.
80 If Address > 0x0FFFFFFF, then ASSERT().
82 @param Address Address that encodes the PCI Bus, Device, Function and
84 @param Value The value to write.
86 @return The value written to the PCI configuration register.
96 return PciExpressWrite8 (Address
, Value
);
100 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
103 Reads the 8-bit PCI configuration register specified by Address, performs a
104 bitwise inclusive OR between the read result and the value specified by
105 OrData, and writes the result to the 8-bit PCI configuration register
106 specified by Address. The value written to the PCI configuration register is
107 returned. This function must guarantee that all PCI read and write operations
110 If Address > 0x0FFFFFFF, then ASSERT().
112 @param Address Address that encodes the PCI Bus, Device, Function and
114 @param OrData The value to OR with the PCI configuration register.
116 @return The value written back to the PCI configuration register.
126 return PciExpressOr8 (Address
, OrData
);
130 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
133 Reads the 8-bit PCI configuration register specified by Address, performs a
134 bitwise AND between the read result and the value specified by AndData, and
135 writes the result to the 8-bit PCI configuration register specified by
136 Address. The value written to the PCI configuration register is returned.
137 This function must guarantee that all PCI read and write operations are
140 If Address > 0x0FFFFFFF, then ASSERT().
142 @param Address Address that encodes the PCI Bus, Device, Function and
144 @param AndData The value to AND with the PCI configuration register.
146 @return The value written back to the PCI configuration register.
156 return PciExpressAnd8 (Address
, AndData
);
160 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
161 value, followed a bitwise inclusive OR with another 8-bit value.
163 Reads the 8-bit PCI configuration register specified by Address, performs a
164 bitwise AND between the read result and the value specified by AndData,
165 performs a bitwise inclusive OR between the result of the AND operation and
166 the value specified by OrData, and writes the result to the 8-bit PCI
167 configuration register specified by Address. The value written to the PCI
168 configuration register is returned. This function must guarantee that all PCI
169 read and write operations are serialized.
171 If Address > 0x0FFFFFFF, then ASSERT().
173 @param Address Address that encodes the PCI Bus, Device, Function and
175 @param AndData The value to AND with the PCI configuration register.
176 @param OrData The value to OR with the result of the AND operation.
178 @return The value written back to the PCI configuration register.
189 return PciExpressAndThenOr8 (Address
, AndData
, OrData
);
193 Reads a bit field of a PCI configuration register.
195 Reads the bit field in an 8-bit PCI configuration register. The bit field is
196 specified by the StartBit and the EndBit. The value of the bit field is
199 If Address > 0x0FFFFFFF, then ASSERT().
200 If StartBit is greater than 7, then ASSERT().
201 If EndBit is greater than 7, then ASSERT().
202 If EndBit is less than StartBit, then ASSERT().
204 @param Address PCI configuration register to read.
205 @param StartBit The ordinal of the least significant bit in the bit field.
207 @param EndBit The ordinal of the most significant bit in the bit field.
210 @return The value of the bit field read from the PCI configuration register.
221 return PciExpressBitFieldRead8 (Address
, StartBit
, EndBit
);
225 Writes a bit field to a PCI configuration register.
227 Writes Value to the bit field of the PCI configuration register. The bit
228 field is specified by the StartBit and the EndBit. All other bits in the
229 destination PCI configuration register are preserved. The new value of the
230 8-bit register is returned.
232 If Address > 0x0FFFFFFF, then ASSERT().
233 If StartBit is greater than 7, then ASSERT().
234 If EndBit is greater than 7, then ASSERT().
235 If EndBit is less than StartBit, then ASSERT().
237 @param Address PCI configuration register to write.
238 @param StartBit The ordinal of the least significant bit in the bit field.
240 @param EndBit The ordinal of the most significant bit in the bit field.
242 @param Value New value of the bit field.
244 @return The value written back to the PCI configuration register.
256 return PciExpressBitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
260 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
261 writes the result back to the bit field in the 8-bit port.
263 Reads the 8-bit PCI configuration register specified by Address, performs a
264 bitwise inclusive OR between the read result and the value specified by
265 OrData, and writes the result to the 8-bit PCI configuration register
266 specified by Address. The value written to the PCI configuration register is
267 returned. This function must guarantee that all PCI read and write operations
268 are serialized. Extra left bits in OrData are stripped.
270 If Address > 0x0FFFFFFF, then ASSERT().
271 If StartBit is greater than 7, then ASSERT().
272 If EndBit is greater than 7, then ASSERT().
273 If EndBit is less than StartBit, then ASSERT().
275 @param Address PCI configuration register to write.
276 @param StartBit The ordinal of the least significant bit in the bit field.
278 @param EndBit The ordinal of the most significant bit in the bit field.
280 @param OrData The value to OR with the PCI configuration register.
282 @return The value written back to the PCI configuration register.
294 return PciExpressBitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
298 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
299 AND, and writes the result back to the bit field in the 8-bit register.
301 Reads the 8-bit PCI configuration register specified by Address, performs a
302 bitwise AND between the read result and the value specified by AndData, and
303 writes the result to the 8-bit PCI configuration register specified by
304 Address. The value written to the PCI configuration register is returned.
305 This function must guarantee that all PCI read and write operations are
306 serialized. Extra left bits in AndData are stripped.
308 If Address > 0x0FFFFFFF, then ASSERT().
309 If StartBit is greater than 7, then ASSERT().
310 If EndBit is greater than 7, then ASSERT().
311 If EndBit is less than StartBit, then ASSERT().
313 @param Address PCI configuration register to write.
314 @param StartBit The ordinal of the least significant bit in the bit field.
316 @param EndBit The ordinal of the most significant bit in the bit field.
318 @param AndData The value to AND with the PCI configuration register.
320 @return The value written back to the PCI configuration register.
332 return PciExpressBitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
336 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
337 bitwise inclusive OR, and writes the result back to the bit field in the
340 Reads the 8-bit PCI configuration register specified by Address, performs a
341 bitwise AND followed by a bitwise inclusive OR between the read result and
342 the value specified by AndData, and writes the result to the 8-bit PCI
343 configuration register specified by Address. The value written to the PCI
344 configuration register is returned. This function must guarantee that all PCI
345 read and write operations are serialized. Extra left bits in both AndData and
348 If Address > 0x0FFFFFFF, then ASSERT().
349 If StartBit is greater than 7, then ASSERT().
350 If EndBit is greater than 7, then ASSERT().
351 If EndBit is less than StartBit, then ASSERT().
353 @param Address PCI configuration register to write.
354 @param StartBit The ordinal of the least significant bit in the bit field.
356 @param EndBit The ordinal of the most significant bit in the bit field.
358 @param AndData The value to AND with the PCI configuration register.
359 @param OrData The value to OR with the result of the AND operation.
361 @return The value written back to the PCI configuration register.
366 PciBitFieldAndThenOr8 (
374 return PciExpressBitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
378 Reads a 16-bit PCI configuration register.
380 Reads and returns the 16-bit PCI configuration register specified by Address.
381 This function must guarantee that all PCI read and write operations are
384 If Address > 0x0FFFFFFF, then ASSERT().
385 If Address is not aligned on a 16-bit boundary, then ASSERT().
387 @param Address Address that encodes the PCI Bus, Device, Function and
390 @return The read value from the PCI configuration register.
399 return PciExpressRead16 (Address
);
403 Writes a 16-bit PCI configuration register.
405 Writes the 16-bit PCI configuration register specified by Address with the
406 value specified by Value. Value is returned. This function must guarantee
407 that all PCI read and write operations are serialized.
409 If Address > 0x0FFFFFFF, then ASSERT().
410 If Address is not aligned on a 16-bit boundary, then ASSERT().
412 @param Address Address that encodes the PCI Bus, Device, Function and
414 @param Value The value to write.
416 @return The value written to the PCI configuration register.
426 return PciExpressWrite16 (Address
, Value
);
430 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
433 Reads the 16-bit PCI configuration register specified by Address, performs a
434 bitwise inclusive OR between the read result and the value specified by
435 OrData, and writes the result to the 16-bit PCI configuration register
436 specified by Address. The value written to the PCI configuration register is
437 returned. This function must guarantee that all PCI read and write operations
440 If Address > 0x0FFFFFFF, then ASSERT().
441 If Address is not aligned on a 16-bit boundary, then ASSERT().
443 @param Address Address that encodes the PCI Bus, Device, Function and
445 @param OrData The value to OR with the PCI configuration register.
447 @return The value written back to the PCI configuration register.
457 return PciExpressOr16 (Address
, OrData
);
461 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
464 Reads the 16-bit PCI configuration register specified by Address, performs a
465 bitwise AND between the read result and the value specified by AndData, and
466 writes the result to the 16-bit PCI configuration register specified by
467 Address. The value written to the PCI configuration register is returned.
468 This function must guarantee that all PCI read and write operations are
471 If Address > 0x0FFFFFFF, then ASSERT().
472 If Address is not aligned on a 16-bit boundary, then ASSERT().
474 @param Address Address that encodes the PCI Bus, Device, Function and
476 @param AndData The value to AND with the PCI configuration register.
478 @return The value written back to the PCI configuration register.
488 return PciExpressAnd16 (Address
, AndData
);
492 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
493 value, followed a bitwise inclusive OR with another 16-bit value.
495 Reads the 16-bit PCI configuration register specified by Address, performs a
496 bitwise AND between the read result and the value specified by AndData,
497 performs a bitwise inclusive OR between the result of the AND operation and
498 the value specified by OrData, and writes the result to the 16-bit PCI
499 configuration register specified by Address. The value written to the PCI
500 configuration register is returned. This function must guarantee that all PCI
501 read and write operations are serialized.
503 If Address > 0x0FFFFFFF, then ASSERT().
504 If Address is not aligned on a 16-bit boundary, then ASSERT().
506 @param Address Address that encodes the PCI Bus, Device, Function and
508 @param AndData The value to AND with the PCI configuration register.
509 @param OrData The value to OR with the result of the AND operation.
511 @return The value written back to the PCI configuration register.
522 return PciExpressAndThenOr16 (Address
, AndData
, OrData
);
526 Reads a bit field of a PCI configuration register.
528 Reads the bit field in a 16-bit PCI configuration register. The bit field is
529 specified by the StartBit and the EndBit. The value of the bit field is
532 If Address > 0x0FFFFFFF, then ASSERT().
533 If Address is not aligned on a 16-bit boundary, then ASSERT().
534 If StartBit is greater than 15, then ASSERT().
535 If EndBit is greater than 15, then ASSERT().
536 If EndBit is less than StartBit, then ASSERT().
538 @param Address PCI configuration register to read.
539 @param StartBit The ordinal of the least significant bit in the bit field.
541 @param EndBit The ordinal of the most significant bit in the bit field.
544 @return The value of the bit field read from the PCI configuration register.
555 return PciExpressBitFieldRead16 (Address
, StartBit
, EndBit
);
559 Writes a bit field to a PCI configuration register.
561 Writes Value to the bit field of the PCI configuration register. The bit
562 field is specified by the StartBit and the EndBit. All other bits in the
563 destination PCI configuration register are preserved. The new value of the
564 16-bit register is returned.
566 If Address > 0x0FFFFFFF, then ASSERT().
567 If Address is not aligned on a 16-bit boundary, then ASSERT().
568 If StartBit is greater than 15, then ASSERT().
569 If EndBit is greater than 15, then ASSERT().
570 If EndBit is less than StartBit, then ASSERT().
572 @param Address PCI configuration register to write.
573 @param StartBit The ordinal of the least significant bit in the bit field.
575 @param EndBit The ordinal of the most significant bit in the bit field.
577 @param Value New value of the bit field.
579 @return The value written back to the PCI configuration register.
591 return PciExpressBitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
595 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
596 writes the result back to the bit field in the 16-bit port.
598 Reads the 16-bit PCI configuration register specified by Address, performs a
599 bitwise inclusive OR between the read result and the value specified by
600 OrData, and writes the result to the 16-bit PCI configuration register
601 specified by Address. The value written to the PCI configuration register is
602 returned. This function must guarantee that all PCI read and write operations
603 are serialized. Extra left bits in OrData are stripped.
605 If Address > 0x0FFFFFFF, then ASSERT().
606 If Address is not aligned on a 16-bit boundary, then ASSERT().
607 If StartBit is greater than 15, then ASSERT().
608 If EndBit is greater than 15, then ASSERT().
609 If EndBit is less than StartBit, then ASSERT().
611 @param Address PCI configuration register to write.
612 @param StartBit The ordinal of the least significant bit in the bit field.
614 @param EndBit The ordinal of the most significant bit in the bit field.
616 @param OrData The value to OR with the PCI configuration register.
618 @return The value written back to the PCI configuration register.
630 return PciExpressBitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
634 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
635 AND, and writes the result back to the bit field in the 16-bit register.
637 Reads the 16-bit PCI configuration register specified by Address, performs a
638 bitwise AND between the read result and the value specified by AndData, and
639 writes the result to the 16-bit PCI configuration register specified by
640 Address. The value written to the PCI configuration register is returned.
641 This function must guarantee that all PCI read and write operations are
642 serialized. Extra left bits in AndData are stripped.
644 If Address > 0x0FFFFFFF, then ASSERT().
645 If Address is not aligned on a 16-bit boundary, then ASSERT().
646 If StartBit is greater than 15, then ASSERT().
647 If EndBit is greater than 15, then ASSERT().
648 If EndBit is less than StartBit, then ASSERT().
650 @param Address PCI configuration register to write.
651 @param StartBit The ordinal of the least significant bit in the bit field.
653 @param EndBit The ordinal of the most significant bit in the bit field.
655 @param AndData The value to AND with the PCI configuration register.
657 @return The value written back to the PCI configuration register.
669 return PciExpressBitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
673 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
674 bitwise inclusive OR, and writes the result back to the bit field in the
677 Reads the 16-bit PCI configuration register specified by Address, performs a
678 bitwise AND followed by a bitwise inclusive OR between the read result and
679 the value specified by AndData, and writes the result to the 16-bit PCI
680 configuration register specified by Address. The value written to the PCI
681 configuration register is returned. This function must guarantee that all PCI
682 read and write operations are serialized. Extra left bits in both AndData and
685 If Address > 0x0FFFFFFF, then ASSERT().
686 If Address is not aligned on a 16-bit boundary, then ASSERT().
687 If StartBit is greater than 15, then ASSERT().
688 If EndBit is greater than 15, then ASSERT().
689 If EndBit is less than StartBit, then ASSERT().
691 @param Address PCI configuration register to write.
692 @param StartBit The ordinal of the least significant bit in the bit field.
694 @param EndBit The ordinal of the most significant bit in the bit field.
696 @param AndData The value to AND with the PCI configuration register.
697 @param OrData The value to OR with the result of the AND operation.
699 @return The value written back to the PCI configuration register.
704 PciBitFieldAndThenOr16 (
712 return PciExpressBitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
716 Reads a 32-bit PCI configuration register.
718 Reads and returns the 32-bit PCI configuration register specified by Address.
719 This function must guarantee that all PCI read and write operations are
722 If Address > 0x0FFFFFFF, then ASSERT().
723 If Address is not aligned on a 32-bit boundary, then ASSERT().
725 @param Address Address that encodes the PCI Bus, Device, Function and
728 @return The read value from the PCI configuration register.
737 return PciExpressRead32 (Address
);
741 Writes a 32-bit PCI configuration register.
743 Writes the 32-bit PCI configuration register specified by Address with the
744 value specified by Value. Value is returned. This function must guarantee
745 that all PCI read and write operations are serialized.
747 If Address > 0x0FFFFFFF, then ASSERT().
748 If Address is not aligned on a 32-bit boundary, then ASSERT().
750 @param Address Address that encodes the PCI Bus, Device, Function and
752 @param Value The value to write.
754 @return The value written to the PCI configuration register.
764 return PciExpressWrite32 (Address
, Value
);
768 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
771 Reads the 32-bit PCI configuration register specified by Address, performs a
772 bitwise inclusive OR between the read result and the value specified by
773 OrData, and writes the result to the 32-bit PCI configuration register
774 specified by Address. The value written to the PCI configuration register is
775 returned. This function must guarantee that all PCI read and write operations
778 If Address > 0x0FFFFFFF, then ASSERT().
779 If Address is not aligned on a 32-bit boundary, then ASSERT().
781 @param Address Address that encodes the PCI Bus, Device, Function and
783 @param OrData The value to OR with the PCI configuration register.
785 @return The value written back to the PCI configuration register.
795 return PciExpressOr32 (Address
, OrData
);
799 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
802 Reads the 32-bit PCI configuration register specified by Address, performs a
803 bitwise AND between the read result and the value specified by AndData, and
804 writes the result to the 32-bit PCI configuration register specified by
805 Address. The value written to the PCI configuration register is returned.
806 This function must guarantee that all PCI read and write operations are
809 If Address > 0x0FFFFFFF, then ASSERT().
810 If Address is not aligned on a 32-bit boundary, then ASSERT().
812 @param Address Address that encodes the PCI Bus, Device, Function and
814 @param AndData The value to AND with the PCI configuration register.
816 @return The value written back to the PCI configuration register.
826 return PciExpressAnd32 (Address
, AndData
);
830 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
831 value, followed a bitwise inclusive OR with another 32-bit value.
833 Reads the 32-bit PCI configuration register specified by Address, performs a
834 bitwise AND between the read result and the value specified by AndData,
835 performs a bitwise inclusive OR between the result of the AND operation and
836 the value specified by OrData, and writes the result to the 32-bit PCI
837 configuration register specified by Address. The value written to the PCI
838 configuration register is returned. This function must guarantee that all PCI
839 read and write operations are serialized.
841 If Address > 0x0FFFFFFF, then ASSERT().
842 If Address is not aligned on a 32-bit boundary, then ASSERT().
844 @param Address Address that encodes the PCI Bus, Device, Function and
846 @param AndData The value to AND with the PCI configuration register.
847 @param OrData The value to OR with the result of the AND operation.
849 @return The value written back to the PCI configuration register.
860 return PciExpressAndThenOr32 (Address
, AndData
, OrData
);
864 Reads a bit field of a PCI configuration register.
866 Reads the bit field in a 32-bit PCI configuration register. The bit field is
867 specified by the StartBit and the EndBit. The value of the bit field is
870 If Address > 0x0FFFFFFF, then ASSERT().
871 If Address is not aligned on a 32-bit boundary, then ASSERT().
872 If StartBit is greater than 31, then ASSERT().
873 If EndBit is greater than 31, then ASSERT().
874 If EndBit is less than StartBit, then ASSERT().
876 @param Address PCI configuration register to read.
877 @param StartBit The ordinal of the least significant bit in the bit field.
879 @param EndBit The ordinal of the most significant bit in the bit field.
882 @return The value of the bit field read from the PCI configuration register.
893 return PciExpressBitFieldRead32 (Address
, StartBit
, EndBit
);
897 Writes a bit field to a PCI configuration register.
899 Writes Value to the bit field of the PCI configuration register. The bit
900 field is specified by the StartBit and the EndBit. All other bits in the
901 destination PCI configuration register are preserved. The new value of the
902 32-bit register is returned.
904 If Address > 0x0FFFFFFF, then ASSERT().
905 If Address is not aligned on a 32-bit boundary, then ASSERT().
906 If StartBit is greater than 31, then ASSERT().
907 If EndBit is greater than 31, then ASSERT().
908 If EndBit is less than StartBit, then ASSERT().
910 @param Address PCI configuration register to write.
911 @param StartBit The ordinal of the least significant bit in the bit field.
913 @param EndBit The ordinal of the most significant bit in the bit field.
915 @param Value New value of the bit field.
917 @return The value written back to the PCI configuration register.
929 return PciExpressBitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
933 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
934 writes the result back to the bit field in the 32-bit port.
936 Reads the 32-bit PCI configuration register specified by Address, performs a
937 bitwise inclusive OR between the read result and the value specified by
938 OrData, and writes the result to the 32-bit PCI configuration register
939 specified by Address. The value written to the PCI configuration register is
940 returned. This function must guarantee that all PCI read and write operations
941 are serialized. Extra left bits in OrData are stripped.
943 If Address > 0x0FFFFFFF, then ASSERT().
944 If Address is not aligned on a 32-bit boundary, then ASSERT().
945 If StartBit is greater than 31, then ASSERT().
946 If EndBit is greater than 31, then ASSERT().
947 If EndBit is less than StartBit, then ASSERT().
949 @param Address PCI configuration register to write.
950 @param StartBit The ordinal of the least significant bit in the bit field.
952 @param EndBit The ordinal of the most significant bit in the bit field.
954 @param OrData The value to OR with the PCI configuration register.
956 @return The value written back to the PCI configuration register.
968 return PciExpressBitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
972 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
973 AND, and writes the result back to the bit field in the 32-bit register.
975 Reads the 32-bit PCI configuration register specified by Address, performs a
976 bitwise AND between the read result and the value specified by AndData, and
977 writes the result to the 32-bit PCI configuration register specified by
978 Address. The value written to the PCI configuration register is returned.
979 This function must guarantee that all PCI read and write operations are
980 serialized. Extra left bits in AndData are stripped.
982 If Address > 0x0FFFFFFF, then ASSERT().
983 If Address is not aligned on a 32-bit boundary, then ASSERT().
984 If StartBit is greater than 31, then ASSERT().
985 If EndBit is greater than 31, then ASSERT().
986 If EndBit is less than StartBit, then ASSERT().
988 @param Address PCI configuration register to write.
989 @param StartBit The ordinal of the least significant bit in the bit field.
991 @param EndBit The ordinal of the most significant bit in the bit field.
993 @param AndData The value to AND with the PCI configuration register.
995 @return The value written back to the PCI configuration register.
1007 return PciExpressBitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
1011 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
1012 bitwise inclusive OR, and writes the result back to the bit field in the
1015 Reads the 32-bit PCI configuration register specified by Address, performs a
1016 bitwise AND followed by a bitwise inclusive OR between the read result and
1017 the value specified by AndData, and writes the result to the 32-bit PCI
1018 configuration register specified by Address. The value written to the PCI
1019 configuration register is returned. This function must guarantee that all PCI
1020 read and write operations are serialized. Extra left bits in both AndData and
1021 OrData are stripped.
1023 If Address > 0x0FFFFFFF, then ASSERT().
1024 If Address is not aligned on a 32-bit boundary, then ASSERT().
1025 If StartBit is greater than 31, then ASSERT().
1026 If EndBit is greater than 31, then ASSERT().
1027 If EndBit is less than StartBit, then ASSERT().
1029 @param Address PCI configuration register to write.
1030 @param StartBit The ordinal of the least significant bit in the bit field.
1032 @param EndBit The ordinal of the most significant bit in the bit field.
1034 @param AndData The value to AND with the PCI configuration register.
1035 @param OrData The value to OR with the result of the AND operation.
1037 @return The value written back to the PCI configuration register.
1042 PciBitFieldAndThenOr32 (
1050 return PciExpressBitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1054 Reads a range of PCI configuration registers into a caller supplied buffer.
1056 Reads the range of PCI configuration registers specified by StartAddress and
1057 Size into the buffer specified by Buffer. This function only allows the PCI
1058 configuration registers from a single PCI function to be read. Size is
1059 returned. When possible 32-bit PCI configuration read cycles are used to read
1060 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1061 and 16-bit PCI configuration read cycles may be used at the beginning and the
1064 If StartAddress > 0x0FFFFFFF, then ASSERT().
1065 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1066 If Size > 0 and Buffer is NULL, then ASSERT().
1068 @param StartAddress Starting address that encodes the PCI Bus, Device,
1069 Function and Register.
1070 @param Size Size in bytes of the transfer.
1071 @param Buffer Pointer to a buffer receiving the data read.
1079 IN UINTN StartAddress
,
1084 return PciExpressReadBuffer (StartAddress
, Size
, Buffer
);
1088 Copies the data in a caller supplied buffer to a specified range of PCI
1089 configuration space.
1091 Writes the range of PCI configuration registers specified by StartAddress and
1092 Size from the buffer specified by Buffer. This function only allows the PCI
1093 configuration registers from a single PCI function to be written. Size is
1094 returned. When possible 32-bit PCI configuration write cycles are used to
1095 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1096 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1097 and the end of the range.
1099 If StartAddress > 0x0FFFFFFF, then ASSERT().
1100 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1101 If Size > 0 and Buffer is NULL, then ASSERT().
1103 @param StartAddress Starting address that encodes the PCI Bus, Device,
1104 Function and Register.
1105 @param Size Size in bytes of the transfer.
1106 @param Buffer Pointer to a buffer containing the data to write.
1114 IN UINTN StartAddress
,
1119 return PciExpressWriteBuffer (StartAddress
, Size
, Buffer
);