MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c

   1 /** @file
   2   Fixes Intel Itanium(TM) specific relocation types.
   3
   4   Copyright (c) 2006, Intel Corporation
   5   All rights reserved. This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13   Module Name:  PeCoffLoaderEx.c
  14
  15 **/
  16
  17
  18
  19
  20
  21 #define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \
  22     Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)
  23
  24 #define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \
  25     *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \
  26           ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)
  27
  28 #define IMM64_IMM7B_INST_WORD_X         3
  29 #define IMM64_IMM7B_SIZE_X              7
  30 #define IMM64_IMM7B_INST_WORD_POS_X     4
  31 #define IMM64_IMM7B_VAL_POS_X           0
  32
  33 #define IMM64_IMM9D_INST_WORD_X         3
  34 #define IMM64_IMM9D_SIZE_X              9
  35 #define IMM64_IMM9D_INST_WORD_POS_X     18
  36 #define IMM64_IMM9D_VAL_POS_X           7
  37
  38 #define IMM64_IMM5C_INST_WORD_X         3
  39 #define IMM64_IMM5C_SIZE_X              5
  40 #define IMM64_IMM5C_INST_WORD_POS_X     13
  41 #define IMM64_IMM5C_VAL_POS_X           16
  42
  43 #define IMM64_IC_INST_WORD_X            3
  44 #define IMM64_IC_SIZE_X                 1
  45 #define IMM64_IC_INST_WORD_POS_X        12
  46 #define IMM64_IC_VAL_POS_X              21
  47
  48 #define IMM64_IMM41a_INST_WORD_X        1
  49 #define IMM64_IMM41a_SIZE_X             10
  50 #define IMM64_IMM41a_INST_WORD_POS_X    14
  51 #define IMM64_IMM41a_VAL_POS_X          22
  52
  53 #define IMM64_IMM41b_INST_WORD_X        1
  54 #define IMM64_IMM41b_SIZE_X             8
  55 #define IMM64_IMM41b_INST_WORD_POS_X    24
  56 #define IMM64_IMM41b_VAL_POS_X          32
  57
  58 #define IMM64_IMM41c_INST_WORD_X        2
  59 #define IMM64_IMM41c_SIZE_X             23
  60 #define IMM64_IMM41c_INST_WORD_POS_X    0
  61 #define IMM64_IMM41c_VAL_POS_X          40
  62
  63 #define IMM64_SIGN_INST_WORD_X          3
  64 #define IMM64_SIGN_SIZE_X               1
  65 #define IMM64_SIGN_INST_WORD_POS_X      27
  66 #define IMM64_SIGN_VAL_POS_X            63
  67
  68 /**
  69   Performs an Itanium-based specific relocation fixup.
  70
  71   @param  Reloc       Pointer to the relocation record.
  72   @param  Fixup       Pointer to the address to fix up.
  73   @param  FixupData   Pointer to a buffer to log the fixups.
  74   @param  Adjust      The offset to adjust the fixup.
  75
  76   @return Status code.
  77
  78 **/
  79 RETURN_STATUS
  80 PeCoffLoaderRelocateImageEx (
  81   IN UINT16      *Reloc,
  82   IN OUT CHAR8   *Fixup,
  83   IN OUT CHAR8   **FixupData,
  84   IN UINT64      Adjust
  85   )
  86 {
  87   UINT64      *F64;
  88   UINT64      FixupVal;
  89
  90   switch ((*Reloc) >> 12) {
  91
  92     case EFI_IMAGE_REL_BASED_DIR64:
  93       F64 = (UINT64 *) Fixup;
  94       *F64 = *F64 + (UINT64) Adjust;
  95       if (*FixupData != NULL) {
  96         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
  97         *(UINT64 *)(*FixupData) = *F64;
  98         *FixupData = *FixupData + sizeof(UINT64);
  99       }
 100       break;
 101
 102     case EFI_IMAGE_REL_BASED_IA64_IMM64:
 103
 104       //
 105       // Align it to bundle address before fixing up the
 106       // 64-bit immediate value of the movl instruction.
 107       //
 108
 109       Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));
 110       FixupVal = (UINT64)0;
 111
 112       //
 113       // Extract the lower 32 bits of IMM64 from bundle
 114       //
 115       EXT_IMM64(FixupVal,
 116                 (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,
 117                 IMM64_IMM7B_SIZE_X,
 118                 IMM64_IMM7B_INST_WORD_POS_X,
 119                 IMM64_IMM7B_VAL_POS_X
 120                 );
 121
 122       EXT_IMM64(FixupVal,
 123                 (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,
 124                 IMM64_IMM9D_SIZE_X,
 125                 IMM64_IMM9D_INST_WORD_POS_X,
 126                 IMM64_IMM9D_VAL_POS_X
 127                 );
 128
 129       EXT_IMM64(FixupVal,
 130                 (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,
 131                 IMM64_IMM5C_SIZE_X,
 132                 IMM64_IMM5C_INST_WORD_POS_X,
 133                 IMM64_IMM5C_VAL_POS_X
 134                 );
 135
 136       EXT_IMM64(FixupVal,
 137                 (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,
 138                 IMM64_IC_SIZE_X,
 139                 IMM64_IC_INST_WORD_POS_X,
 140                 IMM64_IC_VAL_POS_X
 141                 );
 142
 143       EXT_IMM64(FixupVal,
 144                 (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,
 145                 IMM64_IMM41a_SIZE_X,
 146                 IMM64_IMM41a_INST_WORD_POS_X,
 147                 IMM64_IMM41a_VAL_POS_X
 148                 );
 149
 150       //
 151       // Update 64-bit address
 152       //
 153       FixupVal += Adjust;
 154
 155       //
 156       // Insert IMM64 into bundle
 157       //
 158       INS_IMM64(FixupVal,
 159                 ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),
 160                 IMM64_IMM7B_SIZE_X,
 161                 IMM64_IMM7B_INST_WORD_POS_X,
 162                 IMM64_IMM7B_VAL_POS_X
 163                 );
 164
 165       INS_IMM64(FixupVal,
 166                 ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),
 167                 IMM64_IMM9D_SIZE_X,
 168                 IMM64_IMM9D_INST_WORD_POS_X,
 169                 IMM64_IMM9D_VAL_POS_X
 170                 );
 171
 172       INS_IMM64(FixupVal,
 173                 ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),
 174                 IMM64_IMM5C_SIZE_X,
 175                 IMM64_IMM5C_INST_WORD_POS_X,
 176                 IMM64_IMM5C_VAL_POS_X
 177                 );
 178
 179       INS_IMM64(FixupVal,
 180                 ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),
 181                 IMM64_IC_SIZE_X,
 182                 IMM64_IC_INST_WORD_POS_X,
 183                 IMM64_IC_VAL_POS_X
 184                 );
 185
 186       INS_IMM64(FixupVal,
 187                 ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),
 188                 IMM64_IMM41a_SIZE_X,
 189                 IMM64_IMM41a_INST_WORD_POS_X,
 190                 IMM64_IMM41a_VAL_POS_X
 191                 );
 192
 193       INS_IMM64(FixupVal,
 194                 ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),
 195                 IMM64_IMM41b_SIZE_X,
 196                 IMM64_IMM41b_INST_WORD_POS_X,
 197                 IMM64_IMM41b_VAL_POS_X
 198                 );
 199
 200       INS_IMM64(FixupVal,
 201                 ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),
 202                 IMM64_IMM41c_SIZE_X,
 203                 IMM64_IMM41c_INST_WORD_POS_X,
 204                 IMM64_IMM41c_VAL_POS_X
 205                 );
 206
 207       INS_IMM64(FixupVal,
 208                 ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),
 209                 IMM64_SIGN_SIZE_X,
 210                 IMM64_SIGN_INST_WORD_POS_X,
 211                 IMM64_SIGN_VAL_POS_X
 212                 );
 213
 214       F64 = (UINT64 *) Fixup;
 215       if (*FixupData != NULL) {
 216         *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
 217         *(UINT64 *)(*FixupData) = *F64;
 218         *FixupData = *FixupData + sizeof(UINT64);
 219       }
 220       break;
 221
 222     default:
 223       return RETURN_UNSUPPORTED;
 224   }
 225
 226   return RETURN_SUCCESS;
 227 }