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1 /** @file
2 I/O Library.
3
4 Copyright (c) 2006, Intel Corporation<BR>
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name: IoLib.c
14
15 **/
16
17 //
18 // Globle varible to cache pointer to CpuIo protocol.
19 //
20 STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
21
22 /**
23 The constructor function caches the pointer to CpuIo protocol.
24
25 The constructor function locates CpuIo protocol from protocol database.
26 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
27
28 @param ImageHandle The firmware allocated handle for the EFI image.
29 @param SystemTable A pointer to the EFI System Table.
30
31 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
32
33 **/
34 EFI_STATUS
35 EFIAPI
36 IoLibConstructor (
37 IN EFI_HANDLE ImageHandle,
38 IN EFI_SYSTEM_TABLE *SystemTable
39 )
40 {
41 EFI_STATUS Status;
42
43 Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);
44 ASSERT_EFI_ERROR (Status);
45
46 return Status;
47 }
48
49 /**
50 Reads registers in the EFI CPU I/O space.
51
52 Reads the I/O port specified by Port with registers width specified by Width.
53 The read value is returned. If such operations are not supported, then ASSERT().
54 This function must guarantee that all I/O read and write operations are serialized.
55
56 @param Port The base address of the I/O operation.
57 The caller is responsible for aligning the Address if required.
58 @param Width The width of the I/O operation.
59
60 @return Data read from registers in the EFI CPU I/O space.
61
62 **/
63 UINT64
64 EFIAPI
65 IoReadWorker (
66 IN UINTN Port,
67 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
68 )
69 {
70 EFI_STATUS Status;
71 UINT64 Data;
72
73 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
74 ASSERT_EFI_ERROR (Status);
75
76 return Data;
77 }
78
79 /**
80 Writes registers in the EFI CPU I/O space.
81
82 Writes the I/O port specified by Port with registers width and value specified by Width
83 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
84 This function must guarantee that all I/O read and write operations are serialized.
85
86 @param Port The base address of the I/O operation.
87 The caller is responsible for aligning the Address if required.
88 @param Width The width of the I/O operation.
89 @param Data The value to write to the I/O port.
90
91 @return The paramter of Data.
92
93 **/
94 UINT64
95 EFIAPI
96 IoWriteWorker (
97 IN UINTN Port,
98 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
99 IN UINT64 Data
100 )
101 {
102 EFI_STATUS Status;
103
104 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
105 ASSERT_EFI_ERROR (Status);
106
107 return Data;
108 }
109
110 /**
111 Reads memory-mapped registers in the EFI system memory space.
112
113 Reads the MMIO registers specified by Address with registers width specified by Width.
114 The read value is returned. If such operations are not supported, then ASSERT().
115 This function must guarantee that all MMIO read and write operations are serialized.
116
117 @param Address The MMIO register to read.
118 The caller is responsible for aligning the Address if required.
119 @param Width The width of the I/O operation.
120
121 @return Data read from registers in the EFI system memory space.
122
123 **/
124 UINT64
125 EFIAPI
126 MmioReadWorker (
127 IN UINTN Address,
128 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
129 )
130 {
131 EFI_STATUS Status;
132 UINT64 Data;
133
134 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
135 ASSERT_EFI_ERROR (Status);
136
137 return Data;
138 }
139
140 /**
141 Writes memory-mapped registers in the EFI system memory space.
142
143 Writes the MMIO registers specified by Address with registers width and value specified by Width
144 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
145 This function must guarantee that all MMIO read and write operations are serialized.
146
147 @param Address The MMIO register to read.
148 The caller is responsible for aligning the Address if required.
149 @param Width The width of the I/O operation.
150
151 @return Data read from registers in the EFI system memory space.
152
153 **/
154 UINT64
155 EFIAPI
156 MmioWriteWorker (
157 IN UINTN Address,
158 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
159 IN UINT64 Data
160 )
161 {
162 EFI_STATUS Status;
163
164 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
165 ASSERT_EFI_ERROR (Status);
166
167 return Data;
168 }
169
170 /**
171 Reads an 8-bit I/O port.
172
173 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
174 This function must guarantee that all I/O read and write operations are
175 serialized.
176
177 If 8-bit I/O port operations are not supported, then ASSERT().
178
179 @param Port The I/O port to read.
180
181 @return The value read.
182
183 **/
184 UINT8
185 EFIAPI
186 IoRead8 (
187 IN UINTN Port
188 )
189 {
190 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
191 }
192
193 /**
194 Writes an 8-bit I/O port.
195
196 Writes the 8-bit I/O port specified by Port with the value specified by Value
197 and returns Value. This function must guarantee that all I/O read and write
198 operations are serialized.
199
200 If 8-bit I/O port operations are not supported, then ASSERT().
201
202 @param Port The I/O port to write.
203 @param Value The value to write to the I/O port.
204
205 @return The value written the I/O port.
206
207 **/
208 UINT8
209 EFIAPI
210 IoWrite8 (
211 IN UINTN Port,
212 IN UINT8 Value
213 )
214 {
215 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
216 }
217
218 /**
219 Reads a 16-bit I/O port.
220
221 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
222 This function must guarantee that all I/O read and write operations are
223 serialized.
224
225 If 16-bit I/O port operations are not supported, then ASSERT().
226
227 @param Port The I/O port to read.
228
229 @return The value read.
230
231 **/
232 UINT16
233 EFIAPI
234 IoRead16 (
235 IN UINTN Port
236 )
237 {
238 //
239 // Make sure Port is aligned on a 16-bit boundary.
240 //
241 ASSERT ((Port & 1) == 0);
242 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
243 }
244
245 /**
246 Writes a 16-bit I/O port.
247
248 Writes the 16-bit I/O port specified by Port with the value specified by Value
249 and returns Value. This function must guarantee that all I/O read and write
250 operations are serialized.
251
252 If 16-bit I/O port operations are not supported, then ASSERT().
253
254 @param Port The I/O port to write.
255 @param Value The value to write to the I/O port.
256
257 @return The value written the I/O port.
258
259 **/
260 UINT16
261 EFIAPI
262 IoWrite16 (
263 IN UINTN Port,
264 IN UINT16 Value
265 )
266 {
267 //
268 // Make sure Port is aligned on a 16-bit boundary.
269 //
270 ASSERT ((Port & 1) == 0);
271 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
272 }
273
274 /**
275 Reads a 32-bit I/O port.
276
277 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
278 This function must guarantee that all I/O read and write operations are
279 serialized.
280
281 If 32-bit I/O port operations are not supported, then ASSERT().
282
283 @param Port The I/O port to read.
284
285 @return The value read.
286
287 **/
288 UINT32
289 EFIAPI
290 IoRead32 (
291 IN UINTN Port
292 )
293 {
294 //
295 // Make sure Port is aligned on a 32-bit boundary.
296 //
297 ASSERT ((Port & 3) == 0);
298 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
299 }
300
301 /**
302 Writes a 32-bit I/O port.
303
304 Writes the 32-bit I/O port specified by Port with the value specified by Value
305 and returns Value. This function must guarantee that all I/O read and write
306 operations are serialized.
307
308 If 32-bit I/O port operations are not supported, then ASSERT().
309
310 @param Port The I/O port to write.
311 @param Value The value to write to the I/O port.
312
313 @return The value written the I/O port.
314
315 **/
316 UINT32
317 EFIAPI
318 IoWrite32 (
319 IN UINTN Port,
320 IN UINT32 Value
321 )
322 {
323 //
324 // Make sure Port is aligned on a 32-bit boundary.
325 //
326 ASSERT ((Port & 3) == 0);
327 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
328 }
329
330 /**
331 Reads a 64-bit I/O port.
332
333 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
334 This function must guarantee that all I/O read and write operations are
335 serialized.
336
337 If 64-bit I/O port operations are not supported, then ASSERT().
338
339 @param Port The I/O port to read.
340
341 @return The value read.
342
343 **/
344 UINT64
345 EFIAPI
346 IoRead64 (
347 IN UINTN Port
348 )
349 {
350 //
351 // Make sure Port is aligned on a 64-bit boundary.
352 //
353 ASSERT ((Port & 7) == 0);
354 return IoReadWorker (Port, EfiCpuIoWidthUint64);
355 }
356
357 /**
358 Writes a 64-bit I/O port.
359
360 Writes the 64-bit I/O port specified by Port with the value specified by Value
361 and returns Value. This function must guarantee that all I/O read and write
362 operations are serialized.
363
364 If 64-bit I/O port operations are not supported, then ASSERT().
365
366 @param Port The I/O port to write.
367 @param Value The value to write to the I/O port.
368
369 @return The value written the I/O port.
370
371 **/
372 UINT64
373 EFIAPI
374 IoWrite64 (
375 IN UINTN Port,
376 IN UINT64 Value
377 )
378 {
379 //
380 // Make sure Port is aligned on a 64-bit boundary.
381 //
382 ASSERT ((Port & 7) == 0);
383 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
384 }
385
386 /**
387 Reads an 8-bit MMIO register.
388
389 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
390 returned. This function must guarantee that all MMIO read and write
391 operations are serialized.
392
393 If 8-bit MMIO register operations are not supported, then ASSERT().
394
395 @param Address The MMIO register to read.
396
397 @return The value read.
398
399 **/
400 UINT8
401 EFIAPI
402 MmioRead8 (
403 IN UINTN Address
404 )
405 {
406 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
407 }
408
409 /**
410 Writes an 8-bit MMIO register.
411
412 Writes the 8-bit MMIO register specified by Address with the value specified
413 by Value and returns Value. This function must guarantee that all MMIO read
414 and write operations are serialized.
415
416 If 8-bit MMIO register operations are not supported, then ASSERT().
417
418 @param Address The MMIO register to write.
419 @param Value The value to write to the MMIO register.
420
421 **/
422 UINT8
423 EFIAPI
424 MmioWrite8 (
425 IN UINTN Address,
426 IN UINT8 Value
427 )
428 {
429 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
430 }
431
432 /**
433 Reads a 16-bit MMIO register.
434
435 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
436 returned. This function must guarantee that all MMIO read and write
437 operations are serialized.
438
439 If 16-bit MMIO register operations are not supported, then ASSERT().
440
441 @param Address The MMIO register to read.
442
443 @return The value read.
444
445 **/
446 UINT16
447 EFIAPI
448 MmioRead16 (
449 IN UINTN Address
450 )
451 {
452 //
453 // Make sure Address is aligned on a 16-bit boundary.
454 //
455 ASSERT ((Address & 1) == 0);
456 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
457 }
458
459 /**
460 Writes a 16-bit MMIO register.
461
462 Writes the 16-bit MMIO register specified by Address with the value specified
463 by Value and returns Value. This function must guarantee that all MMIO read
464 and write operations are serialized.
465
466 If 16-bit MMIO register operations are not supported, then ASSERT().
467
468 @param Address The MMIO register to write.
469 @param Value The value to write to the MMIO register.
470
471 **/
472 UINT16
473 EFIAPI
474 MmioWrite16 (
475 IN UINTN Address,
476 IN UINT16 Value
477 )
478 {
479 //
480 // Make sure Address is aligned on a 16-bit boundary.
481 //
482 ASSERT ((Address & 1) == 0);
483 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
484 }
485
486 /**
487 Reads a 32-bit MMIO register.
488
489 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
490 returned. This function must guarantee that all MMIO read and write
491 operations are serialized.
492
493 If 32-bit MMIO register operations are not supported, then ASSERT().
494
495 @param Address The MMIO register to read.
496
497 @return The value read.
498
499 **/
500 UINT32
501 EFIAPI
502 MmioRead32 (
503 IN UINTN Address
504 )
505 {
506 //
507 // Make sure Address is aligned on a 32-bit boundary.
508 //
509 ASSERT ((Address & 3) == 0);
510 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
511 }
512
513 /**
514 Writes a 32-bit MMIO register.
515
516 Writes the 32-bit MMIO register specified by Address with the value specified
517 by Value and returns Value. This function must guarantee that all MMIO read
518 and write operations are serialized.
519
520 If 32-bit MMIO register operations are not supported, then ASSERT().
521
522 @param Address The MMIO register to write.
523 @param Value The value to write to the MMIO register.
524
525 **/
526 UINT32
527 EFIAPI
528 MmioWrite32 (
529 IN UINTN Address,
530 IN UINT32 Value
531 )
532 {
533 //
534 // Make sure Address is aligned on a 32-bit boundary.
535 //
536 ASSERT ((Address & 3) == 0);
537 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
538 }
539
540 /**
541 Reads a 64-bit MMIO register.
542
543 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
544 returned. This function must guarantee that all MMIO read and write
545 operations are serialized.
546
547 If 64-bit MMIO register operations are not supported, then ASSERT().
548
549 @param Address The MMIO register to read.
550
551 @return The value read.
552
553 **/
554 UINT64
555 EFIAPI
556 MmioRead64 (
557 IN UINTN Address
558 )
559 {
560 //
561 // Make sure Address is aligned on a 64-bit boundary.
562 //
563 ASSERT ((Address & 7) == 0);
564 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
565 }
566
567 /**
568 Writes a 64-bit MMIO register.
569
570 Writes the 64-bit MMIO register specified by Address with the value specified
571 by Value and returns Value. This function must guarantee that all MMIO read
572 and write operations are serialized.
573
574 If 64-bit MMIO register operations are not supported, then ASSERT().
575
576 @param Address The MMIO register to write.
577 @param Value The value to write to the MMIO register.
578
579 **/
580 UINT64
581 EFIAPI
582 MmioWrite64 (
583 IN UINTN Address,
584 IN UINT64 Value
585 )
586 {
587 //
588 // Make sure Address is aligned on a 64-bit boundary.
589 //
590 ASSERT ((Address & 7) == 0);
591 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
592 }