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1 /** @file
2 I/O Library instance based on EFI_CPU_IO2_PROTOCOL.
3
4 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #include "DxeCpuIo2LibInternal.h"
12
13 //
14 // Globle varible to cache pointer to CpuIo2 protocol.
15 //
16 EFI_CPU_IO2_PROTOCOL *mCpuIo = NULL;
17
18 /**
19 The constructor function caches the pointer to CpuIo2 protocol.
20
21 The constructor function locates CpuIo2 protocol from protocol database.
22 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
23
24 @param ImageHandle The firmware allocated handle for the EFI image.
25 @param SystemTable A pointer to the EFI System Table.
26
27 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
28
29 **/
30 EFI_STATUS
31 EFIAPI
32 IoLibConstructor (
33 IN EFI_HANDLE ImageHandle,
34 IN EFI_SYSTEM_TABLE *SystemTable
35 )
36 {
37 EFI_STATUS Status;
38
39 Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo);
40 ASSERT_EFI_ERROR (Status);
41
42 return Status;
43 }
44
45 /**
46 Reads registers in the EFI CPU I/O space.
47
48 Reads the I/O port specified by Port with registers width specified by Width.
49 The read value is returned.
50
51 This function must guarantee that all I/O read and write operations are serialized.
52 If such operations are not supported, then ASSERT().
53
54 @param Port The base address of the I/O operation.
55 The caller is responsible for aligning the Address if required.
56 @param Width The width of the I/O operation.
57
58 @return Data read from registers in the EFI CPU I/O space.
59
60 **/
61 UINT64
62 EFIAPI
63 IoReadWorker (
64 IN UINTN Port,
65 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
66 )
67 {
68 EFI_STATUS Status;
69 UINT64 Data;
70
71 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
72 ASSERT_EFI_ERROR (Status);
73
74 return Data;
75 }
76
77 /**
78 Writes registers in the EFI CPU I/O space.
79
80 Writes the I/O port specified by Port with registers width and value specified by Width
81 and Data respectively. Data is returned.
82
83 This function must guarantee that all I/O read and write operations are serialized.
84 If such operations are not supported, then ASSERT().
85
86 @param Port The base address of the I/O operation.
87 The caller is responsible for aligning the Address if required.
88 @param Width The width of the I/O operation.
89 @param Data The value to write to the I/O port.
90
91 @return The parameter of Data.
92
93 **/
94 UINT64
95 EFIAPI
96 IoWriteWorker (
97 IN UINTN Port,
98 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
99 IN UINT64 Data
100 )
101 {
102 EFI_STATUS Status;
103
104 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
105 ASSERT_EFI_ERROR (Status);
106
107 return Data;
108 }
109
110 /**
111 Reads registers in the EFI CPU I/O space.
112
113 Reads the I/O port specified by Port with registers width specified by Width.
114 The port is read Count times, and the read data is stored in the provided Buffer.
115
116 This function must guarantee that all I/O read and write operations are serialized.
117 If such operations are not supported, then ASSERT().
118
119 @param Port The base address of the I/O operation.
120 The caller is responsible for aligning the Address if required.
121 @param Width The width of the I/O operation.
122 @param Count The number of times to read I/O port.
123 @param Buffer The buffer to store the read data into.
124
125 **/
126 VOID
127 EFIAPI
128 IoReadFifoWorker (
129 IN UINTN Port,
130 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
131 IN UINTN Count,
132 IN VOID *Buffer
133 )
134 {
135 EFI_STATUS Status;
136
137 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
138 ASSERT_EFI_ERROR (Status);
139 }
140
141 /**
142 Writes registers in the EFI CPU I/O space.
143
144 Writes the I/O port specified by Port with registers width specified by Width.
145 The port is written Count times, and the write data is retrieved from the provided Buffer.
146
147 This function must guarantee that all I/O read and write operations are serialized.
148 If such operations are not supported, then ASSERT().
149
150 @param Port The base address of the I/O operation.
151 The caller is responsible for aligning the Address if required.
152 @param Width The width of the I/O operation.
153 @param Count The number of times to write I/O port.
154 @param Buffer The buffer to store the read data into.
155
156 **/
157 VOID
158 EFIAPI
159 IoWriteFifoWorker (
160 IN UINTN Port,
161 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
162 IN UINTN Count,
163 IN VOID *Buffer
164 )
165 {
166 EFI_STATUS Status;
167
168 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
169 ASSERT_EFI_ERROR (Status);
170 }
171
172 /**
173 Reads memory-mapped registers in the EFI system memory space.
174
175 Reads the MMIO registers specified by Address with registers width specified by Width.
176 The read value is returned. If such operations are not supported, then ASSERT().
177 This function must guarantee that all MMIO read and write operations are serialized.
178
179 @param Address The MMIO register to read.
180 The caller is responsible for aligning the Address if required.
181 @param Width The width of the I/O operation.
182
183 @return Data read from registers in the EFI system memory space.
184
185 **/
186 UINT64
187 EFIAPI
188 MmioReadWorker (
189 IN UINTN Address,
190 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
191 )
192 {
193 EFI_STATUS Status;
194 UINT64 Data;
195
196 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
197 ASSERT_EFI_ERROR (Status);
198
199 return Data;
200 }
201
202 /**
203 Writes memory-mapped registers in the EFI system memory space.
204
205 Writes the MMIO registers specified by Address with registers width and value specified by Width
206 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
207 This function must guarantee that all MMIO read and write operations are serialized.
208
209 @param Address The MMIO register to read.
210 The caller is responsible for aligning the Address if required.
211 @param Width The width of the I/O operation.
212 @param Data The value to write to the I/O port.
213
214 @return Data read from registers in the EFI system memory space.
215
216 **/
217 UINT64
218 EFIAPI
219 MmioWriteWorker (
220 IN UINTN Address,
221 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
222 IN UINT64 Data
223 )
224 {
225 EFI_STATUS Status;
226
227 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
228 ASSERT_EFI_ERROR (Status);
229
230 return Data;
231 }
232
233 /**
234 Reads an 8-bit I/O port.
235
236 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
237 This function must guarantee that all I/O read and write operations are
238 serialized.
239
240 If 8-bit I/O port operations are not supported, then ASSERT().
241
242 @param Port The I/O port to read.
243
244 @return The value read.
245
246 **/
247 UINT8
248 EFIAPI
249 IoRead8 (
250 IN UINTN Port
251 )
252 {
253 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
254 }
255
256 /**
257 Writes an 8-bit I/O port.
258
259 Writes the 8-bit I/O port specified by Port with the value specified by Value
260 and returns Value. This function must guarantee that all I/O read and write
261 operations are serialized.
262
263 If 8-bit I/O port operations are not supported, then ASSERT().
264
265 @param Port The I/O port to write.
266 @param Value The value to write to the I/O port.
267
268 @return The value written the I/O port.
269
270 **/
271 UINT8
272 EFIAPI
273 IoWrite8 (
274 IN UINTN Port,
275 IN UINT8 Value
276 )
277 {
278 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
279 }
280
281 /**
282 Reads a 16-bit I/O port.
283
284 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
285 This function must guarantee that all I/O read and write operations are
286 serialized.
287
288 If Port is not aligned on a 16-bit boundary, then ASSERT().
289
290 If 16-bit I/O port operations are not supported, then ASSERT().
291
292 @param Port The I/O port to read.
293
294 @return The value read.
295
296 **/
297 UINT16
298 EFIAPI
299 IoRead16 (
300 IN UINTN Port
301 )
302 {
303 //
304 // Make sure Port is aligned on a 16-bit boundary.
305 //
306 ASSERT ((Port & 1) == 0);
307 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
308 }
309
310 /**
311 Writes a 16-bit I/O port.
312
313 Writes the 16-bit I/O port specified by Port with the value specified by Value
314 and returns Value. This function must guarantee that all I/O read and write
315 operations are serialized.
316
317 If Port is not aligned on a 16-bit boundary, then ASSERT().
318
319 If 16-bit I/O port operations are not supported, then ASSERT().
320
321 @param Port The I/O port to write.
322 @param Value The value to write to the I/O port.
323
324 @return The value written the I/O port.
325
326 **/
327 UINT16
328 EFIAPI
329 IoWrite16 (
330 IN UINTN Port,
331 IN UINT16 Value
332 )
333 {
334 //
335 // Make sure Port is aligned on a 16-bit boundary.
336 //
337 ASSERT ((Port & 1) == 0);
338 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
339 }
340
341 /**
342 Reads a 32-bit I/O port.
343
344 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
345 This function must guarantee that all I/O read and write operations are
346 serialized.
347
348 If Port is not aligned on a 32-bit boundary, then ASSERT().
349
350 If 32-bit I/O port operations are not supported, then ASSERT().
351
352 @param Port The I/O port to read.
353
354 @return The value read.
355
356 **/
357 UINT32
358 EFIAPI
359 IoRead32 (
360 IN UINTN Port
361 )
362 {
363 //
364 // Make sure Port is aligned on a 32-bit boundary.
365 //
366 ASSERT ((Port & 3) == 0);
367 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
368 }
369
370 /**
371 Writes a 32-bit I/O port.
372
373 Writes the 32-bit I/O port specified by Port with the value specified by Value
374 and returns Value. This function must guarantee that all I/O read and write
375 operations are serialized.
376
377 If Port is not aligned on a 32-bit boundary, then ASSERT().
378
379 If 32-bit I/O port operations are not supported, then ASSERT().
380
381 @param Port The I/O port to write.
382 @param Value The value to write to the I/O port.
383
384 @return The value written the I/O port.
385
386 **/
387 UINT32
388 EFIAPI
389 IoWrite32 (
390 IN UINTN Port,
391 IN UINT32 Value
392 )
393 {
394 //
395 // Make sure Port is aligned on a 32-bit boundary.
396 //
397 ASSERT ((Port & 3) == 0);
398 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
399 }
400
401 /**
402 Reads a 64-bit I/O port.
403
404 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
405 This function must guarantee that all I/O read and write operations are
406 serialized.
407
408 If Port is not aligned on a 64-bit boundary, then ASSERT().
409
410 If 64-bit I/O port operations are not supported, then ASSERT().
411
412 @param Port The I/O port to read.
413
414 @return The value read.
415
416 **/
417 UINT64
418 EFIAPI
419 IoRead64 (
420 IN UINTN Port
421 )
422 {
423 //
424 // Make sure Port is aligned on a 64-bit boundary.
425 //
426 ASSERT ((Port & 7) == 0);
427 return IoReadWorker (Port, EfiCpuIoWidthUint64);
428 }
429
430 /**
431 Writes a 64-bit I/O port.
432
433 Writes the 64-bit I/O port specified by Port with the value specified by Value
434 and returns Value. This function must guarantee that all I/O read and write
435 operations are serialized.
436
437 If Port is not aligned on a 64-bit boundary, then ASSERT().
438
439 If 64-bit I/O port operations are not supported, then ASSERT().
440
441 @param Port The I/O port to write.
442 @param Value The value to write to the I/O port.
443
444 @return The value written the I/O port.
445
446 **/
447 UINT64
448 EFIAPI
449 IoWrite64 (
450 IN UINTN Port,
451 IN UINT64 Value
452 )
453 {
454 //
455 // Make sure Port is aligned on a 64-bit boundary.
456 //
457 ASSERT ((Port & 7) == 0);
458 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
459 }
460
461 /**
462 Reads an 8-bit I/O port fifo into a block of memory.
463
464 Reads the 8-bit I/O fifo port specified by Port.
465 The port is read Count times, and the read data is
466 stored in the provided Buffer.
467
468 This function must guarantee that all I/O read and write operations are
469 serialized.
470
471 If 8-bit I/O port operations are not supported, then ASSERT().
472
473 @param Port The I/O port to read.
474 @param Count The number of times to read I/O port.
475 @param Buffer The buffer to store the read data into.
476
477 **/
478 VOID
479 EFIAPI
480 IoReadFifo8 (
481 IN UINTN Port,
482 IN UINTN Count,
483 OUT VOID *Buffer
484 )
485 {
486 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
487 }
488
489 /**
490 Writes a block of memory into an 8-bit I/O port fifo.
491
492 Writes the 8-bit I/O fifo port specified by Port.
493 The port is written Count times, and the write data is
494 retrieved from the provided Buffer.
495
496 This function must guarantee that all I/O write and write operations are
497 serialized.
498
499 If 8-bit I/O port operations are not supported, then ASSERT().
500
501 @param Port The I/O port to write.
502 @param Count The number of times to write I/O port.
503 @param Buffer The buffer to retrieve the write data from.
504
505 **/
506 VOID
507 EFIAPI
508 IoWriteFifo8 (
509 IN UINTN Port,
510 IN UINTN Count,
511 IN VOID *Buffer
512 )
513 {
514 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
515 }
516
517 /**
518 Reads a 16-bit I/O port fifo into a block of memory.
519
520 Reads the 16-bit I/O fifo port specified by Port.
521 The port is read Count times, and the read data is
522 stored in the provided Buffer.
523
524 This function must guarantee that all I/O read and write operations are
525 serialized.
526
527 If 16-bit I/O port operations are not supported, then ASSERT().
528
529 @param Port The I/O port to read.
530 @param Count The number of times to read I/O port.
531 @param Buffer The buffer to store the read data into.
532
533 **/
534 VOID
535 EFIAPI
536 IoReadFifo16 (
537 IN UINTN Port,
538 IN UINTN Count,
539 OUT VOID *Buffer
540 )
541 {
542 //
543 // Make sure Port is aligned on a 16-bit boundary.
544 //
545 ASSERT ((Port & 1) == 0);
546 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
547 }
548
549 /**
550 Writes a block of memory into a 16-bit I/O port fifo.
551
552 Writes the 16-bit I/O fifo port specified by Port.
553 The port is written Count times, and the write data is
554 retrieved from the provided Buffer.
555
556 This function must guarantee that all I/O write and write operations are
557 serialized.
558
559 If 16-bit I/O port operations are not supported, then ASSERT().
560
561 @param Port The I/O port to write.
562 @param Count The number of times to write I/O port.
563 @param Buffer The buffer to retrieve the write data from.
564
565 **/
566 VOID
567 EFIAPI
568 IoWriteFifo16 (
569 IN UINTN Port,
570 IN UINTN Count,
571 IN VOID *Buffer
572 )
573 {
574 //
575 // Make sure Port is aligned on a 16-bit boundary.
576 //
577 ASSERT ((Port & 1) == 0);
578 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
579 }
580
581 /**
582 Reads a 32-bit I/O port fifo into a block of memory.
583
584 Reads the 32-bit I/O fifo port specified by Port.
585 The port is read Count times, and the read data is
586 stored in the provided Buffer.
587
588 This function must guarantee that all I/O read and write operations are
589 serialized.
590
591 If 32-bit I/O port operations are not supported, then ASSERT().
592
593 @param Port The I/O port to read.
594 @param Count The number of times to read I/O port.
595 @param Buffer The buffer to store the read data into.
596
597 **/
598 VOID
599 EFIAPI
600 IoReadFifo32 (
601 IN UINTN Port,
602 IN UINTN Count,
603 OUT VOID *Buffer
604 )
605 {
606 //
607 // Make sure Port is aligned on a 32-bit boundary.
608 //
609 ASSERT ((Port & 3) == 0);
610 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
611 }
612
613 /**
614 Writes a block of memory into a 32-bit I/O port fifo.
615
616 Writes the 32-bit I/O fifo port specified by Port.
617 The port is written Count times, and the write data is
618 retrieved from the provided Buffer.
619
620 This function must guarantee that all I/O write and write operations are
621 serialized.
622
623 If 32-bit I/O port operations are not supported, then ASSERT().
624
625 @param Port The I/O port to write.
626 @param Count The number of times to write I/O port.
627 @param Buffer The buffer to retrieve the write data from.
628
629 **/
630 VOID
631 EFIAPI
632 IoWriteFifo32 (
633 IN UINTN Port,
634 IN UINTN Count,
635 IN VOID *Buffer
636 )
637 {
638 //
639 // Make sure Port is aligned on a 32-bit boundary.
640 //
641 ASSERT ((Port & 3) == 0);
642 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
643 }
644
645 /**
646 Reads an 8-bit MMIO register.
647
648 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
649 returned. This function must guarantee that all MMIO read and write
650 operations are serialized.
651
652 If 8-bit MMIO register operations are not supported, then ASSERT().
653
654 @param Address The MMIO register to read.
655
656 @return The value read.
657
658 **/
659 UINT8
660 EFIAPI
661 MmioRead8 (
662 IN UINTN Address
663 )
664 {
665 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
666 }
667
668 /**
669 Writes an 8-bit MMIO register.
670
671 Writes the 8-bit MMIO register specified by Address with the value specified
672 by Value and returns Value. This function must guarantee that all MMIO read
673 and write operations are serialized.
674
675 If 8-bit MMIO register operations are not supported, then ASSERT().
676
677 @param Address The MMIO register to write.
678 @param Value The value to write to the MMIO register.
679
680 **/
681 UINT8
682 EFIAPI
683 MmioWrite8 (
684 IN UINTN Address,
685 IN UINT8 Value
686 )
687 {
688 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
689 }
690
691 /**
692 Reads a 16-bit MMIO register.
693
694 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
695 returned. This function must guarantee that all MMIO read and write
696 operations are serialized.
697
698 If Address is not aligned on a 16-bit boundary, then ASSERT().
699
700 If 16-bit MMIO register operations are not supported, then ASSERT().
701
702 @param Address The MMIO register to read.
703
704 @return The value read.
705
706 **/
707 UINT16
708 EFIAPI
709 MmioRead16 (
710 IN UINTN Address
711 )
712 {
713 //
714 // Make sure Address is aligned on a 16-bit boundary.
715 //
716 ASSERT ((Address & 1) == 0);
717 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
718 }
719
720 /**
721 Writes a 16-bit MMIO register.
722
723 Writes the 16-bit MMIO register specified by Address with the value specified
724 by Value and returns Value. This function must guarantee that all MMIO read
725 and write operations are serialized.
726
727 If Address is not aligned on a 16-bit boundary, then ASSERT().
728
729 If 16-bit MMIO register operations are not supported, then ASSERT().
730
731 @param Address The MMIO register to write.
732 @param Value The value to write to the MMIO register.
733
734 **/
735 UINT16
736 EFIAPI
737 MmioWrite16 (
738 IN UINTN Address,
739 IN UINT16 Value
740 )
741 {
742 //
743 // Make sure Address is aligned on a 16-bit boundary.
744 //
745 ASSERT ((Address & 1) == 0);
746 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
747 }
748
749 /**
750 Reads a 32-bit MMIO register.
751
752 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
753 returned. This function must guarantee that all MMIO read and write
754 operations are serialized.
755
756 If Address is not aligned on a 32-bit boundary, then ASSERT().
757
758 If 32-bit MMIO register operations are not supported, then ASSERT().
759
760 @param Address The MMIO register to read.
761
762 @return The value read.
763
764 **/
765 UINT32
766 EFIAPI
767 MmioRead32 (
768 IN UINTN Address
769 )
770 {
771 //
772 // Make sure Address is aligned on a 32-bit boundary.
773 //
774 ASSERT ((Address & 3) == 0);
775 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
776 }
777
778 /**
779 Writes a 32-bit MMIO register.
780
781 Writes the 32-bit MMIO register specified by Address with the value specified
782 by Value and returns Value. This function must guarantee that all MMIO read
783 and write operations are serialized.
784
785 If Address is not aligned on a 32-bit boundary, then ASSERT().
786
787 If 32-bit MMIO register operations are not supported, then ASSERT().
788
789 @param Address The MMIO register to write.
790 @param Value The value to write to the MMIO register.
791
792 **/
793 UINT32
794 EFIAPI
795 MmioWrite32 (
796 IN UINTN Address,
797 IN UINT32 Value
798 )
799 {
800 //
801 // Make sure Address is aligned on a 32-bit boundary.
802 //
803 ASSERT ((Address & 3) == 0);
804 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
805 }
806
807 /**
808 Reads a 64-bit MMIO register.
809
810 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
811 returned. This function must guarantee that all MMIO read and write
812 operations are serialized.
813
814 If Address is not aligned on a 64-bit boundary, then ASSERT().
815
816 If 64-bit MMIO register operations are not supported, then ASSERT().
817
818 @param Address The MMIO register to read.
819
820 @return The value read.
821
822 **/
823 UINT64
824 EFIAPI
825 MmioRead64 (
826 IN UINTN Address
827 )
828 {
829 //
830 // Make sure Address is aligned on a 64-bit boundary.
831 //
832 ASSERT ((Address & 7) == 0);
833 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
834 }
835
836 /**
837 Writes a 64-bit MMIO register.
838
839 Writes the 64-bit MMIO register specified by Address with the value specified
840 by Value and returns Value. This function must guarantee that all MMIO read
841 and write operations are serialized.
842
843 If Address is not aligned on a 64-bit boundary, then ASSERT().
844
845 If 64-bit MMIO register operations are not supported, then ASSERT().
846
847 @param Address The MMIO register to write.
848 @param Value The value to write to the MMIO register.
849
850 **/
851 UINT64
852 EFIAPI
853 MmioWrite64 (
854 IN UINTN Address,
855 IN UINT64 Value
856 )
857 {
858 //
859 // Make sure Address is aligned on a 64-bit boundary.
860 //
861 ASSERT ((Address & 7) == 0);
862 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
863 }